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1#ifndef PINCTRL_PINCTRL_ABx5O0_H 2#define PINCTRL_PINCTRL_ABx500_H 3 4/* Package definitions */ 5#define PINCTRL_AB8500 0 6#define PINCTRL_AB8540 1 7#define PINCTRL_AB9540 2 8#define PINCTRL_AB8505 3 9 10/* pins alternate function */ 11enum abx500_pin_func { 12 ABX500_DEFAULT, 13 ABX500_ALT_A, 14 ABX500_ALT_B, 15 ABX500_ALT_C, 16}; 17 18/** 19 * struct abx500_function - ABx500 pinctrl mux function 20 * @name: The name of the function, exported to pinctrl core. 21 * @groups: An array of pin groups that may select this function. 22 * @ngroups: The number of entries in @groups. 23 */ 24struct abx500_function { 25 const char *name; 26 const char * const *groups; 27 unsigned ngroups; 28}; 29 30/** 31 * struct abx500_pingroup - describes a ABx500 pin group 32 * @name: the name of this specific pin group 33 * @pins: an array of discrete physical pins used in this group, taken 34 * from the driver-local pin enumeration space 35 * @num_pins: the number of pins in this group array, i.e. the number of 36 * elements in .pins so we can iterate over that array 37 * @altsetting: the altsetting to apply to all pins in this group to 38 * configure them to be used by a function 39 */ 40struct abx500_pingroup { 41 const char *name; 42 const unsigned int *pins; 43 const unsigned npins; 44 int altsetting; 45}; 46 47#define ALTERNATE_FUNCTIONS(pin, sel_bit, alt1, alt2, alta, altb, altc) \ 48{ \ 49 .pin_number = pin, \ 50 .gpiosel_bit = sel_bit, \ 51 .alt_bit1 = alt1, \ 52 .alt_bit2 = alt2, \ 53 .alta_val = alta, \ 54 .altb_val = altb, \ 55 .altc_val = altc, \ 56} 57 58#define UNUSED -1 59/** 60 * struct alternate_functions 61 * @pin_number: The pin number 62 * @gpiosel_bit: Control bit in GPIOSEL register, 63 * @alt_bit1: First AlternateFunction bit used to select the 64 * alternate function 65 * @alt_bit2: Second AlternateFunction bit used to select the 66 * alternate function 67 * 68 * these 3 following fields are necessary due to none 69 * coherency on how to select the altA, altB and altC 70 * function between the ABx500 SOC family when using 71 * alternatfunc register. 72 * @alta_val: value to write in alternatfunc to select altA function 73 * @altb_val: value to write in alternatfunc to select altB function 74 * @altc_val: value to write in alternatfunc to select altC function 75 */ 76struct alternate_functions { 77 unsigned pin_number; 78 s8 gpiosel_bit; 79 s8 alt_bit1; 80 s8 alt_bit2; 81 u8 alta_val; 82 u8 altb_val; 83 u8 altc_val; 84}; 85 86/** 87 * struct pullud - specific pull up/down feature 88 * @first_pin: The pin number of the first pins which support 89 * specific pull up/down 90 * @last_pin: The pin number of the last pins 91 */ 92struct pullud { 93 unsigned first_pin; 94 unsigned last_pin; 95}; 96 97#define GPIO_IRQ_CLUSTER(a, b, c) \ 98{ \ 99 .start = a, \ 100 .end = b, \ 101 .to_irq = c, \ 102} 103 104/** 105 * struct abx500_gpio_irq_cluster - indicates GPIOs which are interrupt 106 * capable 107 * @start: The pin number of the first pin interrupt capable 108 * @end: The pin number of the last pin interrupt capable 109 * @to_irq: The ABx500 GPIO's associated IRQs are clustered 110 * together throughout the interrupt numbers at irregular 111 * intervals. To solve this quandary, we will place the 112 * read-in values into the cluster information table 113 */ 114 115struct abx500_gpio_irq_cluster { 116 int start; 117 int end; 118 int to_irq; 119}; 120 121/** 122 * struct abx500_pinrange - map pin numbers to GPIO offsets 123 * @offset: offset into the GPIO local numberspace, incidentally 124 * identical to the offset into the local pin numberspace 125 * @npins: number of pins to map from both offsets 126 * @altfunc: altfunc setting to be used to enable GPIO on a pin in 127 * this range (may vary) 128 */ 129struct abx500_pinrange { 130 unsigned int offset; 131 unsigned int npins; 132 int altfunc; 133}; 134 135#define ABX500_PINRANGE(a, b, c) { .offset = a, .npins = b, .altfunc = c } 136 137/** 138 * struct abx500_pinctrl_soc_data - ABx500 pin controller per-SoC configuration 139 * @gpio_ranges: An array of GPIO ranges for this SoC 140 * @gpio_num_ranges: The number of GPIO ranges for this SoC 141 * @pins: An array describing all pins the pin controller affects. 142 * All pins which are also GPIOs must be listed first within the 143 * array, and be numbered identically to the GPIO controller's 144 * numbering. 145 * @npins: The number of entries in @pins. 146 * @functions: The functions supported on this SoC. 147 * @nfunction: The number of entries in @functions. 148 * @groups: An array describing all pin groups the pin SoC supports. 149 * @ngroups: The number of entries in @groups. 150 * @alternate_functions: array describing pins which supports alternate and 151 * how to set it. 152 * @pullud: array describing pins which supports pull up/down 153 * specific registers. 154 * @gpio_irq_cluster: An array of GPIO interrupt capable for this SoC 155 * @ngpio_irq_cluster: The number of GPIO inetrrupt capable for this SoC 156 * @irq_gpio_rising_offset: Interrupt offset used as base to compute specific 157 * setting strategy of the rising interrupt line 158 * @irq_gpio_falling_offset: Interrupt offset used as base to compute specific 159 * setting strategy of the falling interrupt line 160 * @irq_gpio_factor: Factor used to compute specific setting strategy of 161 * the interrupt line 162 */ 163 164struct abx500_pinctrl_soc_data { 165 const struct abx500_pinrange *gpio_ranges; 166 unsigned gpio_num_ranges; 167 const struct pinctrl_pin_desc *pins; 168 unsigned npins; 169 const struct abx500_function *functions; 170 unsigned nfunctions; 171 const struct abx500_pingroup *groups; 172 unsigned ngroups; 173 struct alternate_functions *alternate_functions; 174 struct pullud *pullud; 175 struct abx500_gpio_irq_cluster *gpio_irq_cluster; 176 unsigned ngpio_irq_cluster; 177 int irq_gpio_rising_offset; 178 int irq_gpio_falling_offset; 179 int irq_gpio_factor; 180}; 181 182#ifdef CONFIG_PINCTRL_AB8500 183 184void abx500_pinctrl_ab8500_init(struct abx500_pinctrl_soc_data **soc); 185 186#else 187 188static inline void 189abx500_pinctrl_ab8500_init(struct abx500_pinctrl_soc_data **soc) 190{ 191} 192 193#endif 194 195#ifdef CONFIG_PINCTRL_AB8540 196 197void abx500_pinctrl_ab8540_init(struct abx500_pinctrl_soc_data **soc); 198 199#else 200 201static inline void 202abx500_pinctrl_ab8540_init(struct abx500_pinctrl_soc_data **soc) 203{ 204} 205 206#endif 207 208#ifdef CONFIG_PINCTRL_AB9540 209 210void abx500_pinctrl_ab9540_init(struct abx500_pinctrl_soc_data **soc); 211 212#else 213 214static inline void 215abx500_pinctrl_ab9540_init(struct abx500_pinctrl_soc_data **soc) 216{ 217} 218 219#endif 220 221#ifdef CONFIG_PINCTRL_AB8505 222 223void abx500_pinctrl_ab8505_init(struct abx500_pinctrl_soc_data **soc); 224 225#else 226 227static inline void 228abx500_pinctrl_ab8505_init(struct abx500_pinctrl_soc_data **soc) 229{ 230} 231 232#endif 233 234#endif /* PINCTRL_PINCTRL_ABx500_H */