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1/* 2 * tw9910 Video Driver 3 * 4 * Copyright (C) 2008 Renesas Solutions Corp. 5 * Kuninori Morimoto <morimoto.kuninori@renesas.com> 6 * 7 * Based on ov772x driver, 8 * 9 * Copyright (C) 2008 Kuninori Morimoto <morimoto.kuninori@renesas.com> 10 * Copyright 2006-7 Jonathan Corbet <corbet@lwn.net> 11 * Copyright (C) 2008 Magnus Damm 12 * Copyright (C) 2008, Guennadi Liakhovetski <kernel@pengutronix.de> 13 * 14 * This program is free software; you can redistribute it and/or modify 15 * it under the terms of the GNU General Public License version 2 as 16 * published by the Free Software Foundation. 17 */ 18 19#include <linux/init.h> 20#include <linux/module.h> 21#include <linux/i2c.h> 22#include <linux/slab.h> 23#include <linux/kernel.h> 24#include <linux/delay.h> 25#include <linux/v4l2-mediabus.h> 26#include <linux/videodev2.h> 27 28#include <media/soc_camera.h> 29#include <media/tw9910.h> 30#include <media/v4l2-chip-ident.h> 31#include <media/v4l2-subdev.h> 32 33#define GET_ID(val) ((val & 0xF8) >> 3) 34#define GET_REV(val) (val & 0x07) 35 36/* 37 * register offset 38 */ 39#define ID 0x00 /* Product ID Code Register */ 40#define STATUS1 0x01 /* Chip Status Register I */ 41#define INFORM 0x02 /* Input Format */ 42#define OPFORM 0x03 /* Output Format Control Register */ 43#define DLYCTR 0x04 /* Hysteresis and HSYNC Delay Control */ 44#define OUTCTR1 0x05 /* Output Control I */ 45#define ACNTL1 0x06 /* Analog Control Register 1 */ 46#define CROP_HI 0x07 /* Cropping Register, High */ 47#define VDELAY_LO 0x08 /* Vertical Delay Register, Low */ 48#define VACTIVE_LO 0x09 /* Vertical Active Register, Low */ 49#define HDELAY_LO 0x0A /* Horizontal Delay Register, Low */ 50#define HACTIVE_LO 0x0B /* Horizontal Active Register, Low */ 51#define CNTRL1 0x0C /* Control Register I */ 52#define VSCALE_LO 0x0D /* Vertical Scaling Register, Low */ 53#define SCALE_HI 0x0E /* Scaling Register, High */ 54#define HSCALE_LO 0x0F /* Horizontal Scaling Register, Low */ 55#define BRIGHT 0x10 /* BRIGHTNESS Control Register */ 56#define CONTRAST 0x11 /* CONTRAST Control Register */ 57#define SHARPNESS 0x12 /* SHARPNESS Control Register I */ 58#define SAT_U 0x13 /* Chroma (U) Gain Register */ 59#define SAT_V 0x14 /* Chroma (V) Gain Register */ 60#define HUE 0x15 /* Hue Control Register */ 61#define CORING1 0x17 62#define CORING2 0x18 /* Coring and IF compensation */ 63#define VBICNTL 0x19 /* VBI Control Register */ 64#define ACNTL2 0x1A /* Analog Control 2 */ 65#define OUTCTR2 0x1B /* Output Control 2 */ 66#define SDT 0x1C /* Standard Selection */ 67#define SDTR 0x1D /* Standard Recognition */ 68#define TEST 0x1F /* Test Control Register */ 69#define CLMPG 0x20 /* Clamping Gain */ 70#define IAGC 0x21 /* Individual AGC Gain */ 71#define AGCGAIN 0x22 /* AGC Gain */ 72#define PEAKWT 0x23 /* White Peak Threshold */ 73#define CLMPL 0x24 /* Clamp level */ 74#define SYNCT 0x25 /* Sync Amplitude */ 75#define MISSCNT 0x26 /* Sync Miss Count Register */ 76#define PCLAMP 0x27 /* Clamp Position Register */ 77#define VCNTL1 0x28 /* Vertical Control I */ 78#define VCNTL2 0x29 /* Vertical Control II */ 79#define CKILL 0x2A /* Color Killer Level Control */ 80#define COMB 0x2B /* Comb Filter Control */ 81#define LDLY 0x2C /* Luma Delay and H Filter Control */ 82#define MISC1 0x2D /* Miscellaneous Control I */ 83#define LOOP 0x2E /* LOOP Control Register */ 84#define MISC2 0x2F /* Miscellaneous Control II */ 85#define MVSN 0x30 /* Macrovision Detection */ 86#define STATUS2 0x31 /* Chip STATUS II */ 87#define HFREF 0x32 /* H monitor */ 88#define CLMD 0x33 /* CLAMP MODE */ 89#define IDCNTL 0x34 /* ID Detection Control */ 90#define CLCNTL1 0x35 /* Clamp Control I */ 91#define ANAPLLCTL 0x4C 92#define VBIMIN 0x4D 93#define HSLOWCTL 0x4E 94#define WSS3 0x4F 95#define FILLDATA 0x50 96#define SDID 0x51 97#define DID 0x52 98#define WSS1 0x53 99#define WSS2 0x54 100#define VVBI 0x55 101#define LCTL6 0x56 102#define LCTL7 0x57 103#define LCTL8 0x58 104#define LCTL9 0x59 105#define LCTL10 0x5A 106#define LCTL11 0x5B 107#define LCTL12 0x5C 108#define LCTL13 0x5D 109#define LCTL14 0x5E 110#define LCTL15 0x5F 111#define LCTL16 0x60 112#define LCTL17 0x61 113#define LCTL18 0x62 114#define LCTL19 0x63 115#define LCTL20 0x64 116#define LCTL21 0x65 117#define LCTL22 0x66 118#define LCTL23 0x67 119#define LCTL24 0x68 120#define LCTL25 0x69 121#define LCTL26 0x6A 122#define HSBEGIN 0x6B 123#define HSEND 0x6C 124#define OVSDLY 0x6D 125#define OVSEND 0x6E 126#define VBIDELAY 0x6F 127 128/* 129 * register detail 130 */ 131 132/* INFORM */ 133#define FC27_ON 0x40 /* 1 : Input crystal clock frequency is 27MHz */ 134#define FC27_FF 0x00 /* 0 : Square pixel mode. */ 135 /* Must use 24.54MHz for 60Hz field rate */ 136 /* source or 29.5MHz for 50Hz field rate */ 137#define IFSEL_S 0x10 /* 01 : S-video decoding */ 138#define IFSEL_C 0x00 /* 00 : Composite video decoding */ 139 /* Y input video selection */ 140#define YSEL_M0 0x00 /* 00 : Mux0 selected */ 141#define YSEL_M1 0x04 /* 01 : Mux1 selected */ 142#define YSEL_M2 0x08 /* 10 : Mux2 selected */ 143#define YSEL_M3 0x10 /* 11 : Mux3 selected */ 144 145/* OPFORM */ 146#define MODE 0x80 /* 0 : CCIR601 compatible YCrCb 4:2:2 format */ 147 /* 1 : ITU-R-656 compatible data sequence format */ 148#define LEN 0x40 /* 0 : 8-bit YCrCb 4:2:2 output format */ 149 /* 1 : 16-bit YCrCb 4:2:2 output format.*/ 150#define LLCMODE 0x20 /* 1 : LLC output mode. */ 151 /* 0 : free-run output mode */ 152#define AINC 0x10 /* Serial interface auto-indexing control */ 153 /* 0 : auto-increment */ 154 /* 1 : non-auto */ 155#define VSCTL 0x08 /* 1 : Vertical out ctrl by DVALID */ 156 /* 0 : Vertical out ctrl by HACTIVE and DVALID */ 157#define OEN_TRI_SEL_MASK 0x07 158#define OEN_TRI_SEL_ALL_ON 0x00 /* Enable output for Rev0/Rev1 */ 159#define OEN_TRI_SEL_ALL_OFF_r0 0x06 /* All tri-stated for Rev0 */ 160#define OEN_TRI_SEL_ALL_OFF_r1 0x07 /* All tri-stated for Rev1 */ 161 162/* OUTCTR1 */ 163#define VSP_LO 0x00 /* 0 : VS pin output polarity is active low */ 164#define VSP_HI 0x80 /* 1 : VS pin output polarity is active high. */ 165 /* VS pin output control */ 166#define VSSL_VSYNC 0x00 /* 0 : VSYNC */ 167#define VSSL_VACT 0x10 /* 1 : VACT */ 168#define VSSL_FIELD 0x20 /* 2 : FIELD */ 169#define VSSL_VVALID 0x30 /* 3 : VVALID */ 170#define VSSL_ZERO 0x70 /* 7 : 0 */ 171#define HSP_LOW 0x00 /* 0 : HS pin output polarity is active low */ 172#define HSP_HI 0x08 /* 1 : HS pin output polarity is active high.*/ 173 /* HS pin output control */ 174#define HSSL_HACT 0x00 /* 0 : HACT */ 175#define HSSL_HSYNC 0x01 /* 1 : HSYNC */ 176#define HSSL_DVALID 0x02 /* 2 : DVALID */ 177#define HSSL_HLOCK 0x03 /* 3 : HLOCK */ 178#define HSSL_ASYNCW 0x04 /* 4 : ASYNCW */ 179#define HSSL_ZERO 0x07 /* 7 : 0 */ 180 181/* ACNTL1 */ 182#define SRESET 0x80 /* resets the device to its default state 183 * but all register content remain unchanged. 184 * This bit is self-resetting. 185 */ 186#define ACNTL1_PDN_MASK 0x0e 187#define CLK_PDN 0x08 /* system clock power down */ 188#define Y_PDN 0x04 /* Luma ADC power down */ 189#define C_PDN 0x02 /* Chroma ADC power down */ 190 191/* ACNTL2 */ 192#define ACNTL2_PDN_MASK 0x40 193#define PLL_PDN 0x40 /* PLL power down */ 194 195/* VBICNTL */ 196 197/* RTSEL : control the real time signal output from the MPOUT pin */ 198#define RTSEL_MASK 0x07 199#define RTSEL_VLOSS 0x00 /* 0000 = Video loss */ 200#define RTSEL_HLOCK 0x01 /* 0001 = H-lock */ 201#define RTSEL_SLOCK 0x02 /* 0010 = S-lock */ 202#define RTSEL_VLOCK 0x03 /* 0011 = V-lock */ 203#define RTSEL_MONO 0x04 /* 0100 = MONO */ 204#define RTSEL_DET50 0x05 /* 0101 = DET50 */ 205#define RTSEL_FIELD 0x06 /* 0110 = FIELD */ 206#define RTSEL_RTCO 0x07 /* 0111 = RTCO ( Real Time Control ) */ 207 208/* HSYNC start and end are constant for now */ 209#define HSYNC_START 0x0260 210#define HSYNC_END 0x0300 211 212/* 213 * structure 214 */ 215 216struct regval_list { 217 unsigned char reg_num; 218 unsigned char value; 219}; 220 221struct tw9910_scale_ctrl { 222 char *name; 223 unsigned short width; 224 unsigned short height; 225 u16 hscale; 226 u16 vscale; 227}; 228 229struct tw9910_priv { 230 struct v4l2_subdev subdev; 231 struct tw9910_video_info *info; 232 const struct tw9910_scale_ctrl *scale; 233 v4l2_std_id norm; 234 u32 revision; 235}; 236 237static const struct tw9910_scale_ctrl tw9910_ntsc_scales[] = { 238 { 239 .name = "NTSC SQ", 240 .width = 640, 241 .height = 480, 242 .hscale = 0x0100, 243 .vscale = 0x0100, 244 }, 245 { 246 .name = "NTSC CCIR601", 247 .width = 720, 248 .height = 480, 249 .hscale = 0x0100, 250 .vscale = 0x0100, 251 }, 252 { 253 .name = "NTSC SQ (CIF)", 254 .width = 320, 255 .height = 240, 256 .hscale = 0x0200, 257 .vscale = 0x0200, 258 }, 259 { 260 .name = "NTSC CCIR601 (CIF)", 261 .width = 360, 262 .height = 240, 263 .hscale = 0x0200, 264 .vscale = 0x0200, 265 }, 266 { 267 .name = "NTSC SQ (QCIF)", 268 .width = 160, 269 .height = 120, 270 .hscale = 0x0400, 271 .vscale = 0x0400, 272 }, 273 { 274 .name = "NTSC CCIR601 (QCIF)", 275 .width = 180, 276 .height = 120, 277 .hscale = 0x0400, 278 .vscale = 0x0400, 279 }, 280}; 281 282static const struct tw9910_scale_ctrl tw9910_pal_scales[] = { 283 { 284 .name = "PAL SQ", 285 .width = 768, 286 .height = 576, 287 .hscale = 0x0100, 288 .vscale = 0x0100, 289 }, 290 { 291 .name = "PAL CCIR601", 292 .width = 720, 293 .height = 576, 294 .hscale = 0x0100, 295 .vscale = 0x0100, 296 }, 297 { 298 .name = "PAL SQ (CIF)", 299 .width = 384, 300 .height = 288, 301 .hscale = 0x0200, 302 .vscale = 0x0200, 303 }, 304 { 305 .name = "PAL CCIR601 (CIF)", 306 .width = 360, 307 .height = 288, 308 .hscale = 0x0200, 309 .vscale = 0x0200, 310 }, 311 { 312 .name = "PAL SQ (QCIF)", 313 .width = 192, 314 .height = 144, 315 .hscale = 0x0400, 316 .vscale = 0x0400, 317 }, 318 { 319 .name = "PAL CCIR601 (QCIF)", 320 .width = 180, 321 .height = 144, 322 .hscale = 0x0400, 323 .vscale = 0x0400, 324 }, 325}; 326 327/* 328 * general function 329 */ 330static struct tw9910_priv *to_tw9910(const struct i2c_client *client) 331{ 332 return container_of(i2c_get_clientdata(client), struct tw9910_priv, 333 subdev); 334} 335 336static int tw9910_mask_set(struct i2c_client *client, u8 command, 337 u8 mask, u8 set) 338{ 339 s32 val = i2c_smbus_read_byte_data(client, command); 340 if (val < 0) 341 return val; 342 343 val &= ~mask; 344 val |= set & mask; 345 346 return i2c_smbus_write_byte_data(client, command, val); 347} 348 349static int tw9910_set_scale(struct i2c_client *client, 350 const struct tw9910_scale_ctrl *scale) 351{ 352 int ret; 353 354 ret = i2c_smbus_write_byte_data(client, SCALE_HI, 355 (scale->vscale & 0x0F00) >> 4 | 356 (scale->hscale & 0x0F00) >> 8); 357 if (ret < 0) 358 return ret; 359 360 ret = i2c_smbus_write_byte_data(client, HSCALE_LO, 361 scale->hscale & 0x00FF); 362 if (ret < 0) 363 return ret; 364 365 ret = i2c_smbus_write_byte_data(client, VSCALE_LO, 366 scale->vscale & 0x00FF); 367 368 return ret; 369} 370 371static int tw9910_set_hsync(struct i2c_client *client) 372{ 373 struct tw9910_priv *priv = to_tw9910(client); 374 int ret; 375 376 /* bit 10 - 3 */ 377 ret = i2c_smbus_write_byte_data(client, HSBEGIN, 378 (HSYNC_START & 0x07F8) >> 3); 379 if (ret < 0) 380 return ret; 381 382 /* bit 10 - 3 */ 383 ret = i2c_smbus_write_byte_data(client, HSEND, 384 (HSYNC_END & 0x07F8) >> 3); 385 if (ret < 0) 386 return ret; 387 388 /* So far only revisions 0 and 1 have been seen */ 389 /* bit 2 - 0 */ 390 if (1 == priv->revision) 391 ret = tw9910_mask_set(client, HSLOWCTL, 0x77, 392 (HSYNC_START & 0x0007) << 4 | 393 (HSYNC_END & 0x0007)); 394 395 return ret; 396} 397 398static void tw9910_reset(struct i2c_client *client) 399{ 400 tw9910_mask_set(client, ACNTL1, SRESET, SRESET); 401 msleep(1); 402} 403 404static int tw9910_power(struct i2c_client *client, int enable) 405{ 406 int ret; 407 u8 acntl1; 408 u8 acntl2; 409 410 if (enable) { 411 acntl1 = 0; 412 acntl2 = 0; 413 } else { 414 acntl1 = CLK_PDN | Y_PDN | C_PDN; 415 acntl2 = PLL_PDN; 416 } 417 418 ret = tw9910_mask_set(client, ACNTL1, ACNTL1_PDN_MASK, acntl1); 419 if (ret < 0) 420 return ret; 421 422 return tw9910_mask_set(client, ACNTL2, ACNTL2_PDN_MASK, acntl2); 423} 424 425static const struct tw9910_scale_ctrl *tw9910_select_norm(v4l2_std_id norm, 426 u32 width, u32 height) 427{ 428 const struct tw9910_scale_ctrl *scale; 429 const struct tw9910_scale_ctrl *ret = NULL; 430 __u32 diff = 0xffffffff, tmp; 431 int size, i; 432 433 if (norm & V4L2_STD_NTSC) { 434 scale = tw9910_ntsc_scales; 435 size = ARRAY_SIZE(tw9910_ntsc_scales); 436 } else if (norm & V4L2_STD_PAL) { 437 scale = tw9910_pal_scales; 438 size = ARRAY_SIZE(tw9910_pal_scales); 439 } else { 440 return NULL; 441 } 442 443 for (i = 0; i < size; i++) { 444 tmp = abs(width - scale[i].width) + 445 abs(height - scale[i].height); 446 if (tmp < diff) { 447 diff = tmp; 448 ret = scale + i; 449 } 450 } 451 452 return ret; 453} 454 455/* 456 * subdevice operations 457 */ 458static int tw9910_s_stream(struct v4l2_subdev *sd, int enable) 459{ 460 struct i2c_client *client = v4l2_get_subdevdata(sd); 461 struct tw9910_priv *priv = to_tw9910(client); 462 u8 val; 463 int ret; 464 465 if (!enable) { 466 switch (priv->revision) { 467 case 0: 468 val = OEN_TRI_SEL_ALL_OFF_r0; 469 break; 470 case 1: 471 val = OEN_TRI_SEL_ALL_OFF_r1; 472 break; 473 default: 474 dev_err(&client->dev, "un-supported revision\n"); 475 return -EINVAL; 476 } 477 } else { 478 val = OEN_TRI_SEL_ALL_ON; 479 480 if (!priv->scale) { 481 dev_err(&client->dev, "norm select error\n"); 482 return -EPERM; 483 } 484 485 dev_dbg(&client->dev, "%s %dx%d\n", 486 priv->scale->name, 487 priv->scale->width, 488 priv->scale->height); 489 } 490 491 ret = tw9910_mask_set(client, OPFORM, OEN_TRI_SEL_MASK, val); 492 if (ret < 0) 493 return ret; 494 495 return tw9910_power(client, enable); 496} 497 498static int tw9910_g_std(struct v4l2_subdev *sd, v4l2_std_id *norm) 499{ 500 struct i2c_client *client = v4l2_get_subdevdata(sd); 501 struct tw9910_priv *priv = to_tw9910(client); 502 503 *norm = priv->norm; 504 505 return 0; 506} 507 508static int tw9910_s_std(struct v4l2_subdev *sd, v4l2_std_id norm) 509{ 510 struct i2c_client *client = v4l2_get_subdevdata(sd); 511 struct tw9910_priv *priv = to_tw9910(client); 512 513 if (!(norm & (V4L2_STD_NTSC | V4L2_STD_PAL))) 514 return -EINVAL; 515 516 priv->norm = norm; 517 518 return 0; 519} 520 521static int tw9910_g_chip_ident(struct v4l2_subdev *sd, 522 struct v4l2_dbg_chip_ident *id) 523{ 524 struct i2c_client *client = v4l2_get_subdevdata(sd); 525 struct tw9910_priv *priv = to_tw9910(client); 526 527 id->ident = V4L2_IDENT_TW9910; 528 id->revision = priv->revision; 529 530 return 0; 531} 532 533#ifdef CONFIG_VIDEO_ADV_DEBUG 534static int tw9910_g_register(struct v4l2_subdev *sd, 535 struct v4l2_dbg_register *reg) 536{ 537 struct i2c_client *client = v4l2_get_subdevdata(sd); 538 int ret; 539 540 if (reg->reg > 0xff) 541 return -EINVAL; 542 543 ret = i2c_smbus_read_byte_data(client, reg->reg); 544 if (ret < 0) 545 return ret; 546 547 /* 548 * ret = int 549 * reg->val = __u64 550 */ 551 reg->val = (__u64)ret; 552 553 return 0; 554} 555 556static int tw9910_s_register(struct v4l2_subdev *sd, 557 const struct v4l2_dbg_register *reg) 558{ 559 struct i2c_client *client = v4l2_get_subdevdata(sd); 560 561 if (reg->reg > 0xff || 562 reg->val > 0xff) 563 return -EINVAL; 564 565 return i2c_smbus_write_byte_data(client, reg->reg, reg->val); 566} 567#endif 568 569static int tw9910_s_power(struct v4l2_subdev *sd, int on) 570{ 571 struct i2c_client *client = v4l2_get_subdevdata(sd); 572 struct soc_camera_subdev_desc *ssdd = soc_camera_i2c_to_desc(client); 573 574 return soc_camera_set_power(&client->dev, ssdd, on); 575} 576 577static int tw9910_set_frame(struct v4l2_subdev *sd, u32 *width, u32 *height) 578{ 579 struct i2c_client *client = v4l2_get_subdevdata(sd); 580 struct tw9910_priv *priv = to_tw9910(client); 581 int ret = -EINVAL; 582 u8 val; 583 584 /* 585 * select suitable norm 586 */ 587 priv->scale = tw9910_select_norm(priv->norm, *width, *height); 588 if (!priv->scale) 589 goto tw9910_set_fmt_error; 590 591 /* 592 * reset hardware 593 */ 594 tw9910_reset(client); 595 596 /* 597 * set bus width 598 */ 599 val = 0x00; 600 if (SOCAM_DATAWIDTH_16 == priv->info->buswidth) 601 val = LEN; 602 603 ret = tw9910_mask_set(client, OPFORM, LEN, val); 604 if (ret < 0) 605 goto tw9910_set_fmt_error; 606 607 /* 608 * select MPOUT behavior 609 */ 610 switch (priv->info->mpout) { 611 case TW9910_MPO_VLOSS: 612 val = RTSEL_VLOSS; break; 613 case TW9910_MPO_HLOCK: 614 val = RTSEL_HLOCK; break; 615 case TW9910_MPO_SLOCK: 616 val = RTSEL_SLOCK; break; 617 case TW9910_MPO_VLOCK: 618 val = RTSEL_VLOCK; break; 619 case TW9910_MPO_MONO: 620 val = RTSEL_MONO; break; 621 case TW9910_MPO_DET50: 622 val = RTSEL_DET50; break; 623 case TW9910_MPO_FIELD: 624 val = RTSEL_FIELD; break; 625 case TW9910_MPO_RTCO: 626 val = RTSEL_RTCO; break; 627 default: 628 val = 0; 629 } 630 631 ret = tw9910_mask_set(client, VBICNTL, RTSEL_MASK, val); 632 if (ret < 0) 633 goto tw9910_set_fmt_error; 634 635 /* 636 * set scale 637 */ 638 ret = tw9910_set_scale(client, priv->scale); 639 if (ret < 0) 640 goto tw9910_set_fmt_error; 641 642 /* 643 * set hsync 644 */ 645 ret = tw9910_set_hsync(client); 646 if (ret < 0) 647 goto tw9910_set_fmt_error; 648 649 *width = priv->scale->width; 650 *height = priv->scale->height; 651 652 return ret; 653 654tw9910_set_fmt_error: 655 656 tw9910_reset(client); 657 priv->scale = NULL; 658 659 return ret; 660} 661 662static int tw9910_g_crop(struct v4l2_subdev *sd, struct v4l2_crop *a) 663{ 664 struct i2c_client *client = v4l2_get_subdevdata(sd); 665 struct tw9910_priv *priv = to_tw9910(client); 666 667 a->c.left = 0; 668 a->c.top = 0; 669 if (priv->norm & V4L2_STD_NTSC) { 670 a->c.width = 640; 671 a->c.height = 480; 672 } else { 673 a->c.width = 768; 674 a->c.height = 576; 675 } 676 a->type = V4L2_BUF_TYPE_VIDEO_CAPTURE; 677 678 return 0; 679} 680 681static int tw9910_cropcap(struct v4l2_subdev *sd, struct v4l2_cropcap *a) 682{ 683 struct i2c_client *client = v4l2_get_subdevdata(sd); 684 struct tw9910_priv *priv = to_tw9910(client); 685 686 a->bounds.left = 0; 687 a->bounds.top = 0; 688 if (priv->norm & V4L2_STD_NTSC) { 689 a->bounds.width = 640; 690 a->bounds.height = 480; 691 } else { 692 a->bounds.width = 768; 693 a->bounds.height = 576; 694 } 695 a->defrect = a->bounds; 696 a->type = V4L2_BUF_TYPE_VIDEO_CAPTURE; 697 a->pixelaspect.numerator = 1; 698 a->pixelaspect.denominator = 1; 699 700 return 0; 701} 702 703static int tw9910_g_fmt(struct v4l2_subdev *sd, 704 struct v4l2_mbus_framefmt *mf) 705{ 706 struct i2c_client *client = v4l2_get_subdevdata(sd); 707 struct tw9910_priv *priv = to_tw9910(client); 708 709 if (!priv->scale) { 710 priv->scale = tw9910_select_norm(priv->norm, 640, 480); 711 if (!priv->scale) 712 return -EINVAL; 713 } 714 715 mf->width = priv->scale->width; 716 mf->height = priv->scale->height; 717 mf->code = V4L2_MBUS_FMT_UYVY8_2X8; 718 mf->colorspace = V4L2_COLORSPACE_JPEG; 719 mf->field = V4L2_FIELD_INTERLACED_BT; 720 721 return 0; 722} 723 724static int tw9910_s_fmt(struct v4l2_subdev *sd, 725 struct v4l2_mbus_framefmt *mf) 726{ 727 u32 width = mf->width, height = mf->height; 728 int ret; 729 730 WARN_ON(mf->field != V4L2_FIELD_ANY && 731 mf->field != V4L2_FIELD_INTERLACED_BT); 732 733 /* 734 * check color format 735 */ 736 if (mf->code != V4L2_MBUS_FMT_UYVY8_2X8) 737 return -EINVAL; 738 739 mf->colorspace = V4L2_COLORSPACE_JPEG; 740 741 ret = tw9910_set_frame(sd, &width, &height); 742 if (!ret) { 743 mf->width = width; 744 mf->height = height; 745 } 746 return ret; 747} 748 749static int tw9910_try_fmt(struct v4l2_subdev *sd, 750 struct v4l2_mbus_framefmt *mf) 751{ 752 struct i2c_client *client = v4l2_get_subdevdata(sd); 753 struct tw9910_priv *priv = to_tw9910(client); 754 const struct tw9910_scale_ctrl *scale; 755 756 if (V4L2_FIELD_ANY == mf->field) { 757 mf->field = V4L2_FIELD_INTERLACED_BT; 758 } else if (V4L2_FIELD_INTERLACED_BT != mf->field) { 759 dev_err(&client->dev, "Field type %d invalid.\n", mf->field); 760 return -EINVAL; 761 } 762 763 mf->code = V4L2_MBUS_FMT_UYVY8_2X8; 764 mf->colorspace = V4L2_COLORSPACE_JPEG; 765 766 /* 767 * select suitable norm 768 */ 769 scale = tw9910_select_norm(priv->norm, mf->width, mf->height); 770 if (!scale) 771 return -EINVAL; 772 773 mf->width = scale->width; 774 mf->height = scale->height; 775 776 return 0; 777} 778 779static int tw9910_video_probe(struct i2c_client *client) 780{ 781 struct tw9910_priv *priv = to_tw9910(client); 782 s32 id; 783 int ret; 784 785 /* 786 * tw9910 only use 8 or 16 bit bus width 787 */ 788 if (SOCAM_DATAWIDTH_16 != priv->info->buswidth && 789 SOCAM_DATAWIDTH_8 != priv->info->buswidth) { 790 dev_err(&client->dev, "bus width error\n"); 791 return -ENODEV; 792 } 793 794 ret = tw9910_s_power(&priv->subdev, 1); 795 if (ret < 0) 796 return ret; 797 798 /* 799 * check and show Product ID 800 * So far only revisions 0 and 1 have been seen 801 */ 802 id = i2c_smbus_read_byte_data(client, ID); 803 priv->revision = GET_REV(id); 804 id = GET_ID(id); 805 806 if (0x0B != id || 807 0x01 < priv->revision) { 808 dev_err(&client->dev, 809 "Product ID error %x:%x\n", 810 id, priv->revision); 811 ret = -ENODEV; 812 goto done; 813 } 814 815 dev_info(&client->dev, 816 "tw9910 Product ID %0x:%0x\n", id, priv->revision); 817 818 priv->norm = V4L2_STD_NTSC; 819 820done: 821 tw9910_s_power(&priv->subdev, 0); 822 return ret; 823} 824 825static struct v4l2_subdev_core_ops tw9910_subdev_core_ops = { 826 .g_chip_ident = tw9910_g_chip_ident, 827 .s_std = tw9910_s_std, 828 .g_std = tw9910_g_std, 829#ifdef CONFIG_VIDEO_ADV_DEBUG 830 .g_register = tw9910_g_register, 831 .s_register = tw9910_s_register, 832#endif 833 .s_power = tw9910_s_power, 834}; 835 836static int tw9910_enum_fmt(struct v4l2_subdev *sd, unsigned int index, 837 enum v4l2_mbus_pixelcode *code) 838{ 839 if (index) 840 return -EINVAL; 841 842 *code = V4L2_MBUS_FMT_UYVY8_2X8; 843 return 0; 844} 845 846static int tw9910_g_mbus_config(struct v4l2_subdev *sd, 847 struct v4l2_mbus_config *cfg) 848{ 849 struct i2c_client *client = v4l2_get_subdevdata(sd); 850 struct soc_camera_subdev_desc *ssdd = soc_camera_i2c_to_desc(client); 851 852 cfg->flags = V4L2_MBUS_PCLK_SAMPLE_RISING | V4L2_MBUS_MASTER | 853 V4L2_MBUS_VSYNC_ACTIVE_HIGH | V4L2_MBUS_VSYNC_ACTIVE_LOW | 854 V4L2_MBUS_HSYNC_ACTIVE_HIGH | V4L2_MBUS_HSYNC_ACTIVE_LOW | 855 V4L2_MBUS_DATA_ACTIVE_HIGH; 856 cfg->type = V4L2_MBUS_PARALLEL; 857 cfg->flags = soc_camera_apply_board_flags(ssdd, cfg); 858 859 return 0; 860} 861 862static int tw9910_s_mbus_config(struct v4l2_subdev *sd, 863 const struct v4l2_mbus_config *cfg) 864{ 865 struct i2c_client *client = v4l2_get_subdevdata(sd); 866 struct soc_camera_subdev_desc *ssdd = soc_camera_i2c_to_desc(client); 867 u8 val = VSSL_VVALID | HSSL_DVALID; 868 unsigned long flags = soc_camera_apply_board_flags(ssdd, cfg); 869 870 /* 871 * set OUTCTR1 872 * 873 * We use VVALID and DVALID signals to control VSYNC and HSYNC 874 * outputs, in this mode their polarity is inverted. 875 */ 876 if (flags & V4L2_MBUS_HSYNC_ACTIVE_LOW) 877 val |= HSP_HI; 878 879 if (flags & V4L2_MBUS_VSYNC_ACTIVE_LOW) 880 val |= VSP_HI; 881 882 return i2c_smbus_write_byte_data(client, OUTCTR1, val); 883} 884 885static struct v4l2_subdev_video_ops tw9910_subdev_video_ops = { 886 .s_stream = tw9910_s_stream, 887 .g_mbus_fmt = tw9910_g_fmt, 888 .s_mbus_fmt = tw9910_s_fmt, 889 .try_mbus_fmt = tw9910_try_fmt, 890 .cropcap = tw9910_cropcap, 891 .g_crop = tw9910_g_crop, 892 .enum_mbus_fmt = tw9910_enum_fmt, 893 .g_mbus_config = tw9910_g_mbus_config, 894 .s_mbus_config = tw9910_s_mbus_config, 895}; 896 897static struct v4l2_subdev_ops tw9910_subdev_ops = { 898 .core = &tw9910_subdev_core_ops, 899 .video = &tw9910_subdev_video_ops, 900}; 901 902/* 903 * i2c_driver function 904 */ 905 906static int tw9910_probe(struct i2c_client *client, 907 const struct i2c_device_id *did) 908 909{ 910 struct tw9910_priv *priv; 911 struct tw9910_video_info *info; 912 struct i2c_adapter *adapter = 913 to_i2c_adapter(client->dev.parent); 914 struct soc_camera_subdev_desc *ssdd = soc_camera_i2c_to_desc(client); 915 916 if (!ssdd || !ssdd->drv_priv) { 917 dev_err(&client->dev, "TW9910: missing platform data!\n"); 918 return -EINVAL; 919 } 920 921 info = ssdd->drv_priv; 922 923 if (!i2c_check_functionality(adapter, I2C_FUNC_SMBUS_BYTE_DATA)) { 924 dev_err(&client->dev, 925 "I2C-Adapter doesn't support " 926 "I2C_FUNC_SMBUS_BYTE_DATA\n"); 927 return -EIO; 928 } 929 930 priv = devm_kzalloc(&client->dev, sizeof(*priv), GFP_KERNEL); 931 if (!priv) 932 return -ENOMEM; 933 934 priv->info = info; 935 936 v4l2_i2c_subdev_init(&priv->subdev, client, &tw9910_subdev_ops); 937 938 return tw9910_video_probe(client); 939} 940 941static int tw9910_remove(struct i2c_client *client) 942{ 943 return 0; 944} 945 946static const struct i2c_device_id tw9910_id[] = { 947 { "tw9910", 0 }, 948 { } 949}; 950MODULE_DEVICE_TABLE(i2c, tw9910_id); 951 952static struct i2c_driver tw9910_i2c_driver = { 953 .driver = { 954 .name = "tw9910", 955 }, 956 .probe = tw9910_probe, 957 .remove = tw9910_remove, 958 .id_table = tw9910_id, 959}; 960 961module_i2c_driver(tw9910_i2c_driver); 962 963MODULE_DESCRIPTION("SoC Camera driver for tw9910"); 964MODULE_AUTHOR("Kuninori Morimoto"); 965MODULE_LICENSE("GPL v2");