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1/*
2 * at91sam9263.dtsi - Device Tree Include file for AT91SAM9263 family SoC
3 *
4 * Copyright (C) 2012 Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
5 *
6 * Licensed under GPLv2 only.
7 */
8
9/include/ "skeleton.dtsi"
10
11/ {
12 model = "Atmel AT91SAM9263 family SoC";
13 compatible = "atmel,at91sam9263";
14 interrupt-parent = <&aic>;
15
16 aliases {
17 serial0 = &dbgu;
18 serial1 = &usart0;
19 serial2 = &usart1;
20 serial3 = &usart2;
21 gpio0 = &pioA;
22 gpio1 = &pioB;
23 gpio2 = &pioC;
24 gpio3 = &pioD;
25 gpio4 = &pioE;
26 tcb0 = &tcb0;
27 i2c0 = &i2c0;
28 ssc0 = &ssc0;
29 ssc1 = &ssc1;
30 };
31 cpus {
32 cpu@0 {
33 compatible = "arm,arm926ejs";
34 };
35 };
36
37 memory {
38 reg = <0x20000000 0x08000000>;
39 };
40
41 ahb {
42 compatible = "simple-bus";
43 #address-cells = <1>;
44 #size-cells = <1>;
45 ranges;
46
47 apb {
48 compatible = "simple-bus";
49 #address-cells = <1>;
50 #size-cells = <1>;
51 ranges;
52
53 aic: interrupt-controller@fffff000 {
54 #interrupt-cells = <3>;
55 compatible = "atmel,at91rm9200-aic";
56 interrupt-controller;
57 reg = <0xfffff000 0x200>;
58 atmel,external-irqs = <30 31>;
59 };
60
61 pmc: pmc@fffffc00 {
62 compatible = "atmel,at91rm9200-pmc";
63 reg = <0xfffffc00 0x100>;
64 };
65
66 ramc: ramc@ffffe200 {
67 compatible = "atmel,at91sam9260-sdramc";
68 reg = <0xffffe200 0x200
69 0xffffe800 0x200>;
70 };
71
72 pit: timer@fffffd30 {
73 compatible = "atmel,at91sam9260-pit";
74 reg = <0xfffffd30 0xf>;
75 interrupts = <1 4 7>;
76 };
77
78 tcb0: timer@fff7c000 {
79 compatible = "atmel,at91rm9200-tcb";
80 reg = <0xfff7c000 0x100>;
81 interrupts = <19 4 0>;
82 };
83
84 rstc@fffffd00 {
85 compatible = "atmel,at91sam9260-rstc";
86 reg = <0xfffffd00 0x10>;
87 };
88
89 shdwc@fffffd10 {
90 compatible = "atmel,at91sam9260-shdwc";
91 reg = <0xfffffd10 0x10>;
92 };
93
94 pinctrl@fffff200 {
95 #address-cells = <1>;
96 #size-cells = <1>;
97 compatible = "atmel,at91rm9200-pinctrl", "simple-bus";
98 ranges = <0xfffff200 0xfffff200 0xa00>;
99
100 atmel,mux-mask = <
101 /* A B */
102 0xfffffffb 0xffffe07f /* pioA */
103 0x0007ffff 0x39072fff /* pioB */
104 0xffffffff 0x3ffffff8 /* pioC */
105 0xfffffbff 0xffffffff /* pioD */
106 0xffe00fff 0xfbfcff00 /* pioE */
107 >;
108
109 /* shared pinctrl settings */
110 dbgu {
111 pinctrl_dbgu: dbgu-0 {
112 atmel,pins =
113 <2 30 0x1 0x0 /* PC30 periph A */
114 2 31 0x1 0x1>; /* PC31 periph with pullup */
115 };
116 };
117
118 usart0 {
119 pinctrl_usart0: usart0-0 {
120 atmel,pins =
121 <0 26 0x1 0x1 /* PA26 periph A with pullup */
122 0 27 0x1 0x0>; /* PA27 periph A */
123 };
124
125 pinctrl_usart0_rts: usart0_rts-0 {
126 atmel,pins =
127 <0 28 0x1 0x0>; /* PA28 periph A */
128 };
129
130 pinctrl_usart0_cts: usart0_cts-0 {
131 atmel,pins =
132 <0 29 0x1 0x0>; /* PA29 periph A */
133 };
134 };
135
136 usart1 {
137 pinctrl_usart1: usart1-0 {
138 atmel,pins =
139 <3 0 0x1 0x1 /* PD0 periph A with pullup */
140 3 1 0x1 0x0>; /* PD1 periph A */
141 };
142
143 pinctrl_usart1_rts: usart1_rts-0 {
144 atmel,pins =
145 <3 7 0x2 0x0>; /* PD7 periph B */
146 };
147
148 pinctrl_usart1_cts: usart1_cts-0 {
149 atmel,pins =
150 <3 8 0x2 0x0>; /* PD8 periph B */
151 };
152 };
153
154 usart2 {
155 pinctrl_usart2: usart2-0 {
156 atmel,pins =
157 <3 2 0x1 0x1 /* PD2 periph A with pullup */
158 3 3 0x1 0x0>; /* PD3 periph A */
159 };
160
161 pinctrl_usart2_rts: usart2_rts-0 {
162 atmel,pins =
163 <3 5 0x2 0x0>; /* PD5 periph B */
164 };
165
166 pinctrl_usart2_cts: usart2_cts-0 {
167 atmel,pins =
168 <4 6 0x2 0x0>; /* PD6 periph B */
169 };
170 };
171
172 nand {
173 pinctrl_nand: nand-0 {
174 atmel,pins =
175 <0 22 0x0 0x1 /* PA22 gpio RDY pin pull_up*/
176 3 15 0x0 0x1>; /* PD15 gpio enable pin pull_up */
177 };
178 };
179
180 macb {
181 pinctrl_macb_rmii: macb_rmii-0 {
182 atmel,pins =
183 <2 25 0x2 0x0 /* PC25 periph B */
184 4 21 0x1 0x0 /* PE21 periph A */
185 4 23 0x1 0x0 /* PE23 periph A */
186 4 24 0x1 0x0 /* PE24 periph A */
187 4 25 0x1 0x0 /* PE25 periph A */
188 4 26 0x1 0x0 /* PE26 periph A */
189 4 27 0x1 0x0 /* PE27 periph A */
190 4 28 0x1 0x0 /* PE28 periph A */
191 4 29 0x1 0x0 /* PE29 periph A */
192 4 30 0x1 0x0>; /* PE30 periph A */
193 };
194
195 pinctrl_macb_rmii_mii: macb_rmii_mii-0 {
196 atmel,pins =
197 <2 20 0x2 0x0 /* PC20 periph B */
198 2 21 0x2 0x0 /* PC21 periph B */
199 2 22 0x2 0x0 /* PC22 periph B */
200 2 23 0x2 0x0 /* PC23 periph B */
201 2 24 0x2 0x0 /* PC24 periph B */
202 2 25 0x2 0x0 /* PC25 periph B */
203 2 27 0x2 0x0 /* PC27 periph B */
204 4 22 0x2 0x0>; /* PE22 periph B */
205 };
206 };
207
208 mmc0 {
209 pinctrl_mmc0_clk: mmc0_clk-0 {
210 atmel,pins =
211 <0 12 0x1 0x0>; /* PA12 periph A */
212 };
213
214 pinctrl_mmc0_slot0_cmd_dat0: mmc0_slot0_cmd_dat0-0 {
215 atmel,pins =
216 <0 1 0x1 0x1 /* PA1 periph A with pullup */
217 0 0 0x1 0x1>; /* PA0 periph A with pullup */
218 };
219
220 pinctrl_mmc0_slot0_dat1_3: mmc0_slot0_dat1_3-0 {
221 atmel,pins =
222 <0 3 0x1 0x1 /* PA3 periph A with pullup */
223 0 4 0x1 0x1 /* PA4 periph A with pullup */
224 0 5 0x1 0x1>; /* PA5 periph A with pullup */
225 };
226
227 pinctrl_mmc0_slot1_cmd_dat0: mmc0_slot1_cmd_dat0-0 {
228 atmel,pins =
229 <0 16 0x1 0x1 /* PA16 periph A with pullup */
230 0 17 0x1 0x1>; /* PA17 periph A with pullup */
231 };
232
233 pinctrl_mmc0_slot1_dat1_3: mmc0_slot1_dat1_3-0 {
234 atmel,pins =
235 <0 18 0x1 0x1 /* PA18 periph A with pullup */
236 0 19 0x1 0x1 /* PA19 periph A with pullup */
237 0 20 0x1 0x1>; /* PA20 periph A with pullup */
238 };
239 };
240
241 mmc1 {
242 pinctrl_mmc1_clk: mmc1_clk-0 {
243 atmel,pins =
244 <0 6 0x1 0x0>; /* PA6 periph A */
245 };
246
247 pinctrl_mmc1_slot0_cmd_dat0: mmc1_slot0_cmd_dat0-0 {
248 atmel,pins =
249 <0 7 0x1 0x1 /* PA7 periph A with pullup */
250 0 8 0x1 0x1>; /* PA8 periph A with pullup */
251 };
252
253 pinctrl_mmc1_slot0_dat1_3: mmc1_slot0_dat1_3-0 {
254 atmel,pins =
255 <0 9 0x1 0x1 /* PA9 periph A with pullup */
256 0 10 0x1 0x1 /* PA10 periph A with pullup */
257 0 11 0x1 0x1>; /* PA11 periph A with pullup */
258 };
259
260 pinctrl_mmc1_slot1_cmd_dat0: mmc1_slot1_cmd_dat0-0 {
261 atmel,pins =
262 <0 21 0x1 0x1 /* PA21 periph A with pullup */
263 0 22 0x1 0x1>; /* PA22 periph A with pullup */
264 };
265
266 pinctrl_mmc1_slot1_dat1_3: mmc1_slot1_dat1_3-0 {
267 atmel,pins =
268 <0 23 0x1 0x1 /* PA23 periph A with pullup */
269 0 24 0x1 0x1 /* PA24 periph A with pullup */
270 0 25 0x1 0x1>; /* PA25 periph A with pullup */
271 };
272 };
273
274 ssc0 {
275 pinctrl_ssc0_tx: ssc0_tx-0 {
276 atmel,pins =
277 <1 0 0x2 0x0 /* PB0 periph B */
278 1 1 0x2 0x0 /* PB1 periph B */
279 1 2 0x2 0x0>; /* PB2 periph B */
280 };
281
282 pinctrl_ssc0_rx: ssc0_rx-0 {
283 atmel,pins =
284 <1 3 0x2 0x0 /* PB3 periph B */
285 1 4 0x2 0x0 /* PB4 periph B */
286 1 5 0x2 0x0>; /* PB5 periph B */
287 };
288 };
289
290 ssc1 {
291 pinctrl_ssc1_tx: ssc1_tx-0 {
292 atmel,pins =
293 <1 6 0x1 0x0 /* PB6 periph A */
294 1 7 0x1 0x0 /* PB7 periph A */
295 1 8 0x1 0x0>; /* PB8 periph A */
296 };
297
298 pinctrl_ssc1_rx: ssc1_rx-0 {
299 atmel,pins =
300 <1 9 0x1 0x0 /* PB9 periph A */
301 1 10 0x1 0x0 /* PB10 periph A */
302 1 11 0x1 0x0>; /* PB11 periph A */
303 };
304 };
305
306 spi0 {
307 pinctrl_spi0: spi0-0 {
308 atmel,pins =
309 <0 0 0x2 0x0 /* PA0 periph B SPI0_MISO pin */
310 0 1 0x2 0x0 /* PA1 periph B SPI0_MOSI pin */
311 0 2 0x2 0x0>; /* PA2 periph B SPI0_SPCK pin */
312 };
313 };
314
315 spi1 {
316 pinctrl_spi1: spi1-0 {
317 atmel,pins =
318 <1 12 0x1 0x0 /* PB12 periph A SPI1_MISO pin */
319 1 13 0x1 0x0 /* PB13 periph A SPI1_MOSI pin */
320 1 14 0x1 0x0>; /* PB14 periph A SPI1_SPCK pin */
321 };
322 };
323
324 pioA: gpio@fffff200 {
325 compatible = "atmel,at91rm9200-gpio";
326 reg = <0xfffff200 0x200>;
327 interrupts = <2 4 1>;
328 #gpio-cells = <2>;
329 gpio-controller;
330 interrupt-controller;
331 #interrupt-cells = <2>;
332 };
333
334 pioB: gpio@fffff400 {
335 compatible = "atmel,at91rm9200-gpio";
336 reg = <0xfffff400 0x200>;
337 interrupts = <3 4 1>;
338 #gpio-cells = <2>;
339 gpio-controller;
340 interrupt-controller;
341 #interrupt-cells = <2>;
342 };
343
344 pioC: gpio@fffff600 {
345 compatible = "atmel,at91rm9200-gpio";
346 reg = <0xfffff600 0x200>;
347 interrupts = <4 4 1>;
348 #gpio-cells = <2>;
349 gpio-controller;
350 interrupt-controller;
351 #interrupt-cells = <2>;
352 };
353
354 pioD: gpio@fffff800 {
355 compatible = "atmel,at91rm9200-gpio";
356 reg = <0xfffff800 0x200>;
357 interrupts = <4 4 1>;
358 #gpio-cells = <2>;
359 gpio-controller;
360 interrupt-controller;
361 #interrupt-cells = <2>;
362 };
363
364 pioE: gpio@fffffa00 {
365 compatible = "atmel,at91rm9200-gpio";
366 reg = <0xfffffa00 0x200>;
367 interrupts = <4 4 1>;
368 #gpio-cells = <2>;
369 gpio-controller;
370 interrupt-controller;
371 #interrupt-cells = <2>;
372 };
373 };
374
375 dbgu: serial@ffffee00 {
376 compatible = "atmel,at91sam9260-usart";
377 reg = <0xffffee00 0x200>;
378 interrupts = <1 4 7>;
379 pinctrl-names = "default";
380 pinctrl-0 = <&pinctrl_dbgu>;
381 status = "disabled";
382 };
383
384 usart0: serial@fff8c000 {
385 compatible = "atmel,at91sam9260-usart";
386 reg = <0xfff8c000 0x200>;
387 interrupts = <7 4 5>;
388 atmel,use-dma-rx;
389 atmel,use-dma-tx;
390 pinctrl-names = "default";
391 pinctrl-0 = <&pinctrl_usart0>;
392 status = "disabled";
393 };
394
395 usart1: serial@fff90000 {
396 compatible = "atmel,at91sam9260-usart";
397 reg = <0xfff90000 0x200>;
398 interrupts = <8 4 5>;
399 atmel,use-dma-rx;
400 atmel,use-dma-tx;
401 pinctrl-names = "default";
402 pinctrl-0 = <&pinctrl_usart1>;
403 status = "disabled";
404 };
405
406 usart2: serial@fff94000 {
407 compatible = "atmel,at91sam9260-usart";
408 reg = <0xfff94000 0x200>;
409 interrupts = <9 4 5>;
410 atmel,use-dma-rx;
411 atmel,use-dma-tx;
412 pinctrl-names = "default";
413 pinctrl-0 = <&pinctrl_usart2>;
414 status = "disabled";
415 };
416
417 ssc0: ssc@fff98000 {
418 compatible = "atmel,at91rm9200-ssc";
419 reg = <0xfff98000 0x4000>;
420 interrupts = <16 4 5>;
421 pinctrl-names = "default";
422 pinctrl-0 = <&pinctrl_ssc0_tx &pinctrl_ssc0_rx>;
423 status = "disabled";
424 };
425
426 ssc1: ssc@fff9c000 {
427 compatible = "atmel,at91rm9200-ssc";
428 reg = <0xfff9c000 0x4000>;
429 interrupts = <17 4 5>;
430 pinctrl-names = "default";
431 pinctrl-0 = <&pinctrl_ssc1_tx &pinctrl_ssc1_rx>;
432 status = "disabled";
433 };
434
435 macb0: ethernet@fffbc000 {
436 compatible = "cdns,at32ap7000-macb", "cdns,macb";
437 reg = <0xfffbc000 0x100>;
438 interrupts = <21 4 3>;
439 pinctrl-names = "default";
440 pinctrl-0 = <&pinctrl_macb_rmii>;
441 status = "disabled";
442 };
443
444 usb1: gadget@fff78000 {
445 compatible = "atmel,at91rm9200-udc";
446 reg = <0xfff78000 0x4000>;
447 interrupts = <24 4 2>;
448 status = "disabled";
449 };
450
451 i2c0: i2c@fff88000 {
452 compatible = "atmel,at91sam9263-i2c";
453 reg = <0xfff88000 0x100>;
454 interrupts = <13 4 6>;
455 #address-cells = <1>;
456 #size-cells = <0>;
457 status = "disabled";
458 };
459
460 mmc0: mmc@fff80000 {
461 compatible = "atmel,hsmci";
462 reg = <0xfff80000 0x600>;
463 interrupts = <10 4 0>;
464 #address-cells = <1>;
465 #size-cells = <0>;
466 status = "disabled";
467 };
468
469 mmc1: mmc@fff84000 {
470 compatible = "atmel,hsmci";
471 reg = <0xfff84000 0x600>;
472 interrupts = <11 4 0>;
473 #address-cells = <1>;
474 #size-cells = <0>;
475 status = "disabled";
476 };
477
478 watchdog@fffffd40 {
479 compatible = "atmel,at91sam9260-wdt";
480 reg = <0xfffffd40 0x10>;
481 status = "disabled";
482 };
483
484 spi0: spi@fffa4000 {
485 #address-cells = <1>;
486 #size-cells = <0>;
487 compatible = "atmel,at91rm9200-spi";
488 reg = <0xfffa4000 0x200>;
489 interrupts = <14 4 3>;
490 pinctrl-names = "default";
491 pinctrl-0 = <&pinctrl_spi0>;
492 status = "disabled";
493 };
494
495 spi1: spi@fffa8000 {
496 #address-cells = <1>;
497 #size-cells = <0>;
498 compatible = "atmel,at91rm9200-spi";
499 reg = <0xfffa8000 0x200>;
500 interrupts = <15 4 3>;
501 pinctrl-names = "default";
502 pinctrl-0 = <&pinctrl_spi1>;
503 status = "disabled";
504 };
505 };
506
507 nand0: nand@40000000 {
508 compatible = "atmel,at91rm9200-nand";
509 #address-cells = <1>;
510 #size-cells = <1>;
511 reg = <0x40000000 0x10000000
512 0xffffe000 0x200
513 >;
514 atmel,nand-addr-offset = <21>;
515 atmel,nand-cmd-offset = <22>;
516 pinctrl-names = "default";
517 pinctrl-0 = <&pinctrl_nand>;
518 gpios = <&pioA 22 0
519 &pioD 15 0
520 0
521 >;
522 status = "disabled";
523 };
524
525 usb0: ohci@00a00000 {
526 compatible = "atmel,at91rm9200-ohci", "usb-ohci";
527 reg = <0x00a00000 0x100000>;
528 interrupts = <29 4 2>;
529 status = "disabled";
530 };
531 };
532
533 i2c@0 {
534 compatible = "i2c-gpio";
535 gpios = <&pioB 4 0 /* sda */
536 &pioB 5 0 /* scl */
537 >;
538 i2c-gpio,sda-open-drain;
539 i2c-gpio,scl-open-drain;
540 i2c-gpio,delay-us = <2>; /* ~100 kHz */
541 #address-cells = <1>;
542 #size-cells = <0>;
543 status = "disabled";
544 };
545};