at v3.10-rc5 233 lines 5.2 kB view raw
1#ifndef _PERF_PERF_H 2#define _PERF_PERF_H 3 4#include <asm/unistd.h> 5 6#if defined(__i386__) 7#define rmb() asm volatile("lock; addl $0,0(%%esp)" ::: "memory") 8#define cpu_relax() asm volatile("rep; nop" ::: "memory"); 9#define CPUINFO_PROC "model name" 10#ifndef __NR_perf_event_open 11# define __NR_perf_event_open 336 12#endif 13#endif 14 15#if defined(__x86_64__) 16#define rmb() asm volatile("lfence" ::: "memory") 17#define cpu_relax() asm volatile("rep; nop" ::: "memory"); 18#define CPUINFO_PROC "model name" 19#ifndef __NR_perf_event_open 20# define __NR_perf_event_open 298 21#endif 22#endif 23 24#ifdef __powerpc__ 25#include "../../arch/powerpc/include/uapi/asm/unistd.h" 26#define rmb() asm volatile ("sync" ::: "memory") 27#define cpu_relax() asm volatile ("" ::: "memory"); 28#define CPUINFO_PROC "cpu" 29#endif 30 31#ifdef __s390__ 32#define rmb() asm volatile("bcr 15,0" ::: "memory") 33#define cpu_relax() asm volatile("" ::: "memory"); 34#endif 35 36#ifdef __sh__ 37#if defined(__SH4A__) || defined(__SH5__) 38# define rmb() asm volatile("synco" ::: "memory") 39#else 40# define rmb() asm volatile("" ::: "memory") 41#endif 42#define cpu_relax() asm volatile("" ::: "memory") 43#define CPUINFO_PROC "cpu type" 44#endif 45 46#ifdef __hppa__ 47#define rmb() asm volatile("" ::: "memory") 48#define cpu_relax() asm volatile("" ::: "memory"); 49#define CPUINFO_PROC "cpu" 50#endif 51 52#ifdef __sparc__ 53#define rmb() asm volatile("":::"memory") 54#define cpu_relax() asm volatile("":::"memory") 55#define CPUINFO_PROC "cpu" 56#endif 57 58#ifdef __alpha__ 59#define rmb() asm volatile("mb" ::: "memory") 60#define cpu_relax() asm volatile("" ::: "memory") 61#define CPUINFO_PROC "cpu model" 62#endif 63 64#ifdef __ia64__ 65#define rmb() asm volatile ("mf" ::: "memory") 66#define cpu_relax() asm volatile ("hint @pause" ::: "memory") 67#define CPUINFO_PROC "model name" 68#endif 69 70#ifdef __arm__ 71/* 72 * Use the __kuser_memory_barrier helper in the CPU helper page. See 73 * arch/arm/kernel/entry-armv.S in the kernel source for details. 74 */ 75#define rmb() ((void(*)(void))0xffff0fa0)() 76#define cpu_relax() asm volatile("":::"memory") 77#define CPUINFO_PROC "Processor" 78#endif 79 80#ifdef __aarch64__ 81#define rmb() asm volatile("dmb ld" ::: "memory") 82#define cpu_relax() asm volatile("yield" ::: "memory") 83#endif 84 85#ifdef __mips__ 86#define rmb() asm volatile( \ 87 ".set mips2\n\t" \ 88 "sync\n\t" \ 89 ".set mips0" \ 90 : /* no output */ \ 91 : /* no input */ \ 92 : "memory") 93#define cpu_relax() asm volatile("" ::: "memory") 94#define CPUINFO_PROC "cpu model" 95#endif 96 97#ifdef __arc__ 98#define rmb() asm volatile("" ::: "memory") 99#define cpu_relax() rmb() 100#define CPUINFO_PROC "Processor" 101#endif 102 103#ifdef __metag__ 104#define rmb() asm volatile("" ::: "memory") 105#define cpu_relax() asm volatile("" ::: "memory") 106#define CPUINFO_PROC "CPU" 107#endif 108 109#include <time.h> 110#include <unistd.h> 111#include <sys/types.h> 112#include <sys/syscall.h> 113 114#include <linux/perf_event.h> 115#include "util/types.h" 116#include <stdbool.h> 117 118/* 119 * prctl(PR_TASK_PERF_EVENTS_DISABLE) will (cheaply) disable all 120 * counters in the current task. 121 */ 122#define PR_TASK_PERF_EVENTS_DISABLE 31 123#define PR_TASK_PERF_EVENTS_ENABLE 32 124 125#ifndef NSEC_PER_SEC 126# define NSEC_PER_SEC 1000000000ULL 127#endif 128 129static inline unsigned long long rdclock(void) 130{ 131 struct timespec ts; 132 133 clock_gettime(CLOCK_MONOTONIC, &ts); 134 return ts.tv_sec * 1000000000ULL + ts.tv_nsec; 135} 136 137/* 138 * Pick up some kernel type conventions: 139 */ 140#define __user 141#define asmlinkage 142 143#define unlikely(x) __builtin_expect(!!(x), 0) 144#define min(x, y) ({ \ 145 typeof(x) _min1 = (x); \ 146 typeof(y) _min2 = (y); \ 147 (void) (&_min1 == &_min2); \ 148 _min1 < _min2 ? _min1 : _min2; }) 149 150extern bool test_attr__enabled; 151void test_attr__init(void); 152void test_attr__open(struct perf_event_attr *attr, pid_t pid, int cpu, 153 int fd, int group_fd, unsigned long flags); 154 155static inline int 156sys_perf_event_open(struct perf_event_attr *attr, 157 pid_t pid, int cpu, int group_fd, 158 unsigned long flags) 159{ 160 int fd; 161 162 fd = syscall(__NR_perf_event_open, attr, pid, cpu, 163 group_fd, flags); 164 165 if (unlikely(test_attr__enabled)) 166 test_attr__open(attr, pid, cpu, fd, group_fd, flags); 167 168 return fd; 169} 170 171#define MAX_COUNTERS 256 172#define MAX_NR_CPUS 256 173 174struct ip_callchain { 175 u64 nr; 176 u64 ips[0]; 177}; 178 179struct branch_flags { 180 u64 mispred:1; 181 u64 predicted:1; 182 u64 reserved:62; 183}; 184 185struct branch_entry { 186 u64 from; 187 u64 to; 188 struct branch_flags flags; 189}; 190 191struct branch_stack { 192 u64 nr; 193 struct branch_entry entries[0]; 194}; 195 196extern const char *input_name; 197extern bool perf_host, perf_guest; 198extern const char perf_version_string[]; 199 200void pthread__unblock_sigwinch(void); 201 202#include "util/target.h" 203 204enum perf_call_graph_mode { 205 CALLCHAIN_NONE, 206 CALLCHAIN_FP, 207 CALLCHAIN_DWARF 208}; 209 210struct perf_record_opts { 211 struct perf_target target; 212 int call_graph; 213 bool group; 214 bool inherit_stat; 215 bool no_delay; 216 bool no_inherit; 217 bool no_samples; 218 bool pipe_output; 219 bool raw_samples; 220 bool sample_address; 221 bool sample_weight; 222 bool sample_time; 223 bool period; 224 unsigned int freq; 225 unsigned int mmap_pages; 226 unsigned int user_freq; 227 u64 branch_stack; 228 u64 default_interval; 229 u64 user_interval; 230 u16 stack_dump_size; 231}; 232 233#endif