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1/******************************************************************************* 2 3 Intel PRO/1000 Linux driver 4 Copyright(c) 1999 - 2011 Intel Corporation. 5 6 This program is free software; you can redistribute it and/or modify it 7 under the terms and conditions of the GNU General Public License, 8 version 2, as published by the Free Software Foundation. 9 10 This program is distributed in the hope it will be useful, but WITHOUT 11 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or 12 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for 13 more details. 14 15 You should have received a copy of the GNU General Public License along with 16 this program; if not, write to the Free Software Foundation, Inc., 17 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA. 18 19 The full GNU General Public License is included in this distribution in 20 the file called "COPYING". 21 22 Contact Information: 23 Linux NICS <linux.nics@intel.com> 24 e1000-devel Mailing List <e1000-devel@lists.sourceforge.net> 25 Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497 26 27*******************************************************************************/ 28 29#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt 30 31#include <linux/module.h> 32#include <linux/types.h> 33#include <linux/init.h> 34#include <linux/pci.h> 35#include <linux/vmalloc.h> 36#include <linux/pagemap.h> 37#include <linux/delay.h> 38#include <linux/netdevice.h> 39#include <linux/tcp.h> 40#include <linux/ipv6.h> 41#include <linux/slab.h> 42#include <net/checksum.h> 43#include <net/ip6_checksum.h> 44#include <linux/mii.h> 45#include <linux/ethtool.h> 46#include <linux/if_vlan.h> 47#include <linux/cpu.h> 48#include <linux/smp.h> 49#include <linux/pm_qos_params.h> 50#include <linux/pm_runtime.h> 51#include <linux/aer.h> 52#include <linux/prefetch.h> 53 54#include "e1000.h" 55 56#define DRV_EXTRAVERSION "-k2" 57 58#define DRV_VERSION "1.3.10" DRV_EXTRAVERSION 59char e1000e_driver_name[] = "e1000e"; 60const char e1000e_driver_version[] = DRV_VERSION; 61 62static void e1000e_disable_aspm(struct pci_dev *pdev, u16 state); 63 64static const struct e1000_info *e1000_info_tbl[] = { 65 [board_82571] = &e1000_82571_info, 66 [board_82572] = &e1000_82572_info, 67 [board_82573] = &e1000_82573_info, 68 [board_82574] = &e1000_82574_info, 69 [board_82583] = &e1000_82583_info, 70 [board_80003es2lan] = &e1000_es2_info, 71 [board_ich8lan] = &e1000_ich8_info, 72 [board_ich9lan] = &e1000_ich9_info, 73 [board_ich10lan] = &e1000_ich10_info, 74 [board_pchlan] = &e1000_pch_info, 75 [board_pch2lan] = &e1000_pch2_info, 76}; 77 78struct e1000_reg_info { 79 u32 ofs; 80 char *name; 81}; 82 83#define E1000_RDFH 0x02410 /* Rx Data FIFO Head - RW */ 84#define E1000_RDFT 0x02418 /* Rx Data FIFO Tail - RW */ 85#define E1000_RDFHS 0x02420 /* Rx Data FIFO Head Saved - RW */ 86#define E1000_RDFTS 0x02428 /* Rx Data FIFO Tail Saved - RW */ 87#define E1000_RDFPC 0x02430 /* Rx Data FIFO Packet Count - RW */ 88 89#define E1000_TDFH 0x03410 /* Tx Data FIFO Head - RW */ 90#define E1000_TDFT 0x03418 /* Tx Data FIFO Tail - RW */ 91#define E1000_TDFHS 0x03420 /* Tx Data FIFO Head Saved - RW */ 92#define E1000_TDFTS 0x03428 /* Tx Data FIFO Tail Saved - RW */ 93#define E1000_TDFPC 0x03430 /* Tx Data FIFO Packet Count - RW */ 94 95static const struct e1000_reg_info e1000_reg_info_tbl[] = { 96 97 /* General Registers */ 98 {E1000_CTRL, "CTRL"}, 99 {E1000_STATUS, "STATUS"}, 100 {E1000_CTRL_EXT, "CTRL_EXT"}, 101 102 /* Interrupt Registers */ 103 {E1000_ICR, "ICR"}, 104 105 /* Rx Registers */ 106 {E1000_RCTL, "RCTL"}, 107 {E1000_RDLEN, "RDLEN"}, 108 {E1000_RDH, "RDH"}, 109 {E1000_RDT, "RDT"}, 110 {E1000_RDTR, "RDTR"}, 111 {E1000_RXDCTL(0), "RXDCTL"}, 112 {E1000_ERT, "ERT"}, 113 {E1000_RDBAL, "RDBAL"}, 114 {E1000_RDBAH, "RDBAH"}, 115 {E1000_RDFH, "RDFH"}, 116 {E1000_RDFT, "RDFT"}, 117 {E1000_RDFHS, "RDFHS"}, 118 {E1000_RDFTS, "RDFTS"}, 119 {E1000_RDFPC, "RDFPC"}, 120 121 /* Tx Registers */ 122 {E1000_TCTL, "TCTL"}, 123 {E1000_TDBAL, "TDBAL"}, 124 {E1000_TDBAH, "TDBAH"}, 125 {E1000_TDLEN, "TDLEN"}, 126 {E1000_TDH, "TDH"}, 127 {E1000_TDT, "TDT"}, 128 {E1000_TIDV, "TIDV"}, 129 {E1000_TXDCTL(0), "TXDCTL"}, 130 {E1000_TADV, "TADV"}, 131 {E1000_TARC(0), "TARC"}, 132 {E1000_TDFH, "TDFH"}, 133 {E1000_TDFT, "TDFT"}, 134 {E1000_TDFHS, "TDFHS"}, 135 {E1000_TDFTS, "TDFTS"}, 136 {E1000_TDFPC, "TDFPC"}, 137 138 /* List Terminator */ 139 {} 140}; 141 142/* 143 * e1000_regdump - register printout routine 144 */ 145static void e1000_regdump(struct e1000_hw *hw, struct e1000_reg_info *reginfo) 146{ 147 int n = 0; 148 char rname[16]; 149 u32 regs[8]; 150 151 switch (reginfo->ofs) { 152 case E1000_RXDCTL(0): 153 for (n = 0; n < 2; n++) 154 regs[n] = __er32(hw, E1000_RXDCTL(n)); 155 break; 156 case E1000_TXDCTL(0): 157 for (n = 0; n < 2; n++) 158 regs[n] = __er32(hw, E1000_TXDCTL(n)); 159 break; 160 case E1000_TARC(0): 161 for (n = 0; n < 2; n++) 162 regs[n] = __er32(hw, E1000_TARC(n)); 163 break; 164 default: 165 printk(KERN_INFO "%-15s %08x\n", 166 reginfo->name, __er32(hw, reginfo->ofs)); 167 return; 168 } 169 170 snprintf(rname, 16, "%s%s", reginfo->name, "[0-1]"); 171 printk(KERN_INFO "%-15s ", rname); 172 for (n = 0; n < 2; n++) 173 printk(KERN_CONT "%08x ", regs[n]); 174 printk(KERN_CONT "\n"); 175} 176 177/* 178 * e1000e_dump - Print registers, Tx-ring and Rx-ring 179 */ 180static void e1000e_dump(struct e1000_adapter *adapter) 181{ 182 struct net_device *netdev = adapter->netdev; 183 struct e1000_hw *hw = &adapter->hw; 184 struct e1000_reg_info *reginfo; 185 struct e1000_ring *tx_ring = adapter->tx_ring; 186 struct e1000_tx_desc *tx_desc; 187 struct my_u0 { 188 u64 a; 189 u64 b; 190 } *u0; 191 struct e1000_buffer *buffer_info; 192 struct e1000_ring *rx_ring = adapter->rx_ring; 193 union e1000_rx_desc_packet_split *rx_desc_ps; 194 struct e1000_rx_desc *rx_desc; 195 struct my_u1 { 196 u64 a; 197 u64 b; 198 u64 c; 199 u64 d; 200 } *u1; 201 u32 staterr; 202 int i = 0; 203 204 if (!netif_msg_hw(adapter)) 205 return; 206 207 /* Print netdevice Info */ 208 if (netdev) { 209 dev_info(&adapter->pdev->dev, "Net device Info\n"); 210 printk(KERN_INFO "Device Name state " 211 "trans_start last_rx\n"); 212 printk(KERN_INFO "%-15s %016lX %016lX %016lX\n", 213 netdev->name, netdev->state, netdev->trans_start, 214 netdev->last_rx); 215 } 216 217 /* Print Registers */ 218 dev_info(&adapter->pdev->dev, "Register Dump\n"); 219 printk(KERN_INFO " Register Name Value\n"); 220 for (reginfo = (struct e1000_reg_info *)e1000_reg_info_tbl; 221 reginfo->name; reginfo++) { 222 e1000_regdump(hw, reginfo); 223 } 224 225 /* Print Tx Ring Summary */ 226 if (!netdev || !netif_running(netdev)) 227 goto exit; 228 229 dev_info(&adapter->pdev->dev, "Tx Ring Summary\n"); 230 printk(KERN_INFO "Queue [NTU] [NTC] [bi(ntc)->dma ]" 231 " leng ntw timestamp\n"); 232 buffer_info = &tx_ring->buffer_info[tx_ring->next_to_clean]; 233 printk(KERN_INFO " %5d %5X %5X %016llX %04X %3X %016llX\n", 234 0, tx_ring->next_to_use, tx_ring->next_to_clean, 235 (unsigned long long)buffer_info->dma, 236 buffer_info->length, 237 buffer_info->next_to_watch, 238 (unsigned long long)buffer_info->time_stamp); 239 240 /* Print Tx Ring */ 241 if (!netif_msg_tx_done(adapter)) 242 goto rx_ring_summary; 243 244 dev_info(&adapter->pdev->dev, "Tx Ring Dump\n"); 245 246 /* Transmit Descriptor Formats - DEXT[29] is 0 (Legacy) or 1 (Extended) 247 * 248 * Legacy Transmit Descriptor 249 * +--------------------------------------------------------------+ 250 * 0 | Buffer Address [63:0] (Reserved on Write Back) | 251 * +--------------------------------------------------------------+ 252 * 8 | Special | CSS | Status | CMD | CSO | Length | 253 * +--------------------------------------------------------------+ 254 * 63 48 47 36 35 32 31 24 23 16 15 0 255 * 256 * Extended Context Descriptor (DTYP=0x0) for TSO or checksum offload 257 * 63 48 47 40 39 32 31 16 15 8 7 0 258 * +----------------------------------------------------------------+ 259 * 0 | TUCSE | TUCS0 | TUCSS | IPCSE | IPCS0 | IPCSS | 260 * +----------------------------------------------------------------+ 261 * 8 | MSS | HDRLEN | RSV | STA | TUCMD | DTYP | PAYLEN | 262 * +----------------------------------------------------------------+ 263 * 63 48 47 40 39 36 35 32 31 24 23 20 19 0 264 * 265 * Extended Data Descriptor (DTYP=0x1) 266 * +----------------------------------------------------------------+ 267 * 0 | Buffer Address [63:0] | 268 * +----------------------------------------------------------------+ 269 * 8 | VLAN tag | POPTS | Rsvd | Status | Command | DTYP | DTALEN | 270 * +----------------------------------------------------------------+ 271 * 63 48 47 40 39 36 35 32 31 24 23 20 19 0 272 */ 273 printk(KERN_INFO "Tl[desc] [address 63:0 ] [SpeCssSCmCsLen]" 274 " [bi->dma ] leng ntw timestamp bi->skb " 275 "<-- Legacy format\n"); 276 printk(KERN_INFO "Tc[desc] [Ce CoCsIpceCoS] [MssHlRSCm0Plen]" 277 " [bi->dma ] leng ntw timestamp bi->skb " 278 "<-- Ext Context format\n"); 279 printk(KERN_INFO "Td[desc] [address 63:0 ] [VlaPoRSCm1Dlen]" 280 " [bi->dma ] leng ntw timestamp bi->skb " 281 "<-- Ext Data format\n"); 282 for (i = 0; tx_ring->desc && (i < tx_ring->count); i++) { 283 tx_desc = E1000_TX_DESC(*tx_ring, i); 284 buffer_info = &tx_ring->buffer_info[i]; 285 u0 = (struct my_u0 *)tx_desc; 286 printk(KERN_INFO "T%c[0x%03X] %016llX %016llX %016llX " 287 "%04X %3X %016llX %p", 288 (!(le64_to_cpu(u0->b) & (1 << 29)) ? 'l' : 289 ((le64_to_cpu(u0->b) & (1 << 20)) ? 'd' : 'c')), i, 290 (unsigned long long)le64_to_cpu(u0->a), 291 (unsigned long long)le64_to_cpu(u0->b), 292 (unsigned long long)buffer_info->dma, 293 buffer_info->length, buffer_info->next_to_watch, 294 (unsigned long long)buffer_info->time_stamp, 295 buffer_info->skb); 296 if (i == tx_ring->next_to_use && i == tx_ring->next_to_clean) 297 printk(KERN_CONT " NTC/U\n"); 298 else if (i == tx_ring->next_to_use) 299 printk(KERN_CONT " NTU\n"); 300 else if (i == tx_ring->next_to_clean) 301 printk(KERN_CONT " NTC\n"); 302 else 303 printk(KERN_CONT "\n"); 304 305 if (netif_msg_pktdata(adapter) && buffer_info->dma != 0) 306 print_hex_dump(KERN_INFO, "", DUMP_PREFIX_ADDRESS, 307 16, 1, phys_to_virt(buffer_info->dma), 308 buffer_info->length, true); 309 } 310 311 /* Print Rx Ring Summary */ 312rx_ring_summary: 313 dev_info(&adapter->pdev->dev, "Rx Ring Summary\n"); 314 printk(KERN_INFO "Queue [NTU] [NTC]\n"); 315 printk(KERN_INFO " %5d %5X %5X\n", 0, 316 rx_ring->next_to_use, rx_ring->next_to_clean); 317 318 /* Print Rx Ring */ 319 if (!netif_msg_rx_status(adapter)) 320 goto exit; 321 322 dev_info(&adapter->pdev->dev, "Rx Ring Dump\n"); 323 switch (adapter->rx_ps_pages) { 324 case 1: 325 case 2: 326 case 3: 327 /* [Extended] Packet Split Receive Descriptor Format 328 * 329 * +-----------------------------------------------------+ 330 * 0 | Buffer Address 0 [63:0] | 331 * +-----------------------------------------------------+ 332 * 8 | Buffer Address 1 [63:0] | 333 * +-----------------------------------------------------+ 334 * 16 | Buffer Address 2 [63:0] | 335 * +-----------------------------------------------------+ 336 * 24 | Buffer Address 3 [63:0] | 337 * +-----------------------------------------------------+ 338 */ 339 printk(KERN_INFO "R [desc] [buffer 0 63:0 ] " 340 "[buffer 1 63:0 ] " 341 "[buffer 2 63:0 ] [buffer 3 63:0 ] [bi->dma ] " 342 "[bi->skb] <-- Ext Pkt Split format\n"); 343 /* [Extended] Receive Descriptor (Write-Back) Format 344 * 345 * 63 48 47 32 31 13 12 8 7 4 3 0 346 * +------------------------------------------------------+ 347 * 0 | Packet | IP | Rsvd | MRQ | Rsvd | MRQ RSS | 348 * | Checksum | Ident | | Queue | | Type | 349 * +------------------------------------------------------+ 350 * 8 | VLAN Tag | Length | Extended Error | Extended Status | 351 * +------------------------------------------------------+ 352 * 63 48 47 32 31 20 19 0 353 */ 354 printk(KERN_INFO "RWB[desc] [ck ipid mrqhsh] " 355 "[vl l0 ee es] " 356 "[ l3 l2 l1 hs] [reserved ] ---------------- " 357 "[bi->skb] <-- Ext Rx Write-Back format\n"); 358 for (i = 0; i < rx_ring->count; i++) { 359 buffer_info = &rx_ring->buffer_info[i]; 360 rx_desc_ps = E1000_RX_DESC_PS(*rx_ring, i); 361 u1 = (struct my_u1 *)rx_desc_ps; 362 staterr = 363 le32_to_cpu(rx_desc_ps->wb.middle.status_error); 364 if (staterr & E1000_RXD_STAT_DD) { 365 /* Descriptor Done */ 366 printk(KERN_INFO "RWB[0x%03X] %016llX " 367 "%016llX %016llX %016llX " 368 "---------------- %p", i, 369 (unsigned long long)le64_to_cpu(u1->a), 370 (unsigned long long)le64_to_cpu(u1->b), 371 (unsigned long long)le64_to_cpu(u1->c), 372 (unsigned long long)le64_to_cpu(u1->d), 373 buffer_info->skb); 374 } else { 375 printk(KERN_INFO "R [0x%03X] %016llX " 376 "%016llX %016llX %016llX %016llX %p", i, 377 (unsigned long long)le64_to_cpu(u1->a), 378 (unsigned long long)le64_to_cpu(u1->b), 379 (unsigned long long)le64_to_cpu(u1->c), 380 (unsigned long long)le64_to_cpu(u1->d), 381 (unsigned long long)buffer_info->dma, 382 buffer_info->skb); 383 384 if (netif_msg_pktdata(adapter)) 385 print_hex_dump(KERN_INFO, "", 386 DUMP_PREFIX_ADDRESS, 16, 1, 387 phys_to_virt(buffer_info->dma), 388 adapter->rx_ps_bsize0, true); 389 } 390 391 if (i == rx_ring->next_to_use) 392 printk(KERN_CONT " NTU\n"); 393 else if (i == rx_ring->next_to_clean) 394 printk(KERN_CONT " NTC\n"); 395 else 396 printk(KERN_CONT "\n"); 397 } 398 break; 399 default: 400 case 0: 401 /* Legacy Receive Descriptor Format 402 * 403 * +-----------------------------------------------------+ 404 * | Buffer Address [63:0] | 405 * +-----------------------------------------------------+ 406 * | VLAN Tag | Errors | Status 0 | Packet csum | Length | 407 * +-----------------------------------------------------+ 408 * 63 48 47 40 39 32 31 16 15 0 409 */ 410 printk(KERN_INFO "Rl[desc] [address 63:0 ] " 411 "[vl er S cks ln] [bi->dma ] [bi->skb] " 412 "<-- Legacy format\n"); 413 for (i = 0; rx_ring->desc && (i < rx_ring->count); i++) { 414 rx_desc = E1000_RX_DESC(*rx_ring, i); 415 buffer_info = &rx_ring->buffer_info[i]; 416 u0 = (struct my_u0 *)rx_desc; 417 printk(KERN_INFO "Rl[0x%03X] %016llX %016llX " 418 "%016llX %p", i, 419 (unsigned long long)le64_to_cpu(u0->a), 420 (unsigned long long)le64_to_cpu(u0->b), 421 (unsigned long long)buffer_info->dma, 422 buffer_info->skb); 423 if (i == rx_ring->next_to_use) 424 printk(KERN_CONT " NTU\n"); 425 else if (i == rx_ring->next_to_clean) 426 printk(KERN_CONT " NTC\n"); 427 else 428 printk(KERN_CONT "\n"); 429 430 if (netif_msg_pktdata(adapter)) 431 print_hex_dump(KERN_INFO, "", 432 DUMP_PREFIX_ADDRESS, 433 16, 1, 434 phys_to_virt(buffer_info->dma), 435 adapter->rx_buffer_len, true); 436 } 437 } 438 439exit: 440 return; 441} 442 443/** 444 * e1000_desc_unused - calculate if we have unused descriptors 445 **/ 446static int e1000_desc_unused(struct e1000_ring *ring) 447{ 448 if (ring->next_to_clean > ring->next_to_use) 449 return ring->next_to_clean - ring->next_to_use - 1; 450 451 return ring->count + ring->next_to_clean - ring->next_to_use - 1; 452} 453 454/** 455 * e1000_receive_skb - helper function to handle Rx indications 456 * @adapter: board private structure 457 * @status: descriptor status field as written by hardware 458 * @vlan: descriptor vlan field as written by hardware (no le/be conversion) 459 * @skb: pointer to sk_buff to be indicated to stack 460 **/ 461static void e1000_receive_skb(struct e1000_adapter *adapter, 462 struct net_device *netdev, struct sk_buff *skb, 463 u8 status, __le16 vlan) 464{ 465 u16 tag = le16_to_cpu(vlan); 466 skb->protocol = eth_type_trans(skb, netdev); 467 468 if (status & E1000_RXD_STAT_VP) 469 __vlan_hwaccel_put_tag(skb, tag); 470 471 napi_gro_receive(&adapter->napi, skb); 472} 473 474/** 475 * e1000_rx_checksum - Receive Checksum Offload 476 * @adapter: board private structure 477 * @status_err: receive descriptor status and error fields 478 * @csum: receive descriptor csum field 479 * @sk_buff: socket buffer with received data 480 **/ 481static void e1000_rx_checksum(struct e1000_adapter *adapter, u32 status_err, 482 u32 csum, struct sk_buff *skb) 483{ 484 u16 status = (u16)status_err; 485 u8 errors = (u8)(status_err >> 24); 486 487 skb_checksum_none_assert(skb); 488 489 /* Ignore Checksum bit is set */ 490 if (status & E1000_RXD_STAT_IXSM) 491 return; 492 /* TCP/UDP checksum error bit is set */ 493 if (errors & E1000_RXD_ERR_TCPE) { 494 /* let the stack verify checksum errors */ 495 adapter->hw_csum_err++; 496 return; 497 } 498 499 /* TCP/UDP Checksum has not been calculated */ 500 if (!(status & (E1000_RXD_STAT_TCPCS | E1000_RXD_STAT_UDPCS))) 501 return; 502 503 /* It must be a TCP or UDP packet with a valid checksum */ 504 if (status & E1000_RXD_STAT_TCPCS) { 505 /* TCP checksum is good */ 506 skb->ip_summed = CHECKSUM_UNNECESSARY; 507 } else { 508 /* 509 * IP fragment with UDP payload 510 * Hardware complements the payload checksum, so we undo it 511 * and then put the value in host order for further stack use. 512 */ 513 __sum16 sum = (__force __sum16)htons(csum); 514 skb->csum = csum_unfold(~sum); 515 skb->ip_summed = CHECKSUM_COMPLETE; 516 } 517 adapter->hw_csum_good++; 518} 519 520/** 521 * e1000_alloc_rx_buffers - Replace used receive buffers; legacy & extended 522 * @adapter: address of board private structure 523 **/ 524static void e1000_alloc_rx_buffers(struct e1000_adapter *adapter, 525 int cleaned_count) 526{ 527 struct net_device *netdev = adapter->netdev; 528 struct pci_dev *pdev = adapter->pdev; 529 struct e1000_ring *rx_ring = adapter->rx_ring; 530 struct e1000_rx_desc *rx_desc; 531 struct e1000_buffer *buffer_info; 532 struct sk_buff *skb; 533 unsigned int i; 534 unsigned int bufsz = adapter->rx_buffer_len; 535 536 i = rx_ring->next_to_use; 537 buffer_info = &rx_ring->buffer_info[i]; 538 539 while (cleaned_count--) { 540 skb = buffer_info->skb; 541 if (skb) { 542 skb_trim(skb, 0); 543 goto map_skb; 544 } 545 546 skb = netdev_alloc_skb_ip_align(netdev, bufsz); 547 if (!skb) { 548 /* Better luck next round */ 549 adapter->alloc_rx_buff_failed++; 550 break; 551 } 552 553 buffer_info->skb = skb; 554map_skb: 555 buffer_info->dma = dma_map_single(&pdev->dev, skb->data, 556 adapter->rx_buffer_len, 557 DMA_FROM_DEVICE); 558 if (dma_mapping_error(&pdev->dev, buffer_info->dma)) { 559 dev_err(&pdev->dev, "Rx DMA map failed\n"); 560 adapter->rx_dma_failed++; 561 break; 562 } 563 564 rx_desc = E1000_RX_DESC(*rx_ring, i); 565 rx_desc->buffer_addr = cpu_to_le64(buffer_info->dma); 566 567 if (unlikely(!(i & (E1000_RX_BUFFER_WRITE - 1)))) { 568 /* 569 * Force memory writes to complete before letting h/w 570 * know there are new descriptors to fetch. (Only 571 * applicable for weak-ordered memory model archs, 572 * such as IA-64). 573 */ 574 wmb(); 575 writel(i, adapter->hw.hw_addr + rx_ring->tail); 576 } 577 i++; 578 if (i == rx_ring->count) 579 i = 0; 580 buffer_info = &rx_ring->buffer_info[i]; 581 } 582 583 rx_ring->next_to_use = i; 584} 585 586/** 587 * e1000_alloc_rx_buffers_ps - Replace used receive buffers; packet split 588 * @adapter: address of board private structure 589 **/ 590static void e1000_alloc_rx_buffers_ps(struct e1000_adapter *adapter, 591 int cleaned_count) 592{ 593 struct net_device *netdev = adapter->netdev; 594 struct pci_dev *pdev = adapter->pdev; 595 union e1000_rx_desc_packet_split *rx_desc; 596 struct e1000_ring *rx_ring = adapter->rx_ring; 597 struct e1000_buffer *buffer_info; 598 struct e1000_ps_page *ps_page; 599 struct sk_buff *skb; 600 unsigned int i, j; 601 602 i = rx_ring->next_to_use; 603 buffer_info = &rx_ring->buffer_info[i]; 604 605 while (cleaned_count--) { 606 rx_desc = E1000_RX_DESC_PS(*rx_ring, i); 607 608 for (j = 0; j < PS_PAGE_BUFFERS; j++) { 609 ps_page = &buffer_info->ps_pages[j]; 610 if (j >= adapter->rx_ps_pages) { 611 /* all unused desc entries get hw null ptr */ 612 rx_desc->read.buffer_addr[j + 1] = 613 ~cpu_to_le64(0); 614 continue; 615 } 616 if (!ps_page->page) { 617 ps_page->page = alloc_page(GFP_ATOMIC); 618 if (!ps_page->page) { 619 adapter->alloc_rx_buff_failed++; 620 goto no_buffers; 621 } 622 ps_page->dma = dma_map_page(&pdev->dev, 623 ps_page->page, 624 0, PAGE_SIZE, 625 DMA_FROM_DEVICE); 626 if (dma_mapping_error(&pdev->dev, 627 ps_page->dma)) { 628 dev_err(&adapter->pdev->dev, 629 "Rx DMA page map failed\n"); 630 adapter->rx_dma_failed++; 631 goto no_buffers; 632 } 633 } 634 /* 635 * Refresh the desc even if buffer_addrs 636 * didn't change because each write-back 637 * erases this info. 638 */ 639 rx_desc->read.buffer_addr[j + 1] = 640 cpu_to_le64(ps_page->dma); 641 } 642 643 skb = netdev_alloc_skb_ip_align(netdev, 644 adapter->rx_ps_bsize0); 645 646 if (!skb) { 647 adapter->alloc_rx_buff_failed++; 648 break; 649 } 650 651 buffer_info->skb = skb; 652 buffer_info->dma = dma_map_single(&pdev->dev, skb->data, 653 adapter->rx_ps_bsize0, 654 DMA_FROM_DEVICE); 655 if (dma_mapping_error(&pdev->dev, buffer_info->dma)) { 656 dev_err(&pdev->dev, "Rx DMA map failed\n"); 657 adapter->rx_dma_failed++; 658 /* cleanup skb */ 659 dev_kfree_skb_any(skb); 660 buffer_info->skb = NULL; 661 break; 662 } 663 664 rx_desc->read.buffer_addr[0] = cpu_to_le64(buffer_info->dma); 665 666 if (unlikely(!(i & (E1000_RX_BUFFER_WRITE - 1)))) { 667 /* 668 * Force memory writes to complete before letting h/w 669 * know there are new descriptors to fetch. (Only 670 * applicable for weak-ordered memory model archs, 671 * such as IA-64). 672 */ 673 wmb(); 674 writel(i << 1, adapter->hw.hw_addr + rx_ring->tail); 675 } 676 677 i++; 678 if (i == rx_ring->count) 679 i = 0; 680 buffer_info = &rx_ring->buffer_info[i]; 681 } 682 683no_buffers: 684 rx_ring->next_to_use = i; 685} 686 687/** 688 * e1000_alloc_jumbo_rx_buffers - Replace used jumbo receive buffers 689 * @adapter: address of board private structure 690 * @cleaned_count: number of buffers to allocate this pass 691 **/ 692 693static void e1000_alloc_jumbo_rx_buffers(struct e1000_adapter *adapter, 694 int cleaned_count) 695{ 696 struct net_device *netdev = adapter->netdev; 697 struct pci_dev *pdev = adapter->pdev; 698 struct e1000_rx_desc *rx_desc; 699 struct e1000_ring *rx_ring = adapter->rx_ring; 700 struct e1000_buffer *buffer_info; 701 struct sk_buff *skb; 702 unsigned int i; 703 unsigned int bufsz = 256 - 16 /* for skb_reserve */; 704 705 i = rx_ring->next_to_use; 706 buffer_info = &rx_ring->buffer_info[i]; 707 708 while (cleaned_count--) { 709 skb = buffer_info->skb; 710 if (skb) { 711 skb_trim(skb, 0); 712 goto check_page; 713 } 714 715 skb = netdev_alloc_skb_ip_align(netdev, bufsz); 716 if (unlikely(!skb)) { 717 /* Better luck next round */ 718 adapter->alloc_rx_buff_failed++; 719 break; 720 } 721 722 buffer_info->skb = skb; 723check_page: 724 /* allocate a new page if necessary */ 725 if (!buffer_info->page) { 726 buffer_info->page = alloc_page(GFP_ATOMIC); 727 if (unlikely(!buffer_info->page)) { 728 adapter->alloc_rx_buff_failed++; 729 break; 730 } 731 } 732 733 if (!buffer_info->dma) 734 buffer_info->dma = dma_map_page(&pdev->dev, 735 buffer_info->page, 0, 736 PAGE_SIZE, 737 DMA_FROM_DEVICE); 738 739 rx_desc = E1000_RX_DESC(*rx_ring, i); 740 rx_desc->buffer_addr = cpu_to_le64(buffer_info->dma); 741 742 if (unlikely(++i == rx_ring->count)) 743 i = 0; 744 buffer_info = &rx_ring->buffer_info[i]; 745 } 746 747 if (likely(rx_ring->next_to_use != i)) { 748 rx_ring->next_to_use = i; 749 if (unlikely(i-- == 0)) 750 i = (rx_ring->count - 1); 751 752 /* Force memory writes to complete before letting h/w 753 * know there are new descriptors to fetch. (Only 754 * applicable for weak-ordered memory model archs, 755 * such as IA-64). */ 756 wmb(); 757 writel(i, adapter->hw.hw_addr + rx_ring->tail); 758 } 759} 760 761/** 762 * e1000_clean_rx_irq - Send received data up the network stack; legacy 763 * @adapter: board private structure 764 * 765 * the return value indicates whether actual cleaning was done, there 766 * is no guarantee that everything was cleaned 767 **/ 768static bool e1000_clean_rx_irq(struct e1000_adapter *adapter, 769 int *work_done, int work_to_do) 770{ 771 struct net_device *netdev = adapter->netdev; 772 struct pci_dev *pdev = adapter->pdev; 773 struct e1000_hw *hw = &adapter->hw; 774 struct e1000_ring *rx_ring = adapter->rx_ring; 775 struct e1000_rx_desc *rx_desc, *next_rxd; 776 struct e1000_buffer *buffer_info, *next_buffer; 777 u32 length; 778 unsigned int i; 779 int cleaned_count = 0; 780 bool cleaned = 0; 781 unsigned int total_rx_bytes = 0, total_rx_packets = 0; 782 783 i = rx_ring->next_to_clean; 784 rx_desc = E1000_RX_DESC(*rx_ring, i); 785 buffer_info = &rx_ring->buffer_info[i]; 786 787 while (rx_desc->status & E1000_RXD_STAT_DD) { 788 struct sk_buff *skb; 789 u8 status; 790 791 if (*work_done >= work_to_do) 792 break; 793 (*work_done)++; 794 rmb(); /* read descriptor and rx_buffer_info after status DD */ 795 796 status = rx_desc->status; 797 skb = buffer_info->skb; 798 buffer_info->skb = NULL; 799 800 prefetch(skb->data - NET_IP_ALIGN); 801 802 i++; 803 if (i == rx_ring->count) 804 i = 0; 805 next_rxd = E1000_RX_DESC(*rx_ring, i); 806 prefetch(next_rxd); 807 808 next_buffer = &rx_ring->buffer_info[i]; 809 810 cleaned = 1; 811 cleaned_count++; 812 dma_unmap_single(&pdev->dev, 813 buffer_info->dma, 814 adapter->rx_buffer_len, 815 DMA_FROM_DEVICE); 816 buffer_info->dma = 0; 817 818 length = le16_to_cpu(rx_desc->length); 819 820 /* 821 * !EOP means multiple descriptors were used to store a single 822 * packet, if that's the case we need to toss it. In fact, we 823 * need to toss every packet with the EOP bit clear and the 824 * next frame that _does_ have the EOP bit set, as it is by 825 * definition only a frame fragment 826 */ 827 if (unlikely(!(status & E1000_RXD_STAT_EOP))) 828 adapter->flags2 |= FLAG2_IS_DISCARDING; 829 830 if (adapter->flags2 & FLAG2_IS_DISCARDING) { 831 /* All receives must fit into a single buffer */ 832 e_dbg("Receive packet consumed multiple buffers\n"); 833 /* recycle */ 834 buffer_info->skb = skb; 835 if (status & E1000_RXD_STAT_EOP) 836 adapter->flags2 &= ~FLAG2_IS_DISCARDING; 837 goto next_desc; 838 } 839 840 if (rx_desc->errors & E1000_RXD_ERR_FRAME_ERR_MASK) { 841 /* recycle */ 842 buffer_info->skb = skb; 843 goto next_desc; 844 } 845 846 /* adjust length to remove Ethernet CRC */ 847 if (!(adapter->flags2 & FLAG2_CRC_STRIPPING)) 848 length -= 4; 849 850 total_rx_bytes += length; 851 total_rx_packets++; 852 853 /* 854 * code added for copybreak, this should improve 855 * performance for small packets with large amounts 856 * of reassembly being done in the stack 857 */ 858 if (length < copybreak) { 859 struct sk_buff *new_skb = 860 netdev_alloc_skb_ip_align(netdev, length); 861 if (new_skb) { 862 skb_copy_to_linear_data_offset(new_skb, 863 -NET_IP_ALIGN, 864 (skb->data - 865 NET_IP_ALIGN), 866 (length + 867 NET_IP_ALIGN)); 868 /* save the skb in buffer_info as good */ 869 buffer_info->skb = skb; 870 skb = new_skb; 871 } 872 /* else just continue with the old one */ 873 } 874 /* end copybreak code */ 875 skb_put(skb, length); 876 877 /* Receive Checksum Offload */ 878 e1000_rx_checksum(adapter, 879 (u32)(status) | 880 ((u32)(rx_desc->errors) << 24), 881 le16_to_cpu(rx_desc->csum), skb); 882 883 e1000_receive_skb(adapter, netdev, skb,status,rx_desc->special); 884 885next_desc: 886 rx_desc->status = 0; 887 888 /* return some buffers to hardware, one at a time is too slow */ 889 if (cleaned_count >= E1000_RX_BUFFER_WRITE) { 890 adapter->alloc_rx_buf(adapter, cleaned_count); 891 cleaned_count = 0; 892 } 893 894 /* use prefetched values */ 895 rx_desc = next_rxd; 896 buffer_info = next_buffer; 897 } 898 rx_ring->next_to_clean = i; 899 900 cleaned_count = e1000_desc_unused(rx_ring); 901 if (cleaned_count) 902 adapter->alloc_rx_buf(adapter, cleaned_count); 903 904 adapter->total_rx_bytes += total_rx_bytes; 905 adapter->total_rx_packets += total_rx_packets; 906 return cleaned; 907} 908 909static void e1000_put_txbuf(struct e1000_adapter *adapter, 910 struct e1000_buffer *buffer_info) 911{ 912 if (buffer_info->dma) { 913 if (buffer_info->mapped_as_page) 914 dma_unmap_page(&adapter->pdev->dev, buffer_info->dma, 915 buffer_info->length, DMA_TO_DEVICE); 916 else 917 dma_unmap_single(&adapter->pdev->dev, buffer_info->dma, 918 buffer_info->length, DMA_TO_DEVICE); 919 buffer_info->dma = 0; 920 } 921 if (buffer_info->skb) { 922 dev_kfree_skb_any(buffer_info->skb); 923 buffer_info->skb = NULL; 924 } 925 buffer_info->time_stamp = 0; 926} 927 928static void e1000_print_hw_hang(struct work_struct *work) 929{ 930 struct e1000_adapter *adapter = container_of(work, 931 struct e1000_adapter, 932 print_hang_task); 933 struct e1000_ring *tx_ring = adapter->tx_ring; 934 unsigned int i = tx_ring->next_to_clean; 935 unsigned int eop = tx_ring->buffer_info[i].next_to_watch; 936 struct e1000_tx_desc *eop_desc = E1000_TX_DESC(*tx_ring, eop); 937 struct e1000_hw *hw = &adapter->hw; 938 u16 phy_status, phy_1000t_status, phy_ext_status; 939 u16 pci_status; 940 941 if (test_bit(__E1000_DOWN, &adapter->state)) 942 return; 943 944 e1e_rphy(hw, PHY_STATUS, &phy_status); 945 e1e_rphy(hw, PHY_1000T_STATUS, &phy_1000t_status); 946 e1e_rphy(hw, PHY_EXT_STATUS, &phy_ext_status); 947 948 pci_read_config_word(adapter->pdev, PCI_STATUS, &pci_status); 949 950 /* detected Hardware unit hang */ 951 e_err("Detected Hardware Unit Hang:\n" 952 " TDH <%x>\n" 953 " TDT <%x>\n" 954 " next_to_use <%x>\n" 955 " next_to_clean <%x>\n" 956 "buffer_info[next_to_clean]:\n" 957 " time_stamp <%lx>\n" 958 " next_to_watch <%x>\n" 959 " jiffies <%lx>\n" 960 " next_to_watch.status <%x>\n" 961 "MAC Status <%x>\n" 962 "PHY Status <%x>\n" 963 "PHY 1000BASE-T Status <%x>\n" 964 "PHY Extended Status <%x>\n" 965 "PCI Status <%x>\n", 966 readl(adapter->hw.hw_addr + tx_ring->head), 967 readl(adapter->hw.hw_addr + tx_ring->tail), 968 tx_ring->next_to_use, 969 tx_ring->next_to_clean, 970 tx_ring->buffer_info[eop].time_stamp, 971 eop, 972 jiffies, 973 eop_desc->upper.fields.status, 974 er32(STATUS), 975 phy_status, 976 phy_1000t_status, 977 phy_ext_status, 978 pci_status); 979} 980 981/** 982 * e1000_clean_tx_irq - Reclaim resources after transmit completes 983 * @adapter: board private structure 984 * 985 * the return value indicates whether actual cleaning was done, there 986 * is no guarantee that everything was cleaned 987 **/ 988static bool e1000_clean_tx_irq(struct e1000_adapter *adapter) 989{ 990 struct net_device *netdev = adapter->netdev; 991 struct e1000_hw *hw = &adapter->hw; 992 struct e1000_ring *tx_ring = adapter->tx_ring; 993 struct e1000_tx_desc *tx_desc, *eop_desc; 994 struct e1000_buffer *buffer_info; 995 unsigned int i, eop; 996 unsigned int count = 0; 997 unsigned int total_tx_bytes = 0, total_tx_packets = 0; 998 999 i = tx_ring->next_to_clean; 1000 eop = tx_ring->buffer_info[i].next_to_watch; 1001 eop_desc = E1000_TX_DESC(*tx_ring, eop); 1002 1003 while ((eop_desc->upper.data & cpu_to_le32(E1000_TXD_STAT_DD)) && 1004 (count < tx_ring->count)) { 1005 bool cleaned = false; 1006 rmb(); /* read buffer_info after eop_desc */ 1007 for (; !cleaned; count++) { 1008 tx_desc = E1000_TX_DESC(*tx_ring, i); 1009 buffer_info = &tx_ring->buffer_info[i]; 1010 cleaned = (i == eop); 1011 1012 if (cleaned) { 1013 total_tx_packets += buffer_info->segs; 1014 total_tx_bytes += buffer_info->bytecount; 1015 } 1016 1017 e1000_put_txbuf(adapter, buffer_info); 1018 tx_desc->upper.data = 0; 1019 1020 i++; 1021 if (i == tx_ring->count) 1022 i = 0; 1023 } 1024 1025 if (i == tx_ring->next_to_use) 1026 break; 1027 eop = tx_ring->buffer_info[i].next_to_watch; 1028 eop_desc = E1000_TX_DESC(*tx_ring, eop); 1029 } 1030 1031 tx_ring->next_to_clean = i; 1032 1033#define TX_WAKE_THRESHOLD 32 1034 if (count && netif_carrier_ok(netdev) && 1035 e1000_desc_unused(tx_ring) >= TX_WAKE_THRESHOLD) { 1036 /* Make sure that anybody stopping the queue after this 1037 * sees the new next_to_clean. 1038 */ 1039 smp_mb(); 1040 1041 if (netif_queue_stopped(netdev) && 1042 !(test_bit(__E1000_DOWN, &adapter->state))) { 1043 netif_wake_queue(netdev); 1044 ++adapter->restart_queue; 1045 } 1046 } 1047 1048 if (adapter->detect_tx_hung) { 1049 /* 1050 * Detect a transmit hang in hardware, this serializes the 1051 * check with the clearing of time_stamp and movement of i 1052 */ 1053 adapter->detect_tx_hung = 0; 1054 if (tx_ring->buffer_info[i].time_stamp && 1055 time_after(jiffies, tx_ring->buffer_info[i].time_stamp 1056 + (adapter->tx_timeout_factor * HZ)) && 1057 !(er32(STATUS) & E1000_STATUS_TXOFF)) { 1058 schedule_work(&adapter->print_hang_task); 1059 netif_stop_queue(netdev); 1060 } 1061 } 1062 adapter->total_tx_bytes += total_tx_bytes; 1063 adapter->total_tx_packets += total_tx_packets; 1064 return count < tx_ring->count; 1065} 1066 1067/** 1068 * e1000_clean_rx_irq_ps - Send received data up the network stack; packet split 1069 * @adapter: board private structure 1070 * 1071 * the return value indicates whether actual cleaning was done, there 1072 * is no guarantee that everything was cleaned 1073 **/ 1074static bool e1000_clean_rx_irq_ps(struct e1000_adapter *adapter, 1075 int *work_done, int work_to_do) 1076{ 1077 struct e1000_hw *hw = &adapter->hw; 1078 union e1000_rx_desc_packet_split *rx_desc, *next_rxd; 1079 struct net_device *netdev = adapter->netdev; 1080 struct pci_dev *pdev = adapter->pdev; 1081 struct e1000_ring *rx_ring = adapter->rx_ring; 1082 struct e1000_buffer *buffer_info, *next_buffer; 1083 struct e1000_ps_page *ps_page; 1084 struct sk_buff *skb; 1085 unsigned int i, j; 1086 u32 length, staterr; 1087 int cleaned_count = 0; 1088 bool cleaned = 0; 1089 unsigned int total_rx_bytes = 0, total_rx_packets = 0; 1090 1091 i = rx_ring->next_to_clean; 1092 rx_desc = E1000_RX_DESC_PS(*rx_ring, i); 1093 staterr = le32_to_cpu(rx_desc->wb.middle.status_error); 1094 buffer_info = &rx_ring->buffer_info[i]; 1095 1096 while (staterr & E1000_RXD_STAT_DD) { 1097 if (*work_done >= work_to_do) 1098 break; 1099 (*work_done)++; 1100 skb = buffer_info->skb; 1101 rmb(); /* read descriptor and rx_buffer_info after status DD */ 1102 1103 /* in the packet split case this is header only */ 1104 prefetch(skb->data - NET_IP_ALIGN); 1105 1106 i++; 1107 if (i == rx_ring->count) 1108 i = 0; 1109 next_rxd = E1000_RX_DESC_PS(*rx_ring, i); 1110 prefetch(next_rxd); 1111 1112 next_buffer = &rx_ring->buffer_info[i]; 1113 1114 cleaned = 1; 1115 cleaned_count++; 1116 dma_unmap_single(&pdev->dev, buffer_info->dma, 1117 adapter->rx_ps_bsize0, DMA_FROM_DEVICE); 1118 buffer_info->dma = 0; 1119 1120 /* see !EOP comment in other Rx routine */ 1121 if (!(staterr & E1000_RXD_STAT_EOP)) 1122 adapter->flags2 |= FLAG2_IS_DISCARDING; 1123 1124 if (adapter->flags2 & FLAG2_IS_DISCARDING) { 1125 e_dbg("Packet Split buffers didn't pick up the full " 1126 "packet\n"); 1127 dev_kfree_skb_irq(skb); 1128 if (staterr & E1000_RXD_STAT_EOP) 1129 adapter->flags2 &= ~FLAG2_IS_DISCARDING; 1130 goto next_desc; 1131 } 1132 1133 if (staterr & E1000_RXDEXT_ERR_FRAME_ERR_MASK) { 1134 dev_kfree_skb_irq(skb); 1135 goto next_desc; 1136 } 1137 1138 length = le16_to_cpu(rx_desc->wb.middle.length0); 1139 1140 if (!length) { 1141 e_dbg("Last part of the packet spanning multiple " 1142 "descriptors\n"); 1143 dev_kfree_skb_irq(skb); 1144 goto next_desc; 1145 } 1146 1147 /* Good Receive */ 1148 skb_put(skb, length); 1149 1150 { 1151 /* 1152 * this looks ugly, but it seems compiler issues make it 1153 * more efficient than reusing j 1154 */ 1155 int l1 = le16_to_cpu(rx_desc->wb.upper.length[0]); 1156 1157 /* 1158 * page alloc/put takes too long and effects small packet 1159 * throughput, so unsplit small packets and save the alloc/put 1160 * only valid in softirq (napi) context to call kmap_* 1161 */ 1162 if (l1 && (l1 <= copybreak) && 1163 ((length + l1) <= adapter->rx_ps_bsize0)) { 1164 u8 *vaddr; 1165 1166 ps_page = &buffer_info->ps_pages[0]; 1167 1168 /* 1169 * there is no documentation about how to call 1170 * kmap_atomic, so we can't hold the mapping 1171 * very long 1172 */ 1173 dma_sync_single_for_cpu(&pdev->dev, ps_page->dma, 1174 PAGE_SIZE, DMA_FROM_DEVICE); 1175 vaddr = kmap_atomic(ps_page->page, KM_SKB_DATA_SOFTIRQ); 1176 memcpy(skb_tail_pointer(skb), vaddr, l1); 1177 kunmap_atomic(vaddr, KM_SKB_DATA_SOFTIRQ); 1178 dma_sync_single_for_device(&pdev->dev, ps_page->dma, 1179 PAGE_SIZE, DMA_FROM_DEVICE); 1180 1181 /* remove the CRC */ 1182 if (!(adapter->flags2 & FLAG2_CRC_STRIPPING)) 1183 l1 -= 4; 1184 1185 skb_put(skb, l1); 1186 goto copydone; 1187 } /* if */ 1188 } 1189 1190 for (j = 0; j < PS_PAGE_BUFFERS; j++) { 1191 length = le16_to_cpu(rx_desc->wb.upper.length[j]); 1192 if (!length) 1193 break; 1194 1195 ps_page = &buffer_info->ps_pages[j]; 1196 dma_unmap_page(&pdev->dev, ps_page->dma, PAGE_SIZE, 1197 DMA_FROM_DEVICE); 1198 ps_page->dma = 0; 1199 skb_fill_page_desc(skb, j, ps_page->page, 0, length); 1200 ps_page->page = NULL; 1201 skb->len += length; 1202 skb->data_len += length; 1203 skb->truesize += length; 1204 } 1205 1206 /* strip the ethernet crc, problem is we're using pages now so 1207 * this whole operation can get a little cpu intensive 1208 */ 1209 if (!(adapter->flags2 & FLAG2_CRC_STRIPPING)) 1210 pskb_trim(skb, skb->len - 4); 1211 1212copydone: 1213 total_rx_bytes += skb->len; 1214 total_rx_packets++; 1215 1216 e1000_rx_checksum(adapter, staterr, le16_to_cpu( 1217 rx_desc->wb.lower.hi_dword.csum_ip.csum), skb); 1218 1219 if (rx_desc->wb.upper.header_status & 1220 cpu_to_le16(E1000_RXDPS_HDRSTAT_HDRSP)) 1221 adapter->rx_hdr_split++; 1222 1223 e1000_receive_skb(adapter, netdev, skb, 1224 staterr, rx_desc->wb.middle.vlan); 1225 1226next_desc: 1227 rx_desc->wb.middle.status_error &= cpu_to_le32(~0xFF); 1228 buffer_info->skb = NULL; 1229 1230 /* return some buffers to hardware, one at a time is too slow */ 1231 if (cleaned_count >= E1000_RX_BUFFER_WRITE) { 1232 adapter->alloc_rx_buf(adapter, cleaned_count); 1233 cleaned_count = 0; 1234 } 1235 1236 /* use prefetched values */ 1237 rx_desc = next_rxd; 1238 buffer_info = next_buffer; 1239 1240 staterr = le32_to_cpu(rx_desc->wb.middle.status_error); 1241 } 1242 rx_ring->next_to_clean = i; 1243 1244 cleaned_count = e1000_desc_unused(rx_ring); 1245 if (cleaned_count) 1246 adapter->alloc_rx_buf(adapter, cleaned_count); 1247 1248 adapter->total_rx_bytes += total_rx_bytes; 1249 adapter->total_rx_packets += total_rx_packets; 1250 return cleaned; 1251} 1252 1253/** 1254 * e1000_consume_page - helper function 1255 **/ 1256static void e1000_consume_page(struct e1000_buffer *bi, struct sk_buff *skb, 1257 u16 length) 1258{ 1259 bi->page = NULL; 1260 skb->len += length; 1261 skb->data_len += length; 1262 skb->truesize += length; 1263} 1264 1265/** 1266 * e1000_clean_jumbo_rx_irq - Send received data up the network stack; legacy 1267 * @adapter: board private structure 1268 * 1269 * the return value indicates whether actual cleaning was done, there 1270 * is no guarantee that everything was cleaned 1271 **/ 1272 1273static bool e1000_clean_jumbo_rx_irq(struct e1000_adapter *adapter, 1274 int *work_done, int work_to_do) 1275{ 1276 struct net_device *netdev = adapter->netdev; 1277 struct pci_dev *pdev = adapter->pdev; 1278 struct e1000_ring *rx_ring = adapter->rx_ring; 1279 struct e1000_rx_desc *rx_desc, *next_rxd; 1280 struct e1000_buffer *buffer_info, *next_buffer; 1281 u32 length; 1282 unsigned int i; 1283 int cleaned_count = 0; 1284 bool cleaned = false; 1285 unsigned int total_rx_bytes=0, total_rx_packets=0; 1286 1287 i = rx_ring->next_to_clean; 1288 rx_desc = E1000_RX_DESC(*rx_ring, i); 1289 buffer_info = &rx_ring->buffer_info[i]; 1290 1291 while (rx_desc->status & E1000_RXD_STAT_DD) { 1292 struct sk_buff *skb; 1293 u8 status; 1294 1295 if (*work_done >= work_to_do) 1296 break; 1297 (*work_done)++; 1298 rmb(); /* read descriptor and rx_buffer_info after status DD */ 1299 1300 status = rx_desc->status; 1301 skb = buffer_info->skb; 1302 buffer_info->skb = NULL; 1303 1304 ++i; 1305 if (i == rx_ring->count) 1306 i = 0; 1307 next_rxd = E1000_RX_DESC(*rx_ring, i); 1308 prefetch(next_rxd); 1309 1310 next_buffer = &rx_ring->buffer_info[i]; 1311 1312 cleaned = true; 1313 cleaned_count++; 1314 dma_unmap_page(&pdev->dev, buffer_info->dma, PAGE_SIZE, 1315 DMA_FROM_DEVICE); 1316 buffer_info->dma = 0; 1317 1318 length = le16_to_cpu(rx_desc->length); 1319 1320 /* errors is only valid for DD + EOP descriptors */ 1321 if (unlikely((status & E1000_RXD_STAT_EOP) && 1322 (rx_desc->errors & E1000_RXD_ERR_FRAME_ERR_MASK))) { 1323 /* recycle both page and skb */ 1324 buffer_info->skb = skb; 1325 /* an error means any chain goes out the window 1326 * too */ 1327 if (rx_ring->rx_skb_top) 1328 dev_kfree_skb_irq(rx_ring->rx_skb_top); 1329 rx_ring->rx_skb_top = NULL; 1330 goto next_desc; 1331 } 1332 1333#define rxtop (rx_ring->rx_skb_top) 1334 if (!(status & E1000_RXD_STAT_EOP)) { 1335 /* this descriptor is only the beginning (or middle) */ 1336 if (!rxtop) { 1337 /* this is the beginning of a chain */ 1338 rxtop = skb; 1339 skb_fill_page_desc(rxtop, 0, buffer_info->page, 1340 0, length); 1341 } else { 1342 /* this is the middle of a chain */ 1343 skb_fill_page_desc(rxtop, 1344 skb_shinfo(rxtop)->nr_frags, 1345 buffer_info->page, 0, length); 1346 /* re-use the skb, only consumed the page */ 1347 buffer_info->skb = skb; 1348 } 1349 e1000_consume_page(buffer_info, rxtop, length); 1350 goto next_desc; 1351 } else { 1352 if (rxtop) { 1353 /* end of the chain */ 1354 skb_fill_page_desc(rxtop, 1355 skb_shinfo(rxtop)->nr_frags, 1356 buffer_info->page, 0, length); 1357 /* re-use the current skb, we only consumed the 1358 * page */ 1359 buffer_info->skb = skb; 1360 skb = rxtop; 1361 rxtop = NULL; 1362 e1000_consume_page(buffer_info, skb, length); 1363 } else { 1364 /* no chain, got EOP, this buf is the packet 1365 * copybreak to save the put_page/alloc_page */ 1366 if (length <= copybreak && 1367 skb_tailroom(skb) >= length) { 1368 u8 *vaddr; 1369 vaddr = kmap_atomic(buffer_info->page, 1370 KM_SKB_DATA_SOFTIRQ); 1371 memcpy(skb_tail_pointer(skb), vaddr, 1372 length); 1373 kunmap_atomic(vaddr, 1374 KM_SKB_DATA_SOFTIRQ); 1375 /* re-use the page, so don't erase 1376 * buffer_info->page */ 1377 skb_put(skb, length); 1378 } else { 1379 skb_fill_page_desc(skb, 0, 1380 buffer_info->page, 0, 1381 length); 1382 e1000_consume_page(buffer_info, skb, 1383 length); 1384 } 1385 } 1386 } 1387 1388 /* Receive Checksum Offload XXX recompute due to CRC strip? */ 1389 e1000_rx_checksum(adapter, 1390 (u32)(status) | 1391 ((u32)(rx_desc->errors) << 24), 1392 le16_to_cpu(rx_desc->csum), skb); 1393 1394 /* probably a little skewed due to removing CRC */ 1395 total_rx_bytes += skb->len; 1396 total_rx_packets++; 1397 1398 /* eth type trans needs skb->data to point to something */ 1399 if (!pskb_may_pull(skb, ETH_HLEN)) { 1400 e_err("pskb_may_pull failed.\n"); 1401 dev_kfree_skb_irq(skb); 1402 goto next_desc; 1403 } 1404 1405 e1000_receive_skb(adapter, netdev, skb, status, 1406 rx_desc->special); 1407 1408next_desc: 1409 rx_desc->status = 0; 1410 1411 /* return some buffers to hardware, one at a time is too slow */ 1412 if (unlikely(cleaned_count >= E1000_RX_BUFFER_WRITE)) { 1413 adapter->alloc_rx_buf(adapter, cleaned_count); 1414 cleaned_count = 0; 1415 } 1416 1417 /* use prefetched values */ 1418 rx_desc = next_rxd; 1419 buffer_info = next_buffer; 1420 } 1421 rx_ring->next_to_clean = i; 1422 1423 cleaned_count = e1000_desc_unused(rx_ring); 1424 if (cleaned_count) 1425 adapter->alloc_rx_buf(adapter, cleaned_count); 1426 1427 adapter->total_rx_bytes += total_rx_bytes; 1428 adapter->total_rx_packets += total_rx_packets; 1429 return cleaned; 1430} 1431 1432/** 1433 * e1000_clean_rx_ring - Free Rx Buffers per Queue 1434 * @adapter: board private structure 1435 **/ 1436static void e1000_clean_rx_ring(struct e1000_adapter *adapter) 1437{ 1438 struct e1000_ring *rx_ring = adapter->rx_ring; 1439 struct e1000_buffer *buffer_info; 1440 struct e1000_ps_page *ps_page; 1441 struct pci_dev *pdev = adapter->pdev; 1442 unsigned int i, j; 1443 1444 /* Free all the Rx ring sk_buffs */ 1445 for (i = 0; i < rx_ring->count; i++) { 1446 buffer_info = &rx_ring->buffer_info[i]; 1447 if (buffer_info->dma) { 1448 if (adapter->clean_rx == e1000_clean_rx_irq) 1449 dma_unmap_single(&pdev->dev, buffer_info->dma, 1450 adapter->rx_buffer_len, 1451 DMA_FROM_DEVICE); 1452 else if (adapter->clean_rx == e1000_clean_jumbo_rx_irq) 1453 dma_unmap_page(&pdev->dev, buffer_info->dma, 1454 PAGE_SIZE, 1455 DMA_FROM_DEVICE); 1456 else if (adapter->clean_rx == e1000_clean_rx_irq_ps) 1457 dma_unmap_single(&pdev->dev, buffer_info->dma, 1458 adapter->rx_ps_bsize0, 1459 DMA_FROM_DEVICE); 1460 buffer_info->dma = 0; 1461 } 1462 1463 if (buffer_info->page) { 1464 put_page(buffer_info->page); 1465 buffer_info->page = NULL; 1466 } 1467 1468 if (buffer_info->skb) { 1469 dev_kfree_skb(buffer_info->skb); 1470 buffer_info->skb = NULL; 1471 } 1472 1473 for (j = 0; j < PS_PAGE_BUFFERS; j++) { 1474 ps_page = &buffer_info->ps_pages[j]; 1475 if (!ps_page->page) 1476 break; 1477 dma_unmap_page(&pdev->dev, ps_page->dma, PAGE_SIZE, 1478 DMA_FROM_DEVICE); 1479 ps_page->dma = 0; 1480 put_page(ps_page->page); 1481 ps_page->page = NULL; 1482 } 1483 } 1484 1485 /* there also may be some cached data from a chained receive */ 1486 if (rx_ring->rx_skb_top) { 1487 dev_kfree_skb(rx_ring->rx_skb_top); 1488 rx_ring->rx_skb_top = NULL; 1489 } 1490 1491 /* Zero out the descriptor ring */ 1492 memset(rx_ring->desc, 0, rx_ring->size); 1493 1494 rx_ring->next_to_clean = 0; 1495 rx_ring->next_to_use = 0; 1496 adapter->flags2 &= ~FLAG2_IS_DISCARDING; 1497 1498 writel(0, adapter->hw.hw_addr + rx_ring->head); 1499 writel(0, adapter->hw.hw_addr + rx_ring->tail); 1500} 1501 1502static void e1000e_downshift_workaround(struct work_struct *work) 1503{ 1504 struct e1000_adapter *adapter = container_of(work, 1505 struct e1000_adapter, downshift_task); 1506 1507 if (test_bit(__E1000_DOWN, &adapter->state)) 1508 return; 1509 1510 e1000e_gig_downshift_workaround_ich8lan(&adapter->hw); 1511} 1512 1513/** 1514 * e1000_intr_msi - Interrupt Handler 1515 * @irq: interrupt number 1516 * @data: pointer to a network interface device structure 1517 **/ 1518static irqreturn_t e1000_intr_msi(int irq, void *data) 1519{ 1520 struct net_device *netdev = data; 1521 struct e1000_adapter *adapter = netdev_priv(netdev); 1522 struct e1000_hw *hw = &adapter->hw; 1523 u32 icr = er32(ICR); 1524 1525 /* 1526 * read ICR disables interrupts using IAM 1527 */ 1528 1529 if (icr & E1000_ICR_LSC) { 1530 hw->mac.get_link_status = 1; 1531 /* 1532 * ICH8 workaround-- Call gig speed drop workaround on cable 1533 * disconnect (LSC) before accessing any PHY registers 1534 */ 1535 if ((adapter->flags & FLAG_LSC_GIG_SPEED_DROP) && 1536 (!(er32(STATUS) & E1000_STATUS_LU))) 1537 schedule_work(&adapter->downshift_task); 1538 1539 /* 1540 * 80003ES2LAN workaround-- For packet buffer work-around on 1541 * link down event; disable receives here in the ISR and reset 1542 * adapter in watchdog 1543 */ 1544 if (netif_carrier_ok(netdev) && 1545 adapter->flags & FLAG_RX_NEEDS_RESTART) { 1546 /* disable receives */ 1547 u32 rctl = er32(RCTL); 1548 ew32(RCTL, rctl & ~E1000_RCTL_EN); 1549 adapter->flags |= FLAG_RX_RESTART_NOW; 1550 } 1551 /* guard against interrupt when we're going down */ 1552 if (!test_bit(__E1000_DOWN, &adapter->state)) 1553 mod_timer(&adapter->watchdog_timer, jiffies + 1); 1554 } 1555 1556 if (napi_schedule_prep(&adapter->napi)) { 1557 adapter->total_tx_bytes = 0; 1558 adapter->total_tx_packets = 0; 1559 adapter->total_rx_bytes = 0; 1560 adapter->total_rx_packets = 0; 1561 __napi_schedule(&adapter->napi); 1562 } 1563 1564 return IRQ_HANDLED; 1565} 1566 1567/** 1568 * e1000_intr - Interrupt Handler 1569 * @irq: interrupt number 1570 * @data: pointer to a network interface device structure 1571 **/ 1572static irqreturn_t e1000_intr(int irq, void *data) 1573{ 1574 struct net_device *netdev = data; 1575 struct e1000_adapter *adapter = netdev_priv(netdev); 1576 struct e1000_hw *hw = &adapter->hw; 1577 u32 rctl, icr = er32(ICR); 1578 1579 if (!icr || test_bit(__E1000_DOWN, &adapter->state)) 1580 return IRQ_NONE; /* Not our interrupt */ 1581 1582 /* 1583 * IMS will not auto-mask if INT_ASSERTED is not set, and if it is 1584 * not set, then the adapter didn't send an interrupt 1585 */ 1586 if (!(icr & E1000_ICR_INT_ASSERTED)) 1587 return IRQ_NONE; 1588 1589 /* 1590 * Interrupt Auto-Mask...upon reading ICR, 1591 * interrupts are masked. No need for the 1592 * IMC write 1593 */ 1594 1595 if (icr & E1000_ICR_LSC) { 1596 hw->mac.get_link_status = 1; 1597 /* 1598 * ICH8 workaround-- Call gig speed drop workaround on cable 1599 * disconnect (LSC) before accessing any PHY registers 1600 */ 1601 if ((adapter->flags & FLAG_LSC_GIG_SPEED_DROP) && 1602 (!(er32(STATUS) & E1000_STATUS_LU))) 1603 schedule_work(&adapter->downshift_task); 1604 1605 /* 1606 * 80003ES2LAN workaround-- 1607 * For packet buffer work-around on link down event; 1608 * disable receives here in the ISR and 1609 * reset adapter in watchdog 1610 */ 1611 if (netif_carrier_ok(netdev) && 1612 (adapter->flags & FLAG_RX_NEEDS_RESTART)) { 1613 /* disable receives */ 1614 rctl = er32(RCTL); 1615 ew32(RCTL, rctl & ~E1000_RCTL_EN); 1616 adapter->flags |= FLAG_RX_RESTART_NOW; 1617 } 1618 /* guard against interrupt when we're going down */ 1619 if (!test_bit(__E1000_DOWN, &adapter->state)) 1620 mod_timer(&adapter->watchdog_timer, jiffies + 1); 1621 } 1622 1623 if (napi_schedule_prep(&adapter->napi)) { 1624 adapter->total_tx_bytes = 0; 1625 adapter->total_tx_packets = 0; 1626 adapter->total_rx_bytes = 0; 1627 adapter->total_rx_packets = 0; 1628 __napi_schedule(&adapter->napi); 1629 } 1630 1631 return IRQ_HANDLED; 1632} 1633 1634static irqreturn_t e1000_msix_other(int irq, void *data) 1635{ 1636 struct net_device *netdev = data; 1637 struct e1000_adapter *adapter = netdev_priv(netdev); 1638 struct e1000_hw *hw = &adapter->hw; 1639 u32 icr = er32(ICR); 1640 1641 if (!(icr & E1000_ICR_INT_ASSERTED)) { 1642 if (!test_bit(__E1000_DOWN, &adapter->state)) 1643 ew32(IMS, E1000_IMS_OTHER); 1644 return IRQ_NONE; 1645 } 1646 1647 if (icr & adapter->eiac_mask) 1648 ew32(ICS, (icr & adapter->eiac_mask)); 1649 1650 if (icr & E1000_ICR_OTHER) { 1651 if (!(icr & E1000_ICR_LSC)) 1652 goto no_link_interrupt; 1653 hw->mac.get_link_status = 1; 1654 /* guard against interrupt when we're going down */ 1655 if (!test_bit(__E1000_DOWN, &adapter->state)) 1656 mod_timer(&adapter->watchdog_timer, jiffies + 1); 1657 } 1658 1659no_link_interrupt: 1660 if (!test_bit(__E1000_DOWN, &adapter->state)) 1661 ew32(IMS, E1000_IMS_LSC | E1000_IMS_OTHER); 1662 1663 return IRQ_HANDLED; 1664} 1665 1666 1667static irqreturn_t e1000_intr_msix_tx(int irq, void *data) 1668{ 1669 struct net_device *netdev = data; 1670 struct e1000_adapter *adapter = netdev_priv(netdev); 1671 struct e1000_hw *hw = &adapter->hw; 1672 struct e1000_ring *tx_ring = adapter->tx_ring; 1673 1674 1675 adapter->total_tx_bytes = 0; 1676 adapter->total_tx_packets = 0; 1677 1678 if (!e1000_clean_tx_irq(adapter)) 1679 /* Ring was not completely cleaned, so fire another interrupt */ 1680 ew32(ICS, tx_ring->ims_val); 1681 1682 return IRQ_HANDLED; 1683} 1684 1685static irqreturn_t e1000_intr_msix_rx(int irq, void *data) 1686{ 1687 struct net_device *netdev = data; 1688 struct e1000_adapter *adapter = netdev_priv(netdev); 1689 1690 /* Write the ITR value calculated at the end of the 1691 * previous interrupt. 1692 */ 1693 if (adapter->rx_ring->set_itr) { 1694 writel(1000000000 / (adapter->rx_ring->itr_val * 256), 1695 adapter->hw.hw_addr + adapter->rx_ring->itr_register); 1696 adapter->rx_ring->set_itr = 0; 1697 } 1698 1699 if (napi_schedule_prep(&adapter->napi)) { 1700 adapter->total_rx_bytes = 0; 1701 adapter->total_rx_packets = 0; 1702 __napi_schedule(&adapter->napi); 1703 } 1704 return IRQ_HANDLED; 1705} 1706 1707/** 1708 * e1000_configure_msix - Configure MSI-X hardware 1709 * 1710 * e1000_configure_msix sets up the hardware to properly 1711 * generate MSI-X interrupts. 1712 **/ 1713static void e1000_configure_msix(struct e1000_adapter *adapter) 1714{ 1715 struct e1000_hw *hw = &adapter->hw; 1716 struct e1000_ring *rx_ring = adapter->rx_ring; 1717 struct e1000_ring *tx_ring = adapter->tx_ring; 1718 int vector = 0; 1719 u32 ctrl_ext, ivar = 0; 1720 1721 adapter->eiac_mask = 0; 1722 1723 /* Workaround issue with spurious interrupts on 82574 in MSI-X mode */ 1724 if (hw->mac.type == e1000_82574) { 1725 u32 rfctl = er32(RFCTL); 1726 rfctl |= E1000_RFCTL_ACK_DIS; 1727 ew32(RFCTL, rfctl); 1728 } 1729 1730#define E1000_IVAR_INT_ALLOC_VALID 0x8 1731 /* Configure Rx vector */ 1732 rx_ring->ims_val = E1000_IMS_RXQ0; 1733 adapter->eiac_mask |= rx_ring->ims_val; 1734 if (rx_ring->itr_val) 1735 writel(1000000000 / (rx_ring->itr_val * 256), 1736 hw->hw_addr + rx_ring->itr_register); 1737 else 1738 writel(1, hw->hw_addr + rx_ring->itr_register); 1739 ivar = E1000_IVAR_INT_ALLOC_VALID | vector; 1740 1741 /* Configure Tx vector */ 1742 tx_ring->ims_val = E1000_IMS_TXQ0; 1743 vector++; 1744 if (tx_ring->itr_val) 1745 writel(1000000000 / (tx_ring->itr_val * 256), 1746 hw->hw_addr + tx_ring->itr_register); 1747 else 1748 writel(1, hw->hw_addr + tx_ring->itr_register); 1749 adapter->eiac_mask |= tx_ring->ims_val; 1750 ivar |= ((E1000_IVAR_INT_ALLOC_VALID | vector) << 8); 1751 1752 /* set vector for Other Causes, e.g. link changes */ 1753 vector++; 1754 ivar |= ((E1000_IVAR_INT_ALLOC_VALID | vector) << 16); 1755 if (rx_ring->itr_val) 1756 writel(1000000000 / (rx_ring->itr_val * 256), 1757 hw->hw_addr + E1000_EITR_82574(vector)); 1758 else 1759 writel(1, hw->hw_addr + E1000_EITR_82574(vector)); 1760 1761 /* Cause Tx interrupts on every write back */ 1762 ivar |= (1 << 31); 1763 1764 ew32(IVAR, ivar); 1765 1766 /* enable MSI-X PBA support */ 1767 ctrl_ext = er32(CTRL_EXT); 1768 ctrl_ext |= E1000_CTRL_EXT_PBA_CLR; 1769 1770 /* Auto-Mask Other interrupts upon ICR read */ 1771#define E1000_EIAC_MASK_82574 0x01F00000 1772 ew32(IAM, ~E1000_EIAC_MASK_82574 | E1000_IMS_OTHER); 1773 ctrl_ext |= E1000_CTRL_EXT_EIAME; 1774 ew32(CTRL_EXT, ctrl_ext); 1775 e1e_flush(); 1776} 1777 1778void e1000e_reset_interrupt_capability(struct e1000_adapter *adapter) 1779{ 1780 if (adapter->msix_entries) { 1781 pci_disable_msix(adapter->pdev); 1782 kfree(adapter->msix_entries); 1783 adapter->msix_entries = NULL; 1784 } else if (adapter->flags & FLAG_MSI_ENABLED) { 1785 pci_disable_msi(adapter->pdev); 1786 adapter->flags &= ~FLAG_MSI_ENABLED; 1787 } 1788} 1789 1790/** 1791 * e1000e_set_interrupt_capability - set MSI or MSI-X if supported 1792 * 1793 * Attempt to configure interrupts using the best available 1794 * capabilities of the hardware and kernel. 1795 **/ 1796void e1000e_set_interrupt_capability(struct e1000_adapter *adapter) 1797{ 1798 int err; 1799 int i; 1800 1801 switch (adapter->int_mode) { 1802 case E1000E_INT_MODE_MSIX: 1803 if (adapter->flags & FLAG_HAS_MSIX) { 1804 adapter->num_vectors = 3; /* RxQ0, TxQ0 and other */ 1805 adapter->msix_entries = kcalloc(adapter->num_vectors, 1806 sizeof(struct msix_entry), 1807 GFP_KERNEL); 1808 if (adapter->msix_entries) { 1809 for (i = 0; i < adapter->num_vectors; i++) 1810 adapter->msix_entries[i].entry = i; 1811 1812 err = pci_enable_msix(adapter->pdev, 1813 adapter->msix_entries, 1814 adapter->num_vectors); 1815 if (err == 0) 1816 return; 1817 } 1818 /* MSI-X failed, so fall through and try MSI */ 1819 e_err("Failed to initialize MSI-X interrupts. " 1820 "Falling back to MSI interrupts.\n"); 1821 e1000e_reset_interrupt_capability(adapter); 1822 } 1823 adapter->int_mode = E1000E_INT_MODE_MSI; 1824 /* Fall through */ 1825 case E1000E_INT_MODE_MSI: 1826 if (!pci_enable_msi(adapter->pdev)) { 1827 adapter->flags |= FLAG_MSI_ENABLED; 1828 } else { 1829 adapter->int_mode = E1000E_INT_MODE_LEGACY; 1830 e_err("Failed to initialize MSI interrupts. Falling " 1831 "back to legacy interrupts.\n"); 1832 } 1833 /* Fall through */ 1834 case E1000E_INT_MODE_LEGACY: 1835 /* Don't do anything; this is the system default */ 1836 break; 1837 } 1838 1839 /* store the number of vectors being used */ 1840 adapter->num_vectors = 1; 1841} 1842 1843/** 1844 * e1000_request_msix - Initialize MSI-X interrupts 1845 * 1846 * e1000_request_msix allocates MSI-X vectors and requests interrupts from the 1847 * kernel. 1848 **/ 1849static int e1000_request_msix(struct e1000_adapter *adapter) 1850{ 1851 struct net_device *netdev = adapter->netdev; 1852 int err = 0, vector = 0; 1853 1854 if (strlen(netdev->name) < (IFNAMSIZ - 5)) 1855 snprintf(adapter->rx_ring->name, 1856 sizeof(adapter->rx_ring->name) - 1, 1857 "%s-rx-0", netdev->name); 1858 else 1859 memcpy(adapter->rx_ring->name, netdev->name, IFNAMSIZ); 1860 err = request_irq(adapter->msix_entries[vector].vector, 1861 e1000_intr_msix_rx, 0, adapter->rx_ring->name, 1862 netdev); 1863 if (err) 1864 goto out; 1865 adapter->rx_ring->itr_register = E1000_EITR_82574(vector); 1866 adapter->rx_ring->itr_val = adapter->itr; 1867 vector++; 1868 1869 if (strlen(netdev->name) < (IFNAMSIZ - 5)) 1870 snprintf(adapter->tx_ring->name, 1871 sizeof(adapter->tx_ring->name) - 1, 1872 "%s-tx-0", netdev->name); 1873 else 1874 memcpy(adapter->tx_ring->name, netdev->name, IFNAMSIZ); 1875 err = request_irq(adapter->msix_entries[vector].vector, 1876 e1000_intr_msix_tx, 0, adapter->tx_ring->name, 1877 netdev); 1878 if (err) 1879 goto out; 1880 adapter->tx_ring->itr_register = E1000_EITR_82574(vector); 1881 adapter->tx_ring->itr_val = adapter->itr; 1882 vector++; 1883 1884 err = request_irq(adapter->msix_entries[vector].vector, 1885 e1000_msix_other, 0, netdev->name, netdev); 1886 if (err) 1887 goto out; 1888 1889 e1000_configure_msix(adapter); 1890 return 0; 1891out: 1892 return err; 1893} 1894 1895/** 1896 * e1000_request_irq - initialize interrupts 1897 * 1898 * Attempts to configure interrupts using the best available 1899 * capabilities of the hardware and kernel. 1900 **/ 1901static int e1000_request_irq(struct e1000_adapter *adapter) 1902{ 1903 struct net_device *netdev = adapter->netdev; 1904 int err; 1905 1906 if (adapter->msix_entries) { 1907 err = e1000_request_msix(adapter); 1908 if (!err) 1909 return err; 1910 /* fall back to MSI */ 1911 e1000e_reset_interrupt_capability(adapter); 1912 adapter->int_mode = E1000E_INT_MODE_MSI; 1913 e1000e_set_interrupt_capability(adapter); 1914 } 1915 if (adapter->flags & FLAG_MSI_ENABLED) { 1916 err = request_irq(adapter->pdev->irq, e1000_intr_msi, 0, 1917 netdev->name, netdev); 1918 if (!err) 1919 return err; 1920 1921 /* fall back to legacy interrupt */ 1922 e1000e_reset_interrupt_capability(adapter); 1923 adapter->int_mode = E1000E_INT_MODE_LEGACY; 1924 } 1925 1926 err = request_irq(adapter->pdev->irq, e1000_intr, IRQF_SHARED, 1927 netdev->name, netdev); 1928 if (err) 1929 e_err("Unable to allocate interrupt, Error: %d\n", err); 1930 1931 return err; 1932} 1933 1934static void e1000_free_irq(struct e1000_adapter *adapter) 1935{ 1936 struct net_device *netdev = adapter->netdev; 1937 1938 if (adapter->msix_entries) { 1939 int vector = 0; 1940 1941 free_irq(adapter->msix_entries[vector].vector, netdev); 1942 vector++; 1943 1944 free_irq(adapter->msix_entries[vector].vector, netdev); 1945 vector++; 1946 1947 /* Other Causes interrupt vector */ 1948 free_irq(adapter->msix_entries[vector].vector, netdev); 1949 return; 1950 } 1951 1952 free_irq(adapter->pdev->irq, netdev); 1953} 1954 1955/** 1956 * e1000_irq_disable - Mask off interrupt generation on the NIC 1957 **/ 1958static void e1000_irq_disable(struct e1000_adapter *adapter) 1959{ 1960 struct e1000_hw *hw = &adapter->hw; 1961 1962 ew32(IMC, ~0); 1963 if (adapter->msix_entries) 1964 ew32(EIAC_82574, 0); 1965 e1e_flush(); 1966 1967 if (adapter->msix_entries) { 1968 int i; 1969 for (i = 0; i < adapter->num_vectors; i++) 1970 synchronize_irq(adapter->msix_entries[i].vector); 1971 } else { 1972 synchronize_irq(adapter->pdev->irq); 1973 } 1974} 1975 1976/** 1977 * e1000_irq_enable - Enable default interrupt generation settings 1978 **/ 1979static void e1000_irq_enable(struct e1000_adapter *adapter) 1980{ 1981 struct e1000_hw *hw = &adapter->hw; 1982 1983 if (adapter->msix_entries) { 1984 ew32(EIAC_82574, adapter->eiac_mask & E1000_EIAC_MASK_82574); 1985 ew32(IMS, adapter->eiac_mask | E1000_IMS_OTHER | E1000_IMS_LSC); 1986 } else { 1987 ew32(IMS, IMS_ENABLE_MASK); 1988 } 1989 e1e_flush(); 1990} 1991 1992/** 1993 * e1000e_get_hw_control - get control of the h/w from f/w 1994 * @adapter: address of board private structure 1995 * 1996 * e1000e_get_hw_control sets {CTRL_EXT|SWSM}:DRV_LOAD bit. 1997 * For ASF and Pass Through versions of f/w this means that 1998 * the driver is loaded. For AMT version (only with 82573) 1999 * of the f/w this means that the network i/f is open. 2000 **/ 2001void e1000e_get_hw_control(struct e1000_adapter *adapter) 2002{ 2003 struct e1000_hw *hw = &adapter->hw; 2004 u32 ctrl_ext; 2005 u32 swsm; 2006 2007 /* Let firmware know the driver has taken over */ 2008 if (adapter->flags & FLAG_HAS_SWSM_ON_LOAD) { 2009 swsm = er32(SWSM); 2010 ew32(SWSM, swsm | E1000_SWSM_DRV_LOAD); 2011 } else if (adapter->flags & FLAG_HAS_CTRLEXT_ON_LOAD) { 2012 ctrl_ext = er32(CTRL_EXT); 2013 ew32(CTRL_EXT, ctrl_ext | E1000_CTRL_EXT_DRV_LOAD); 2014 } 2015} 2016 2017/** 2018 * e1000e_release_hw_control - release control of the h/w to f/w 2019 * @adapter: address of board private structure 2020 * 2021 * e1000e_release_hw_control resets {CTRL_EXT|SWSM}:DRV_LOAD bit. 2022 * For ASF and Pass Through versions of f/w this means that the 2023 * driver is no longer loaded. For AMT version (only with 82573) i 2024 * of the f/w this means that the network i/f is closed. 2025 * 2026 **/ 2027void e1000e_release_hw_control(struct e1000_adapter *adapter) 2028{ 2029 struct e1000_hw *hw = &adapter->hw; 2030 u32 ctrl_ext; 2031 u32 swsm; 2032 2033 /* Let firmware taken over control of h/w */ 2034 if (adapter->flags & FLAG_HAS_SWSM_ON_LOAD) { 2035 swsm = er32(SWSM); 2036 ew32(SWSM, swsm & ~E1000_SWSM_DRV_LOAD); 2037 } else if (adapter->flags & FLAG_HAS_CTRLEXT_ON_LOAD) { 2038 ctrl_ext = er32(CTRL_EXT); 2039 ew32(CTRL_EXT, ctrl_ext & ~E1000_CTRL_EXT_DRV_LOAD); 2040 } 2041} 2042 2043/** 2044 * @e1000_alloc_ring - allocate memory for a ring structure 2045 **/ 2046static int e1000_alloc_ring_dma(struct e1000_adapter *adapter, 2047 struct e1000_ring *ring) 2048{ 2049 struct pci_dev *pdev = adapter->pdev; 2050 2051 ring->desc = dma_alloc_coherent(&pdev->dev, ring->size, &ring->dma, 2052 GFP_KERNEL); 2053 if (!ring->desc) 2054 return -ENOMEM; 2055 2056 return 0; 2057} 2058 2059/** 2060 * e1000e_setup_tx_resources - allocate Tx resources (Descriptors) 2061 * @adapter: board private structure 2062 * 2063 * Return 0 on success, negative on failure 2064 **/ 2065int e1000e_setup_tx_resources(struct e1000_adapter *adapter) 2066{ 2067 struct e1000_ring *tx_ring = adapter->tx_ring; 2068 int err = -ENOMEM, size; 2069 2070 size = sizeof(struct e1000_buffer) * tx_ring->count; 2071 tx_ring->buffer_info = vzalloc(size); 2072 if (!tx_ring->buffer_info) 2073 goto err; 2074 2075 /* round up to nearest 4K */ 2076 tx_ring->size = tx_ring->count * sizeof(struct e1000_tx_desc); 2077 tx_ring->size = ALIGN(tx_ring->size, 4096); 2078 2079 err = e1000_alloc_ring_dma(adapter, tx_ring); 2080 if (err) 2081 goto err; 2082 2083 tx_ring->next_to_use = 0; 2084 tx_ring->next_to_clean = 0; 2085 2086 return 0; 2087err: 2088 vfree(tx_ring->buffer_info); 2089 e_err("Unable to allocate memory for the transmit descriptor ring\n"); 2090 return err; 2091} 2092 2093/** 2094 * e1000e_setup_rx_resources - allocate Rx resources (Descriptors) 2095 * @adapter: board private structure 2096 * 2097 * Returns 0 on success, negative on failure 2098 **/ 2099int e1000e_setup_rx_resources(struct e1000_adapter *adapter) 2100{ 2101 struct e1000_ring *rx_ring = adapter->rx_ring; 2102 struct e1000_buffer *buffer_info; 2103 int i, size, desc_len, err = -ENOMEM; 2104 2105 size = sizeof(struct e1000_buffer) * rx_ring->count; 2106 rx_ring->buffer_info = vzalloc(size); 2107 if (!rx_ring->buffer_info) 2108 goto err; 2109 2110 for (i = 0; i < rx_ring->count; i++) { 2111 buffer_info = &rx_ring->buffer_info[i]; 2112 buffer_info->ps_pages = kcalloc(PS_PAGE_BUFFERS, 2113 sizeof(struct e1000_ps_page), 2114 GFP_KERNEL); 2115 if (!buffer_info->ps_pages) 2116 goto err_pages; 2117 } 2118 2119 desc_len = sizeof(union e1000_rx_desc_packet_split); 2120 2121 /* Round up to nearest 4K */ 2122 rx_ring->size = rx_ring->count * desc_len; 2123 rx_ring->size = ALIGN(rx_ring->size, 4096); 2124 2125 err = e1000_alloc_ring_dma(adapter, rx_ring); 2126 if (err) 2127 goto err_pages; 2128 2129 rx_ring->next_to_clean = 0; 2130 rx_ring->next_to_use = 0; 2131 rx_ring->rx_skb_top = NULL; 2132 2133 return 0; 2134 2135err_pages: 2136 for (i = 0; i < rx_ring->count; i++) { 2137 buffer_info = &rx_ring->buffer_info[i]; 2138 kfree(buffer_info->ps_pages); 2139 } 2140err: 2141 vfree(rx_ring->buffer_info); 2142 e_err("Unable to allocate memory for the receive descriptor ring\n"); 2143 return err; 2144} 2145 2146/** 2147 * e1000_clean_tx_ring - Free Tx Buffers 2148 * @adapter: board private structure 2149 **/ 2150static void e1000_clean_tx_ring(struct e1000_adapter *adapter) 2151{ 2152 struct e1000_ring *tx_ring = adapter->tx_ring; 2153 struct e1000_buffer *buffer_info; 2154 unsigned long size; 2155 unsigned int i; 2156 2157 for (i = 0; i < tx_ring->count; i++) { 2158 buffer_info = &tx_ring->buffer_info[i]; 2159 e1000_put_txbuf(adapter, buffer_info); 2160 } 2161 2162 size = sizeof(struct e1000_buffer) * tx_ring->count; 2163 memset(tx_ring->buffer_info, 0, size); 2164 2165 memset(tx_ring->desc, 0, tx_ring->size); 2166 2167 tx_ring->next_to_use = 0; 2168 tx_ring->next_to_clean = 0; 2169 2170 writel(0, adapter->hw.hw_addr + tx_ring->head); 2171 writel(0, adapter->hw.hw_addr + tx_ring->tail); 2172} 2173 2174/** 2175 * e1000e_free_tx_resources - Free Tx Resources per Queue 2176 * @adapter: board private structure 2177 * 2178 * Free all transmit software resources 2179 **/ 2180void e1000e_free_tx_resources(struct e1000_adapter *adapter) 2181{ 2182 struct pci_dev *pdev = adapter->pdev; 2183 struct e1000_ring *tx_ring = adapter->tx_ring; 2184 2185 e1000_clean_tx_ring(adapter); 2186 2187 vfree(tx_ring->buffer_info); 2188 tx_ring->buffer_info = NULL; 2189 2190 dma_free_coherent(&pdev->dev, tx_ring->size, tx_ring->desc, 2191 tx_ring->dma); 2192 tx_ring->desc = NULL; 2193} 2194 2195/** 2196 * e1000e_free_rx_resources - Free Rx Resources 2197 * @adapter: board private structure 2198 * 2199 * Free all receive software resources 2200 **/ 2201 2202void e1000e_free_rx_resources(struct e1000_adapter *adapter) 2203{ 2204 struct pci_dev *pdev = adapter->pdev; 2205 struct e1000_ring *rx_ring = adapter->rx_ring; 2206 int i; 2207 2208 e1000_clean_rx_ring(adapter); 2209 2210 for (i = 0; i < rx_ring->count; i++) 2211 kfree(rx_ring->buffer_info[i].ps_pages); 2212 2213 vfree(rx_ring->buffer_info); 2214 rx_ring->buffer_info = NULL; 2215 2216 dma_free_coherent(&pdev->dev, rx_ring->size, rx_ring->desc, 2217 rx_ring->dma); 2218 rx_ring->desc = NULL; 2219} 2220 2221/** 2222 * e1000_update_itr - update the dynamic ITR value based on statistics 2223 * @adapter: pointer to adapter 2224 * @itr_setting: current adapter->itr 2225 * @packets: the number of packets during this measurement interval 2226 * @bytes: the number of bytes during this measurement interval 2227 * 2228 * Stores a new ITR value based on packets and byte 2229 * counts during the last interrupt. The advantage of per interrupt 2230 * computation is faster updates and more accurate ITR for the current 2231 * traffic pattern. Constants in this function were computed 2232 * based on theoretical maximum wire speed and thresholds were set based 2233 * on testing data as well as attempting to minimize response time 2234 * while increasing bulk throughput. This functionality is controlled 2235 * by the InterruptThrottleRate module parameter. 2236 **/ 2237static unsigned int e1000_update_itr(struct e1000_adapter *adapter, 2238 u16 itr_setting, int packets, 2239 int bytes) 2240{ 2241 unsigned int retval = itr_setting; 2242 2243 if (packets == 0) 2244 goto update_itr_done; 2245 2246 switch (itr_setting) { 2247 case lowest_latency: 2248 /* handle TSO and jumbo frames */ 2249 if (bytes/packets > 8000) 2250 retval = bulk_latency; 2251 else if ((packets < 5) && (bytes > 512)) 2252 retval = low_latency; 2253 break; 2254 case low_latency: /* 50 usec aka 20000 ints/s */ 2255 if (bytes > 10000) { 2256 /* this if handles the TSO accounting */ 2257 if (bytes/packets > 8000) 2258 retval = bulk_latency; 2259 else if ((packets < 10) || ((bytes/packets) > 1200)) 2260 retval = bulk_latency; 2261 else if ((packets > 35)) 2262 retval = lowest_latency; 2263 } else if (bytes/packets > 2000) { 2264 retval = bulk_latency; 2265 } else if (packets <= 2 && bytes < 512) { 2266 retval = lowest_latency; 2267 } 2268 break; 2269 case bulk_latency: /* 250 usec aka 4000 ints/s */ 2270 if (bytes > 25000) { 2271 if (packets > 35) 2272 retval = low_latency; 2273 } else if (bytes < 6000) { 2274 retval = low_latency; 2275 } 2276 break; 2277 } 2278 2279update_itr_done: 2280 return retval; 2281} 2282 2283static void e1000_set_itr(struct e1000_adapter *adapter) 2284{ 2285 struct e1000_hw *hw = &adapter->hw; 2286 u16 current_itr; 2287 u32 new_itr = adapter->itr; 2288 2289 /* for non-gigabit speeds, just fix the interrupt rate at 4000 */ 2290 if (adapter->link_speed != SPEED_1000) { 2291 current_itr = 0; 2292 new_itr = 4000; 2293 goto set_itr_now; 2294 } 2295 2296 if (adapter->flags2 & FLAG2_DISABLE_AIM) { 2297 new_itr = 0; 2298 goto set_itr_now; 2299 } 2300 2301 adapter->tx_itr = e1000_update_itr(adapter, 2302 adapter->tx_itr, 2303 adapter->total_tx_packets, 2304 adapter->total_tx_bytes); 2305 /* conservative mode (itr 3) eliminates the lowest_latency setting */ 2306 if (adapter->itr_setting == 3 && adapter->tx_itr == lowest_latency) 2307 adapter->tx_itr = low_latency; 2308 2309 adapter->rx_itr = e1000_update_itr(adapter, 2310 adapter->rx_itr, 2311 adapter->total_rx_packets, 2312 adapter->total_rx_bytes); 2313 /* conservative mode (itr 3) eliminates the lowest_latency setting */ 2314 if (adapter->itr_setting == 3 && adapter->rx_itr == lowest_latency) 2315 adapter->rx_itr = low_latency; 2316 2317 current_itr = max(adapter->rx_itr, adapter->tx_itr); 2318 2319 switch (current_itr) { 2320 /* counts and packets in update_itr are dependent on these numbers */ 2321 case lowest_latency: 2322 new_itr = 70000; 2323 break; 2324 case low_latency: 2325 new_itr = 20000; /* aka hwitr = ~200 */ 2326 break; 2327 case bulk_latency: 2328 new_itr = 4000; 2329 break; 2330 default: 2331 break; 2332 } 2333 2334set_itr_now: 2335 if (new_itr != adapter->itr) { 2336 /* 2337 * this attempts to bias the interrupt rate towards Bulk 2338 * by adding intermediate steps when interrupt rate is 2339 * increasing 2340 */ 2341 new_itr = new_itr > adapter->itr ? 2342 min(adapter->itr + (new_itr >> 2), new_itr) : 2343 new_itr; 2344 adapter->itr = new_itr; 2345 adapter->rx_ring->itr_val = new_itr; 2346 if (adapter->msix_entries) 2347 adapter->rx_ring->set_itr = 1; 2348 else 2349 if (new_itr) 2350 ew32(ITR, 1000000000 / (new_itr * 256)); 2351 else 2352 ew32(ITR, 0); 2353 } 2354} 2355 2356/** 2357 * e1000_alloc_queues - Allocate memory for all rings 2358 * @adapter: board private structure to initialize 2359 **/ 2360static int __devinit e1000_alloc_queues(struct e1000_adapter *adapter) 2361{ 2362 adapter->tx_ring = kzalloc(sizeof(struct e1000_ring), GFP_KERNEL); 2363 if (!adapter->tx_ring) 2364 goto err; 2365 2366 adapter->rx_ring = kzalloc(sizeof(struct e1000_ring), GFP_KERNEL); 2367 if (!adapter->rx_ring) 2368 goto err; 2369 2370 return 0; 2371err: 2372 e_err("Unable to allocate memory for queues\n"); 2373 kfree(adapter->rx_ring); 2374 kfree(adapter->tx_ring); 2375 return -ENOMEM; 2376} 2377 2378/** 2379 * e1000_clean - NAPI Rx polling callback 2380 * @napi: struct associated with this polling callback 2381 * @budget: amount of packets driver is allowed to process this poll 2382 **/ 2383static int e1000_clean(struct napi_struct *napi, int budget) 2384{ 2385 struct e1000_adapter *adapter = container_of(napi, struct e1000_adapter, napi); 2386 struct e1000_hw *hw = &adapter->hw; 2387 struct net_device *poll_dev = adapter->netdev; 2388 int tx_cleaned = 1, work_done = 0; 2389 2390 adapter = netdev_priv(poll_dev); 2391 2392 if (adapter->msix_entries && 2393 !(adapter->rx_ring->ims_val & adapter->tx_ring->ims_val)) 2394 goto clean_rx; 2395 2396 tx_cleaned = e1000_clean_tx_irq(adapter); 2397 2398clean_rx: 2399 adapter->clean_rx(adapter, &work_done, budget); 2400 2401 if (!tx_cleaned) 2402 work_done = budget; 2403 2404 /* If budget not fully consumed, exit the polling mode */ 2405 if (work_done < budget) { 2406 if (adapter->itr_setting & 3) 2407 e1000_set_itr(adapter); 2408 napi_complete(napi); 2409 if (!test_bit(__E1000_DOWN, &adapter->state)) { 2410 if (adapter->msix_entries) 2411 ew32(IMS, adapter->rx_ring->ims_val); 2412 else 2413 e1000_irq_enable(adapter); 2414 } 2415 } 2416 2417 return work_done; 2418} 2419 2420static void e1000_vlan_rx_add_vid(struct net_device *netdev, u16 vid) 2421{ 2422 struct e1000_adapter *adapter = netdev_priv(netdev); 2423 struct e1000_hw *hw = &adapter->hw; 2424 u32 vfta, index; 2425 2426 /* don't update vlan cookie if already programmed */ 2427 if ((adapter->hw.mng_cookie.status & 2428 E1000_MNG_DHCP_COOKIE_STATUS_VLAN) && 2429 (vid == adapter->mng_vlan_id)) 2430 return; 2431 2432 /* add VID to filter table */ 2433 if (adapter->flags & FLAG_HAS_HW_VLAN_FILTER) { 2434 index = (vid >> 5) & 0x7F; 2435 vfta = E1000_READ_REG_ARRAY(hw, E1000_VFTA, index); 2436 vfta |= (1 << (vid & 0x1F)); 2437 hw->mac.ops.write_vfta(hw, index, vfta); 2438 } 2439 2440 set_bit(vid, adapter->active_vlans); 2441} 2442 2443static void e1000_vlan_rx_kill_vid(struct net_device *netdev, u16 vid) 2444{ 2445 struct e1000_adapter *adapter = netdev_priv(netdev); 2446 struct e1000_hw *hw = &adapter->hw; 2447 u32 vfta, index; 2448 2449 if ((adapter->hw.mng_cookie.status & 2450 E1000_MNG_DHCP_COOKIE_STATUS_VLAN) && 2451 (vid == adapter->mng_vlan_id)) { 2452 /* release control to f/w */ 2453 e1000e_release_hw_control(adapter); 2454 return; 2455 } 2456 2457 /* remove VID from filter table */ 2458 if (adapter->flags & FLAG_HAS_HW_VLAN_FILTER) { 2459 index = (vid >> 5) & 0x7F; 2460 vfta = E1000_READ_REG_ARRAY(hw, E1000_VFTA, index); 2461 vfta &= ~(1 << (vid & 0x1F)); 2462 hw->mac.ops.write_vfta(hw, index, vfta); 2463 } 2464 2465 clear_bit(vid, adapter->active_vlans); 2466} 2467 2468/** 2469 * e1000e_vlan_filter_disable - helper to disable hw VLAN filtering 2470 * @adapter: board private structure to initialize 2471 **/ 2472static void e1000e_vlan_filter_disable(struct e1000_adapter *adapter) 2473{ 2474 struct net_device *netdev = adapter->netdev; 2475 struct e1000_hw *hw = &adapter->hw; 2476 u32 rctl; 2477 2478 if (adapter->flags & FLAG_HAS_HW_VLAN_FILTER) { 2479 /* disable VLAN receive filtering */ 2480 rctl = er32(RCTL); 2481 rctl &= ~(E1000_RCTL_VFE | E1000_RCTL_CFIEN); 2482 ew32(RCTL, rctl); 2483 2484 if (adapter->mng_vlan_id != (u16)E1000_MNG_VLAN_NONE) { 2485 e1000_vlan_rx_kill_vid(netdev, adapter->mng_vlan_id); 2486 adapter->mng_vlan_id = E1000_MNG_VLAN_NONE; 2487 } 2488 } 2489} 2490 2491/** 2492 * e1000e_vlan_filter_enable - helper to enable HW VLAN filtering 2493 * @adapter: board private structure to initialize 2494 **/ 2495static void e1000e_vlan_filter_enable(struct e1000_adapter *adapter) 2496{ 2497 struct e1000_hw *hw = &adapter->hw; 2498 u32 rctl; 2499 2500 if (adapter->flags & FLAG_HAS_HW_VLAN_FILTER) { 2501 /* enable VLAN receive filtering */ 2502 rctl = er32(RCTL); 2503 rctl |= E1000_RCTL_VFE; 2504 rctl &= ~E1000_RCTL_CFIEN; 2505 ew32(RCTL, rctl); 2506 } 2507} 2508 2509/** 2510 * e1000e_vlan_strip_enable - helper to disable HW VLAN stripping 2511 * @adapter: board private structure to initialize 2512 **/ 2513static void e1000e_vlan_strip_disable(struct e1000_adapter *adapter) 2514{ 2515 struct e1000_hw *hw = &adapter->hw; 2516 u32 ctrl; 2517 2518 /* disable VLAN tag insert/strip */ 2519 ctrl = er32(CTRL); 2520 ctrl &= ~E1000_CTRL_VME; 2521 ew32(CTRL, ctrl); 2522} 2523 2524/** 2525 * e1000e_vlan_strip_enable - helper to enable HW VLAN stripping 2526 * @adapter: board private structure to initialize 2527 **/ 2528static void e1000e_vlan_strip_enable(struct e1000_adapter *adapter) 2529{ 2530 struct e1000_hw *hw = &adapter->hw; 2531 u32 ctrl; 2532 2533 /* enable VLAN tag insert/strip */ 2534 ctrl = er32(CTRL); 2535 ctrl |= E1000_CTRL_VME; 2536 ew32(CTRL, ctrl); 2537} 2538 2539static void e1000_update_mng_vlan(struct e1000_adapter *adapter) 2540{ 2541 struct net_device *netdev = adapter->netdev; 2542 u16 vid = adapter->hw.mng_cookie.vlan_id; 2543 u16 old_vid = adapter->mng_vlan_id; 2544 2545 if (adapter->hw.mng_cookie.status & 2546 E1000_MNG_DHCP_COOKIE_STATUS_VLAN) { 2547 e1000_vlan_rx_add_vid(netdev, vid); 2548 adapter->mng_vlan_id = vid; 2549 } 2550 2551 if ((old_vid != (u16)E1000_MNG_VLAN_NONE) && (vid != old_vid)) 2552 e1000_vlan_rx_kill_vid(netdev, old_vid); 2553} 2554 2555static void e1000_restore_vlan(struct e1000_adapter *adapter) 2556{ 2557 u16 vid; 2558 2559 e1000_vlan_rx_add_vid(adapter->netdev, 0); 2560 2561 for_each_set_bit(vid, adapter->active_vlans, VLAN_N_VID) 2562 e1000_vlan_rx_add_vid(adapter->netdev, vid); 2563} 2564 2565static void e1000_init_manageability_pt(struct e1000_adapter *adapter) 2566{ 2567 struct e1000_hw *hw = &adapter->hw; 2568 u32 manc, manc2h, mdef, i, j; 2569 2570 if (!(adapter->flags & FLAG_MNG_PT_ENABLED)) 2571 return; 2572 2573 manc = er32(MANC); 2574 2575 /* 2576 * enable receiving management packets to the host. this will probably 2577 * generate destination unreachable messages from the host OS, but 2578 * the packets will be handled on SMBUS 2579 */ 2580 manc |= E1000_MANC_EN_MNG2HOST; 2581 manc2h = er32(MANC2H); 2582 2583 switch (hw->mac.type) { 2584 default: 2585 manc2h |= (E1000_MANC2H_PORT_623 | E1000_MANC2H_PORT_664); 2586 break; 2587 case e1000_82574: 2588 case e1000_82583: 2589 /* 2590 * Check if IPMI pass-through decision filter already exists; 2591 * if so, enable it. 2592 */ 2593 for (i = 0, j = 0; i < 8; i++) { 2594 mdef = er32(MDEF(i)); 2595 2596 /* Ignore filters with anything other than IPMI ports */ 2597 if (mdef & ~(E1000_MDEF_PORT_623 | E1000_MDEF_PORT_664)) 2598 continue; 2599 2600 /* Enable this decision filter in MANC2H */ 2601 if (mdef) 2602 manc2h |= (1 << i); 2603 2604 j |= mdef; 2605 } 2606 2607 if (j == (E1000_MDEF_PORT_623 | E1000_MDEF_PORT_664)) 2608 break; 2609 2610 /* Create new decision filter in an empty filter */ 2611 for (i = 0, j = 0; i < 8; i++) 2612 if (er32(MDEF(i)) == 0) { 2613 ew32(MDEF(i), (E1000_MDEF_PORT_623 | 2614 E1000_MDEF_PORT_664)); 2615 manc2h |= (1 << 1); 2616 j++; 2617 break; 2618 } 2619 2620 if (!j) 2621 e_warn("Unable to create IPMI pass-through filter\n"); 2622 break; 2623 } 2624 2625 ew32(MANC2H, manc2h); 2626 ew32(MANC, manc); 2627} 2628 2629/** 2630 * e1000_configure_tx - Configure Transmit Unit after Reset 2631 * @adapter: board private structure 2632 * 2633 * Configure the Tx unit of the MAC after a reset. 2634 **/ 2635static void e1000_configure_tx(struct e1000_adapter *adapter) 2636{ 2637 struct e1000_hw *hw = &adapter->hw; 2638 struct e1000_ring *tx_ring = adapter->tx_ring; 2639 u64 tdba; 2640 u32 tdlen, tctl, tipg, tarc; 2641 u32 ipgr1, ipgr2; 2642 2643 /* Setup the HW Tx Head and Tail descriptor pointers */ 2644 tdba = tx_ring->dma; 2645 tdlen = tx_ring->count * sizeof(struct e1000_tx_desc); 2646 ew32(TDBAL, (tdba & DMA_BIT_MASK(32))); 2647 ew32(TDBAH, (tdba >> 32)); 2648 ew32(TDLEN, tdlen); 2649 ew32(TDH, 0); 2650 ew32(TDT, 0); 2651 tx_ring->head = E1000_TDH; 2652 tx_ring->tail = E1000_TDT; 2653 2654 /* Set the default values for the Tx Inter Packet Gap timer */ 2655 tipg = DEFAULT_82543_TIPG_IPGT_COPPER; /* 8 */ 2656 ipgr1 = DEFAULT_82543_TIPG_IPGR1; /* 8 */ 2657 ipgr2 = DEFAULT_82543_TIPG_IPGR2; /* 6 */ 2658 2659 if (adapter->flags & FLAG_TIPG_MEDIUM_FOR_80003ESLAN) 2660 ipgr2 = DEFAULT_80003ES2LAN_TIPG_IPGR2; /* 7 */ 2661 2662 tipg |= ipgr1 << E1000_TIPG_IPGR1_SHIFT; 2663 tipg |= ipgr2 << E1000_TIPG_IPGR2_SHIFT; 2664 ew32(TIPG, tipg); 2665 2666 /* Set the Tx Interrupt Delay register */ 2667 ew32(TIDV, adapter->tx_int_delay); 2668 /* Tx irq moderation */ 2669 ew32(TADV, adapter->tx_abs_int_delay); 2670 2671 if (adapter->flags2 & FLAG2_DMA_BURST) { 2672 u32 txdctl = er32(TXDCTL(0)); 2673 txdctl &= ~(E1000_TXDCTL_PTHRESH | E1000_TXDCTL_HTHRESH | 2674 E1000_TXDCTL_WTHRESH); 2675 /* 2676 * set up some performance related parameters to encourage the 2677 * hardware to use the bus more efficiently in bursts, depends 2678 * on the tx_int_delay to be enabled, 2679 * wthresh = 5 ==> burst write a cacheline (64 bytes) at a time 2680 * hthresh = 1 ==> prefetch when one or more available 2681 * pthresh = 0x1f ==> prefetch if internal cache 31 or less 2682 * BEWARE: this seems to work but should be considered first if 2683 * there are Tx hangs or other Tx related bugs 2684 */ 2685 txdctl |= E1000_TXDCTL_DMA_BURST_ENABLE; 2686 ew32(TXDCTL(0), txdctl); 2687 /* erratum work around: set txdctl the same for both queues */ 2688 ew32(TXDCTL(1), txdctl); 2689 } 2690 2691 /* Program the Transmit Control Register */ 2692 tctl = er32(TCTL); 2693 tctl &= ~E1000_TCTL_CT; 2694 tctl |= E1000_TCTL_PSP | E1000_TCTL_RTLC | 2695 (E1000_COLLISION_THRESHOLD << E1000_CT_SHIFT); 2696 2697 if (adapter->flags & FLAG_TARC_SPEED_MODE_BIT) { 2698 tarc = er32(TARC(0)); 2699 /* 2700 * set the speed mode bit, we'll clear it if we're not at 2701 * gigabit link later 2702 */ 2703#define SPEED_MODE_BIT (1 << 21) 2704 tarc |= SPEED_MODE_BIT; 2705 ew32(TARC(0), tarc); 2706 } 2707 2708 /* errata: program both queues to unweighted RR */ 2709 if (adapter->flags & FLAG_TARC_SET_BIT_ZERO) { 2710 tarc = er32(TARC(0)); 2711 tarc |= 1; 2712 ew32(TARC(0), tarc); 2713 tarc = er32(TARC(1)); 2714 tarc |= 1; 2715 ew32(TARC(1), tarc); 2716 } 2717 2718 /* Setup Transmit Descriptor Settings for eop descriptor */ 2719 adapter->txd_cmd = E1000_TXD_CMD_EOP | E1000_TXD_CMD_IFCS; 2720 2721 /* only set IDE if we are delaying interrupts using the timers */ 2722 if (adapter->tx_int_delay) 2723 adapter->txd_cmd |= E1000_TXD_CMD_IDE; 2724 2725 /* enable Report Status bit */ 2726 adapter->txd_cmd |= E1000_TXD_CMD_RS; 2727 2728 ew32(TCTL, tctl); 2729 2730 e1000e_config_collision_dist(hw); 2731} 2732 2733/** 2734 * e1000_setup_rctl - configure the receive control registers 2735 * @adapter: Board private structure 2736 **/ 2737#define PAGE_USE_COUNT(S) (((S) >> PAGE_SHIFT) + \ 2738 (((S) & (PAGE_SIZE - 1)) ? 1 : 0)) 2739static void e1000_setup_rctl(struct e1000_adapter *adapter) 2740{ 2741 struct e1000_hw *hw = &adapter->hw; 2742 u32 rctl, rfctl; 2743 u32 pages = 0; 2744 2745 /* Workaround Si errata on 82579 - configure jumbo frame flow */ 2746 if (hw->mac.type == e1000_pch2lan) { 2747 s32 ret_val; 2748 2749 if (adapter->netdev->mtu > ETH_DATA_LEN) 2750 ret_val = e1000_lv_jumbo_workaround_ich8lan(hw, true); 2751 else 2752 ret_val = e1000_lv_jumbo_workaround_ich8lan(hw, false); 2753 2754 if (ret_val) 2755 e_dbg("failed to enable jumbo frame workaround mode\n"); 2756 } 2757 2758 /* Program MC offset vector base */ 2759 rctl = er32(RCTL); 2760 rctl &= ~(3 << E1000_RCTL_MO_SHIFT); 2761 rctl |= E1000_RCTL_EN | E1000_RCTL_BAM | 2762 E1000_RCTL_LBM_NO | E1000_RCTL_RDMTS_HALF | 2763 (adapter->hw.mac.mc_filter_type << E1000_RCTL_MO_SHIFT); 2764 2765 /* Do not Store bad packets */ 2766 rctl &= ~E1000_RCTL_SBP; 2767 2768 /* Enable Long Packet receive */ 2769 if (adapter->netdev->mtu <= ETH_DATA_LEN) 2770 rctl &= ~E1000_RCTL_LPE; 2771 else 2772 rctl |= E1000_RCTL_LPE; 2773 2774 /* Some systems expect that the CRC is included in SMBUS traffic. The 2775 * hardware strips the CRC before sending to both SMBUS (BMC) and to 2776 * host memory when this is enabled 2777 */ 2778 if (adapter->flags2 & FLAG2_CRC_STRIPPING) 2779 rctl |= E1000_RCTL_SECRC; 2780 2781 /* Workaround Si errata on 82577 PHY - configure IPG for jumbos */ 2782 if ((hw->phy.type == e1000_phy_82577) && (rctl & E1000_RCTL_LPE)) { 2783 u16 phy_data; 2784 2785 e1e_rphy(hw, PHY_REG(770, 26), &phy_data); 2786 phy_data &= 0xfff8; 2787 phy_data |= (1 << 2); 2788 e1e_wphy(hw, PHY_REG(770, 26), phy_data); 2789 2790 e1e_rphy(hw, 22, &phy_data); 2791 phy_data &= 0x0fff; 2792 phy_data |= (1 << 14); 2793 e1e_wphy(hw, 0x10, 0x2823); 2794 e1e_wphy(hw, 0x11, 0x0003); 2795 e1e_wphy(hw, 22, phy_data); 2796 } 2797 2798 /* Setup buffer sizes */ 2799 rctl &= ~E1000_RCTL_SZ_4096; 2800 rctl |= E1000_RCTL_BSEX; 2801 switch (adapter->rx_buffer_len) { 2802 case 2048: 2803 default: 2804 rctl |= E1000_RCTL_SZ_2048; 2805 rctl &= ~E1000_RCTL_BSEX; 2806 break; 2807 case 4096: 2808 rctl |= E1000_RCTL_SZ_4096; 2809 break; 2810 case 8192: 2811 rctl |= E1000_RCTL_SZ_8192; 2812 break; 2813 case 16384: 2814 rctl |= E1000_RCTL_SZ_16384; 2815 break; 2816 } 2817 2818 /* 2819 * 82571 and greater support packet-split where the protocol 2820 * header is placed in skb->data and the packet data is 2821 * placed in pages hanging off of skb_shinfo(skb)->nr_frags. 2822 * In the case of a non-split, skb->data is linearly filled, 2823 * followed by the page buffers. Therefore, skb->data is 2824 * sized to hold the largest protocol header. 2825 * 2826 * allocations using alloc_page take too long for regular MTU 2827 * so only enable packet split for jumbo frames 2828 * 2829 * Using pages when the page size is greater than 16k wastes 2830 * a lot of memory, since we allocate 3 pages at all times 2831 * per packet. 2832 */ 2833 pages = PAGE_USE_COUNT(adapter->netdev->mtu); 2834 if (!(adapter->flags & FLAG_HAS_ERT) && (pages <= 3) && 2835 (PAGE_SIZE <= 16384) && (rctl & E1000_RCTL_LPE)) 2836 adapter->rx_ps_pages = pages; 2837 else 2838 adapter->rx_ps_pages = 0; 2839 2840 if (adapter->rx_ps_pages) { 2841 u32 psrctl = 0; 2842 2843 /* Configure extra packet-split registers */ 2844 rfctl = er32(RFCTL); 2845 rfctl |= E1000_RFCTL_EXTEN; 2846 /* 2847 * disable packet split support for IPv6 extension headers, 2848 * because some malformed IPv6 headers can hang the Rx 2849 */ 2850 rfctl |= (E1000_RFCTL_IPV6_EX_DIS | 2851 E1000_RFCTL_NEW_IPV6_EXT_DIS); 2852 2853 ew32(RFCTL, rfctl); 2854 2855 /* Enable Packet split descriptors */ 2856 rctl |= E1000_RCTL_DTYP_PS; 2857 2858 psrctl |= adapter->rx_ps_bsize0 >> 2859 E1000_PSRCTL_BSIZE0_SHIFT; 2860 2861 switch (adapter->rx_ps_pages) { 2862 case 3: 2863 psrctl |= PAGE_SIZE << 2864 E1000_PSRCTL_BSIZE3_SHIFT; 2865 case 2: 2866 psrctl |= PAGE_SIZE << 2867 E1000_PSRCTL_BSIZE2_SHIFT; 2868 case 1: 2869 psrctl |= PAGE_SIZE >> 2870 E1000_PSRCTL_BSIZE1_SHIFT; 2871 break; 2872 } 2873 2874 ew32(PSRCTL, psrctl); 2875 } 2876 2877 ew32(RCTL, rctl); 2878 /* just started the receive unit, no need to restart */ 2879 adapter->flags &= ~FLAG_RX_RESTART_NOW; 2880} 2881 2882/** 2883 * e1000_configure_rx - Configure Receive Unit after Reset 2884 * @adapter: board private structure 2885 * 2886 * Configure the Rx unit of the MAC after a reset. 2887 **/ 2888static void e1000_configure_rx(struct e1000_adapter *adapter) 2889{ 2890 struct e1000_hw *hw = &adapter->hw; 2891 struct e1000_ring *rx_ring = adapter->rx_ring; 2892 u64 rdba; 2893 u32 rdlen, rctl, rxcsum, ctrl_ext; 2894 2895 if (adapter->rx_ps_pages) { 2896 /* this is a 32 byte descriptor */ 2897 rdlen = rx_ring->count * 2898 sizeof(union e1000_rx_desc_packet_split); 2899 adapter->clean_rx = e1000_clean_rx_irq_ps; 2900 adapter->alloc_rx_buf = e1000_alloc_rx_buffers_ps; 2901 } else if (adapter->netdev->mtu > ETH_FRAME_LEN + ETH_FCS_LEN) { 2902 rdlen = rx_ring->count * sizeof(struct e1000_rx_desc); 2903 adapter->clean_rx = e1000_clean_jumbo_rx_irq; 2904 adapter->alloc_rx_buf = e1000_alloc_jumbo_rx_buffers; 2905 } else { 2906 rdlen = rx_ring->count * sizeof(struct e1000_rx_desc); 2907 adapter->clean_rx = e1000_clean_rx_irq; 2908 adapter->alloc_rx_buf = e1000_alloc_rx_buffers; 2909 } 2910 2911 /* disable receives while setting up the descriptors */ 2912 rctl = er32(RCTL); 2913 ew32(RCTL, rctl & ~E1000_RCTL_EN); 2914 e1e_flush(); 2915 usleep_range(10000, 20000); 2916 2917 if (adapter->flags2 & FLAG2_DMA_BURST) { 2918 /* 2919 * set the writeback threshold (only takes effect if the RDTR 2920 * is set). set GRAN=1 and write back up to 0x4 worth, and 2921 * enable prefetching of 0x20 Rx descriptors 2922 * granularity = 01 2923 * wthresh = 04, 2924 * hthresh = 04, 2925 * pthresh = 0x20 2926 */ 2927 ew32(RXDCTL(0), E1000_RXDCTL_DMA_BURST_ENABLE); 2928 ew32(RXDCTL(1), E1000_RXDCTL_DMA_BURST_ENABLE); 2929 2930 /* 2931 * override the delay timers for enabling bursting, only if 2932 * the value was not set by the user via module options 2933 */ 2934 if (adapter->rx_int_delay == DEFAULT_RDTR) 2935 adapter->rx_int_delay = BURST_RDTR; 2936 if (adapter->rx_abs_int_delay == DEFAULT_RADV) 2937 adapter->rx_abs_int_delay = BURST_RADV; 2938 } 2939 2940 /* set the Receive Delay Timer Register */ 2941 ew32(RDTR, adapter->rx_int_delay); 2942 2943 /* irq moderation */ 2944 ew32(RADV, adapter->rx_abs_int_delay); 2945 if ((adapter->itr_setting != 0) && (adapter->itr != 0)) 2946 ew32(ITR, 1000000000 / (adapter->itr * 256)); 2947 2948 ctrl_ext = er32(CTRL_EXT); 2949 /* Auto-Mask interrupts upon ICR access */ 2950 ctrl_ext |= E1000_CTRL_EXT_IAME; 2951 ew32(IAM, 0xffffffff); 2952 ew32(CTRL_EXT, ctrl_ext); 2953 e1e_flush(); 2954 2955 /* 2956 * Setup the HW Rx Head and Tail Descriptor Pointers and 2957 * the Base and Length of the Rx Descriptor Ring 2958 */ 2959 rdba = rx_ring->dma; 2960 ew32(RDBAL, (rdba & DMA_BIT_MASK(32))); 2961 ew32(RDBAH, (rdba >> 32)); 2962 ew32(RDLEN, rdlen); 2963 ew32(RDH, 0); 2964 ew32(RDT, 0); 2965 rx_ring->head = E1000_RDH; 2966 rx_ring->tail = E1000_RDT; 2967 2968 /* Enable Receive Checksum Offload for TCP and UDP */ 2969 rxcsum = er32(RXCSUM); 2970 if (adapter->flags & FLAG_RX_CSUM_ENABLED) { 2971 rxcsum |= E1000_RXCSUM_TUOFL; 2972 2973 /* 2974 * IPv4 payload checksum for UDP fragments must be 2975 * used in conjunction with packet-split. 2976 */ 2977 if (adapter->rx_ps_pages) 2978 rxcsum |= E1000_RXCSUM_IPPCSE; 2979 } else { 2980 rxcsum &= ~E1000_RXCSUM_TUOFL; 2981 /* no need to clear IPPCSE as it defaults to 0 */ 2982 } 2983 ew32(RXCSUM, rxcsum); 2984 2985 /* 2986 * Enable early receives on supported devices, only takes effect when 2987 * packet size is equal or larger than the specified value (in 8 byte 2988 * units), e.g. using jumbo frames when setting to E1000_ERT_2048 2989 */ 2990 if ((adapter->flags & FLAG_HAS_ERT) || 2991 (adapter->hw.mac.type == e1000_pch2lan)) { 2992 if (adapter->netdev->mtu > ETH_DATA_LEN) { 2993 u32 rxdctl = er32(RXDCTL(0)); 2994 ew32(RXDCTL(0), rxdctl | 0x3); 2995 if (adapter->flags & FLAG_HAS_ERT) 2996 ew32(ERT, E1000_ERT_2048 | (1 << 13)); 2997 /* 2998 * With jumbo frames and early-receive enabled, 2999 * excessive C-state transition latencies result in 3000 * dropped transactions. 3001 */ 3002 pm_qos_update_request(&adapter->netdev->pm_qos_req, 55); 3003 } else { 3004 pm_qos_update_request(&adapter->netdev->pm_qos_req, 3005 PM_QOS_DEFAULT_VALUE); 3006 } 3007 } 3008 3009 /* Enable Receives */ 3010 ew32(RCTL, rctl); 3011} 3012 3013/** 3014 * e1000_update_mc_addr_list - Update Multicast addresses 3015 * @hw: pointer to the HW structure 3016 * @mc_addr_list: array of multicast addresses to program 3017 * @mc_addr_count: number of multicast addresses to program 3018 * 3019 * Updates the Multicast Table Array. 3020 * The caller must have a packed mc_addr_list of multicast addresses. 3021 **/ 3022static void e1000_update_mc_addr_list(struct e1000_hw *hw, u8 *mc_addr_list, 3023 u32 mc_addr_count) 3024{ 3025 hw->mac.ops.update_mc_addr_list(hw, mc_addr_list, mc_addr_count); 3026} 3027 3028/** 3029 * e1000_set_multi - Multicast and Promiscuous mode set 3030 * @netdev: network interface device structure 3031 * 3032 * The set_multi entry point is called whenever the multicast address 3033 * list or the network interface flags are updated. This routine is 3034 * responsible for configuring the hardware for proper multicast, 3035 * promiscuous mode, and all-multi behavior. 3036 **/ 3037static void e1000_set_multi(struct net_device *netdev) 3038{ 3039 struct e1000_adapter *adapter = netdev_priv(netdev); 3040 struct e1000_hw *hw = &adapter->hw; 3041 struct netdev_hw_addr *ha; 3042 u8 *mta_list; 3043 u32 rctl; 3044 3045 /* Check for Promiscuous and All Multicast modes */ 3046 3047 rctl = er32(RCTL); 3048 3049 if (netdev->flags & IFF_PROMISC) { 3050 rctl |= (E1000_RCTL_UPE | E1000_RCTL_MPE); 3051 rctl &= ~E1000_RCTL_VFE; 3052 /* Do not hardware filter VLANs in promisc mode */ 3053 e1000e_vlan_filter_disable(adapter); 3054 } else { 3055 if (netdev->flags & IFF_ALLMULTI) { 3056 rctl |= E1000_RCTL_MPE; 3057 rctl &= ~E1000_RCTL_UPE; 3058 } else { 3059 rctl &= ~(E1000_RCTL_UPE | E1000_RCTL_MPE); 3060 } 3061 e1000e_vlan_filter_enable(adapter); 3062 } 3063 3064 ew32(RCTL, rctl); 3065 3066 if (!netdev_mc_empty(netdev)) { 3067 int i = 0; 3068 3069 mta_list = kmalloc(netdev_mc_count(netdev) * 6, GFP_ATOMIC); 3070 if (!mta_list) 3071 return; 3072 3073 /* prepare a packed array of only addresses. */ 3074 netdev_for_each_mc_addr(ha, netdev) 3075 memcpy(mta_list + (i++ * ETH_ALEN), ha->addr, ETH_ALEN); 3076 3077 e1000_update_mc_addr_list(hw, mta_list, i); 3078 kfree(mta_list); 3079 } else { 3080 /* 3081 * if we're called from probe, we might not have 3082 * anything to do here, so clear out the list 3083 */ 3084 e1000_update_mc_addr_list(hw, NULL, 0); 3085 } 3086 3087 if (netdev->features & NETIF_F_HW_VLAN_RX) 3088 e1000e_vlan_strip_enable(adapter); 3089 else 3090 e1000e_vlan_strip_disable(adapter); 3091} 3092 3093/** 3094 * e1000_configure - configure the hardware for Rx and Tx 3095 * @adapter: private board structure 3096 **/ 3097static void e1000_configure(struct e1000_adapter *adapter) 3098{ 3099 e1000_set_multi(adapter->netdev); 3100 3101 e1000_restore_vlan(adapter); 3102 e1000_init_manageability_pt(adapter); 3103 3104 e1000_configure_tx(adapter); 3105 e1000_setup_rctl(adapter); 3106 e1000_configure_rx(adapter); 3107 adapter->alloc_rx_buf(adapter, e1000_desc_unused(adapter->rx_ring)); 3108} 3109 3110/** 3111 * e1000e_power_up_phy - restore link in case the phy was powered down 3112 * @adapter: address of board private structure 3113 * 3114 * The phy may be powered down to save power and turn off link when the 3115 * driver is unloaded and wake on lan is not enabled (among others) 3116 * *** this routine MUST be followed by a call to e1000e_reset *** 3117 **/ 3118void e1000e_power_up_phy(struct e1000_adapter *adapter) 3119{ 3120 if (adapter->hw.phy.ops.power_up) 3121 adapter->hw.phy.ops.power_up(&adapter->hw); 3122 3123 adapter->hw.mac.ops.setup_link(&adapter->hw); 3124} 3125 3126/** 3127 * e1000_power_down_phy - Power down the PHY 3128 * 3129 * Power down the PHY so no link is implied when interface is down. 3130 * The PHY cannot be powered down if management or WoL is active. 3131 */ 3132static void e1000_power_down_phy(struct e1000_adapter *adapter) 3133{ 3134 /* WoL is enabled */ 3135 if (adapter->wol) 3136 return; 3137 3138 if (adapter->hw.phy.ops.power_down) 3139 adapter->hw.phy.ops.power_down(&adapter->hw); 3140} 3141 3142/** 3143 * e1000e_reset - bring the hardware into a known good state 3144 * 3145 * This function boots the hardware and enables some settings that 3146 * require a configuration cycle of the hardware - those cannot be 3147 * set/changed during runtime. After reset the device needs to be 3148 * properly configured for Rx, Tx etc. 3149 */ 3150void e1000e_reset(struct e1000_adapter *adapter) 3151{ 3152 struct e1000_mac_info *mac = &adapter->hw.mac; 3153 struct e1000_fc_info *fc = &adapter->hw.fc; 3154 struct e1000_hw *hw = &adapter->hw; 3155 u32 tx_space, min_tx_space, min_rx_space; 3156 u32 pba = adapter->pba; 3157 u16 hwm; 3158 3159 /* reset Packet Buffer Allocation to default */ 3160 ew32(PBA, pba); 3161 3162 if (adapter->max_frame_size > ETH_FRAME_LEN + ETH_FCS_LEN) { 3163 /* 3164 * To maintain wire speed transmits, the Tx FIFO should be 3165 * large enough to accommodate two full transmit packets, 3166 * rounded up to the next 1KB and expressed in KB. Likewise, 3167 * the Rx FIFO should be large enough to accommodate at least 3168 * one full receive packet and is similarly rounded up and 3169 * expressed in KB. 3170 */ 3171 pba = er32(PBA); 3172 /* upper 16 bits has Tx packet buffer allocation size in KB */ 3173 tx_space = pba >> 16; 3174 /* lower 16 bits has Rx packet buffer allocation size in KB */ 3175 pba &= 0xffff; 3176 /* 3177 * the Tx fifo also stores 16 bytes of information about the Tx 3178 * but don't include ethernet FCS because hardware appends it 3179 */ 3180 min_tx_space = (adapter->max_frame_size + 3181 sizeof(struct e1000_tx_desc) - 3182 ETH_FCS_LEN) * 2; 3183 min_tx_space = ALIGN(min_tx_space, 1024); 3184 min_tx_space >>= 10; 3185 /* software strips receive CRC, so leave room for it */ 3186 min_rx_space = adapter->max_frame_size; 3187 min_rx_space = ALIGN(min_rx_space, 1024); 3188 min_rx_space >>= 10; 3189 3190 /* 3191 * If current Tx allocation is less than the min Tx FIFO size, 3192 * and the min Tx FIFO size is less than the current Rx FIFO 3193 * allocation, take space away from current Rx allocation 3194 */ 3195 if ((tx_space < min_tx_space) && 3196 ((min_tx_space - tx_space) < pba)) { 3197 pba -= min_tx_space - tx_space; 3198 3199 /* 3200 * if short on Rx space, Rx wins and must trump Tx 3201 * adjustment or use Early Receive if available 3202 */ 3203 if ((pba < min_rx_space) && 3204 (!(adapter->flags & FLAG_HAS_ERT))) 3205 /* ERT enabled in e1000_configure_rx */ 3206 pba = min_rx_space; 3207 } 3208 3209 ew32(PBA, pba); 3210 } 3211 3212 /* 3213 * flow control settings 3214 * 3215 * The high water mark must be low enough to fit one full frame 3216 * (or the size used for early receive) above it in the Rx FIFO. 3217 * Set it to the lower of: 3218 * - 90% of the Rx FIFO size, and 3219 * - the full Rx FIFO size minus the early receive size (for parts 3220 * with ERT support assuming ERT set to E1000_ERT_2048), or 3221 * - the full Rx FIFO size minus one full frame 3222 */ 3223 if (adapter->flags & FLAG_DISABLE_FC_PAUSE_TIME) 3224 fc->pause_time = 0xFFFF; 3225 else 3226 fc->pause_time = E1000_FC_PAUSE_TIME; 3227 fc->send_xon = 1; 3228 fc->current_mode = fc->requested_mode; 3229 3230 switch (hw->mac.type) { 3231 default: 3232 if ((adapter->flags & FLAG_HAS_ERT) && 3233 (adapter->netdev->mtu > ETH_DATA_LEN)) 3234 hwm = min(((pba << 10) * 9 / 10), 3235 ((pba << 10) - (E1000_ERT_2048 << 3))); 3236 else 3237 hwm = min(((pba << 10) * 9 / 10), 3238 ((pba << 10) - adapter->max_frame_size)); 3239 3240 fc->high_water = hwm & E1000_FCRTH_RTH; /* 8-byte granularity */ 3241 fc->low_water = fc->high_water - 8; 3242 break; 3243 case e1000_pchlan: 3244 /* 3245 * Workaround PCH LOM adapter hangs with certain network 3246 * loads. If hangs persist, try disabling Tx flow control. 3247 */ 3248 if (adapter->netdev->mtu > ETH_DATA_LEN) { 3249 fc->high_water = 0x3500; 3250 fc->low_water = 0x1500; 3251 } else { 3252 fc->high_water = 0x5000; 3253 fc->low_water = 0x3000; 3254 } 3255 fc->refresh_time = 0x1000; 3256 break; 3257 case e1000_pch2lan: 3258 fc->high_water = 0x05C20; 3259 fc->low_water = 0x05048; 3260 fc->pause_time = 0x0650; 3261 fc->refresh_time = 0x0400; 3262 if (adapter->netdev->mtu > ETH_DATA_LEN) { 3263 pba = 14; 3264 ew32(PBA, pba); 3265 } 3266 break; 3267 } 3268 3269 /* 3270 * Disable Adaptive Interrupt Moderation if 2 full packets cannot 3271 * fit in receive buffer and early-receive not supported. 3272 */ 3273 if (adapter->itr_setting & 0x3) { 3274 if (((adapter->max_frame_size * 2) > (pba << 10)) && 3275 !(adapter->flags & FLAG_HAS_ERT)) { 3276 if (!(adapter->flags2 & FLAG2_DISABLE_AIM)) { 3277 dev_info(&adapter->pdev->dev, 3278 "Interrupt Throttle Rate turned off\n"); 3279 adapter->flags2 |= FLAG2_DISABLE_AIM; 3280 ew32(ITR, 0); 3281 } 3282 } else if (adapter->flags2 & FLAG2_DISABLE_AIM) { 3283 dev_info(&adapter->pdev->dev, 3284 "Interrupt Throttle Rate turned on\n"); 3285 adapter->flags2 &= ~FLAG2_DISABLE_AIM; 3286 adapter->itr = 20000; 3287 ew32(ITR, 1000000000 / (adapter->itr * 256)); 3288 } 3289 } 3290 3291 /* Allow time for pending master requests to run */ 3292 mac->ops.reset_hw(hw); 3293 3294 /* 3295 * For parts with AMT enabled, let the firmware know 3296 * that the network interface is in control 3297 */ 3298 if (adapter->flags & FLAG_HAS_AMT) 3299 e1000e_get_hw_control(adapter); 3300 3301 ew32(WUC, 0); 3302 3303 if (mac->ops.init_hw(hw)) 3304 e_err("Hardware Error\n"); 3305 3306 e1000_update_mng_vlan(adapter); 3307 3308 /* Enable h/w to recognize an 802.1Q VLAN Ethernet packet */ 3309 ew32(VET, ETH_P_8021Q); 3310 3311 e1000e_reset_adaptive(hw); 3312 3313 if (!netif_running(adapter->netdev) && 3314 !test_bit(__E1000_TESTING, &adapter->state)) { 3315 e1000_power_down_phy(adapter); 3316 return; 3317 } 3318 3319 e1000_get_phy_info(hw); 3320 3321 if ((adapter->flags & FLAG_HAS_SMART_POWER_DOWN) && 3322 !(adapter->flags & FLAG_SMART_POWER_DOWN)) { 3323 u16 phy_data = 0; 3324 /* 3325 * speed up time to link by disabling smart power down, ignore 3326 * the return value of this function because there is nothing 3327 * different we would do if it failed 3328 */ 3329 e1e_rphy(hw, IGP02E1000_PHY_POWER_MGMT, &phy_data); 3330 phy_data &= ~IGP02E1000_PM_SPD; 3331 e1e_wphy(hw, IGP02E1000_PHY_POWER_MGMT, phy_data); 3332 } 3333} 3334 3335int e1000e_up(struct e1000_adapter *adapter) 3336{ 3337 struct e1000_hw *hw = &adapter->hw; 3338 3339 /* hardware has been reset, we need to reload some things */ 3340 e1000_configure(adapter); 3341 3342 clear_bit(__E1000_DOWN, &adapter->state); 3343 3344 napi_enable(&adapter->napi); 3345 if (adapter->msix_entries) 3346 e1000_configure_msix(adapter); 3347 e1000_irq_enable(adapter); 3348 3349 netif_wake_queue(adapter->netdev); 3350 3351 /* fire a link change interrupt to start the watchdog */ 3352 if (adapter->msix_entries) 3353 ew32(ICS, E1000_ICS_LSC | E1000_ICR_OTHER); 3354 else 3355 ew32(ICS, E1000_ICS_LSC); 3356 3357 return 0; 3358} 3359 3360static void e1000e_flush_descriptors(struct e1000_adapter *adapter) 3361{ 3362 struct e1000_hw *hw = &adapter->hw; 3363 3364 if (!(adapter->flags2 & FLAG2_DMA_BURST)) 3365 return; 3366 3367 /* flush pending descriptor writebacks to memory */ 3368 ew32(TIDV, adapter->tx_int_delay | E1000_TIDV_FPD); 3369 ew32(RDTR, adapter->rx_int_delay | E1000_RDTR_FPD); 3370 3371 /* execute the writes immediately */ 3372 e1e_flush(); 3373} 3374 3375static void e1000e_update_stats(struct e1000_adapter *adapter); 3376 3377void e1000e_down(struct e1000_adapter *adapter) 3378{ 3379 struct net_device *netdev = adapter->netdev; 3380 struct e1000_hw *hw = &adapter->hw; 3381 u32 tctl, rctl; 3382 3383 /* 3384 * signal that we're down so the interrupt handler does not 3385 * reschedule our watchdog timer 3386 */ 3387 set_bit(__E1000_DOWN, &adapter->state); 3388 3389 /* disable receives in the hardware */ 3390 rctl = er32(RCTL); 3391 ew32(RCTL, rctl & ~E1000_RCTL_EN); 3392 /* flush and sleep below */ 3393 3394 netif_stop_queue(netdev); 3395 3396 /* disable transmits in the hardware */ 3397 tctl = er32(TCTL); 3398 tctl &= ~E1000_TCTL_EN; 3399 ew32(TCTL, tctl); 3400 /* flush both disables and wait for them to finish */ 3401 e1e_flush(); 3402 usleep_range(10000, 20000); 3403 3404 napi_disable(&adapter->napi); 3405 e1000_irq_disable(adapter); 3406 3407 del_timer_sync(&adapter->watchdog_timer); 3408 del_timer_sync(&adapter->phy_info_timer); 3409 3410 netif_carrier_off(netdev); 3411 3412 spin_lock(&adapter->stats64_lock); 3413 e1000e_update_stats(adapter); 3414 spin_unlock(&adapter->stats64_lock); 3415 3416 adapter->link_speed = 0; 3417 adapter->link_duplex = 0; 3418 3419 if (!pci_channel_offline(adapter->pdev)) 3420 e1000e_reset(adapter); 3421 3422 e1000e_flush_descriptors(adapter); 3423 3424 e1000_clean_tx_ring(adapter); 3425 e1000_clean_rx_ring(adapter); 3426 3427 /* 3428 * TODO: for power management, we could drop the link and 3429 * pci_disable_device here. 3430 */ 3431} 3432 3433void e1000e_reinit_locked(struct e1000_adapter *adapter) 3434{ 3435 might_sleep(); 3436 while (test_and_set_bit(__E1000_RESETTING, &adapter->state)) 3437 usleep_range(1000, 2000); 3438 e1000e_down(adapter); 3439 e1000e_up(adapter); 3440 clear_bit(__E1000_RESETTING, &adapter->state); 3441} 3442 3443/** 3444 * e1000_sw_init - Initialize general software structures (struct e1000_adapter) 3445 * @adapter: board private structure to initialize 3446 * 3447 * e1000_sw_init initializes the Adapter private data structure. 3448 * Fields are initialized based on PCI device information and 3449 * OS network device settings (MTU size). 3450 **/ 3451static int __devinit e1000_sw_init(struct e1000_adapter *adapter) 3452{ 3453 struct net_device *netdev = adapter->netdev; 3454 3455 adapter->rx_buffer_len = ETH_FRAME_LEN + VLAN_HLEN + ETH_FCS_LEN; 3456 adapter->rx_ps_bsize0 = 128; 3457 adapter->max_frame_size = netdev->mtu + ETH_HLEN + ETH_FCS_LEN; 3458 adapter->min_frame_size = ETH_ZLEN + ETH_FCS_LEN; 3459 3460 spin_lock_init(&adapter->stats64_lock); 3461 3462 e1000e_set_interrupt_capability(adapter); 3463 3464 if (e1000_alloc_queues(adapter)) 3465 return -ENOMEM; 3466 3467 /* Explicitly disable IRQ since the NIC can be in any state. */ 3468 e1000_irq_disable(adapter); 3469 3470 set_bit(__E1000_DOWN, &adapter->state); 3471 return 0; 3472} 3473 3474/** 3475 * e1000_intr_msi_test - Interrupt Handler 3476 * @irq: interrupt number 3477 * @data: pointer to a network interface device structure 3478 **/ 3479static irqreturn_t e1000_intr_msi_test(int irq, void *data) 3480{ 3481 struct net_device *netdev = data; 3482 struct e1000_adapter *adapter = netdev_priv(netdev); 3483 struct e1000_hw *hw = &adapter->hw; 3484 u32 icr = er32(ICR); 3485 3486 e_dbg("icr is %08X\n", icr); 3487 if (icr & E1000_ICR_RXSEQ) { 3488 adapter->flags &= ~FLAG_MSI_TEST_FAILED; 3489 wmb(); 3490 } 3491 3492 return IRQ_HANDLED; 3493} 3494 3495/** 3496 * e1000_test_msi_interrupt - Returns 0 for successful test 3497 * @adapter: board private struct 3498 * 3499 * code flow taken from tg3.c 3500 **/ 3501static int e1000_test_msi_interrupt(struct e1000_adapter *adapter) 3502{ 3503 struct net_device *netdev = adapter->netdev; 3504 struct e1000_hw *hw = &adapter->hw; 3505 int err; 3506 3507 /* poll_enable hasn't been called yet, so don't need disable */ 3508 /* clear any pending events */ 3509 er32(ICR); 3510 3511 /* free the real vector and request a test handler */ 3512 e1000_free_irq(adapter); 3513 e1000e_reset_interrupt_capability(adapter); 3514 3515 /* Assume that the test fails, if it succeeds then the test 3516 * MSI irq handler will unset this flag */ 3517 adapter->flags |= FLAG_MSI_TEST_FAILED; 3518 3519 err = pci_enable_msi(adapter->pdev); 3520 if (err) 3521 goto msi_test_failed; 3522 3523 err = request_irq(adapter->pdev->irq, e1000_intr_msi_test, 0, 3524 netdev->name, netdev); 3525 if (err) { 3526 pci_disable_msi(adapter->pdev); 3527 goto msi_test_failed; 3528 } 3529 3530 wmb(); 3531 3532 e1000_irq_enable(adapter); 3533 3534 /* fire an unusual interrupt on the test handler */ 3535 ew32(ICS, E1000_ICS_RXSEQ); 3536 e1e_flush(); 3537 msleep(50); 3538 3539 e1000_irq_disable(adapter); 3540 3541 rmb(); 3542 3543 if (adapter->flags & FLAG_MSI_TEST_FAILED) { 3544 adapter->int_mode = E1000E_INT_MODE_LEGACY; 3545 e_info("MSI interrupt test failed, using legacy interrupt.\n"); 3546 } else 3547 e_dbg("MSI interrupt test succeeded!\n"); 3548 3549 free_irq(adapter->pdev->irq, netdev); 3550 pci_disable_msi(adapter->pdev); 3551 3552msi_test_failed: 3553 e1000e_set_interrupt_capability(adapter); 3554 return e1000_request_irq(adapter); 3555} 3556 3557/** 3558 * e1000_test_msi - Returns 0 if MSI test succeeds or INTx mode is restored 3559 * @adapter: board private struct 3560 * 3561 * code flow taken from tg3.c, called with e1000 interrupts disabled. 3562 **/ 3563static int e1000_test_msi(struct e1000_adapter *adapter) 3564{ 3565 int err; 3566 u16 pci_cmd; 3567 3568 if (!(adapter->flags & FLAG_MSI_ENABLED)) 3569 return 0; 3570 3571 /* disable SERR in case the MSI write causes a master abort */ 3572 pci_read_config_word(adapter->pdev, PCI_COMMAND, &pci_cmd); 3573 if (pci_cmd & PCI_COMMAND_SERR) 3574 pci_write_config_word(adapter->pdev, PCI_COMMAND, 3575 pci_cmd & ~PCI_COMMAND_SERR); 3576 3577 err = e1000_test_msi_interrupt(adapter); 3578 3579 /* re-enable SERR */ 3580 if (pci_cmd & PCI_COMMAND_SERR) { 3581 pci_read_config_word(adapter->pdev, PCI_COMMAND, &pci_cmd); 3582 pci_cmd |= PCI_COMMAND_SERR; 3583 pci_write_config_word(adapter->pdev, PCI_COMMAND, pci_cmd); 3584 } 3585 3586 return err; 3587} 3588 3589/** 3590 * e1000_open - Called when a network interface is made active 3591 * @netdev: network interface device structure 3592 * 3593 * Returns 0 on success, negative value on failure 3594 * 3595 * The open entry point is called when a network interface is made 3596 * active by the system (IFF_UP). At this point all resources needed 3597 * for transmit and receive operations are allocated, the interrupt 3598 * handler is registered with the OS, the watchdog timer is started, 3599 * and the stack is notified that the interface is ready. 3600 **/ 3601static int e1000_open(struct net_device *netdev) 3602{ 3603 struct e1000_adapter *adapter = netdev_priv(netdev); 3604 struct e1000_hw *hw = &adapter->hw; 3605 struct pci_dev *pdev = adapter->pdev; 3606 int err; 3607 3608 /* disallow open during test */ 3609 if (test_bit(__E1000_TESTING, &adapter->state)) 3610 return -EBUSY; 3611 3612 pm_runtime_get_sync(&pdev->dev); 3613 3614 netif_carrier_off(netdev); 3615 3616 /* allocate transmit descriptors */ 3617 err = e1000e_setup_tx_resources(adapter); 3618 if (err) 3619 goto err_setup_tx; 3620 3621 /* allocate receive descriptors */ 3622 err = e1000e_setup_rx_resources(adapter); 3623 if (err) 3624 goto err_setup_rx; 3625 3626 /* 3627 * If AMT is enabled, let the firmware know that the network 3628 * interface is now open and reset the part to a known state. 3629 */ 3630 if (adapter->flags & FLAG_HAS_AMT) { 3631 e1000e_get_hw_control(adapter); 3632 e1000e_reset(adapter); 3633 } 3634 3635 e1000e_power_up_phy(adapter); 3636 3637 adapter->mng_vlan_id = E1000_MNG_VLAN_NONE; 3638 if ((adapter->hw.mng_cookie.status & 3639 E1000_MNG_DHCP_COOKIE_STATUS_VLAN)) 3640 e1000_update_mng_vlan(adapter); 3641 3642 /* DMA latency requirement to workaround early-receive/jumbo issue */ 3643 if ((adapter->flags & FLAG_HAS_ERT) || 3644 (adapter->hw.mac.type == e1000_pch2lan)) 3645 pm_qos_add_request(&adapter->netdev->pm_qos_req, 3646 PM_QOS_CPU_DMA_LATENCY, 3647 PM_QOS_DEFAULT_VALUE); 3648 3649 /* 3650 * before we allocate an interrupt, we must be ready to handle it. 3651 * Setting DEBUG_SHIRQ in the kernel makes it fire an interrupt 3652 * as soon as we call pci_request_irq, so we have to setup our 3653 * clean_rx handler before we do so. 3654 */ 3655 e1000_configure(adapter); 3656 3657 err = e1000_request_irq(adapter); 3658 if (err) 3659 goto err_req_irq; 3660 3661 /* 3662 * Work around PCIe errata with MSI interrupts causing some chipsets to 3663 * ignore e1000e MSI messages, which means we need to test our MSI 3664 * interrupt now 3665 */ 3666 if (adapter->int_mode != E1000E_INT_MODE_LEGACY) { 3667 err = e1000_test_msi(adapter); 3668 if (err) { 3669 e_err("Interrupt allocation failed\n"); 3670 goto err_req_irq; 3671 } 3672 } 3673 3674 /* From here on the code is the same as e1000e_up() */ 3675 clear_bit(__E1000_DOWN, &adapter->state); 3676 3677 napi_enable(&adapter->napi); 3678 3679 e1000_irq_enable(adapter); 3680 3681 netif_start_queue(netdev); 3682 3683 adapter->idle_check = true; 3684 pm_runtime_put(&pdev->dev); 3685 3686 /* fire a link status change interrupt to start the watchdog */ 3687 if (adapter->msix_entries) 3688 ew32(ICS, E1000_ICS_LSC | E1000_ICR_OTHER); 3689 else 3690 ew32(ICS, E1000_ICS_LSC); 3691 3692 return 0; 3693 3694err_req_irq: 3695 e1000e_release_hw_control(adapter); 3696 e1000_power_down_phy(adapter); 3697 e1000e_free_rx_resources(adapter); 3698err_setup_rx: 3699 e1000e_free_tx_resources(adapter); 3700err_setup_tx: 3701 e1000e_reset(adapter); 3702 pm_runtime_put_sync(&pdev->dev); 3703 3704 return err; 3705} 3706 3707/** 3708 * e1000_close - Disables a network interface 3709 * @netdev: network interface device structure 3710 * 3711 * Returns 0, this is not allowed to fail 3712 * 3713 * The close entry point is called when an interface is de-activated 3714 * by the OS. The hardware is still under the drivers control, but 3715 * needs to be disabled. A global MAC reset is issued to stop the 3716 * hardware, and all transmit and receive resources are freed. 3717 **/ 3718static int e1000_close(struct net_device *netdev) 3719{ 3720 struct e1000_adapter *adapter = netdev_priv(netdev); 3721 struct pci_dev *pdev = adapter->pdev; 3722 3723 WARN_ON(test_bit(__E1000_RESETTING, &adapter->state)); 3724 3725 pm_runtime_get_sync(&pdev->dev); 3726 3727 if (!test_bit(__E1000_DOWN, &adapter->state)) { 3728 e1000e_down(adapter); 3729 e1000_free_irq(adapter); 3730 } 3731 e1000_power_down_phy(adapter); 3732 3733 e1000e_free_tx_resources(adapter); 3734 e1000e_free_rx_resources(adapter); 3735 3736 /* 3737 * kill manageability vlan ID if supported, but not if a vlan with 3738 * the same ID is registered on the host OS (let 8021q kill it) 3739 */ 3740 if (adapter->hw.mng_cookie.status & 3741 E1000_MNG_DHCP_COOKIE_STATUS_VLAN) 3742 e1000_vlan_rx_kill_vid(netdev, adapter->mng_vlan_id); 3743 3744 /* 3745 * If AMT is enabled, let the firmware know that the network 3746 * interface is now closed 3747 */ 3748 if ((adapter->flags & FLAG_HAS_AMT) && 3749 !test_bit(__E1000_TESTING, &adapter->state)) 3750 e1000e_release_hw_control(adapter); 3751 3752 if ((adapter->flags & FLAG_HAS_ERT) || 3753 (adapter->hw.mac.type == e1000_pch2lan)) 3754 pm_qos_remove_request(&adapter->netdev->pm_qos_req); 3755 3756 pm_runtime_put_sync(&pdev->dev); 3757 3758 return 0; 3759} 3760/** 3761 * e1000_set_mac - Change the Ethernet Address of the NIC 3762 * @netdev: network interface device structure 3763 * @p: pointer to an address structure 3764 * 3765 * Returns 0 on success, negative on failure 3766 **/ 3767static int e1000_set_mac(struct net_device *netdev, void *p) 3768{ 3769 struct e1000_adapter *adapter = netdev_priv(netdev); 3770 struct sockaddr *addr = p; 3771 3772 if (!is_valid_ether_addr(addr->sa_data)) 3773 return -EADDRNOTAVAIL; 3774 3775 memcpy(netdev->dev_addr, addr->sa_data, netdev->addr_len); 3776 memcpy(adapter->hw.mac.addr, addr->sa_data, netdev->addr_len); 3777 3778 e1000e_rar_set(&adapter->hw, adapter->hw.mac.addr, 0); 3779 3780 if (adapter->flags & FLAG_RESET_OVERWRITES_LAA) { 3781 /* activate the work around */ 3782 e1000e_set_laa_state_82571(&adapter->hw, 1); 3783 3784 /* 3785 * Hold a copy of the LAA in RAR[14] This is done so that 3786 * between the time RAR[0] gets clobbered and the time it 3787 * gets fixed (in e1000_watchdog), the actual LAA is in one 3788 * of the RARs and no incoming packets directed to this port 3789 * are dropped. Eventually the LAA will be in RAR[0] and 3790 * RAR[14] 3791 */ 3792 e1000e_rar_set(&adapter->hw, 3793 adapter->hw.mac.addr, 3794 adapter->hw.mac.rar_entry_count - 1); 3795 } 3796 3797 return 0; 3798} 3799 3800/** 3801 * e1000e_update_phy_task - work thread to update phy 3802 * @work: pointer to our work struct 3803 * 3804 * this worker thread exists because we must acquire a 3805 * semaphore to read the phy, which we could msleep while 3806 * waiting for it, and we can't msleep in a timer. 3807 **/ 3808static void e1000e_update_phy_task(struct work_struct *work) 3809{ 3810 struct e1000_adapter *adapter = container_of(work, 3811 struct e1000_adapter, update_phy_task); 3812 3813 if (test_bit(__E1000_DOWN, &adapter->state)) 3814 return; 3815 3816 e1000_get_phy_info(&adapter->hw); 3817} 3818 3819/* 3820 * Need to wait a few seconds after link up to get diagnostic information from 3821 * the phy 3822 */ 3823static void e1000_update_phy_info(unsigned long data) 3824{ 3825 struct e1000_adapter *adapter = (struct e1000_adapter *) data; 3826 3827 if (test_bit(__E1000_DOWN, &adapter->state)) 3828 return; 3829 3830 schedule_work(&adapter->update_phy_task); 3831} 3832 3833/** 3834 * e1000e_update_phy_stats - Update the PHY statistics counters 3835 * @adapter: board private structure 3836 **/ 3837static void e1000e_update_phy_stats(struct e1000_adapter *adapter) 3838{ 3839 struct e1000_hw *hw = &adapter->hw; 3840 s32 ret_val; 3841 u16 phy_data; 3842 3843 ret_val = hw->phy.ops.acquire(hw); 3844 if (ret_val) 3845 return; 3846 3847 hw->phy.addr = 1; 3848 3849#define HV_PHY_STATS_PAGE 778 3850 /* 3851 * A page set is expensive so check if already on desired page. 3852 * If not, set to the page with the PHY status registers. 3853 */ 3854 ret_val = e1000e_read_phy_reg_mdic(hw, IGP01E1000_PHY_PAGE_SELECT, 3855 &phy_data); 3856 if (ret_val) 3857 goto release; 3858 if (phy_data != (HV_PHY_STATS_PAGE << IGP_PAGE_SHIFT)) { 3859 ret_val = e1000e_write_phy_reg_mdic(hw, 3860 IGP01E1000_PHY_PAGE_SELECT, 3861 (HV_PHY_STATS_PAGE << 3862 IGP_PAGE_SHIFT)); 3863 if (ret_val) 3864 goto release; 3865 } 3866 3867 /* Read/clear the upper 16-bit registers and read/accumulate lower */ 3868 3869 /* Single Collision Count */ 3870 e1000e_read_phy_reg_mdic(hw, HV_SCC_UPPER & MAX_PHY_REG_ADDRESS, 3871 &phy_data); 3872 ret_val = e1000e_read_phy_reg_mdic(hw, 3873 HV_SCC_LOWER & MAX_PHY_REG_ADDRESS, 3874 &phy_data); 3875 if (!ret_val) 3876 adapter->stats.scc += phy_data; 3877 3878 /* Excessive Collision Count */ 3879 e1000e_read_phy_reg_mdic(hw, HV_ECOL_UPPER & MAX_PHY_REG_ADDRESS, 3880 &phy_data); 3881 ret_val = e1000e_read_phy_reg_mdic(hw, 3882 HV_ECOL_LOWER & MAX_PHY_REG_ADDRESS, 3883 &phy_data); 3884 if (!ret_val) 3885 adapter->stats.ecol += phy_data; 3886 3887 /* Multiple Collision Count */ 3888 e1000e_read_phy_reg_mdic(hw, HV_MCC_UPPER & MAX_PHY_REG_ADDRESS, 3889 &phy_data); 3890 ret_val = e1000e_read_phy_reg_mdic(hw, 3891 HV_MCC_LOWER & MAX_PHY_REG_ADDRESS, 3892 &phy_data); 3893 if (!ret_val) 3894 adapter->stats.mcc += phy_data; 3895 3896 /* Late Collision Count */ 3897 e1000e_read_phy_reg_mdic(hw, HV_LATECOL_UPPER & MAX_PHY_REG_ADDRESS, 3898 &phy_data); 3899 ret_val = e1000e_read_phy_reg_mdic(hw, 3900 HV_LATECOL_LOWER & 3901 MAX_PHY_REG_ADDRESS, 3902 &phy_data); 3903 if (!ret_val) 3904 adapter->stats.latecol += phy_data; 3905 3906 /* Collision Count - also used for adaptive IFS */ 3907 e1000e_read_phy_reg_mdic(hw, HV_COLC_UPPER & MAX_PHY_REG_ADDRESS, 3908 &phy_data); 3909 ret_val = e1000e_read_phy_reg_mdic(hw, 3910 HV_COLC_LOWER & MAX_PHY_REG_ADDRESS, 3911 &phy_data); 3912 if (!ret_val) 3913 hw->mac.collision_delta = phy_data; 3914 3915 /* Defer Count */ 3916 e1000e_read_phy_reg_mdic(hw, HV_DC_UPPER & MAX_PHY_REG_ADDRESS, 3917 &phy_data); 3918 ret_val = e1000e_read_phy_reg_mdic(hw, 3919 HV_DC_LOWER & MAX_PHY_REG_ADDRESS, 3920 &phy_data); 3921 if (!ret_val) 3922 adapter->stats.dc += phy_data; 3923 3924 /* Transmit with no CRS */ 3925 e1000e_read_phy_reg_mdic(hw, HV_TNCRS_UPPER & MAX_PHY_REG_ADDRESS, 3926 &phy_data); 3927 ret_val = e1000e_read_phy_reg_mdic(hw, 3928 HV_TNCRS_LOWER & MAX_PHY_REG_ADDRESS, 3929 &phy_data); 3930 if (!ret_val) 3931 adapter->stats.tncrs += phy_data; 3932 3933release: 3934 hw->phy.ops.release(hw); 3935} 3936 3937/** 3938 * e1000e_update_stats - Update the board statistics counters 3939 * @adapter: board private structure 3940 **/ 3941static void e1000e_update_stats(struct e1000_adapter *adapter) 3942{ 3943 struct net_device *netdev = adapter->netdev; 3944 struct e1000_hw *hw = &adapter->hw; 3945 struct pci_dev *pdev = adapter->pdev; 3946 3947 /* 3948 * Prevent stats update while adapter is being reset, or if the pci 3949 * connection is down. 3950 */ 3951 if (adapter->link_speed == 0) 3952 return; 3953 if (pci_channel_offline(pdev)) 3954 return; 3955 3956 adapter->stats.crcerrs += er32(CRCERRS); 3957 adapter->stats.gprc += er32(GPRC); 3958 adapter->stats.gorc += er32(GORCL); 3959 er32(GORCH); /* Clear gorc */ 3960 adapter->stats.bprc += er32(BPRC); 3961 adapter->stats.mprc += er32(MPRC); 3962 adapter->stats.roc += er32(ROC); 3963 3964 adapter->stats.mpc += er32(MPC); 3965 3966 /* Half-duplex statistics */ 3967 if (adapter->link_duplex == HALF_DUPLEX) { 3968 if (adapter->flags2 & FLAG2_HAS_PHY_STATS) { 3969 e1000e_update_phy_stats(adapter); 3970 } else { 3971 adapter->stats.scc += er32(SCC); 3972 adapter->stats.ecol += er32(ECOL); 3973 adapter->stats.mcc += er32(MCC); 3974 adapter->stats.latecol += er32(LATECOL); 3975 adapter->stats.dc += er32(DC); 3976 3977 hw->mac.collision_delta = er32(COLC); 3978 3979 if ((hw->mac.type != e1000_82574) && 3980 (hw->mac.type != e1000_82583)) 3981 adapter->stats.tncrs += er32(TNCRS); 3982 } 3983 adapter->stats.colc += hw->mac.collision_delta; 3984 } 3985 3986 adapter->stats.xonrxc += er32(XONRXC); 3987 adapter->stats.xontxc += er32(XONTXC); 3988 adapter->stats.xoffrxc += er32(XOFFRXC); 3989 adapter->stats.xofftxc += er32(XOFFTXC); 3990 adapter->stats.gptc += er32(GPTC); 3991 adapter->stats.gotc += er32(GOTCL); 3992 er32(GOTCH); /* Clear gotc */ 3993 adapter->stats.rnbc += er32(RNBC); 3994 adapter->stats.ruc += er32(RUC); 3995 3996 adapter->stats.mptc += er32(MPTC); 3997 adapter->stats.bptc += er32(BPTC); 3998 3999 /* used for adaptive IFS */ 4000 4001 hw->mac.tx_packet_delta = er32(TPT); 4002 adapter->stats.tpt += hw->mac.tx_packet_delta; 4003 4004 adapter->stats.algnerrc += er32(ALGNERRC); 4005 adapter->stats.rxerrc += er32(RXERRC); 4006 adapter->stats.cexterr += er32(CEXTERR); 4007 adapter->stats.tsctc += er32(TSCTC); 4008 adapter->stats.tsctfc += er32(TSCTFC); 4009 4010 /* Fill out the OS statistics structure */ 4011 netdev->stats.multicast = adapter->stats.mprc; 4012 netdev->stats.collisions = adapter->stats.colc; 4013 4014 /* Rx Errors */ 4015 4016 /* 4017 * RLEC on some newer hardware can be incorrect so build 4018 * our own version based on RUC and ROC 4019 */ 4020 netdev->stats.rx_errors = adapter->stats.rxerrc + 4021 adapter->stats.crcerrs + adapter->stats.algnerrc + 4022 adapter->stats.ruc + adapter->stats.roc + 4023 adapter->stats.cexterr; 4024 netdev->stats.rx_length_errors = adapter->stats.ruc + 4025 adapter->stats.roc; 4026 netdev->stats.rx_crc_errors = adapter->stats.crcerrs; 4027 netdev->stats.rx_frame_errors = adapter->stats.algnerrc; 4028 netdev->stats.rx_missed_errors = adapter->stats.mpc; 4029 4030 /* Tx Errors */ 4031 netdev->stats.tx_errors = adapter->stats.ecol + 4032 adapter->stats.latecol; 4033 netdev->stats.tx_aborted_errors = adapter->stats.ecol; 4034 netdev->stats.tx_window_errors = adapter->stats.latecol; 4035 netdev->stats.tx_carrier_errors = adapter->stats.tncrs; 4036 4037 /* Tx Dropped needs to be maintained elsewhere */ 4038 4039 /* Management Stats */ 4040 adapter->stats.mgptc += er32(MGTPTC); 4041 adapter->stats.mgprc += er32(MGTPRC); 4042 adapter->stats.mgpdc += er32(MGTPDC); 4043} 4044 4045/** 4046 * e1000_phy_read_status - Update the PHY register status snapshot 4047 * @adapter: board private structure 4048 **/ 4049static void e1000_phy_read_status(struct e1000_adapter *adapter) 4050{ 4051 struct e1000_hw *hw = &adapter->hw; 4052 struct e1000_phy_regs *phy = &adapter->phy_regs; 4053 4054 if ((er32(STATUS) & E1000_STATUS_LU) && 4055 (adapter->hw.phy.media_type == e1000_media_type_copper)) { 4056 int ret_val; 4057 4058 ret_val = e1e_rphy(hw, PHY_CONTROL, &phy->bmcr); 4059 ret_val |= e1e_rphy(hw, PHY_STATUS, &phy->bmsr); 4060 ret_val |= e1e_rphy(hw, PHY_AUTONEG_ADV, &phy->advertise); 4061 ret_val |= e1e_rphy(hw, PHY_LP_ABILITY, &phy->lpa); 4062 ret_val |= e1e_rphy(hw, PHY_AUTONEG_EXP, &phy->expansion); 4063 ret_val |= e1e_rphy(hw, PHY_1000T_CTRL, &phy->ctrl1000); 4064 ret_val |= e1e_rphy(hw, PHY_1000T_STATUS, &phy->stat1000); 4065 ret_val |= e1e_rphy(hw, PHY_EXT_STATUS, &phy->estatus); 4066 if (ret_val) 4067 e_warn("Error reading PHY register\n"); 4068 } else { 4069 /* 4070 * Do not read PHY registers if link is not up 4071 * Set values to typical power-on defaults 4072 */ 4073 phy->bmcr = (BMCR_SPEED1000 | BMCR_ANENABLE | BMCR_FULLDPLX); 4074 phy->bmsr = (BMSR_100FULL | BMSR_100HALF | BMSR_10FULL | 4075 BMSR_10HALF | BMSR_ESTATEN | BMSR_ANEGCAPABLE | 4076 BMSR_ERCAP); 4077 phy->advertise = (ADVERTISE_PAUSE_ASYM | ADVERTISE_PAUSE_CAP | 4078 ADVERTISE_ALL | ADVERTISE_CSMA); 4079 phy->lpa = 0; 4080 phy->expansion = EXPANSION_ENABLENPAGE; 4081 phy->ctrl1000 = ADVERTISE_1000FULL; 4082 phy->stat1000 = 0; 4083 phy->estatus = (ESTATUS_1000_TFULL | ESTATUS_1000_THALF); 4084 } 4085} 4086 4087static void e1000_print_link_info(struct e1000_adapter *adapter) 4088{ 4089 struct e1000_hw *hw = &adapter->hw; 4090 u32 ctrl = er32(CTRL); 4091 4092 /* Link status message must follow this format for user tools */ 4093 printk(KERN_INFO "e1000e: %s NIC Link is Up %d Mbps %s, " 4094 "Flow Control: %s\n", 4095 adapter->netdev->name, 4096 adapter->link_speed, 4097 (adapter->link_duplex == FULL_DUPLEX) ? 4098 "Full Duplex" : "Half Duplex", 4099 ((ctrl & E1000_CTRL_TFCE) && (ctrl & E1000_CTRL_RFCE)) ? 4100 "Rx/Tx" : 4101 ((ctrl & E1000_CTRL_RFCE) ? "Rx" : 4102 ((ctrl & E1000_CTRL_TFCE) ? "Tx" : "None"))); 4103} 4104 4105static bool e1000e_has_link(struct e1000_adapter *adapter) 4106{ 4107 struct e1000_hw *hw = &adapter->hw; 4108 bool link_active = 0; 4109 s32 ret_val = 0; 4110 4111 /* 4112 * get_link_status is set on LSC (link status) interrupt or 4113 * Rx sequence error interrupt. get_link_status will stay 4114 * false until the check_for_link establishes link 4115 * for copper adapters ONLY 4116 */ 4117 switch (hw->phy.media_type) { 4118 case e1000_media_type_copper: 4119 if (hw->mac.get_link_status) { 4120 ret_val = hw->mac.ops.check_for_link(hw); 4121 link_active = !hw->mac.get_link_status; 4122 } else { 4123 link_active = 1; 4124 } 4125 break; 4126 case e1000_media_type_fiber: 4127 ret_val = hw->mac.ops.check_for_link(hw); 4128 link_active = !!(er32(STATUS) & E1000_STATUS_LU); 4129 break; 4130 case e1000_media_type_internal_serdes: 4131 ret_val = hw->mac.ops.check_for_link(hw); 4132 link_active = adapter->hw.mac.serdes_has_link; 4133 break; 4134 default: 4135 case e1000_media_type_unknown: 4136 break; 4137 } 4138 4139 if ((ret_val == E1000_ERR_PHY) && (hw->phy.type == e1000_phy_igp_3) && 4140 (er32(CTRL) & E1000_PHY_CTRL_GBE_DISABLE)) { 4141 /* See e1000_kmrn_lock_loss_workaround_ich8lan() */ 4142 e_info("Gigabit has been disabled, downgrading speed\n"); 4143 } 4144 4145 return link_active; 4146} 4147 4148static void e1000e_enable_receives(struct e1000_adapter *adapter) 4149{ 4150 /* make sure the receive unit is started */ 4151 if ((adapter->flags & FLAG_RX_NEEDS_RESTART) && 4152 (adapter->flags & FLAG_RX_RESTART_NOW)) { 4153 struct e1000_hw *hw = &adapter->hw; 4154 u32 rctl = er32(RCTL); 4155 ew32(RCTL, rctl | E1000_RCTL_EN); 4156 adapter->flags &= ~FLAG_RX_RESTART_NOW; 4157 } 4158} 4159 4160static void e1000e_check_82574_phy_workaround(struct e1000_adapter *adapter) 4161{ 4162 struct e1000_hw *hw = &adapter->hw; 4163 4164 /* 4165 * With 82574 controllers, PHY needs to be checked periodically 4166 * for hung state and reset, if two calls return true 4167 */ 4168 if (e1000_check_phy_82574(hw)) 4169 adapter->phy_hang_count++; 4170 else 4171 adapter->phy_hang_count = 0; 4172 4173 if (adapter->phy_hang_count > 1) { 4174 adapter->phy_hang_count = 0; 4175 schedule_work(&adapter->reset_task); 4176 } 4177} 4178 4179/** 4180 * e1000_watchdog - Timer Call-back 4181 * @data: pointer to adapter cast into an unsigned long 4182 **/ 4183static void e1000_watchdog(unsigned long data) 4184{ 4185 struct e1000_adapter *adapter = (struct e1000_adapter *) data; 4186 4187 /* Do the rest outside of interrupt context */ 4188 schedule_work(&adapter->watchdog_task); 4189 4190 /* TODO: make this use queue_delayed_work() */ 4191} 4192 4193static void e1000_watchdog_task(struct work_struct *work) 4194{ 4195 struct e1000_adapter *adapter = container_of(work, 4196 struct e1000_adapter, watchdog_task); 4197 struct net_device *netdev = adapter->netdev; 4198 struct e1000_mac_info *mac = &adapter->hw.mac; 4199 struct e1000_phy_info *phy = &adapter->hw.phy; 4200 struct e1000_ring *tx_ring = adapter->tx_ring; 4201 struct e1000_hw *hw = &adapter->hw; 4202 u32 link, tctl; 4203 4204 if (test_bit(__E1000_DOWN, &adapter->state)) 4205 return; 4206 4207 link = e1000e_has_link(adapter); 4208 if ((netif_carrier_ok(netdev)) && link) { 4209 /* Cancel scheduled suspend requests. */ 4210 pm_runtime_resume(netdev->dev.parent); 4211 4212 e1000e_enable_receives(adapter); 4213 goto link_up; 4214 } 4215 4216 if ((e1000e_enable_tx_pkt_filtering(hw)) && 4217 (adapter->mng_vlan_id != adapter->hw.mng_cookie.vlan_id)) 4218 e1000_update_mng_vlan(adapter); 4219 4220 if (link) { 4221 if (!netif_carrier_ok(netdev)) { 4222 bool txb2b = 1; 4223 4224 /* Cancel scheduled suspend requests. */ 4225 pm_runtime_resume(netdev->dev.parent); 4226 4227 /* update snapshot of PHY registers on LSC */ 4228 e1000_phy_read_status(adapter); 4229 mac->ops.get_link_up_info(&adapter->hw, 4230 &adapter->link_speed, 4231 &adapter->link_duplex); 4232 e1000_print_link_info(adapter); 4233 /* 4234 * On supported PHYs, check for duplex mismatch only 4235 * if link has autonegotiated at 10/100 half 4236 */ 4237 if ((hw->phy.type == e1000_phy_igp_3 || 4238 hw->phy.type == e1000_phy_bm) && 4239 (hw->mac.autoneg == true) && 4240 (adapter->link_speed == SPEED_10 || 4241 adapter->link_speed == SPEED_100) && 4242 (adapter->link_duplex == HALF_DUPLEX)) { 4243 u16 autoneg_exp; 4244 4245 e1e_rphy(hw, PHY_AUTONEG_EXP, &autoneg_exp); 4246 4247 if (!(autoneg_exp & NWAY_ER_LP_NWAY_CAPS)) 4248 e_info("Autonegotiated half duplex but" 4249 " link partner cannot autoneg. " 4250 " Try forcing full duplex if " 4251 "link gets many collisions.\n"); 4252 } 4253 4254 /* adjust timeout factor according to speed/duplex */ 4255 adapter->tx_timeout_factor = 1; 4256 switch (adapter->link_speed) { 4257 case SPEED_10: 4258 txb2b = 0; 4259 adapter->tx_timeout_factor = 16; 4260 break; 4261 case SPEED_100: 4262 txb2b = 0; 4263 adapter->tx_timeout_factor = 10; 4264 break; 4265 } 4266 4267 /* 4268 * workaround: re-program speed mode bit after 4269 * link-up event 4270 */ 4271 if ((adapter->flags & FLAG_TARC_SPEED_MODE_BIT) && 4272 !txb2b) { 4273 u32 tarc0; 4274 tarc0 = er32(TARC(0)); 4275 tarc0 &= ~SPEED_MODE_BIT; 4276 ew32(TARC(0), tarc0); 4277 } 4278 4279 /* 4280 * disable TSO for pcie and 10/100 speeds, to avoid 4281 * some hardware issues 4282 */ 4283 if (!(adapter->flags & FLAG_TSO_FORCE)) { 4284 switch (adapter->link_speed) { 4285 case SPEED_10: 4286 case SPEED_100: 4287 e_info("10/100 speed: disabling TSO\n"); 4288 netdev->features &= ~NETIF_F_TSO; 4289 netdev->features &= ~NETIF_F_TSO6; 4290 break; 4291 case SPEED_1000: 4292 netdev->features |= NETIF_F_TSO; 4293 netdev->features |= NETIF_F_TSO6; 4294 break; 4295 default: 4296 /* oops */ 4297 break; 4298 } 4299 } 4300 4301 /* 4302 * enable transmits in the hardware, need to do this 4303 * after setting TARC(0) 4304 */ 4305 tctl = er32(TCTL); 4306 tctl |= E1000_TCTL_EN; 4307 ew32(TCTL, tctl); 4308 4309 /* 4310 * Perform any post-link-up configuration before 4311 * reporting link up. 4312 */ 4313 if (phy->ops.cfg_on_link_up) 4314 phy->ops.cfg_on_link_up(hw); 4315 4316 netif_carrier_on(netdev); 4317 4318 if (!test_bit(__E1000_DOWN, &adapter->state)) 4319 mod_timer(&adapter->phy_info_timer, 4320 round_jiffies(jiffies + 2 * HZ)); 4321 } 4322 } else { 4323 if (netif_carrier_ok(netdev)) { 4324 adapter->link_speed = 0; 4325 adapter->link_duplex = 0; 4326 /* Link status message must follow this format */ 4327 printk(KERN_INFO "e1000e: %s NIC Link is Down\n", 4328 adapter->netdev->name); 4329 netif_carrier_off(netdev); 4330 if (!test_bit(__E1000_DOWN, &adapter->state)) 4331 mod_timer(&adapter->phy_info_timer, 4332 round_jiffies(jiffies + 2 * HZ)); 4333 4334 if (adapter->flags & FLAG_RX_NEEDS_RESTART) 4335 schedule_work(&adapter->reset_task); 4336 else 4337 pm_schedule_suspend(netdev->dev.parent, 4338 LINK_TIMEOUT); 4339 } 4340 } 4341 4342link_up: 4343 spin_lock(&adapter->stats64_lock); 4344 e1000e_update_stats(adapter); 4345 4346 mac->tx_packet_delta = adapter->stats.tpt - adapter->tpt_old; 4347 adapter->tpt_old = adapter->stats.tpt; 4348 mac->collision_delta = adapter->stats.colc - adapter->colc_old; 4349 adapter->colc_old = adapter->stats.colc; 4350 4351 adapter->gorc = adapter->stats.gorc - adapter->gorc_old; 4352 adapter->gorc_old = adapter->stats.gorc; 4353 adapter->gotc = adapter->stats.gotc - adapter->gotc_old; 4354 adapter->gotc_old = adapter->stats.gotc; 4355 spin_unlock(&adapter->stats64_lock); 4356 4357 e1000e_update_adaptive(&adapter->hw); 4358 4359 if (!netif_carrier_ok(netdev) && 4360 (e1000_desc_unused(tx_ring) + 1 < tx_ring->count)) { 4361 /* 4362 * We've lost link, so the controller stops DMA, 4363 * but we've got queued Tx work that's never going 4364 * to get done, so reset controller to flush Tx. 4365 * (Do the reset outside of interrupt context). 4366 */ 4367 schedule_work(&adapter->reset_task); 4368 /* return immediately since reset is imminent */ 4369 return; 4370 } 4371 4372 /* Simple mode for Interrupt Throttle Rate (ITR) */ 4373 if (adapter->itr_setting == 4) { 4374 /* 4375 * Symmetric Tx/Rx gets a reduced ITR=2000; 4376 * Total asymmetrical Tx or Rx gets ITR=8000; 4377 * everyone else is between 2000-8000. 4378 */ 4379 u32 goc = (adapter->gotc + adapter->gorc) / 10000; 4380 u32 dif = (adapter->gotc > adapter->gorc ? 4381 adapter->gotc - adapter->gorc : 4382 adapter->gorc - adapter->gotc) / 10000; 4383 u32 itr = goc > 0 ? (dif * 6000 / goc + 2000) : 8000; 4384 4385 ew32(ITR, 1000000000 / (itr * 256)); 4386 } 4387 4388 /* Cause software interrupt to ensure Rx ring is cleaned */ 4389 if (adapter->msix_entries) 4390 ew32(ICS, adapter->rx_ring->ims_val); 4391 else 4392 ew32(ICS, E1000_ICS_RXDMT0); 4393 4394 /* flush pending descriptors to memory before detecting Tx hang */ 4395 e1000e_flush_descriptors(adapter); 4396 4397 /* Force detection of hung controller every watchdog period */ 4398 adapter->detect_tx_hung = 1; 4399 4400 /* 4401 * With 82571 controllers, LAA may be overwritten due to controller 4402 * reset from the other port. Set the appropriate LAA in RAR[0] 4403 */ 4404 if (e1000e_get_laa_state_82571(hw)) 4405 e1000e_rar_set(hw, adapter->hw.mac.addr, 0); 4406 4407 if (adapter->flags2 & FLAG2_CHECK_PHY_HANG) 4408 e1000e_check_82574_phy_workaround(adapter); 4409 4410 /* Reset the timer */ 4411 if (!test_bit(__E1000_DOWN, &adapter->state)) 4412 mod_timer(&adapter->watchdog_timer, 4413 round_jiffies(jiffies + 2 * HZ)); 4414} 4415 4416#define E1000_TX_FLAGS_CSUM 0x00000001 4417#define E1000_TX_FLAGS_VLAN 0x00000002 4418#define E1000_TX_FLAGS_TSO 0x00000004 4419#define E1000_TX_FLAGS_IPV4 0x00000008 4420#define E1000_TX_FLAGS_VLAN_MASK 0xffff0000 4421#define E1000_TX_FLAGS_VLAN_SHIFT 16 4422 4423static int e1000_tso(struct e1000_adapter *adapter, 4424 struct sk_buff *skb) 4425{ 4426 struct e1000_ring *tx_ring = adapter->tx_ring; 4427 struct e1000_context_desc *context_desc; 4428 struct e1000_buffer *buffer_info; 4429 unsigned int i; 4430 u32 cmd_length = 0; 4431 u16 ipcse = 0, tucse, mss; 4432 u8 ipcss, ipcso, tucss, tucso, hdr_len; 4433 4434 if (!skb_is_gso(skb)) 4435 return 0; 4436 4437 if (skb_header_cloned(skb)) { 4438 int err = pskb_expand_head(skb, 0, 0, GFP_ATOMIC); 4439 4440 if (err) 4441 return err; 4442 } 4443 4444 hdr_len = skb_transport_offset(skb) + tcp_hdrlen(skb); 4445 mss = skb_shinfo(skb)->gso_size; 4446 if (skb->protocol == htons(ETH_P_IP)) { 4447 struct iphdr *iph = ip_hdr(skb); 4448 iph->tot_len = 0; 4449 iph->check = 0; 4450 tcp_hdr(skb)->check = ~csum_tcpudp_magic(iph->saddr, iph->daddr, 4451 0, IPPROTO_TCP, 0); 4452 cmd_length = E1000_TXD_CMD_IP; 4453 ipcse = skb_transport_offset(skb) - 1; 4454 } else if (skb_is_gso_v6(skb)) { 4455 ipv6_hdr(skb)->payload_len = 0; 4456 tcp_hdr(skb)->check = ~csum_ipv6_magic(&ipv6_hdr(skb)->saddr, 4457 &ipv6_hdr(skb)->daddr, 4458 0, IPPROTO_TCP, 0); 4459 ipcse = 0; 4460 } 4461 ipcss = skb_network_offset(skb); 4462 ipcso = (void *)&(ip_hdr(skb)->check) - (void *)skb->data; 4463 tucss = skb_transport_offset(skb); 4464 tucso = (void *)&(tcp_hdr(skb)->check) - (void *)skb->data; 4465 tucse = 0; 4466 4467 cmd_length |= (E1000_TXD_CMD_DEXT | E1000_TXD_CMD_TSE | 4468 E1000_TXD_CMD_TCP | (skb->len - (hdr_len))); 4469 4470 i = tx_ring->next_to_use; 4471 context_desc = E1000_CONTEXT_DESC(*tx_ring, i); 4472 buffer_info = &tx_ring->buffer_info[i]; 4473 4474 context_desc->lower_setup.ip_fields.ipcss = ipcss; 4475 context_desc->lower_setup.ip_fields.ipcso = ipcso; 4476 context_desc->lower_setup.ip_fields.ipcse = cpu_to_le16(ipcse); 4477 context_desc->upper_setup.tcp_fields.tucss = tucss; 4478 context_desc->upper_setup.tcp_fields.tucso = tucso; 4479 context_desc->upper_setup.tcp_fields.tucse = cpu_to_le16(tucse); 4480 context_desc->tcp_seg_setup.fields.mss = cpu_to_le16(mss); 4481 context_desc->tcp_seg_setup.fields.hdr_len = hdr_len; 4482 context_desc->cmd_and_length = cpu_to_le32(cmd_length); 4483 4484 buffer_info->time_stamp = jiffies; 4485 buffer_info->next_to_watch = i; 4486 4487 i++; 4488 if (i == tx_ring->count) 4489 i = 0; 4490 tx_ring->next_to_use = i; 4491 4492 return 1; 4493} 4494 4495static bool e1000_tx_csum(struct e1000_adapter *adapter, struct sk_buff *skb) 4496{ 4497 struct e1000_ring *tx_ring = adapter->tx_ring; 4498 struct e1000_context_desc *context_desc; 4499 struct e1000_buffer *buffer_info; 4500 unsigned int i; 4501 u8 css; 4502 u32 cmd_len = E1000_TXD_CMD_DEXT; 4503 __be16 protocol; 4504 4505 if (skb->ip_summed != CHECKSUM_PARTIAL) 4506 return 0; 4507 4508 if (skb->protocol == cpu_to_be16(ETH_P_8021Q)) 4509 protocol = vlan_eth_hdr(skb)->h_vlan_encapsulated_proto; 4510 else 4511 protocol = skb->protocol; 4512 4513 switch (protocol) { 4514 case cpu_to_be16(ETH_P_IP): 4515 if (ip_hdr(skb)->protocol == IPPROTO_TCP) 4516 cmd_len |= E1000_TXD_CMD_TCP; 4517 break; 4518 case cpu_to_be16(ETH_P_IPV6): 4519 /* XXX not handling all IPV6 headers */ 4520 if (ipv6_hdr(skb)->nexthdr == IPPROTO_TCP) 4521 cmd_len |= E1000_TXD_CMD_TCP; 4522 break; 4523 default: 4524 if (unlikely(net_ratelimit())) 4525 e_warn("checksum_partial proto=%x!\n", 4526 be16_to_cpu(protocol)); 4527 break; 4528 } 4529 4530 css = skb_checksum_start_offset(skb); 4531 4532 i = tx_ring->next_to_use; 4533 buffer_info = &tx_ring->buffer_info[i]; 4534 context_desc = E1000_CONTEXT_DESC(*tx_ring, i); 4535 4536 context_desc->lower_setup.ip_config = 0; 4537 context_desc->upper_setup.tcp_fields.tucss = css; 4538 context_desc->upper_setup.tcp_fields.tucso = 4539 css + skb->csum_offset; 4540 context_desc->upper_setup.tcp_fields.tucse = 0; 4541 context_desc->tcp_seg_setup.data = 0; 4542 context_desc->cmd_and_length = cpu_to_le32(cmd_len); 4543 4544 buffer_info->time_stamp = jiffies; 4545 buffer_info->next_to_watch = i; 4546 4547 i++; 4548 if (i == tx_ring->count) 4549 i = 0; 4550 tx_ring->next_to_use = i; 4551 4552 return 1; 4553} 4554 4555#define E1000_MAX_PER_TXD 8192 4556#define E1000_MAX_TXD_PWR 12 4557 4558static int e1000_tx_map(struct e1000_adapter *adapter, 4559 struct sk_buff *skb, unsigned int first, 4560 unsigned int max_per_txd, unsigned int nr_frags, 4561 unsigned int mss) 4562{ 4563 struct e1000_ring *tx_ring = adapter->tx_ring; 4564 struct pci_dev *pdev = adapter->pdev; 4565 struct e1000_buffer *buffer_info; 4566 unsigned int len = skb_headlen(skb); 4567 unsigned int offset = 0, size, count = 0, i; 4568 unsigned int f, bytecount, segs; 4569 4570 i = tx_ring->next_to_use; 4571 4572 while (len) { 4573 buffer_info = &tx_ring->buffer_info[i]; 4574 size = min(len, max_per_txd); 4575 4576 buffer_info->length = size; 4577 buffer_info->time_stamp = jiffies; 4578 buffer_info->next_to_watch = i; 4579 buffer_info->dma = dma_map_single(&pdev->dev, 4580 skb->data + offset, 4581 size, DMA_TO_DEVICE); 4582 buffer_info->mapped_as_page = false; 4583 if (dma_mapping_error(&pdev->dev, buffer_info->dma)) 4584 goto dma_error; 4585 4586 len -= size; 4587 offset += size; 4588 count++; 4589 4590 if (len) { 4591 i++; 4592 if (i == tx_ring->count) 4593 i = 0; 4594 } 4595 } 4596 4597 for (f = 0; f < nr_frags; f++) { 4598 struct skb_frag_struct *frag; 4599 4600 frag = &skb_shinfo(skb)->frags[f]; 4601 len = frag->size; 4602 offset = frag->page_offset; 4603 4604 while (len) { 4605 i++; 4606 if (i == tx_ring->count) 4607 i = 0; 4608 4609 buffer_info = &tx_ring->buffer_info[i]; 4610 size = min(len, max_per_txd); 4611 4612 buffer_info->length = size; 4613 buffer_info->time_stamp = jiffies; 4614 buffer_info->next_to_watch = i; 4615 buffer_info->dma = dma_map_page(&pdev->dev, frag->page, 4616 offset, size, 4617 DMA_TO_DEVICE); 4618 buffer_info->mapped_as_page = true; 4619 if (dma_mapping_error(&pdev->dev, buffer_info->dma)) 4620 goto dma_error; 4621 4622 len -= size; 4623 offset += size; 4624 count++; 4625 } 4626 } 4627 4628 segs = skb_shinfo(skb)->gso_segs ? : 1; 4629 /* multiply data chunks by size of headers */ 4630 bytecount = ((segs - 1) * skb_headlen(skb)) + skb->len; 4631 4632 tx_ring->buffer_info[i].skb = skb; 4633 tx_ring->buffer_info[i].segs = segs; 4634 tx_ring->buffer_info[i].bytecount = bytecount; 4635 tx_ring->buffer_info[first].next_to_watch = i; 4636 4637 return count; 4638 4639dma_error: 4640 dev_err(&pdev->dev, "Tx DMA map failed\n"); 4641 buffer_info->dma = 0; 4642 if (count) 4643 count--; 4644 4645 while (count--) { 4646 if (i == 0) 4647 i += tx_ring->count; 4648 i--; 4649 buffer_info = &tx_ring->buffer_info[i]; 4650 e1000_put_txbuf(adapter, buffer_info); 4651 } 4652 4653 return 0; 4654} 4655 4656static void e1000_tx_queue(struct e1000_adapter *adapter, 4657 int tx_flags, int count) 4658{ 4659 struct e1000_ring *tx_ring = adapter->tx_ring; 4660 struct e1000_tx_desc *tx_desc = NULL; 4661 struct e1000_buffer *buffer_info; 4662 u32 txd_upper = 0, txd_lower = E1000_TXD_CMD_IFCS; 4663 unsigned int i; 4664 4665 if (tx_flags & E1000_TX_FLAGS_TSO) { 4666 txd_lower |= E1000_TXD_CMD_DEXT | E1000_TXD_DTYP_D | 4667 E1000_TXD_CMD_TSE; 4668 txd_upper |= E1000_TXD_POPTS_TXSM << 8; 4669 4670 if (tx_flags & E1000_TX_FLAGS_IPV4) 4671 txd_upper |= E1000_TXD_POPTS_IXSM << 8; 4672 } 4673 4674 if (tx_flags & E1000_TX_FLAGS_CSUM) { 4675 txd_lower |= E1000_TXD_CMD_DEXT | E1000_TXD_DTYP_D; 4676 txd_upper |= E1000_TXD_POPTS_TXSM << 8; 4677 } 4678 4679 if (tx_flags & E1000_TX_FLAGS_VLAN) { 4680 txd_lower |= E1000_TXD_CMD_VLE; 4681 txd_upper |= (tx_flags & E1000_TX_FLAGS_VLAN_MASK); 4682 } 4683 4684 i = tx_ring->next_to_use; 4685 4686 do { 4687 buffer_info = &tx_ring->buffer_info[i]; 4688 tx_desc = E1000_TX_DESC(*tx_ring, i); 4689 tx_desc->buffer_addr = cpu_to_le64(buffer_info->dma); 4690 tx_desc->lower.data = 4691 cpu_to_le32(txd_lower | buffer_info->length); 4692 tx_desc->upper.data = cpu_to_le32(txd_upper); 4693 4694 i++; 4695 if (i == tx_ring->count) 4696 i = 0; 4697 } while (--count > 0); 4698 4699 tx_desc->lower.data |= cpu_to_le32(adapter->txd_cmd); 4700 4701 /* 4702 * Force memory writes to complete before letting h/w 4703 * know there are new descriptors to fetch. (Only 4704 * applicable for weak-ordered memory model archs, 4705 * such as IA-64). 4706 */ 4707 wmb(); 4708 4709 tx_ring->next_to_use = i; 4710 writel(i, adapter->hw.hw_addr + tx_ring->tail); 4711 /* 4712 * we need this if more than one processor can write to our tail 4713 * at a time, it synchronizes IO on IA64/Altix systems 4714 */ 4715 mmiowb(); 4716} 4717 4718#define MINIMUM_DHCP_PACKET_SIZE 282 4719static int e1000_transfer_dhcp_info(struct e1000_adapter *adapter, 4720 struct sk_buff *skb) 4721{ 4722 struct e1000_hw *hw = &adapter->hw; 4723 u16 length, offset; 4724 4725 if (vlan_tx_tag_present(skb)) { 4726 if (!((vlan_tx_tag_get(skb) == adapter->hw.mng_cookie.vlan_id) && 4727 (adapter->hw.mng_cookie.status & 4728 E1000_MNG_DHCP_COOKIE_STATUS_VLAN))) 4729 return 0; 4730 } 4731 4732 if (skb->len <= MINIMUM_DHCP_PACKET_SIZE) 4733 return 0; 4734 4735 if (((struct ethhdr *) skb->data)->h_proto != htons(ETH_P_IP)) 4736 return 0; 4737 4738 { 4739 const struct iphdr *ip = (struct iphdr *)((u8 *)skb->data+14); 4740 struct udphdr *udp; 4741 4742 if (ip->protocol != IPPROTO_UDP) 4743 return 0; 4744 4745 udp = (struct udphdr *)((u8 *)ip + (ip->ihl << 2)); 4746 if (ntohs(udp->dest) != 67) 4747 return 0; 4748 4749 offset = (u8 *)udp + 8 - skb->data; 4750 length = skb->len - offset; 4751 return e1000e_mng_write_dhcp_info(hw, (u8 *)udp + 8, length); 4752 } 4753 4754 return 0; 4755} 4756 4757static int __e1000_maybe_stop_tx(struct net_device *netdev, int size) 4758{ 4759 struct e1000_adapter *adapter = netdev_priv(netdev); 4760 4761 netif_stop_queue(netdev); 4762 /* 4763 * Herbert's original patch had: 4764 * smp_mb__after_netif_stop_queue(); 4765 * but since that doesn't exist yet, just open code it. 4766 */ 4767 smp_mb(); 4768 4769 /* 4770 * We need to check again in a case another CPU has just 4771 * made room available. 4772 */ 4773 if (e1000_desc_unused(adapter->tx_ring) < size) 4774 return -EBUSY; 4775 4776 /* A reprieve! */ 4777 netif_start_queue(netdev); 4778 ++adapter->restart_queue; 4779 return 0; 4780} 4781 4782static int e1000_maybe_stop_tx(struct net_device *netdev, int size) 4783{ 4784 struct e1000_adapter *adapter = netdev_priv(netdev); 4785 4786 if (e1000_desc_unused(adapter->tx_ring) >= size) 4787 return 0; 4788 return __e1000_maybe_stop_tx(netdev, size); 4789} 4790 4791#define TXD_USE_COUNT(S, X) (((S) >> (X)) + 1 ) 4792static netdev_tx_t e1000_xmit_frame(struct sk_buff *skb, 4793 struct net_device *netdev) 4794{ 4795 struct e1000_adapter *adapter = netdev_priv(netdev); 4796 struct e1000_ring *tx_ring = adapter->tx_ring; 4797 unsigned int first; 4798 unsigned int max_per_txd = E1000_MAX_PER_TXD; 4799 unsigned int max_txd_pwr = E1000_MAX_TXD_PWR; 4800 unsigned int tx_flags = 0; 4801 unsigned int len = skb_headlen(skb); 4802 unsigned int nr_frags; 4803 unsigned int mss; 4804 int count = 0; 4805 int tso; 4806 unsigned int f; 4807 4808 if (test_bit(__E1000_DOWN, &adapter->state)) { 4809 dev_kfree_skb_any(skb); 4810 return NETDEV_TX_OK; 4811 } 4812 4813 if (skb->len <= 0) { 4814 dev_kfree_skb_any(skb); 4815 return NETDEV_TX_OK; 4816 } 4817 4818 mss = skb_shinfo(skb)->gso_size; 4819 /* 4820 * The controller does a simple calculation to 4821 * make sure there is enough room in the FIFO before 4822 * initiating the DMA for each buffer. The calc is: 4823 * 4 = ceil(buffer len/mss). To make sure we don't 4824 * overrun the FIFO, adjust the max buffer len if mss 4825 * drops. 4826 */ 4827 if (mss) { 4828 u8 hdr_len; 4829 max_per_txd = min(mss << 2, max_per_txd); 4830 max_txd_pwr = fls(max_per_txd) - 1; 4831 4832 /* 4833 * TSO Workaround for 82571/2/3 Controllers -- if skb->data 4834 * points to just header, pull a few bytes of payload from 4835 * frags into skb->data 4836 */ 4837 hdr_len = skb_transport_offset(skb) + tcp_hdrlen(skb); 4838 /* 4839 * we do this workaround for ES2LAN, but it is un-necessary, 4840 * avoiding it could save a lot of cycles 4841 */ 4842 if (skb->data_len && (hdr_len == len)) { 4843 unsigned int pull_size; 4844 4845 pull_size = min((unsigned int)4, skb->data_len); 4846 if (!__pskb_pull_tail(skb, pull_size)) { 4847 e_err("__pskb_pull_tail failed.\n"); 4848 dev_kfree_skb_any(skb); 4849 return NETDEV_TX_OK; 4850 } 4851 len = skb_headlen(skb); 4852 } 4853 } 4854 4855 /* reserve a descriptor for the offload context */ 4856 if ((mss) || (skb->ip_summed == CHECKSUM_PARTIAL)) 4857 count++; 4858 count++; 4859 4860 count += TXD_USE_COUNT(len, max_txd_pwr); 4861 4862 nr_frags = skb_shinfo(skb)->nr_frags; 4863 for (f = 0; f < nr_frags; f++) 4864 count += TXD_USE_COUNT(skb_shinfo(skb)->frags[f].size, 4865 max_txd_pwr); 4866 4867 if (adapter->hw.mac.tx_pkt_filtering) 4868 e1000_transfer_dhcp_info(adapter, skb); 4869 4870 /* 4871 * need: count + 2 desc gap to keep tail from touching 4872 * head, otherwise try next time 4873 */ 4874 if (e1000_maybe_stop_tx(netdev, count + 2)) 4875 return NETDEV_TX_BUSY; 4876 4877 if (vlan_tx_tag_present(skb)) { 4878 tx_flags |= E1000_TX_FLAGS_VLAN; 4879 tx_flags |= (vlan_tx_tag_get(skb) << E1000_TX_FLAGS_VLAN_SHIFT); 4880 } 4881 4882 first = tx_ring->next_to_use; 4883 4884 tso = e1000_tso(adapter, skb); 4885 if (tso < 0) { 4886 dev_kfree_skb_any(skb); 4887 return NETDEV_TX_OK; 4888 } 4889 4890 if (tso) 4891 tx_flags |= E1000_TX_FLAGS_TSO; 4892 else if (e1000_tx_csum(adapter, skb)) 4893 tx_flags |= E1000_TX_FLAGS_CSUM; 4894 4895 /* 4896 * Old method was to assume IPv4 packet by default if TSO was enabled. 4897 * 82571 hardware supports TSO capabilities for IPv6 as well... 4898 * no longer assume, we must. 4899 */ 4900 if (skb->protocol == htons(ETH_P_IP)) 4901 tx_flags |= E1000_TX_FLAGS_IPV4; 4902 4903 /* if count is 0 then mapping error has occurred */ 4904 count = e1000_tx_map(adapter, skb, first, max_per_txd, nr_frags, mss); 4905 if (count) { 4906 e1000_tx_queue(adapter, tx_flags, count); 4907 /* Make sure there is space in the ring for the next send. */ 4908 e1000_maybe_stop_tx(netdev, MAX_SKB_FRAGS + 2); 4909 4910 } else { 4911 dev_kfree_skb_any(skb); 4912 tx_ring->buffer_info[first].time_stamp = 0; 4913 tx_ring->next_to_use = first; 4914 } 4915 4916 return NETDEV_TX_OK; 4917} 4918 4919/** 4920 * e1000_tx_timeout - Respond to a Tx Hang 4921 * @netdev: network interface device structure 4922 **/ 4923static void e1000_tx_timeout(struct net_device *netdev) 4924{ 4925 struct e1000_adapter *adapter = netdev_priv(netdev); 4926 4927 /* Do the reset outside of interrupt context */ 4928 adapter->tx_timeout_count++; 4929 schedule_work(&adapter->reset_task); 4930} 4931 4932static void e1000_reset_task(struct work_struct *work) 4933{ 4934 struct e1000_adapter *adapter; 4935 adapter = container_of(work, struct e1000_adapter, reset_task); 4936 4937 /* don't run the task if already down */ 4938 if (test_bit(__E1000_DOWN, &adapter->state)) 4939 return; 4940 4941 if (!((adapter->flags & FLAG_RX_NEEDS_RESTART) && 4942 (adapter->flags & FLAG_RX_RESTART_NOW))) { 4943 e1000e_dump(adapter); 4944 e_err("Reset adapter\n"); 4945 } 4946 e1000e_reinit_locked(adapter); 4947} 4948 4949/** 4950 * e1000_get_stats64 - Get System Network Statistics 4951 * @netdev: network interface device structure 4952 * @stats: rtnl_link_stats64 pointer 4953 * 4954 * Returns the address of the device statistics structure. 4955 **/ 4956struct rtnl_link_stats64 *e1000e_get_stats64(struct net_device *netdev, 4957 struct rtnl_link_stats64 *stats) 4958{ 4959 struct e1000_adapter *adapter = netdev_priv(netdev); 4960 4961 memset(stats, 0, sizeof(struct rtnl_link_stats64)); 4962 spin_lock(&adapter->stats64_lock); 4963 e1000e_update_stats(adapter); 4964 /* Fill out the OS statistics structure */ 4965 stats->rx_bytes = adapter->stats.gorc; 4966 stats->rx_packets = adapter->stats.gprc; 4967 stats->tx_bytes = adapter->stats.gotc; 4968 stats->tx_packets = adapter->stats.gptc; 4969 stats->multicast = adapter->stats.mprc; 4970 stats->collisions = adapter->stats.colc; 4971 4972 /* Rx Errors */ 4973 4974 /* 4975 * RLEC on some newer hardware can be incorrect so build 4976 * our own version based on RUC and ROC 4977 */ 4978 stats->rx_errors = adapter->stats.rxerrc + 4979 adapter->stats.crcerrs + adapter->stats.algnerrc + 4980 adapter->stats.ruc + adapter->stats.roc + 4981 adapter->stats.cexterr; 4982 stats->rx_length_errors = adapter->stats.ruc + 4983 adapter->stats.roc; 4984 stats->rx_crc_errors = adapter->stats.crcerrs; 4985 stats->rx_frame_errors = adapter->stats.algnerrc; 4986 stats->rx_missed_errors = adapter->stats.mpc; 4987 4988 /* Tx Errors */ 4989 stats->tx_errors = adapter->stats.ecol + 4990 adapter->stats.latecol; 4991 stats->tx_aborted_errors = adapter->stats.ecol; 4992 stats->tx_window_errors = adapter->stats.latecol; 4993 stats->tx_carrier_errors = adapter->stats.tncrs; 4994 4995 /* Tx Dropped needs to be maintained elsewhere */ 4996 4997 spin_unlock(&adapter->stats64_lock); 4998 return stats; 4999} 5000 5001/** 5002 * e1000_change_mtu - Change the Maximum Transfer Unit 5003 * @netdev: network interface device structure 5004 * @new_mtu: new value for maximum frame size 5005 * 5006 * Returns 0 on success, negative on failure 5007 **/ 5008static int e1000_change_mtu(struct net_device *netdev, int new_mtu) 5009{ 5010 struct e1000_adapter *adapter = netdev_priv(netdev); 5011 int max_frame = new_mtu + ETH_HLEN + ETH_FCS_LEN; 5012 5013 /* Jumbo frame support */ 5014 if ((max_frame > ETH_FRAME_LEN + ETH_FCS_LEN) && 5015 !(adapter->flags & FLAG_HAS_JUMBO_FRAMES)) { 5016 e_err("Jumbo Frames not supported.\n"); 5017 return -EINVAL; 5018 } 5019 5020 /* Supported frame sizes */ 5021 if ((new_mtu < ETH_ZLEN + ETH_FCS_LEN + VLAN_HLEN) || 5022 (max_frame > adapter->max_hw_frame_size)) { 5023 e_err("Unsupported MTU setting\n"); 5024 return -EINVAL; 5025 } 5026 5027 /* Jumbo frame workaround on 82579 requires CRC be stripped */ 5028 if ((adapter->hw.mac.type == e1000_pch2lan) && 5029 !(adapter->flags2 & FLAG2_CRC_STRIPPING) && 5030 (new_mtu > ETH_DATA_LEN)) { 5031 e_err("Jumbo Frames not supported on 82579 when CRC " 5032 "stripping is disabled.\n"); 5033 return -EINVAL; 5034 } 5035 5036 /* 82573 Errata 17 */ 5037 if (((adapter->hw.mac.type == e1000_82573) || 5038 (adapter->hw.mac.type == e1000_82574)) && 5039 (max_frame > ETH_FRAME_LEN + ETH_FCS_LEN)) { 5040 adapter->flags2 |= FLAG2_DISABLE_ASPM_L1; 5041 e1000e_disable_aspm(adapter->pdev, PCIE_LINK_STATE_L1); 5042 } 5043 5044 while (test_and_set_bit(__E1000_RESETTING, &adapter->state)) 5045 usleep_range(1000, 2000); 5046 /* e1000e_down -> e1000e_reset dependent on max_frame_size & mtu */ 5047 adapter->max_frame_size = max_frame; 5048 e_info("changing MTU from %d to %d\n", netdev->mtu, new_mtu); 5049 netdev->mtu = new_mtu; 5050 if (netif_running(netdev)) 5051 e1000e_down(adapter); 5052 5053 /* 5054 * NOTE: netdev_alloc_skb reserves 16 bytes, and typically NET_IP_ALIGN 5055 * means we reserve 2 more, this pushes us to allocate from the next 5056 * larger slab size. 5057 * i.e. RXBUFFER_2048 --> size-4096 slab 5058 * However with the new *_jumbo_rx* routines, jumbo receives will use 5059 * fragmented skbs 5060 */ 5061 5062 if (max_frame <= 2048) 5063 adapter->rx_buffer_len = 2048; 5064 else 5065 adapter->rx_buffer_len = 4096; 5066 5067 /* adjust allocation if LPE protects us, and we aren't using SBP */ 5068 if ((max_frame == ETH_FRAME_LEN + ETH_FCS_LEN) || 5069 (max_frame == ETH_FRAME_LEN + VLAN_HLEN + ETH_FCS_LEN)) 5070 adapter->rx_buffer_len = ETH_FRAME_LEN + VLAN_HLEN 5071 + ETH_FCS_LEN; 5072 5073 if (netif_running(netdev)) 5074 e1000e_up(adapter); 5075 else 5076 e1000e_reset(adapter); 5077 5078 clear_bit(__E1000_RESETTING, &adapter->state); 5079 5080 return 0; 5081} 5082 5083static int e1000_mii_ioctl(struct net_device *netdev, struct ifreq *ifr, 5084 int cmd) 5085{ 5086 struct e1000_adapter *adapter = netdev_priv(netdev); 5087 struct mii_ioctl_data *data = if_mii(ifr); 5088 5089 if (adapter->hw.phy.media_type != e1000_media_type_copper) 5090 return -EOPNOTSUPP; 5091 5092 switch (cmd) { 5093 case SIOCGMIIPHY: 5094 data->phy_id = adapter->hw.phy.addr; 5095 break; 5096 case SIOCGMIIREG: 5097 e1000_phy_read_status(adapter); 5098 5099 switch (data->reg_num & 0x1F) { 5100 case MII_BMCR: 5101 data->val_out = adapter->phy_regs.bmcr; 5102 break; 5103 case MII_BMSR: 5104 data->val_out = adapter->phy_regs.bmsr; 5105 break; 5106 case MII_PHYSID1: 5107 data->val_out = (adapter->hw.phy.id >> 16); 5108 break; 5109 case MII_PHYSID2: 5110 data->val_out = (adapter->hw.phy.id & 0xFFFF); 5111 break; 5112 case MII_ADVERTISE: 5113 data->val_out = adapter->phy_regs.advertise; 5114 break; 5115 case MII_LPA: 5116 data->val_out = adapter->phy_regs.lpa; 5117 break; 5118 case MII_EXPANSION: 5119 data->val_out = adapter->phy_regs.expansion; 5120 break; 5121 case MII_CTRL1000: 5122 data->val_out = adapter->phy_regs.ctrl1000; 5123 break; 5124 case MII_STAT1000: 5125 data->val_out = adapter->phy_regs.stat1000; 5126 break; 5127 case MII_ESTATUS: 5128 data->val_out = adapter->phy_regs.estatus; 5129 break; 5130 default: 5131 return -EIO; 5132 } 5133 break; 5134 case SIOCSMIIREG: 5135 default: 5136 return -EOPNOTSUPP; 5137 } 5138 return 0; 5139} 5140 5141static int e1000_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd) 5142{ 5143 switch (cmd) { 5144 case SIOCGMIIPHY: 5145 case SIOCGMIIREG: 5146 case SIOCSMIIREG: 5147 return e1000_mii_ioctl(netdev, ifr, cmd); 5148 default: 5149 return -EOPNOTSUPP; 5150 } 5151} 5152 5153static int e1000_init_phy_wakeup(struct e1000_adapter *adapter, u32 wufc) 5154{ 5155 struct e1000_hw *hw = &adapter->hw; 5156 u32 i, mac_reg; 5157 u16 phy_reg; 5158 int retval = 0; 5159 5160 /* copy MAC RARs to PHY RARs */ 5161 e1000_copy_rx_addrs_to_phy_ich8lan(hw); 5162 5163 /* copy MAC MTA to PHY MTA */ 5164 for (i = 0; i < adapter->hw.mac.mta_reg_count; i++) { 5165 mac_reg = E1000_READ_REG_ARRAY(hw, E1000_MTA, i); 5166 e1e_wphy(hw, BM_MTA(i), (u16)(mac_reg & 0xFFFF)); 5167 e1e_wphy(hw, BM_MTA(i) + 1, (u16)((mac_reg >> 16) & 0xFFFF)); 5168 } 5169 5170 /* configure PHY Rx Control register */ 5171 e1e_rphy(&adapter->hw, BM_RCTL, &phy_reg); 5172 mac_reg = er32(RCTL); 5173 if (mac_reg & E1000_RCTL_UPE) 5174 phy_reg |= BM_RCTL_UPE; 5175 if (mac_reg & E1000_RCTL_MPE) 5176 phy_reg |= BM_RCTL_MPE; 5177 phy_reg &= ~(BM_RCTL_MO_MASK); 5178 if (mac_reg & E1000_RCTL_MO_3) 5179 phy_reg |= (((mac_reg & E1000_RCTL_MO_3) >> E1000_RCTL_MO_SHIFT) 5180 << BM_RCTL_MO_SHIFT); 5181 if (mac_reg & E1000_RCTL_BAM) 5182 phy_reg |= BM_RCTL_BAM; 5183 if (mac_reg & E1000_RCTL_PMCF) 5184 phy_reg |= BM_RCTL_PMCF; 5185 mac_reg = er32(CTRL); 5186 if (mac_reg & E1000_CTRL_RFCE) 5187 phy_reg |= BM_RCTL_RFCE; 5188 e1e_wphy(&adapter->hw, BM_RCTL, phy_reg); 5189 5190 /* enable PHY wakeup in MAC register */ 5191 ew32(WUFC, wufc); 5192 ew32(WUC, E1000_WUC_PHY_WAKE | E1000_WUC_PME_EN); 5193 5194 /* configure and enable PHY wakeup in PHY registers */ 5195 e1e_wphy(&adapter->hw, BM_WUFC, wufc); 5196 e1e_wphy(&adapter->hw, BM_WUC, E1000_WUC_PME_EN); 5197 5198 /* activate PHY wakeup */ 5199 retval = hw->phy.ops.acquire(hw); 5200 if (retval) { 5201 e_err("Could not acquire PHY\n"); 5202 return retval; 5203 } 5204 e1000e_write_phy_reg_mdic(hw, IGP01E1000_PHY_PAGE_SELECT, 5205 (BM_WUC_ENABLE_PAGE << IGP_PAGE_SHIFT)); 5206 retval = e1000e_read_phy_reg_mdic(hw, BM_WUC_ENABLE_REG, &phy_reg); 5207 if (retval) { 5208 e_err("Could not read PHY page 769\n"); 5209 goto out; 5210 } 5211 phy_reg |= BM_WUC_ENABLE_BIT | BM_WUC_HOST_WU_BIT; 5212 retval = e1000e_write_phy_reg_mdic(hw, BM_WUC_ENABLE_REG, phy_reg); 5213 if (retval) 5214 e_err("Could not set PHY Host Wakeup bit\n"); 5215out: 5216 hw->phy.ops.release(hw); 5217 5218 return retval; 5219} 5220 5221static int __e1000_shutdown(struct pci_dev *pdev, bool *enable_wake, 5222 bool runtime) 5223{ 5224 struct net_device *netdev = pci_get_drvdata(pdev); 5225 struct e1000_adapter *adapter = netdev_priv(netdev); 5226 struct e1000_hw *hw = &adapter->hw; 5227 u32 ctrl, ctrl_ext, rctl, status; 5228 /* Runtime suspend should only enable wakeup for link changes */ 5229 u32 wufc = runtime ? E1000_WUFC_LNKC : adapter->wol; 5230 int retval = 0; 5231 5232 netif_device_detach(netdev); 5233 5234 if (netif_running(netdev)) { 5235 WARN_ON(test_bit(__E1000_RESETTING, &adapter->state)); 5236 e1000e_down(adapter); 5237 e1000_free_irq(adapter); 5238 } 5239 e1000e_reset_interrupt_capability(adapter); 5240 5241 retval = pci_save_state(pdev); 5242 if (retval) 5243 return retval; 5244 5245 status = er32(STATUS); 5246 if (status & E1000_STATUS_LU) 5247 wufc &= ~E1000_WUFC_LNKC; 5248 5249 if (wufc) { 5250 e1000_setup_rctl(adapter); 5251 e1000_set_multi(netdev); 5252 5253 /* turn on all-multi mode if wake on multicast is enabled */ 5254 if (wufc & E1000_WUFC_MC) { 5255 rctl = er32(RCTL); 5256 rctl |= E1000_RCTL_MPE; 5257 ew32(RCTL, rctl); 5258 } 5259 5260 ctrl = er32(CTRL); 5261 /* advertise wake from D3Cold */ 5262 #define E1000_CTRL_ADVD3WUC 0x00100000 5263 /* phy power management enable */ 5264 #define E1000_CTRL_EN_PHY_PWR_MGMT 0x00200000 5265 ctrl |= E1000_CTRL_ADVD3WUC; 5266 if (!(adapter->flags2 & FLAG2_HAS_PHY_WAKEUP)) 5267 ctrl |= E1000_CTRL_EN_PHY_PWR_MGMT; 5268 ew32(CTRL, ctrl); 5269 5270 if (adapter->hw.phy.media_type == e1000_media_type_fiber || 5271 adapter->hw.phy.media_type == 5272 e1000_media_type_internal_serdes) { 5273 /* keep the laser running in D3 */ 5274 ctrl_ext = er32(CTRL_EXT); 5275 ctrl_ext |= E1000_CTRL_EXT_SDP3_DATA; 5276 ew32(CTRL_EXT, ctrl_ext); 5277 } 5278 5279 if (adapter->flags & FLAG_IS_ICH) 5280 e1000e_disable_gig_wol_ich8lan(&adapter->hw); 5281 5282 /* Allow time for pending master requests to run */ 5283 e1000e_disable_pcie_master(&adapter->hw); 5284 5285 if (adapter->flags2 & FLAG2_HAS_PHY_WAKEUP) { 5286 /* enable wakeup by the PHY */ 5287 retval = e1000_init_phy_wakeup(adapter, wufc); 5288 if (retval) 5289 return retval; 5290 } else { 5291 /* enable wakeup by the MAC */ 5292 ew32(WUFC, wufc); 5293 ew32(WUC, E1000_WUC_PME_EN); 5294 } 5295 } else { 5296 ew32(WUC, 0); 5297 ew32(WUFC, 0); 5298 } 5299 5300 *enable_wake = !!wufc; 5301 5302 /* make sure adapter isn't asleep if manageability is enabled */ 5303 if ((adapter->flags & FLAG_MNG_PT_ENABLED) || 5304 (hw->mac.ops.check_mng_mode(hw))) 5305 *enable_wake = true; 5306 5307 if (adapter->hw.phy.type == e1000_phy_igp_3) 5308 e1000e_igp3_phy_powerdown_workaround_ich8lan(&adapter->hw); 5309 5310 /* 5311 * Release control of h/w to f/w. If f/w is AMT enabled, this 5312 * would have already happened in close and is redundant. 5313 */ 5314 e1000e_release_hw_control(adapter); 5315 5316 pci_disable_device(pdev); 5317 5318 return 0; 5319} 5320 5321static void e1000_power_off(struct pci_dev *pdev, bool sleep, bool wake) 5322{ 5323 if (sleep && wake) { 5324 pci_prepare_to_sleep(pdev); 5325 return; 5326 } 5327 5328 pci_wake_from_d3(pdev, wake); 5329 pci_set_power_state(pdev, PCI_D3hot); 5330} 5331 5332static void e1000_complete_shutdown(struct pci_dev *pdev, bool sleep, 5333 bool wake) 5334{ 5335 struct net_device *netdev = pci_get_drvdata(pdev); 5336 struct e1000_adapter *adapter = netdev_priv(netdev); 5337 5338 /* 5339 * The pci-e switch on some quad port adapters will report a 5340 * correctable error when the MAC transitions from D0 to D3. To 5341 * prevent this we need to mask off the correctable errors on the 5342 * downstream port of the pci-e switch. 5343 */ 5344 if (adapter->flags & FLAG_IS_QUAD_PORT) { 5345 struct pci_dev *us_dev = pdev->bus->self; 5346 int pos = pci_find_capability(us_dev, PCI_CAP_ID_EXP); 5347 u16 devctl; 5348 5349 pci_read_config_word(us_dev, pos + PCI_EXP_DEVCTL, &devctl); 5350 pci_write_config_word(us_dev, pos + PCI_EXP_DEVCTL, 5351 (devctl & ~PCI_EXP_DEVCTL_CERE)); 5352 5353 e1000_power_off(pdev, sleep, wake); 5354 5355 pci_write_config_word(us_dev, pos + PCI_EXP_DEVCTL, devctl); 5356 } else { 5357 e1000_power_off(pdev, sleep, wake); 5358 } 5359} 5360 5361#ifdef CONFIG_PCIEASPM 5362static void __e1000e_disable_aspm(struct pci_dev *pdev, u16 state) 5363{ 5364 pci_disable_link_state_locked(pdev, state); 5365} 5366#else 5367static void __e1000e_disable_aspm(struct pci_dev *pdev, u16 state) 5368{ 5369 int pos; 5370 u16 reg16; 5371 5372 /* 5373 * Both device and parent should have the same ASPM setting. 5374 * Disable ASPM in downstream component first and then upstream. 5375 */ 5376 pos = pci_pcie_cap(pdev); 5377 pci_read_config_word(pdev, pos + PCI_EXP_LNKCTL, &reg16); 5378 reg16 &= ~state; 5379 pci_write_config_word(pdev, pos + PCI_EXP_LNKCTL, reg16); 5380 5381 if (!pdev->bus->self) 5382 return; 5383 5384 pos = pci_pcie_cap(pdev->bus->self); 5385 pci_read_config_word(pdev->bus->self, pos + PCI_EXP_LNKCTL, &reg16); 5386 reg16 &= ~state; 5387 pci_write_config_word(pdev->bus->self, pos + PCI_EXP_LNKCTL, reg16); 5388} 5389#endif 5390static void e1000e_disable_aspm(struct pci_dev *pdev, u16 state) 5391{ 5392 dev_info(&pdev->dev, "Disabling ASPM %s %s\n", 5393 (state & PCIE_LINK_STATE_L0S) ? "L0s" : "", 5394 (state & PCIE_LINK_STATE_L1) ? "L1" : ""); 5395 5396 __e1000e_disable_aspm(pdev, state); 5397} 5398 5399#ifdef CONFIG_PM 5400static bool e1000e_pm_ready(struct e1000_adapter *adapter) 5401{ 5402 return !!adapter->tx_ring->buffer_info; 5403} 5404 5405static int __e1000_resume(struct pci_dev *pdev) 5406{ 5407 struct net_device *netdev = pci_get_drvdata(pdev); 5408 struct e1000_adapter *adapter = netdev_priv(netdev); 5409 struct e1000_hw *hw = &adapter->hw; 5410 u16 aspm_disable_flag = 0; 5411 u32 err; 5412 5413 if (adapter->flags2 & FLAG2_DISABLE_ASPM_L0S) 5414 aspm_disable_flag = PCIE_LINK_STATE_L0S; 5415 if (adapter->flags2 & FLAG2_DISABLE_ASPM_L1) 5416 aspm_disable_flag |= PCIE_LINK_STATE_L1; 5417 if (aspm_disable_flag) 5418 e1000e_disable_aspm(pdev, aspm_disable_flag); 5419 5420 pci_set_power_state(pdev, PCI_D0); 5421 pci_restore_state(pdev); 5422 pci_save_state(pdev); 5423 5424 e1000e_set_interrupt_capability(adapter); 5425 if (netif_running(netdev)) { 5426 err = e1000_request_irq(adapter); 5427 if (err) 5428 return err; 5429 } 5430 5431 e1000e_power_up_phy(adapter); 5432 5433 /* report the system wakeup cause from S3/S4 */ 5434 if (adapter->flags2 & FLAG2_HAS_PHY_WAKEUP) { 5435 u16 phy_data; 5436 5437 e1e_rphy(&adapter->hw, BM_WUS, &phy_data); 5438 if (phy_data) { 5439 e_info("PHY Wakeup cause - %s\n", 5440 phy_data & E1000_WUS_EX ? "Unicast Packet" : 5441 phy_data & E1000_WUS_MC ? "Multicast Packet" : 5442 phy_data & E1000_WUS_BC ? "Broadcast Packet" : 5443 phy_data & E1000_WUS_MAG ? "Magic Packet" : 5444 phy_data & E1000_WUS_LNKC ? "Link Status " 5445 " Change" : "other"); 5446 } 5447 e1e_wphy(&adapter->hw, BM_WUS, ~0); 5448 } else { 5449 u32 wus = er32(WUS); 5450 if (wus) { 5451 e_info("MAC Wakeup cause - %s\n", 5452 wus & E1000_WUS_EX ? "Unicast Packet" : 5453 wus & E1000_WUS_MC ? "Multicast Packet" : 5454 wus & E1000_WUS_BC ? "Broadcast Packet" : 5455 wus & E1000_WUS_MAG ? "Magic Packet" : 5456 wus & E1000_WUS_LNKC ? "Link Status Change" : 5457 "other"); 5458 } 5459 ew32(WUS, ~0); 5460 } 5461 5462 e1000e_reset(adapter); 5463 5464 e1000_init_manageability_pt(adapter); 5465 5466 if (netif_running(netdev)) 5467 e1000e_up(adapter); 5468 5469 netif_device_attach(netdev); 5470 5471 /* 5472 * If the controller has AMT, do not set DRV_LOAD until the interface 5473 * is up. For all other cases, let the f/w know that the h/w is now 5474 * under the control of the driver. 5475 */ 5476 if (!(adapter->flags & FLAG_HAS_AMT)) 5477 e1000e_get_hw_control(adapter); 5478 5479 return 0; 5480} 5481 5482#ifdef CONFIG_PM_SLEEP 5483static int e1000_suspend(struct device *dev) 5484{ 5485 struct pci_dev *pdev = to_pci_dev(dev); 5486 int retval; 5487 bool wake; 5488 5489 retval = __e1000_shutdown(pdev, &wake, false); 5490 if (!retval) 5491 e1000_complete_shutdown(pdev, true, wake); 5492 5493 return retval; 5494} 5495 5496static int e1000_resume(struct device *dev) 5497{ 5498 struct pci_dev *pdev = to_pci_dev(dev); 5499 struct net_device *netdev = pci_get_drvdata(pdev); 5500 struct e1000_adapter *adapter = netdev_priv(netdev); 5501 5502 if (e1000e_pm_ready(adapter)) 5503 adapter->idle_check = true; 5504 5505 return __e1000_resume(pdev); 5506} 5507#endif /* CONFIG_PM_SLEEP */ 5508 5509#ifdef CONFIG_PM_RUNTIME 5510static int e1000_runtime_suspend(struct device *dev) 5511{ 5512 struct pci_dev *pdev = to_pci_dev(dev); 5513 struct net_device *netdev = pci_get_drvdata(pdev); 5514 struct e1000_adapter *adapter = netdev_priv(netdev); 5515 5516 if (e1000e_pm_ready(adapter)) { 5517 bool wake; 5518 5519 __e1000_shutdown(pdev, &wake, true); 5520 } 5521 5522 return 0; 5523} 5524 5525static int e1000_idle(struct device *dev) 5526{ 5527 struct pci_dev *pdev = to_pci_dev(dev); 5528 struct net_device *netdev = pci_get_drvdata(pdev); 5529 struct e1000_adapter *adapter = netdev_priv(netdev); 5530 5531 if (!e1000e_pm_ready(adapter)) 5532 return 0; 5533 5534 if (adapter->idle_check) { 5535 adapter->idle_check = false; 5536 if (!e1000e_has_link(adapter)) 5537 pm_schedule_suspend(dev, MSEC_PER_SEC); 5538 } 5539 5540 return -EBUSY; 5541} 5542 5543static int e1000_runtime_resume(struct device *dev) 5544{ 5545 struct pci_dev *pdev = to_pci_dev(dev); 5546 struct net_device *netdev = pci_get_drvdata(pdev); 5547 struct e1000_adapter *adapter = netdev_priv(netdev); 5548 5549 if (!e1000e_pm_ready(adapter)) 5550 return 0; 5551 5552 adapter->idle_check = !dev->power.runtime_auto; 5553 return __e1000_resume(pdev); 5554} 5555#endif /* CONFIG_PM_RUNTIME */ 5556#endif /* CONFIG_PM */ 5557 5558static void e1000_shutdown(struct pci_dev *pdev) 5559{ 5560 bool wake = false; 5561 5562 __e1000_shutdown(pdev, &wake, false); 5563 5564 if (system_state == SYSTEM_POWER_OFF) 5565 e1000_complete_shutdown(pdev, false, wake); 5566} 5567 5568#ifdef CONFIG_NET_POLL_CONTROLLER 5569 5570static irqreturn_t e1000_intr_msix(int irq, void *data) 5571{ 5572 struct net_device *netdev = data; 5573 struct e1000_adapter *adapter = netdev_priv(netdev); 5574 5575 if (adapter->msix_entries) { 5576 int vector, msix_irq; 5577 5578 vector = 0; 5579 msix_irq = adapter->msix_entries[vector].vector; 5580 disable_irq(msix_irq); 5581 e1000_intr_msix_rx(msix_irq, netdev); 5582 enable_irq(msix_irq); 5583 5584 vector++; 5585 msix_irq = adapter->msix_entries[vector].vector; 5586 disable_irq(msix_irq); 5587 e1000_intr_msix_tx(msix_irq, netdev); 5588 enable_irq(msix_irq); 5589 5590 vector++; 5591 msix_irq = adapter->msix_entries[vector].vector; 5592 disable_irq(msix_irq); 5593 e1000_msix_other(msix_irq, netdev); 5594 enable_irq(msix_irq); 5595 } 5596 5597 return IRQ_HANDLED; 5598} 5599 5600/* 5601 * Polling 'interrupt' - used by things like netconsole to send skbs 5602 * without having to re-enable interrupts. It's not called while 5603 * the interrupt routine is executing. 5604 */ 5605static void e1000_netpoll(struct net_device *netdev) 5606{ 5607 struct e1000_adapter *adapter = netdev_priv(netdev); 5608 5609 switch (adapter->int_mode) { 5610 case E1000E_INT_MODE_MSIX: 5611 e1000_intr_msix(adapter->pdev->irq, netdev); 5612 break; 5613 case E1000E_INT_MODE_MSI: 5614 disable_irq(adapter->pdev->irq); 5615 e1000_intr_msi(adapter->pdev->irq, netdev); 5616 enable_irq(adapter->pdev->irq); 5617 break; 5618 default: /* E1000E_INT_MODE_LEGACY */ 5619 disable_irq(adapter->pdev->irq); 5620 e1000_intr(adapter->pdev->irq, netdev); 5621 enable_irq(adapter->pdev->irq); 5622 break; 5623 } 5624} 5625#endif 5626 5627/** 5628 * e1000_io_error_detected - called when PCI error is detected 5629 * @pdev: Pointer to PCI device 5630 * @state: The current pci connection state 5631 * 5632 * This function is called after a PCI bus error affecting 5633 * this device has been detected. 5634 */ 5635static pci_ers_result_t e1000_io_error_detected(struct pci_dev *pdev, 5636 pci_channel_state_t state) 5637{ 5638 struct net_device *netdev = pci_get_drvdata(pdev); 5639 struct e1000_adapter *adapter = netdev_priv(netdev); 5640 5641 netif_device_detach(netdev); 5642 5643 if (state == pci_channel_io_perm_failure) 5644 return PCI_ERS_RESULT_DISCONNECT; 5645 5646 if (netif_running(netdev)) 5647 e1000e_down(adapter); 5648 pci_disable_device(pdev); 5649 5650 /* Request a slot slot reset. */ 5651 return PCI_ERS_RESULT_NEED_RESET; 5652} 5653 5654/** 5655 * e1000_io_slot_reset - called after the pci bus has been reset. 5656 * @pdev: Pointer to PCI device 5657 * 5658 * Restart the card from scratch, as if from a cold-boot. Implementation 5659 * resembles the first-half of the e1000_resume routine. 5660 */ 5661static pci_ers_result_t e1000_io_slot_reset(struct pci_dev *pdev) 5662{ 5663 struct net_device *netdev = pci_get_drvdata(pdev); 5664 struct e1000_adapter *adapter = netdev_priv(netdev); 5665 struct e1000_hw *hw = &adapter->hw; 5666 u16 aspm_disable_flag = 0; 5667 int err; 5668 pci_ers_result_t result; 5669 5670 if (adapter->flags2 & FLAG2_DISABLE_ASPM_L0S) 5671 aspm_disable_flag = PCIE_LINK_STATE_L0S; 5672 if (adapter->flags2 & FLAG2_DISABLE_ASPM_L1) 5673 aspm_disable_flag |= PCIE_LINK_STATE_L1; 5674 if (aspm_disable_flag) 5675 e1000e_disable_aspm(pdev, aspm_disable_flag); 5676 5677 err = pci_enable_device_mem(pdev); 5678 if (err) { 5679 dev_err(&pdev->dev, 5680 "Cannot re-enable PCI device after reset.\n"); 5681 result = PCI_ERS_RESULT_DISCONNECT; 5682 } else { 5683 pci_set_master(pdev); 5684 pdev->state_saved = true; 5685 pci_restore_state(pdev); 5686 5687 pci_enable_wake(pdev, PCI_D3hot, 0); 5688 pci_enable_wake(pdev, PCI_D3cold, 0); 5689 5690 e1000e_reset(adapter); 5691 ew32(WUS, ~0); 5692 result = PCI_ERS_RESULT_RECOVERED; 5693 } 5694 5695 pci_cleanup_aer_uncorrect_error_status(pdev); 5696 5697 return result; 5698} 5699 5700/** 5701 * e1000_io_resume - called when traffic can start flowing again. 5702 * @pdev: Pointer to PCI device 5703 * 5704 * This callback is called when the error recovery driver tells us that 5705 * its OK to resume normal operation. Implementation resembles the 5706 * second-half of the e1000_resume routine. 5707 */ 5708static void e1000_io_resume(struct pci_dev *pdev) 5709{ 5710 struct net_device *netdev = pci_get_drvdata(pdev); 5711 struct e1000_adapter *adapter = netdev_priv(netdev); 5712 5713 e1000_init_manageability_pt(adapter); 5714 5715 if (netif_running(netdev)) { 5716 if (e1000e_up(adapter)) { 5717 dev_err(&pdev->dev, 5718 "can't bring device back up after reset\n"); 5719 return; 5720 } 5721 } 5722 5723 netif_device_attach(netdev); 5724 5725 /* 5726 * If the controller has AMT, do not set DRV_LOAD until the interface 5727 * is up. For all other cases, let the f/w know that the h/w is now 5728 * under the control of the driver. 5729 */ 5730 if (!(adapter->flags & FLAG_HAS_AMT)) 5731 e1000e_get_hw_control(adapter); 5732 5733} 5734 5735static void e1000_print_device_info(struct e1000_adapter *adapter) 5736{ 5737 struct e1000_hw *hw = &adapter->hw; 5738 struct net_device *netdev = adapter->netdev; 5739 u32 ret_val; 5740 u8 pba_str[E1000_PBANUM_LENGTH]; 5741 5742 /* print bus type/speed/width info */ 5743 e_info("(PCI Express:2.5GT/s:%s) %pM\n", 5744 /* bus width */ 5745 ((hw->bus.width == e1000_bus_width_pcie_x4) ? "Width x4" : 5746 "Width x1"), 5747 /* MAC address */ 5748 netdev->dev_addr); 5749 e_info("Intel(R) PRO/%s Network Connection\n", 5750 (hw->phy.type == e1000_phy_ife) ? "10/100" : "1000"); 5751 ret_val = e1000_read_pba_string_generic(hw, pba_str, 5752 E1000_PBANUM_LENGTH); 5753 if (ret_val) 5754 strncpy((char *)pba_str, "Unknown", sizeof(pba_str) - 1); 5755 e_info("MAC: %d, PHY: %d, PBA No: %s\n", 5756 hw->mac.type, hw->phy.type, pba_str); 5757} 5758 5759static void e1000_eeprom_checks(struct e1000_adapter *adapter) 5760{ 5761 struct e1000_hw *hw = &adapter->hw; 5762 int ret_val; 5763 u16 buf = 0; 5764 5765 if (hw->mac.type != e1000_82573) 5766 return; 5767 5768 ret_val = e1000_read_nvm(hw, NVM_INIT_CONTROL2_REG, 1, &buf); 5769 if (!ret_val && (!(le16_to_cpu(buf) & (1 << 0)))) { 5770 /* Deep Smart Power Down (DSPD) */ 5771 dev_warn(&adapter->pdev->dev, 5772 "Warning: detected DSPD enabled in EEPROM\n"); 5773 } 5774} 5775 5776static const struct net_device_ops e1000e_netdev_ops = { 5777 .ndo_open = e1000_open, 5778 .ndo_stop = e1000_close, 5779 .ndo_start_xmit = e1000_xmit_frame, 5780 .ndo_get_stats64 = e1000e_get_stats64, 5781 .ndo_set_multicast_list = e1000_set_multi, 5782 .ndo_set_mac_address = e1000_set_mac, 5783 .ndo_change_mtu = e1000_change_mtu, 5784 .ndo_do_ioctl = e1000_ioctl, 5785 .ndo_tx_timeout = e1000_tx_timeout, 5786 .ndo_validate_addr = eth_validate_addr, 5787 5788 .ndo_vlan_rx_add_vid = e1000_vlan_rx_add_vid, 5789 .ndo_vlan_rx_kill_vid = e1000_vlan_rx_kill_vid, 5790#ifdef CONFIG_NET_POLL_CONTROLLER 5791 .ndo_poll_controller = e1000_netpoll, 5792#endif 5793}; 5794 5795/** 5796 * e1000_probe - Device Initialization Routine 5797 * @pdev: PCI device information struct 5798 * @ent: entry in e1000_pci_tbl 5799 * 5800 * Returns 0 on success, negative on failure 5801 * 5802 * e1000_probe initializes an adapter identified by a pci_dev structure. 5803 * The OS initialization, configuring of the adapter private structure, 5804 * and a hardware reset occur. 5805 **/ 5806static int __devinit e1000_probe(struct pci_dev *pdev, 5807 const struct pci_device_id *ent) 5808{ 5809 struct net_device *netdev; 5810 struct e1000_adapter *adapter; 5811 struct e1000_hw *hw; 5812 const struct e1000_info *ei = e1000_info_tbl[ent->driver_data]; 5813 resource_size_t mmio_start, mmio_len; 5814 resource_size_t flash_start, flash_len; 5815 5816 static int cards_found; 5817 u16 aspm_disable_flag = 0; 5818 int i, err, pci_using_dac; 5819 u16 eeprom_data = 0; 5820 u16 eeprom_apme_mask = E1000_EEPROM_APME; 5821 5822 if (ei->flags2 & FLAG2_DISABLE_ASPM_L0S) 5823 aspm_disable_flag = PCIE_LINK_STATE_L0S; 5824 if (ei->flags2 & FLAG2_DISABLE_ASPM_L1) 5825 aspm_disable_flag |= PCIE_LINK_STATE_L1; 5826 if (aspm_disable_flag) 5827 e1000e_disable_aspm(pdev, aspm_disable_flag); 5828 5829 err = pci_enable_device_mem(pdev); 5830 if (err) 5831 return err; 5832 5833 pci_using_dac = 0; 5834 err = dma_set_mask(&pdev->dev, DMA_BIT_MASK(64)); 5835 if (!err) { 5836 err = dma_set_coherent_mask(&pdev->dev, DMA_BIT_MASK(64)); 5837 if (!err) 5838 pci_using_dac = 1; 5839 } else { 5840 err = dma_set_mask(&pdev->dev, DMA_BIT_MASK(32)); 5841 if (err) { 5842 err = dma_set_coherent_mask(&pdev->dev, 5843 DMA_BIT_MASK(32)); 5844 if (err) { 5845 dev_err(&pdev->dev, "No usable DMA " 5846 "configuration, aborting\n"); 5847 goto err_dma; 5848 } 5849 } 5850 } 5851 5852 err = pci_request_selected_regions_exclusive(pdev, 5853 pci_select_bars(pdev, IORESOURCE_MEM), 5854 e1000e_driver_name); 5855 if (err) 5856 goto err_pci_reg; 5857 5858 /* AER (Advanced Error Reporting) hooks */ 5859 pci_enable_pcie_error_reporting(pdev); 5860 5861 pci_set_master(pdev); 5862 /* PCI config space info */ 5863 err = pci_save_state(pdev); 5864 if (err) 5865 goto err_alloc_etherdev; 5866 5867 err = -ENOMEM; 5868 netdev = alloc_etherdev(sizeof(struct e1000_adapter)); 5869 if (!netdev) 5870 goto err_alloc_etherdev; 5871 5872 SET_NETDEV_DEV(netdev, &pdev->dev); 5873 5874 netdev->irq = pdev->irq; 5875 5876 pci_set_drvdata(pdev, netdev); 5877 adapter = netdev_priv(netdev); 5878 hw = &adapter->hw; 5879 adapter->netdev = netdev; 5880 adapter->pdev = pdev; 5881 adapter->ei = ei; 5882 adapter->pba = ei->pba; 5883 adapter->flags = ei->flags; 5884 adapter->flags2 = ei->flags2; 5885 adapter->hw.adapter = adapter; 5886 adapter->hw.mac.type = ei->mac; 5887 adapter->max_hw_frame_size = ei->max_hw_frame_size; 5888 adapter->msg_enable = (1 << NETIF_MSG_DRV | NETIF_MSG_PROBE) - 1; 5889 5890 mmio_start = pci_resource_start(pdev, 0); 5891 mmio_len = pci_resource_len(pdev, 0); 5892 5893 err = -EIO; 5894 adapter->hw.hw_addr = ioremap(mmio_start, mmio_len); 5895 if (!adapter->hw.hw_addr) 5896 goto err_ioremap; 5897 5898 if ((adapter->flags & FLAG_HAS_FLASH) && 5899 (pci_resource_flags(pdev, 1) & IORESOURCE_MEM)) { 5900 flash_start = pci_resource_start(pdev, 1); 5901 flash_len = pci_resource_len(pdev, 1); 5902 adapter->hw.flash_address = ioremap(flash_start, flash_len); 5903 if (!adapter->hw.flash_address) 5904 goto err_flashmap; 5905 } 5906 5907 /* construct the net_device struct */ 5908 netdev->netdev_ops = &e1000e_netdev_ops; 5909 e1000e_set_ethtool_ops(netdev); 5910 netdev->watchdog_timeo = 5 * HZ; 5911 netif_napi_add(netdev, &adapter->napi, e1000_clean, 64); 5912 strncpy(netdev->name, pci_name(pdev), sizeof(netdev->name) - 1); 5913 5914 netdev->mem_start = mmio_start; 5915 netdev->mem_end = mmio_start + mmio_len; 5916 5917 adapter->bd_number = cards_found++; 5918 5919 e1000e_check_options(adapter); 5920 5921 /* setup adapter struct */ 5922 err = e1000_sw_init(adapter); 5923 if (err) 5924 goto err_sw_init; 5925 5926 memcpy(&hw->mac.ops, ei->mac_ops, sizeof(hw->mac.ops)); 5927 memcpy(&hw->nvm.ops, ei->nvm_ops, sizeof(hw->nvm.ops)); 5928 memcpy(&hw->phy.ops, ei->phy_ops, sizeof(hw->phy.ops)); 5929 5930 err = ei->get_variants(adapter); 5931 if (err) 5932 goto err_hw_init; 5933 5934 if ((adapter->flags & FLAG_IS_ICH) && 5935 (adapter->flags & FLAG_READ_ONLY_NVM)) 5936 e1000e_write_protect_nvm_ich8lan(&adapter->hw); 5937 5938 hw->mac.ops.get_bus_info(&adapter->hw); 5939 5940 adapter->hw.phy.autoneg_wait_to_complete = 0; 5941 5942 /* Copper options */ 5943 if (adapter->hw.phy.media_type == e1000_media_type_copper) { 5944 adapter->hw.phy.mdix = AUTO_ALL_MODES; 5945 adapter->hw.phy.disable_polarity_correction = 0; 5946 adapter->hw.phy.ms_type = e1000_ms_hw_default; 5947 } 5948 5949 if (e1000_check_reset_block(&adapter->hw)) 5950 e_info("PHY reset is blocked due to SOL/IDER session.\n"); 5951 5952 netdev->features = NETIF_F_SG | 5953 NETIF_F_HW_CSUM | 5954 NETIF_F_HW_VLAN_TX | 5955 NETIF_F_HW_VLAN_RX; 5956 5957 if (adapter->flags & FLAG_HAS_HW_VLAN_FILTER) 5958 netdev->features |= NETIF_F_HW_VLAN_FILTER; 5959 5960 netdev->features |= NETIF_F_TSO; 5961 netdev->features |= NETIF_F_TSO6; 5962 5963 netdev->vlan_features |= NETIF_F_TSO; 5964 netdev->vlan_features |= NETIF_F_TSO6; 5965 netdev->vlan_features |= NETIF_F_HW_CSUM; 5966 netdev->vlan_features |= NETIF_F_SG; 5967 5968 if (pci_using_dac) { 5969 netdev->features |= NETIF_F_HIGHDMA; 5970 netdev->vlan_features |= NETIF_F_HIGHDMA; 5971 } 5972 5973 if (e1000e_enable_mng_pass_thru(&adapter->hw)) 5974 adapter->flags |= FLAG_MNG_PT_ENABLED; 5975 5976 /* 5977 * before reading the NVM, reset the controller to 5978 * put the device in a known good starting state 5979 */ 5980 adapter->hw.mac.ops.reset_hw(&adapter->hw); 5981 5982 /* 5983 * systems with ASPM and others may see the checksum fail on the first 5984 * attempt. Let's give it a few tries 5985 */ 5986 for (i = 0;; i++) { 5987 if (e1000_validate_nvm_checksum(&adapter->hw) >= 0) 5988 break; 5989 if (i == 2) { 5990 e_err("The NVM Checksum Is Not Valid\n"); 5991 err = -EIO; 5992 goto err_eeprom; 5993 } 5994 } 5995 5996 e1000_eeprom_checks(adapter); 5997 5998 /* copy the MAC address */ 5999 if (e1000e_read_mac_addr(&adapter->hw)) 6000 e_err("NVM Read Error while reading MAC address\n"); 6001 6002 memcpy(netdev->dev_addr, adapter->hw.mac.addr, netdev->addr_len); 6003 memcpy(netdev->perm_addr, adapter->hw.mac.addr, netdev->addr_len); 6004 6005 if (!is_valid_ether_addr(netdev->perm_addr)) { 6006 e_err("Invalid MAC Address: %pM\n", netdev->perm_addr); 6007 err = -EIO; 6008 goto err_eeprom; 6009 } 6010 6011 init_timer(&adapter->watchdog_timer); 6012 adapter->watchdog_timer.function = e1000_watchdog; 6013 adapter->watchdog_timer.data = (unsigned long) adapter; 6014 6015 init_timer(&adapter->phy_info_timer); 6016 adapter->phy_info_timer.function = e1000_update_phy_info; 6017 adapter->phy_info_timer.data = (unsigned long) adapter; 6018 6019 INIT_WORK(&adapter->reset_task, e1000_reset_task); 6020 INIT_WORK(&adapter->watchdog_task, e1000_watchdog_task); 6021 INIT_WORK(&adapter->downshift_task, e1000e_downshift_workaround); 6022 INIT_WORK(&adapter->update_phy_task, e1000e_update_phy_task); 6023 INIT_WORK(&adapter->print_hang_task, e1000_print_hw_hang); 6024 6025 /* Initialize link parameters. User can change them with ethtool */ 6026 adapter->hw.mac.autoneg = 1; 6027 adapter->fc_autoneg = 1; 6028 adapter->hw.fc.requested_mode = e1000_fc_default; 6029 adapter->hw.fc.current_mode = e1000_fc_default; 6030 adapter->hw.phy.autoneg_advertised = 0x2f; 6031 6032 /* ring size defaults */ 6033 adapter->rx_ring->count = 256; 6034 adapter->tx_ring->count = 256; 6035 6036 /* 6037 * Initial Wake on LAN setting - If APM wake is enabled in 6038 * the EEPROM, enable the ACPI Magic Packet filter 6039 */ 6040 if (adapter->flags & FLAG_APME_IN_WUC) { 6041 /* APME bit in EEPROM is mapped to WUC.APME */ 6042 eeprom_data = er32(WUC); 6043 eeprom_apme_mask = E1000_WUC_APME; 6044 if ((hw->mac.type > e1000_ich10lan) && 6045 (eeprom_data & E1000_WUC_PHY_WAKE)) 6046 adapter->flags2 |= FLAG2_HAS_PHY_WAKEUP; 6047 } else if (adapter->flags & FLAG_APME_IN_CTRL3) { 6048 if (adapter->flags & FLAG_APME_CHECK_PORT_B && 6049 (adapter->hw.bus.func == 1)) 6050 e1000_read_nvm(&adapter->hw, 6051 NVM_INIT_CONTROL3_PORT_B, 1, &eeprom_data); 6052 else 6053 e1000_read_nvm(&adapter->hw, 6054 NVM_INIT_CONTROL3_PORT_A, 1, &eeprom_data); 6055 } 6056 6057 /* fetch WoL from EEPROM */ 6058 if (eeprom_data & eeprom_apme_mask) 6059 adapter->eeprom_wol |= E1000_WUFC_MAG; 6060 6061 /* 6062 * now that we have the eeprom settings, apply the special cases 6063 * where the eeprom may be wrong or the board simply won't support 6064 * wake on lan on a particular port 6065 */ 6066 if (!(adapter->flags & FLAG_HAS_WOL)) 6067 adapter->eeprom_wol = 0; 6068 6069 /* initialize the wol settings based on the eeprom settings */ 6070 adapter->wol = adapter->eeprom_wol; 6071 device_set_wakeup_enable(&adapter->pdev->dev, adapter->wol); 6072 6073 /* save off EEPROM version number */ 6074 e1000_read_nvm(&adapter->hw, 5, 1, &adapter->eeprom_vers); 6075 6076 /* reset the hardware with the new settings */ 6077 e1000e_reset(adapter); 6078 6079 /* 6080 * If the controller has AMT, do not set DRV_LOAD until the interface 6081 * is up. For all other cases, let the f/w know that the h/w is now 6082 * under the control of the driver. 6083 */ 6084 if (!(adapter->flags & FLAG_HAS_AMT)) 6085 e1000e_get_hw_control(adapter); 6086 6087 strncpy(netdev->name, "eth%d", sizeof(netdev->name) - 1); 6088 err = register_netdev(netdev); 6089 if (err) 6090 goto err_register; 6091 6092 /* carrier off reporting is important to ethtool even BEFORE open */ 6093 netif_carrier_off(netdev); 6094 6095 e1000_print_device_info(adapter); 6096 6097 if (pci_dev_run_wake(pdev)) 6098 pm_runtime_put_noidle(&pdev->dev); 6099 6100 return 0; 6101 6102err_register: 6103 if (!(adapter->flags & FLAG_HAS_AMT)) 6104 e1000e_release_hw_control(adapter); 6105err_eeprom: 6106 if (!e1000_check_reset_block(&adapter->hw)) 6107 e1000_phy_hw_reset(&adapter->hw); 6108err_hw_init: 6109 kfree(adapter->tx_ring); 6110 kfree(adapter->rx_ring); 6111err_sw_init: 6112 if (adapter->hw.flash_address) 6113 iounmap(adapter->hw.flash_address); 6114 e1000e_reset_interrupt_capability(adapter); 6115err_flashmap: 6116 iounmap(adapter->hw.hw_addr); 6117err_ioremap: 6118 free_netdev(netdev); 6119err_alloc_etherdev: 6120 pci_release_selected_regions(pdev, 6121 pci_select_bars(pdev, IORESOURCE_MEM)); 6122err_pci_reg: 6123err_dma: 6124 pci_disable_device(pdev); 6125 return err; 6126} 6127 6128/** 6129 * e1000_remove - Device Removal Routine 6130 * @pdev: PCI device information struct 6131 * 6132 * e1000_remove is called by the PCI subsystem to alert the driver 6133 * that it should release a PCI device. The could be caused by a 6134 * Hot-Plug event, or because the driver is going to be removed from 6135 * memory. 6136 **/ 6137static void __devexit e1000_remove(struct pci_dev *pdev) 6138{ 6139 struct net_device *netdev = pci_get_drvdata(pdev); 6140 struct e1000_adapter *adapter = netdev_priv(netdev); 6141 bool down = test_bit(__E1000_DOWN, &adapter->state); 6142 6143 /* 6144 * The timers may be rescheduled, so explicitly disable them 6145 * from being rescheduled. 6146 */ 6147 if (!down) 6148 set_bit(__E1000_DOWN, &adapter->state); 6149 del_timer_sync(&adapter->watchdog_timer); 6150 del_timer_sync(&adapter->phy_info_timer); 6151 6152 cancel_work_sync(&adapter->reset_task); 6153 cancel_work_sync(&adapter->watchdog_task); 6154 cancel_work_sync(&adapter->downshift_task); 6155 cancel_work_sync(&adapter->update_phy_task); 6156 cancel_work_sync(&adapter->print_hang_task); 6157 6158 if (!(netdev->flags & IFF_UP)) 6159 e1000_power_down_phy(adapter); 6160 6161 /* Don't lie to e1000_close() down the road. */ 6162 if (!down) 6163 clear_bit(__E1000_DOWN, &adapter->state); 6164 unregister_netdev(netdev); 6165 6166 if (pci_dev_run_wake(pdev)) 6167 pm_runtime_get_noresume(&pdev->dev); 6168 6169 /* 6170 * Release control of h/w to f/w. If f/w is AMT enabled, this 6171 * would have already happened in close and is redundant. 6172 */ 6173 e1000e_release_hw_control(adapter); 6174 6175 e1000e_reset_interrupt_capability(adapter); 6176 kfree(adapter->tx_ring); 6177 kfree(adapter->rx_ring); 6178 6179 iounmap(adapter->hw.hw_addr); 6180 if (adapter->hw.flash_address) 6181 iounmap(adapter->hw.flash_address); 6182 pci_release_selected_regions(pdev, 6183 pci_select_bars(pdev, IORESOURCE_MEM)); 6184 6185 free_netdev(netdev); 6186 6187 /* AER disable */ 6188 pci_disable_pcie_error_reporting(pdev); 6189 6190 pci_disable_device(pdev); 6191} 6192 6193/* PCI Error Recovery (ERS) */ 6194static struct pci_error_handlers e1000_err_handler = { 6195 .error_detected = e1000_io_error_detected, 6196 .slot_reset = e1000_io_slot_reset, 6197 .resume = e1000_io_resume, 6198}; 6199 6200static DEFINE_PCI_DEVICE_TABLE(e1000_pci_tbl) = { 6201 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82571EB_COPPER), board_82571 }, 6202 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82571EB_FIBER), board_82571 }, 6203 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82571EB_QUAD_COPPER), board_82571 }, 6204 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82571EB_QUAD_COPPER_LP), board_82571 }, 6205 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82571EB_QUAD_FIBER), board_82571 }, 6206 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82571EB_SERDES), board_82571 }, 6207 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82571EB_SERDES_DUAL), board_82571 }, 6208 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82571EB_SERDES_QUAD), board_82571 }, 6209 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82571PT_QUAD_COPPER), board_82571 }, 6210 6211 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82572EI), board_82572 }, 6212 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82572EI_COPPER), board_82572 }, 6213 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82572EI_FIBER), board_82572 }, 6214 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82572EI_SERDES), board_82572 }, 6215 6216 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82573E), board_82573 }, 6217 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82573E_IAMT), board_82573 }, 6218 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82573L), board_82573 }, 6219 6220 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82574L), board_82574 }, 6221 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82574LA), board_82574 }, 6222 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82583V), board_82583 }, 6223 6224 { PCI_VDEVICE(INTEL, E1000_DEV_ID_80003ES2LAN_COPPER_DPT), 6225 board_80003es2lan }, 6226 { PCI_VDEVICE(INTEL, E1000_DEV_ID_80003ES2LAN_COPPER_SPT), 6227 board_80003es2lan }, 6228 { PCI_VDEVICE(INTEL, E1000_DEV_ID_80003ES2LAN_SERDES_DPT), 6229 board_80003es2lan }, 6230 { PCI_VDEVICE(INTEL, E1000_DEV_ID_80003ES2LAN_SERDES_SPT), 6231 board_80003es2lan }, 6232 6233 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH8_IFE), board_ich8lan }, 6234 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH8_IFE_G), board_ich8lan }, 6235 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH8_IFE_GT), board_ich8lan }, 6236 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH8_IGP_AMT), board_ich8lan }, 6237 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH8_IGP_C), board_ich8lan }, 6238 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH8_IGP_M), board_ich8lan }, 6239 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH8_IGP_M_AMT), board_ich8lan }, 6240 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH8_82567V_3), board_ich8lan }, 6241 6242 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH9_IFE), board_ich9lan }, 6243 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH9_IFE_G), board_ich9lan }, 6244 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH9_IFE_GT), board_ich9lan }, 6245 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH9_IGP_AMT), board_ich9lan }, 6246 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH9_IGP_C), board_ich9lan }, 6247 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH9_BM), board_ich9lan }, 6248 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH9_IGP_M), board_ich9lan }, 6249 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH9_IGP_M_AMT), board_ich9lan }, 6250 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH9_IGP_M_V), board_ich9lan }, 6251 6252 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH10_R_BM_LM), board_ich9lan }, 6253 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH10_R_BM_LF), board_ich9lan }, 6254 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH10_R_BM_V), board_ich9lan }, 6255 6256 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH10_D_BM_LM), board_ich10lan }, 6257 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH10_D_BM_LF), board_ich10lan }, 6258 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH10_D_BM_V), board_ich10lan }, 6259 6260 { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_M_HV_LM), board_pchlan }, 6261 { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_M_HV_LC), board_pchlan }, 6262 { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_D_HV_DM), board_pchlan }, 6263 { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_D_HV_DC), board_pchlan }, 6264 6265 { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH2_LV_LM), board_pch2lan }, 6266 { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH2_LV_V), board_pch2lan }, 6267 6268 { } /* terminate list */ 6269}; 6270MODULE_DEVICE_TABLE(pci, e1000_pci_tbl); 6271 6272#ifdef CONFIG_PM 6273static const struct dev_pm_ops e1000_pm_ops = { 6274 SET_SYSTEM_SLEEP_PM_OPS(e1000_suspend, e1000_resume) 6275 SET_RUNTIME_PM_OPS(e1000_runtime_suspend, 6276 e1000_runtime_resume, e1000_idle) 6277}; 6278#endif 6279 6280/* PCI Device API Driver */ 6281static struct pci_driver e1000_driver = { 6282 .name = e1000e_driver_name, 6283 .id_table = e1000_pci_tbl, 6284 .probe = e1000_probe, 6285 .remove = __devexit_p(e1000_remove), 6286#ifdef CONFIG_PM 6287 .driver.pm = &e1000_pm_ops, 6288#endif 6289 .shutdown = e1000_shutdown, 6290 .err_handler = &e1000_err_handler 6291}; 6292 6293/** 6294 * e1000_init_module - Driver Registration Routine 6295 * 6296 * e1000_init_module is the first routine called when the driver is 6297 * loaded. All it does is register with the PCI subsystem. 6298 **/ 6299static int __init e1000_init_module(void) 6300{ 6301 int ret; 6302 pr_info("Intel(R) PRO/1000 Network Driver - %s\n", 6303 e1000e_driver_version); 6304 pr_info("Copyright(c) 1999 - 2011 Intel Corporation.\n"); 6305 ret = pci_register_driver(&e1000_driver); 6306 6307 return ret; 6308} 6309module_init(e1000_init_module); 6310 6311/** 6312 * e1000_exit_module - Driver Exit Cleanup Routine 6313 * 6314 * e1000_exit_module is called just before the driver is removed 6315 * from memory. 6316 **/ 6317static void __exit e1000_exit_module(void) 6318{ 6319 pci_unregister_driver(&e1000_driver); 6320} 6321module_exit(e1000_exit_module); 6322 6323 6324MODULE_AUTHOR("Intel Corporation, <linux.nics@intel.com>"); 6325MODULE_DESCRIPTION("Intel(R) PRO/1000 Network Driver"); 6326MODULE_LICENSE("GPL"); 6327MODULE_VERSION(DRV_VERSION); 6328 6329/* e1000_main.c */