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1/* 2 * Lance ethernet driver for the MIPS processor based 3 * DECstation family 4 * 5 * 6 * adopted from sunlance.c by Richard van den Berg 7 * 8 * Copyright (C) 2002, 2003, 2005, 2006 Maciej W. Rozycki 9 * 10 * additional sources: 11 * - PMAD-AA TURBOchannel Ethernet Module Functional Specification, 12 * Revision 1.2 13 * 14 * History: 15 * 16 * v0.001: The kernel accepts the code and it shows the hardware address. 17 * 18 * v0.002: Removed most sparc stuff, left only some module and dma stuff. 19 * 20 * v0.003: Enhanced base address calculation from proposals by 21 * Harald Koerfgen and Thomas Riemer. 22 * 23 * v0.004: lance-regs is pointing at the right addresses, added prom 24 * check. First start of address mapping and DMA. 25 * 26 * v0.005: started to play around with LANCE-DMA. This driver will not 27 * work for non IOASIC lances. HK 28 * 29 * v0.006: added pointer arrays to lance_private and setup routine for 30 * them in dec_lance_init. HK 31 * 32 * v0.007: Big shit. The LANCE seems to use a different DMA mechanism to 33 * access the init block. This looks like one (short) word at a 34 * time, but the smallest amount the IOASIC can transfer is a 35 * (long) word. So we have a 2-2 padding here. Changed 36 * lance_init_block accordingly. The 16-16 padding for the buffers 37 * seems to be correct. HK 38 * 39 * v0.008: mods to make PMAX_LANCE work. 01/09/1999 triemer 40 * 41 * v0.009: Module support fixes, multiple interfaces support, various 42 * bits. macro 43 * 44 * v0.010: Fixes for the PMAD mapping of the LANCE buffer and for the 45 * PMAX requirement to only use halfword accesses to the 46 * buffer. macro 47 * 48 * v0.011: Converted the PMAD to the driver model. macro 49 */ 50 51#include <linux/crc32.h> 52#include <linux/delay.h> 53#include <linux/errno.h> 54#include <linux/if_ether.h> 55#include <linux/init.h> 56#include <linux/kernel.h> 57#include <linux/module.h> 58#include <linux/netdevice.h> 59#include <linux/etherdevice.h> 60#include <linux/spinlock.h> 61#include <linux/stddef.h> 62#include <linux/string.h> 63#include <linux/tc.h> 64#include <linux/types.h> 65 66#include <asm/addrspace.h> 67#include <asm/system.h> 68 69#include <asm/dec/interrupts.h> 70#include <asm/dec/ioasic.h> 71#include <asm/dec/ioasic_addrs.h> 72#include <asm/dec/kn01.h> 73#include <asm/dec/machtype.h> 74#include <asm/dec/system.h> 75 76static char version[] __devinitdata = 77"declance.c: v0.011 by Linux MIPS DECstation task force\n"; 78 79MODULE_AUTHOR("Linux MIPS DECstation task force"); 80MODULE_DESCRIPTION("DEC LANCE (DECstation onboard, PMAD-xx) driver"); 81MODULE_LICENSE("GPL"); 82 83#define __unused __attribute__ ((unused)) 84 85/* 86 * card types 87 */ 88#define ASIC_LANCE 1 89#define PMAD_LANCE 2 90#define PMAX_LANCE 3 91 92 93#define LE_CSR0 0 94#define LE_CSR1 1 95#define LE_CSR2 2 96#define LE_CSR3 3 97 98#define LE_MO_PROM 0x8000 /* Enable promiscuous mode */ 99 100#define LE_C0_ERR 0x8000 /* Error: set if BAB, SQE, MISS or ME is set */ 101#define LE_C0_BABL 0x4000 /* BAB: Babble: tx timeout. */ 102#define LE_C0_CERR 0x2000 /* SQE: Signal quality error */ 103#define LE_C0_MISS 0x1000 /* MISS: Missed a packet */ 104#define LE_C0_MERR 0x0800 /* ME: Memory error */ 105#define LE_C0_RINT 0x0400 /* Received interrupt */ 106#define LE_C0_TINT 0x0200 /* Transmitter Interrupt */ 107#define LE_C0_IDON 0x0100 /* IFIN: Init finished. */ 108#define LE_C0_INTR 0x0080 /* Interrupt or error */ 109#define LE_C0_INEA 0x0040 /* Interrupt enable */ 110#define LE_C0_RXON 0x0020 /* Receiver on */ 111#define LE_C0_TXON 0x0010 /* Transmitter on */ 112#define LE_C0_TDMD 0x0008 /* Transmitter demand */ 113#define LE_C0_STOP 0x0004 /* Stop the card */ 114#define LE_C0_STRT 0x0002 /* Start the card */ 115#define LE_C0_INIT 0x0001 /* Init the card */ 116 117#define LE_C3_BSWP 0x4 /* SWAP */ 118#define LE_C3_ACON 0x2 /* ALE Control */ 119#define LE_C3_BCON 0x1 /* Byte control */ 120 121/* Receive message descriptor 1 */ 122#define LE_R1_OWN 0x8000 /* Who owns the entry */ 123#define LE_R1_ERR 0x4000 /* Error: if FRA, OFL, CRC or BUF is set */ 124#define LE_R1_FRA 0x2000 /* FRA: Frame error */ 125#define LE_R1_OFL 0x1000 /* OFL: Frame overflow */ 126#define LE_R1_CRC 0x0800 /* CRC error */ 127#define LE_R1_BUF 0x0400 /* BUF: Buffer error */ 128#define LE_R1_SOP 0x0200 /* Start of packet */ 129#define LE_R1_EOP 0x0100 /* End of packet */ 130#define LE_R1_POK 0x0300 /* Packet is complete: SOP + EOP */ 131 132/* Transmit message descriptor 1 */ 133#define LE_T1_OWN 0x8000 /* Lance owns the packet */ 134#define LE_T1_ERR 0x4000 /* Error summary */ 135#define LE_T1_EMORE 0x1000 /* Error: more than one retry needed */ 136#define LE_T1_EONE 0x0800 /* Error: one retry needed */ 137#define LE_T1_EDEF 0x0400 /* Error: deferred */ 138#define LE_T1_SOP 0x0200 /* Start of packet */ 139#define LE_T1_EOP 0x0100 /* End of packet */ 140#define LE_T1_POK 0x0300 /* Packet is complete: SOP + EOP */ 141 142#define LE_T3_BUF 0x8000 /* Buffer error */ 143#define LE_T3_UFL 0x4000 /* Error underflow */ 144#define LE_T3_LCOL 0x1000 /* Error late collision */ 145#define LE_T3_CLOS 0x0800 /* Error carrier loss */ 146#define LE_T3_RTY 0x0400 /* Error retry */ 147#define LE_T3_TDR 0x03ff /* Time Domain Reflectometry counter */ 148 149/* Define: 2^4 Tx buffers and 2^4 Rx buffers */ 150 151#ifndef LANCE_LOG_TX_BUFFERS 152#define LANCE_LOG_TX_BUFFERS 4 153#define LANCE_LOG_RX_BUFFERS 4 154#endif 155 156#define TX_RING_SIZE (1 << (LANCE_LOG_TX_BUFFERS)) 157#define TX_RING_MOD_MASK (TX_RING_SIZE - 1) 158 159#define RX_RING_SIZE (1 << (LANCE_LOG_RX_BUFFERS)) 160#define RX_RING_MOD_MASK (RX_RING_SIZE - 1) 161 162#define PKT_BUF_SZ 1536 163#define RX_BUFF_SIZE PKT_BUF_SZ 164#define TX_BUFF_SIZE PKT_BUF_SZ 165 166#undef TEST_HITS 167#define ZERO 0 168 169/* 170 * The DS2100/3100 have a linear 64 kB buffer which supports halfword 171 * accesses only. Each halfword of the buffer is word-aligned in the 172 * CPU address space. 173 * 174 * The PMAD-AA has a 128 kB buffer on-board. 175 * 176 * The IOASIC LANCE devices use a shared memory region. This region 177 * as seen from the CPU is (max) 128 kB long and has to be on an 128 kB 178 * boundary. The LANCE sees this as a 64 kB long continuous memory 179 * region. 180 * 181 * The LANCE's DMA address is used as an index in this buffer and DMA 182 * takes place in bursts of eight 16-bit words which are packed into 183 * four 32-bit words by the IOASIC. This leads to a strange padding: 184 * 16 bytes of valid data followed by a 16 byte gap :-(. 185 */ 186 187struct lance_rx_desc { 188 unsigned short rmd0; /* low address of packet */ 189 unsigned short rmd1; /* high address of packet 190 and descriptor bits */ 191 short length; /* 2s complement (negative!) 192 of buffer length */ 193 unsigned short mblength; /* actual number of bytes received */ 194}; 195 196struct lance_tx_desc { 197 unsigned short tmd0; /* low address of packet */ 198 unsigned short tmd1; /* high address of packet 199 and descriptor bits */ 200 short length; /* 2s complement (negative!) 201 of buffer length */ 202 unsigned short misc; 203}; 204 205 206/* First part of the LANCE initialization block, described in databook. */ 207struct lance_init_block { 208 unsigned short mode; /* pre-set mode (reg. 15) */ 209 210 unsigned short phys_addr[3]; /* physical ethernet address */ 211 unsigned short filter[4]; /* multicast filter */ 212 213 /* Receive and transmit ring base, along with extra bits. */ 214 unsigned short rx_ptr; /* receive descriptor addr */ 215 unsigned short rx_len; /* receive len and high addr */ 216 unsigned short tx_ptr; /* transmit descriptor addr */ 217 unsigned short tx_len; /* transmit len and high addr */ 218 219 short gap[4]; 220 221 /* The buffer descriptors */ 222 struct lance_rx_desc brx_ring[RX_RING_SIZE]; 223 struct lance_tx_desc btx_ring[TX_RING_SIZE]; 224}; 225 226#define BUF_OFFSET_CPU sizeof(struct lance_init_block) 227#define BUF_OFFSET_LNC sizeof(struct lance_init_block) 228 229#define shift_off(off, type) \ 230 (type == ASIC_LANCE || type == PMAX_LANCE ? off << 1 : off) 231 232#define lib_off(rt, type) \ 233 shift_off(offsetof(struct lance_init_block, rt), type) 234 235#define lib_ptr(ib, rt, type) \ 236 ((volatile u16 *)((u8 *)(ib) + lib_off(rt, type))) 237 238#define rds_off(rt, type) \ 239 shift_off(offsetof(struct lance_rx_desc, rt), type) 240 241#define rds_ptr(rd, rt, type) \ 242 ((volatile u16 *)((u8 *)(rd) + rds_off(rt, type))) 243 244#define tds_off(rt, type) \ 245 shift_off(offsetof(struct lance_tx_desc, rt), type) 246 247#define tds_ptr(td, rt, type) \ 248 ((volatile u16 *)((u8 *)(td) + tds_off(rt, type))) 249 250struct lance_private { 251 struct net_device *next; 252 int type; 253 int dma_irq; 254 volatile struct lance_regs *ll; 255 256 spinlock_t lock; 257 258 int rx_new, tx_new; 259 int rx_old, tx_old; 260 261 unsigned short busmaster_regval; 262 263 struct timer_list multicast_timer; 264 265 /* Pointers to the ring buffers as seen from the CPU */ 266 char *rx_buf_ptr_cpu[RX_RING_SIZE]; 267 char *tx_buf_ptr_cpu[TX_RING_SIZE]; 268 269 /* Pointers to the ring buffers as seen from the LANCE */ 270 uint rx_buf_ptr_lnc[RX_RING_SIZE]; 271 uint tx_buf_ptr_lnc[TX_RING_SIZE]; 272}; 273 274#define TX_BUFFS_AVAIL ((lp->tx_old<=lp->tx_new)?\ 275 lp->tx_old+TX_RING_MOD_MASK-lp->tx_new:\ 276 lp->tx_old - lp->tx_new-1) 277 278/* The lance control ports are at an absolute address, machine and tc-slot 279 * dependent. 280 * DECstations do only 32-bit access and the LANCE uses 16 bit addresses, 281 * so we have to give the structure an extra member making rap pointing 282 * at the right address 283 */ 284struct lance_regs { 285 volatile unsigned short rdp; /* register data port */ 286 unsigned short pad; 287 volatile unsigned short rap; /* register address port */ 288}; 289 290int dec_lance_debug = 2; 291 292static struct tc_driver dec_lance_tc_driver; 293static struct net_device *root_lance_dev; 294 295static inline void writereg(volatile unsigned short *regptr, short value) 296{ 297 *regptr = value; 298 iob(); 299} 300 301/* Load the CSR registers */ 302static void load_csrs(struct lance_private *lp) 303{ 304 volatile struct lance_regs *ll = lp->ll; 305 uint leptr; 306 307 /* The address space as seen from the LANCE 308 * begins at address 0. HK 309 */ 310 leptr = 0; 311 312 writereg(&ll->rap, LE_CSR1); 313 writereg(&ll->rdp, (leptr & 0xFFFF)); 314 writereg(&ll->rap, LE_CSR2); 315 writereg(&ll->rdp, leptr >> 16); 316 writereg(&ll->rap, LE_CSR3); 317 writereg(&ll->rdp, lp->busmaster_regval); 318 319 /* Point back to csr0 */ 320 writereg(&ll->rap, LE_CSR0); 321} 322 323/* 324 * Our specialized copy routines 325 * 326 */ 327static void cp_to_buf(const int type, void *to, const void *from, int len) 328{ 329 unsigned short *tp, *fp, clen; 330 unsigned char *rtp, *rfp; 331 332 if (type == PMAD_LANCE) { 333 memcpy(to, from, len); 334 } else if (type == PMAX_LANCE) { 335 clen = len >> 1; 336 tp = (unsigned short *) to; 337 fp = (unsigned short *) from; 338 339 while (clen--) { 340 *tp++ = *fp++; 341 tp++; 342 } 343 344 clen = len & 1; 345 rtp = (unsigned char *) tp; 346 rfp = (unsigned char *) fp; 347 while (clen--) { 348 *rtp++ = *rfp++; 349 } 350 } else { 351 /* 352 * copy 16 Byte chunks 353 */ 354 clen = len >> 4; 355 tp = (unsigned short *) to; 356 fp = (unsigned short *) from; 357 while (clen--) { 358 *tp++ = *fp++; 359 *tp++ = *fp++; 360 *tp++ = *fp++; 361 *tp++ = *fp++; 362 *tp++ = *fp++; 363 *tp++ = *fp++; 364 *tp++ = *fp++; 365 *tp++ = *fp++; 366 tp += 8; 367 } 368 369 /* 370 * do the rest, if any. 371 */ 372 clen = len & 15; 373 rtp = (unsigned char *) tp; 374 rfp = (unsigned char *) fp; 375 while (clen--) { 376 *rtp++ = *rfp++; 377 } 378 } 379 380 iob(); 381} 382 383static void cp_from_buf(const int type, void *to, const void *from, int len) 384{ 385 unsigned short *tp, *fp, clen; 386 unsigned char *rtp, *rfp; 387 388 if (type == PMAD_LANCE) { 389 memcpy(to, from, len); 390 } else if (type == PMAX_LANCE) { 391 clen = len >> 1; 392 tp = (unsigned short *) to; 393 fp = (unsigned short *) from; 394 while (clen--) { 395 *tp++ = *fp++; 396 fp++; 397 } 398 399 clen = len & 1; 400 401 rtp = (unsigned char *) tp; 402 rfp = (unsigned char *) fp; 403 404 while (clen--) { 405 *rtp++ = *rfp++; 406 } 407 } else { 408 409 /* 410 * copy 16 Byte chunks 411 */ 412 clen = len >> 4; 413 tp = (unsigned short *) to; 414 fp = (unsigned short *) from; 415 while (clen--) { 416 *tp++ = *fp++; 417 *tp++ = *fp++; 418 *tp++ = *fp++; 419 *tp++ = *fp++; 420 *tp++ = *fp++; 421 *tp++ = *fp++; 422 *tp++ = *fp++; 423 *tp++ = *fp++; 424 fp += 8; 425 } 426 427 /* 428 * do the rest, if any. 429 */ 430 clen = len & 15; 431 rtp = (unsigned char *) tp; 432 rfp = (unsigned char *) fp; 433 while (clen--) { 434 *rtp++ = *rfp++; 435 } 436 437 438 } 439 440} 441 442/* Setup the Lance Rx and Tx rings */ 443static void lance_init_ring(struct net_device *dev) 444{ 445 struct lance_private *lp = netdev_priv(dev); 446 volatile u16 *ib = (volatile u16 *)dev->mem_start; 447 uint leptr; 448 int i; 449 450 /* Lock out other processes while setting up hardware */ 451 netif_stop_queue(dev); 452 lp->rx_new = lp->tx_new = 0; 453 lp->rx_old = lp->tx_old = 0; 454 455 /* Copy the ethernet address to the lance init block. 456 * XXX bit 0 of the physical address registers has to be zero 457 */ 458 *lib_ptr(ib, phys_addr[0], lp->type) = (dev->dev_addr[1] << 8) | 459 dev->dev_addr[0]; 460 *lib_ptr(ib, phys_addr[1], lp->type) = (dev->dev_addr[3] << 8) | 461 dev->dev_addr[2]; 462 *lib_ptr(ib, phys_addr[2], lp->type) = (dev->dev_addr[5] << 8) | 463 dev->dev_addr[4]; 464 /* Setup the initialization block */ 465 466 /* Setup rx descriptor pointer */ 467 leptr = offsetof(struct lance_init_block, brx_ring); 468 *lib_ptr(ib, rx_len, lp->type) = (LANCE_LOG_RX_BUFFERS << 13) | 469 (leptr >> 16); 470 *lib_ptr(ib, rx_ptr, lp->type) = leptr; 471 if (ZERO) 472 printk("RX ptr: %8.8x(%8.8x)\n", 473 leptr, lib_off(brx_ring, lp->type)); 474 475 /* Setup tx descriptor pointer */ 476 leptr = offsetof(struct lance_init_block, btx_ring); 477 *lib_ptr(ib, tx_len, lp->type) = (LANCE_LOG_TX_BUFFERS << 13) | 478 (leptr >> 16); 479 *lib_ptr(ib, tx_ptr, lp->type) = leptr; 480 if (ZERO) 481 printk("TX ptr: %8.8x(%8.8x)\n", 482 leptr, lib_off(btx_ring, lp->type)); 483 484 if (ZERO) 485 printk("TX rings:\n"); 486 487 /* Setup the Tx ring entries */ 488 for (i = 0; i < TX_RING_SIZE; i++) { 489 leptr = lp->tx_buf_ptr_lnc[i]; 490 *lib_ptr(ib, btx_ring[i].tmd0, lp->type) = leptr; 491 *lib_ptr(ib, btx_ring[i].tmd1, lp->type) = (leptr >> 16) & 492 0xff; 493 *lib_ptr(ib, btx_ring[i].length, lp->type) = 0xf000; 494 /* The ones required by tmd2 */ 495 *lib_ptr(ib, btx_ring[i].misc, lp->type) = 0; 496 if (i < 3 && ZERO) 497 printk("%d: 0x%8.8x(0x%8.8x)\n", 498 i, leptr, (uint)lp->tx_buf_ptr_cpu[i]); 499 } 500 501 /* Setup the Rx ring entries */ 502 if (ZERO) 503 printk("RX rings:\n"); 504 for (i = 0; i < RX_RING_SIZE; i++) { 505 leptr = lp->rx_buf_ptr_lnc[i]; 506 *lib_ptr(ib, brx_ring[i].rmd0, lp->type) = leptr; 507 *lib_ptr(ib, brx_ring[i].rmd1, lp->type) = ((leptr >> 16) & 508 0xff) | 509 LE_R1_OWN; 510 *lib_ptr(ib, brx_ring[i].length, lp->type) = -RX_BUFF_SIZE | 511 0xf000; 512 *lib_ptr(ib, brx_ring[i].mblength, lp->type) = 0; 513 if (i < 3 && ZERO) 514 printk("%d: 0x%8.8x(0x%8.8x)\n", 515 i, leptr, (uint)lp->rx_buf_ptr_cpu[i]); 516 } 517 iob(); 518} 519 520static int init_restart_lance(struct lance_private *lp) 521{ 522 volatile struct lance_regs *ll = lp->ll; 523 int i; 524 525 writereg(&ll->rap, LE_CSR0); 526 writereg(&ll->rdp, LE_C0_INIT); 527 528 /* Wait for the lance to complete initialization */ 529 for (i = 0; (i < 100) && !(ll->rdp & LE_C0_IDON); i++) { 530 udelay(10); 531 } 532 if ((i == 100) || (ll->rdp & LE_C0_ERR)) { 533 printk("LANCE unopened after %d ticks, csr0=%4.4x.\n", 534 i, ll->rdp); 535 return -1; 536 } 537 if ((ll->rdp & LE_C0_ERR)) { 538 printk("LANCE unopened after %d ticks, csr0=%4.4x.\n", 539 i, ll->rdp); 540 return -1; 541 } 542 writereg(&ll->rdp, LE_C0_IDON); 543 writereg(&ll->rdp, LE_C0_STRT); 544 writereg(&ll->rdp, LE_C0_INEA); 545 546 return 0; 547} 548 549static int lance_rx(struct net_device *dev) 550{ 551 struct lance_private *lp = netdev_priv(dev); 552 volatile u16 *ib = (volatile u16 *)dev->mem_start; 553 volatile u16 *rd; 554 unsigned short bits; 555 int entry, len; 556 struct sk_buff *skb; 557 558#ifdef TEST_HITS 559 { 560 int i; 561 562 printk("["); 563 for (i = 0; i < RX_RING_SIZE; i++) { 564 if (i == lp->rx_new) 565 printk("%s", *lib_ptr(ib, brx_ring[i].rmd1, 566 lp->type) & 567 LE_R1_OWN ? "_" : "X"); 568 else 569 printk("%s", *lib_ptr(ib, brx_ring[i].rmd1, 570 lp->type) & 571 LE_R1_OWN ? "." : "1"); 572 } 573 printk("]"); 574 } 575#endif 576 577 for (rd = lib_ptr(ib, brx_ring[lp->rx_new], lp->type); 578 !((bits = *rds_ptr(rd, rmd1, lp->type)) & LE_R1_OWN); 579 rd = lib_ptr(ib, brx_ring[lp->rx_new], lp->type)) { 580 entry = lp->rx_new; 581 582 /* We got an incomplete frame? */ 583 if ((bits & LE_R1_POK) != LE_R1_POK) { 584 dev->stats.rx_over_errors++; 585 dev->stats.rx_errors++; 586 } else if (bits & LE_R1_ERR) { 587 /* Count only the end frame as a rx error, 588 * not the beginning 589 */ 590 if (bits & LE_R1_BUF) 591 dev->stats.rx_fifo_errors++; 592 if (bits & LE_R1_CRC) 593 dev->stats.rx_crc_errors++; 594 if (bits & LE_R1_OFL) 595 dev->stats.rx_over_errors++; 596 if (bits & LE_R1_FRA) 597 dev->stats.rx_frame_errors++; 598 if (bits & LE_R1_EOP) 599 dev->stats.rx_errors++; 600 } else { 601 len = (*rds_ptr(rd, mblength, lp->type) & 0xfff) - 4; 602 skb = dev_alloc_skb(len + 2); 603 604 if (skb == 0) { 605 printk("%s: Memory squeeze, deferring packet.\n", 606 dev->name); 607 dev->stats.rx_dropped++; 608 *rds_ptr(rd, mblength, lp->type) = 0; 609 *rds_ptr(rd, rmd1, lp->type) = 610 ((lp->rx_buf_ptr_lnc[entry] >> 16) & 611 0xff) | LE_R1_OWN; 612 lp->rx_new = (entry + 1) & RX_RING_MOD_MASK; 613 return 0; 614 } 615 dev->stats.rx_bytes += len; 616 617 skb_reserve(skb, 2); /* 16 byte align */ 618 skb_put(skb, len); /* make room */ 619 620 cp_from_buf(lp->type, skb->data, 621 (char *)lp->rx_buf_ptr_cpu[entry], len); 622 623 skb->protocol = eth_type_trans(skb, dev); 624 netif_rx(skb); 625 dev->stats.rx_packets++; 626 } 627 628 /* Return the packet to the pool */ 629 *rds_ptr(rd, mblength, lp->type) = 0; 630 *rds_ptr(rd, length, lp->type) = -RX_BUFF_SIZE | 0xf000; 631 *rds_ptr(rd, rmd1, lp->type) = 632 ((lp->rx_buf_ptr_lnc[entry] >> 16) & 0xff) | LE_R1_OWN; 633 lp->rx_new = (entry + 1) & RX_RING_MOD_MASK; 634 } 635 return 0; 636} 637 638static void lance_tx(struct net_device *dev) 639{ 640 struct lance_private *lp = netdev_priv(dev); 641 volatile u16 *ib = (volatile u16 *)dev->mem_start; 642 volatile struct lance_regs *ll = lp->ll; 643 volatile u16 *td; 644 int i, j; 645 int status; 646 647 j = lp->tx_old; 648 649 spin_lock(&lp->lock); 650 651 for (i = j; i != lp->tx_new; i = j) { 652 td = lib_ptr(ib, btx_ring[i], lp->type); 653 /* If we hit a packet not owned by us, stop */ 654 if (*tds_ptr(td, tmd1, lp->type) & LE_T1_OWN) 655 break; 656 657 if (*tds_ptr(td, tmd1, lp->type) & LE_T1_ERR) { 658 status = *tds_ptr(td, misc, lp->type); 659 660 dev->stats.tx_errors++; 661 if (status & LE_T3_RTY) 662 dev->stats.tx_aborted_errors++; 663 if (status & LE_T3_LCOL) 664 dev->stats.tx_window_errors++; 665 666 if (status & LE_T3_CLOS) { 667 dev->stats.tx_carrier_errors++; 668 printk("%s: Carrier Lost\n", dev->name); 669 /* Stop the lance */ 670 writereg(&ll->rap, LE_CSR0); 671 writereg(&ll->rdp, LE_C0_STOP); 672 lance_init_ring(dev); 673 load_csrs(lp); 674 init_restart_lance(lp); 675 goto out; 676 } 677 /* Buffer errors and underflows turn off the 678 * transmitter, restart the adapter. 679 */ 680 if (status & (LE_T3_BUF | LE_T3_UFL)) { 681 dev->stats.tx_fifo_errors++; 682 683 printk("%s: Tx: ERR_BUF|ERR_UFL, restarting\n", 684 dev->name); 685 /* Stop the lance */ 686 writereg(&ll->rap, LE_CSR0); 687 writereg(&ll->rdp, LE_C0_STOP); 688 lance_init_ring(dev); 689 load_csrs(lp); 690 init_restart_lance(lp); 691 goto out; 692 } 693 } else if ((*tds_ptr(td, tmd1, lp->type) & LE_T1_POK) == 694 LE_T1_POK) { 695 /* 696 * So we don't count the packet more than once. 697 */ 698 *tds_ptr(td, tmd1, lp->type) &= ~(LE_T1_POK); 699 700 /* One collision before packet was sent. */ 701 if (*tds_ptr(td, tmd1, lp->type) & LE_T1_EONE) 702 dev->stats.collisions++; 703 704 /* More than one collision, be optimistic. */ 705 if (*tds_ptr(td, tmd1, lp->type) & LE_T1_EMORE) 706 dev->stats.collisions += 2; 707 708 dev->stats.tx_packets++; 709 } 710 j = (j + 1) & TX_RING_MOD_MASK; 711 } 712 lp->tx_old = j; 713out: 714 if (netif_queue_stopped(dev) && 715 TX_BUFFS_AVAIL > 0) 716 netif_wake_queue(dev); 717 718 spin_unlock(&lp->lock); 719} 720 721static irqreturn_t lance_dma_merr_int(int irq, void *dev_id) 722{ 723 struct net_device *dev = dev_id; 724 725 printk(KERN_ERR "%s: DMA error\n", dev->name); 726 return IRQ_HANDLED; 727} 728 729static irqreturn_t lance_interrupt(int irq, void *dev_id) 730{ 731 struct net_device *dev = dev_id; 732 struct lance_private *lp = netdev_priv(dev); 733 volatile struct lance_regs *ll = lp->ll; 734 int csr0; 735 736 writereg(&ll->rap, LE_CSR0); 737 csr0 = ll->rdp; 738 739 /* Acknowledge all the interrupt sources ASAP */ 740 writereg(&ll->rdp, csr0 & (LE_C0_INTR | LE_C0_TINT | LE_C0_RINT)); 741 742 if ((csr0 & LE_C0_ERR)) { 743 /* Clear the error condition */ 744 writereg(&ll->rdp, LE_C0_BABL | LE_C0_ERR | LE_C0_MISS | 745 LE_C0_CERR | LE_C0_MERR); 746 } 747 if (csr0 & LE_C0_RINT) 748 lance_rx(dev); 749 750 if (csr0 & LE_C0_TINT) 751 lance_tx(dev); 752 753 if (csr0 & LE_C0_BABL) 754 dev->stats.tx_errors++; 755 756 if (csr0 & LE_C0_MISS) 757 dev->stats.rx_errors++; 758 759 if (csr0 & LE_C0_MERR) { 760 printk("%s: Memory error, status %04x\n", dev->name, csr0); 761 762 writereg(&ll->rdp, LE_C0_STOP); 763 764 lance_init_ring(dev); 765 load_csrs(lp); 766 init_restart_lance(lp); 767 netif_wake_queue(dev); 768 } 769 770 writereg(&ll->rdp, LE_C0_INEA); 771 writereg(&ll->rdp, LE_C0_INEA); 772 return IRQ_HANDLED; 773} 774 775static int lance_open(struct net_device *dev) 776{ 777 volatile u16 *ib = (volatile u16 *)dev->mem_start; 778 struct lance_private *lp = netdev_priv(dev); 779 volatile struct lance_regs *ll = lp->ll; 780 int status = 0; 781 782 /* Stop the Lance */ 783 writereg(&ll->rap, LE_CSR0); 784 writereg(&ll->rdp, LE_C0_STOP); 785 786 /* Set mode and clear multicast filter only at device open, 787 * so that lance_init_ring() called at any error will not 788 * forget multicast filters. 789 * 790 * BTW it is common bug in all lance drivers! --ANK 791 */ 792 *lib_ptr(ib, mode, lp->type) = 0; 793 *lib_ptr(ib, filter[0], lp->type) = 0; 794 *lib_ptr(ib, filter[1], lp->type) = 0; 795 *lib_ptr(ib, filter[2], lp->type) = 0; 796 *lib_ptr(ib, filter[3], lp->type) = 0; 797 798 lance_init_ring(dev); 799 load_csrs(lp); 800 801 netif_start_queue(dev); 802 803 /* Associate IRQ with lance_interrupt */ 804 if (request_irq(dev->irq, lance_interrupt, 0, "lance", dev)) { 805 printk("%s: Can't get IRQ %d\n", dev->name, dev->irq); 806 return -EAGAIN; 807 } 808 if (lp->dma_irq >= 0) { 809 unsigned long flags; 810 811 if (request_irq(lp->dma_irq, lance_dma_merr_int, 0, 812 "lance error", dev)) { 813 free_irq(dev->irq, dev); 814 printk("%s: Can't get DMA IRQ %d\n", dev->name, 815 lp->dma_irq); 816 return -EAGAIN; 817 } 818 819 spin_lock_irqsave(&ioasic_ssr_lock, flags); 820 821 fast_mb(); 822 /* Enable I/O ASIC LANCE DMA. */ 823 ioasic_write(IO_REG_SSR, 824 ioasic_read(IO_REG_SSR) | IO_SSR_LANCE_DMA_EN); 825 826 fast_mb(); 827 spin_unlock_irqrestore(&ioasic_ssr_lock, flags); 828 } 829 830 status = init_restart_lance(lp); 831 return status; 832} 833 834static int lance_close(struct net_device *dev) 835{ 836 struct lance_private *lp = netdev_priv(dev); 837 volatile struct lance_regs *ll = lp->ll; 838 839 netif_stop_queue(dev); 840 del_timer_sync(&lp->multicast_timer); 841 842 /* Stop the card */ 843 writereg(&ll->rap, LE_CSR0); 844 writereg(&ll->rdp, LE_C0_STOP); 845 846 if (lp->dma_irq >= 0) { 847 unsigned long flags; 848 849 spin_lock_irqsave(&ioasic_ssr_lock, flags); 850 851 fast_mb(); 852 /* Disable I/O ASIC LANCE DMA. */ 853 ioasic_write(IO_REG_SSR, 854 ioasic_read(IO_REG_SSR) & ~IO_SSR_LANCE_DMA_EN); 855 856 fast_iob(); 857 spin_unlock_irqrestore(&ioasic_ssr_lock, flags); 858 859 free_irq(lp->dma_irq, dev); 860 } 861 free_irq(dev->irq, dev); 862 return 0; 863} 864 865static inline int lance_reset(struct net_device *dev) 866{ 867 struct lance_private *lp = netdev_priv(dev); 868 volatile struct lance_regs *ll = lp->ll; 869 int status; 870 871 /* Stop the lance */ 872 writereg(&ll->rap, LE_CSR0); 873 writereg(&ll->rdp, LE_C0_STOP); 874 875 lance_init_ring(dev); 876 load_csrs(lp); 877 dev->trans_start = jiffies; /* prevent tx timeout */ 878 status = init_restart_lance(lp); 879 return status; 880} 881 882static void lance_tx_timeout(struct net_device *dev) 883{ 884 struct lance_private *lp = netdev_priv(dev); 885 volatile struct lance_regs *ll = lp->ll; 886 887 printk(KERN_ERR "%s: transmit timed out, status %04x, reset\n", 888 dev->name, ll->rdp); 889 lance_reset(dev); 890 netif_wake_queue(dev); 891} 892 893static int lance_start_xmit(struct sk_buff *skb, struct net_device *dev) 894{ 895 struct lance_private *lp = netdev_priv(dev); 896 volatile struct lance_regs *ll = lp->ll; 897 volatile u16 *ib = (volatile u16 *)dev->mem_start; 898 unsigned long flags; 899 int entry, len; 900 901 len = skb->len; 902 903 if (len < ETH_ZLEN) { 904 if (skb_padto(skb, ETH_ZLEN)) 905 return NETDEV_TX_OK; 906 len = ETH_ZLEN; 907 } 908 909 dev->stats.tx_bytes += len; 910 911 spin_lock_irqsave(&lp->lock, flags); 912 913 entry = lp->tx_new; 914 *lib_ptr(ib, btx_ring[entry].length, lp->type) = (-len); 915 *lib_ptr(ib, btx_ring[entry].misc, lp->type) = 0; 916 917 cp_to_buf(lp->type, (char *)lp->tx_buf_ptr_cpu[entry], skb->data, len); 918 919 /* Now, give the packet to the lance */ 920 *lib_ptr(ib, btx_ring[entry].tmd1, lp->type) = 921 ((lp->tx_buf_ptr_lnc[entry] >> 16) & 0xff) | 922 (LE_T1_POK | LE_T1_OWN); 923 lp->tx_new = (entry + 1) & TX_RING_MOD_MASK; 924 925 if (TX_BUFFS_AVAIL <= 0) 926 netif_stop_queue(dev); 927 928 /* Kick the lance: transmit now */ 929 writereg(&ll->rdp, LE_C0_INEA | LE_C0_TDMD); 930 931 spin_unlock_irqrestore(&lp->lock, flags); 932 933 dev_kfree_skb(skb); 934 935 return NETDEV_TX_OK; 936} 937 938static void lance_load_multicast(struct net_device *dev) 939{ 940 struct lance_private *lp = netdev_priv(dev); 941 volatile u16 *ib = (volatile u16 *)dev->mem_start; 942 struct netdev_hw_addr *ha; 943 char *addrs; 944 u32 crc; 945 946 /* set all multicast bits */ 947 if (dev->flags & IFF_ALLMULTI) { 948 *lib_ptr(ib, filter[0], lp->type) = 0xffff; 949 *lib_ptr(ib, filter[1], lp->type) = 0xffff; 950 *lib_ptr(ib, filter[2], lp->type) = 0xffff; 951 *lib_ptr(ib, filter[3], lp->type) = 0xffff; 952 return; 953 } 954 /* clear the multicast filter */ 955 *lib_ptr(ib, filter[0], lp->type) = 0; 956 *lib_ptr(ib, filter[1], lp->type) = 0; 957 *lib_ptr(ib, filter[2], lp->type) = 0; 958 *lib_ptr(ib, filter[3], lp->type) = 0; 959 960 /* Add addresses */ 961 netdev_for_each_mc_addr(ha, dev) { 962 addrs = ha->addr; 963 964 /* multicast address? */ 965 if (!(*addrs & 1)) 966 continue; 967 968 crc = ether_crc_le(ETH_ALEN, addrs); 969 crc = crc >> 26; 970 *lib_ptr(ib, filter[crc >> 4], lp->type) |= 1 << (crc & 0xf); 971 } 972} 973 974static void lance_set_multicast(struct net_device *dev) 975{ 976 struct lance_private *lp = netdev_priv(dev); 977 volatile u16 *ib = (volatile u16 *)dev->mem_start; 978 volatile struct lance_regs *ll = lp->ll; 979 980 if (!netif_running(dev)) 981 return; 982 983 if (lp->tx_old != lp->tx_new) { 984 mod_timer(&lp->multicast_timer, jiffies + 4 * HZ/100); 985 netif_wake_queue(dev); 986 return; 987 } 988 989 netif_stop_queue(dev); 990 991 writereg(&ll->rap, LE_CSR0); 992 writereg(&ll->rdp, LE_C0_STOP); 993 994 lance_init_ring(dev); 995 996 if (dev->flags & IFF_PROMISC) { 997 *lib_ptr(ib, mode, lp->type) |= LE_MO_PROM; 998 } else { 999 *lib_ptr(ib, mode, lp->type) &= ~LE_MO_PROM; 1000 lance_load_multicast(dev); 1001 } 1002 load_csrs(lp); 1003 init_restart_lance(lp); 1004 netif_wake_queue(dev); 1005} 1006 1007static void lance_set_multicast_retry(unsigned long _opaque) 1008{ 1009 struct net_device *dev = (struct net_device *) _opaque; 1010 1011 lance_set_multicast(dev); 1012} 1013 1014static const struct net_device_ops lance_netdev_ops = { 1015 .ndo_open = lance_open, 1016 .ndo_stop = lance_close, 1017 .ndo_start_xmit = lance_start_xmit, 1018 .ndo_tx_timeout = lance_tx_timeout, 1019 .ndo_set_multicast_list = lance_set_multicast, 1020 .ndo_change_mtu = eth_change_mtu, 1021 .ndo_validate_addr = eth_validate_addr, 1022 .ndo_set_mac_address = eth_mac_addr, 1023}; 1024 1025static int __devinit dec_lance_probe(struct device *bdev, const int type) 1026{ 1027 static unsigned version_printed; 1028 static const char fmt[] = "declance%d"; 1029 char name[10]; 1030 struct net_device *dev; 1031 struct lance_private *lp; 1032 volatile struct lance_regs *ll; 1033 resource_size_t start = 0, len = 0; 1034 int i, ret; 1035 unsigned long esar_base; 1036 unsigned char *esar; 1037 1038 if (dec_lance_debug && version_printed++ == 0) 1039 printk(version); 1040 1041 if (bdev) 1042 snprintf(name, sizeof(name), "%s", dev_name(bdev)); 1043 else { 1044 i = 0; 1045 dev = root_lance_dev; 1046 while (dev) { 1047 i++; 1048 lp = netdev_priv(dev); 1049 dev = lp->next; 1050 } 1051 snprintf(name, sizeof(name), fmt, i); 1052 } 1053 1054 dev = alloc_etherdev(sizeof(struct lance_private)); 1055 if (!dev) { 1056 printk(KERN_ERR "%s: Unable to allocate etherdev, aborting.\n", 1057 name); 1058 ret = -ENOMEM; 1059 goto err_out; 1060 } 1061 1062 /* 1063 * alloc_etherdev ensures the data structures used by the LANCE 1064 * are aligned. 1065 */ 1066 lp = netdev_priv(dev); 1067 spin_lock_init(&lp->lock); 1068 1069 lp->type = type; 1070 switch (type) { 1071 case ASIC_LANCE: 1072 dev->base_addr = CKSEG1ADDR(dec_kn_slot_base + IOASIC_LANCE); 1073 1074 /* buffer space for the on-board LANCE shared memory */ 1075 /* 1076 * FIXME: ugly hack! 1077 */ 1078 dev->mem_start = CKSEG1ADDR(0x00020000); 1079 dev->mem_end = dev->mem_start + 0x00020000; 1080 dev->irq = dec_interrupt[DEC_IRQ_LANCE]; 1081 esar_base = CKSEG1ADDR(dec_kn_slot_base + IOASIC_ESAR); 1082 1083 /* Workaround crash with booting KN04 2.1k from Disk */ 1084 memset((void *)dev->mem_start, 0, 1085 dev->mem_end - dev->mem_start); 1086 1087 /* 1088 * setup the pointer arrays, this sucks [tm] :-( 1089 */ 1090 for (i = 0; i < RX_RING_SIZE; i++) { 1091 lp->rx_buf_ptr_cpu[i] = 1092 (char *)(dev->mem_start + 2 * BUF_OFFSET_CPU + 1093 2 * i * RX_BUFF_SIZE); 1094 lp->rx_buf_ptr_lnc[i] = 1095 (BUF_OFFSET_LNC + i * RX_BUFF_SIZE); 1096 } 1097 for (i = 0; i < TX_RING_SIZE; i++) { 1098 lp->tx_buf_ptr_cpu[i] = 1099 (char *)(dev->mem_start + 2 * BUF_OFFSET_CPU + 1100 2 * RX_RING_SIZE * RX_BUFF_SIZE + 1101 2 * i * TX_BUFF_SIZE); 1102 lp->tx_buf_ptr_lnc[i] = 1103 (BUF_OFFSET_LNC + 1104 RX_RING_SIZE * RX_BUFF_SIZE + 1105 i * TX_BUFF_SIZE); 1106 } 1107 1108 /* Setup I/O ASIC LANCE DMA. */ 1109 lp->dma_irq = dec_interrupt[DEC_IRQ_LANCE_MERR]; 1110 ioasic_write(IO_REG_LANCE_DMA_P, 1111 CPHYSADDR(dev->mem_start) << 3); 1112 1113 break; 1114#ifdef CONFIG_TC 1115 case PMAD_LANCE: 1116 dev_set_drvdata(bdev, dev); 1117 1118 start = to_tc_dev(bdev)->resource.start; 1119 len = to_tc_dev(bdev)->resource.end - start + 1; 1120 if (!request_mem_region(start, len, dev_name(bdev))) { 1121 printk(KERN_ERR 1122 "%s: Unable to reserve MMIO resource\n", 1123 dev_name(bdev)); 1124 ret = -EBUSY; 1125 goto err_out_dev; 1126 } 1127 1128 dev->mem_start = CKSEG1ADDR(start); 1129 dev->mem_end = dev->mem_start + 0x100000; 1130 dev->base_addr = dev->mem_start + 0x100000; 1131 dev->irq = to_tc_dev(bdev)->interrupt; 1132 esar_base = dev->mem_start + 0x1c0002; 1133 lp->dma_irq = -1; 1134 1135 for (i = 0; i < RX_RING_SIZE; i++) { 1136 lp->rx_buf_ptr_cpu[i] = 1137 (char *)(dev->mem_start + BUF_OFFSET_CPU + 1138 i * RX_BUFF_SIZE); 1139 lp->rx_buf_ptr_lnc[i] = 1140 (BUF_OFFSET_LNC + i * RX_BUFF_SIZE); 1141 } 1142 for (i = 0; i < TX_RING_SIZE; i++) { 1143 lp->tx_buf_ptr_cpu[i] = 1144 (char *)(dev->mem_start + BUF_OFFSET_CPU + 1145 RX_RING_SIZE * RX_BUFF_SIZE + 1146 i * TX_BUFF_SIZE); 1147 lp->tx_buf_ptr_lnc[i] = 1148 (BUF_OFFSET_LNC + 1149 RX_RING_SIZE * RX_BUFF_SIZE + 1150 i * TX_BUFF_SIZE); 1151 } 1152 1153 break; 1154#endif 1155 case PMAX_LANCE: 1156 dev->irq = dec_interrupt[DEC_IRQ_LANCE]; 1157 dev->base_addr = CKSEG1ADDR(KN01_SLOT_BASE + KN01_LANCE); 1158 dev->mem_start = CKSEG1ADDR(KN01_SLOT_BASE + KN01_LANCE_MEM); 1159 dev->mem_end = dev->mem_start + KN01_SLOT_SIZE; 1160 esar_base = CKSEG1ADDR(KN01_SLOT_BASE + KN01_ESAR + 1); 1161 lp->dma_irq = -1; 1162 1163 /* 1164 * setup the pointer arrays, this sucks [tm] :-( 1165 */ 1166 for (i = 0; i < RX_RING_SIZE; i++) { 1167 lp->rx_buf_ptr_cpu[i] = 1168 (char *)(dev->mem_start + 2 * BUF_OFFSET_CPU + 1169 2 * i * RX_BUFF_SIZE); 1170 lp->rx_buf_ptr_lnc[i] = 1171 (BUF_OFFSET_LNC + i * RX_BUFF_SIZE); 1172 } 1173 for (i = 0; i < TX_RING_SIZE; i++) { 1174 lp->tx_buf_ptr_cpu[i] = 1175 (char *)(dev->mem_start + 2 * BUF_OFFSET_CPU + 1176 2 * RX_RING_SIZE * RX_BUFF_SIZE + 1177 2 * i * TX_BUFF_SIZE); 1178 lp->tx_buf_ptr_lnc[i] = 1179 (BUF_OFFSET_LNC + 1180 RX_RING_SIZE * RX_BUFF_SIZE + 1181 i * TX_BUFF_SIZE); 1182 } 1183 1184 break; 1185 1186 default: 1187 printk(KERN_ERR "%s: declance_init called with unknown type\n", 1188 name); 1189 ret = -ENODEV; 1190 goto err_out_dev; 1191 } 1192 1193 ll = (struct lance_regs *) dev->base_addr; 1194 esar = (unsigned char *) esar_base; 1195 1196 /* prom checks */ 1197 /* First, check for test pattern */ 1198 if (esar[0x60] != 0xff && esar[0x64] != 0x00 && 1199 esar[0x68] != 0x55 && esar[0x6c] != 0xaa) { 1200 printk(KERN_ERR 1201 "%s: Ethernet station address prom not found!\n", 1202 name); 1203 ret = -ENODEV; 1204 goto err_out_resource; 1205 } 1206 /* Check the prom contents */ 1207 for (i = 0; i < 8; i++) { 1208 if (esar[i * 4] != esar[0x3c - i * 4] && 1209 esar[i * 4] != esar[0x40 + i * 4] && 1210 esar[0x3c - i * 4] != esar[0x40 + i * 4]) { 1211 printk(KERN_ERR "%s: Something is wrong with the " 1212 "ethernet station address prom!\n", name); 1213 ret = -ENODEV; 1214 goto err_out_resource; 1215 } 1216 } 1217 1218 /* Copy the ethernet address to the device structure, later to the 1219 * lance initialization block so the lance gets it every time it's 1220 * (re)initialized. 1221 */ 1222 switch (type) { 1223 case ASIC_LANCE: 1224 printk("%s: IOASIC onboard LANCE", name); 1225 break; 1226 case PMAD_LANCE: 1227 printk("%s: PMAD-AA", name); 1228 break; 1229 case PMAX_LANCE: 1230 printk("%s: PMAX onboard LANCE", name); 1231 break; 1232 } 1233 for (i = 0; i < 6; i++) 1234 dev->dev_addr[i] = esar[i * 4]; 1235 1236 printk(", addr = %pM, irq = %d\n", dev->dev_addr, dev->irq); 1237 1238 dev->netdev_ops = &lance_netdev_ops; 1239 dev->watchdog_timeo = 5*HZ; 1240 1241 /* lp->ll is the location of the registers for lance card */ 1242 lp->ll = ll; 1243 1244 /* busmaster_regval (CSR3) should be zero according to the PMAD-AA 1245 * specification. 1246 */ 1247 lp->busmaster_regval = 0; 1248 1249 dev->dma = 0; 1250 1251 /* We cannot sleep if the chip is busy during a 1252 * multicast list update event, because such events 1253 * can occur from interrupts (ex. IPv6). So we 1254 * use a timer to try again later when necessary. -DaveM 1255 */ 1256 init_timer(&lp->multicast_timer); 1257 lp->multicast_timer.data = (unsigned long) dev; 1258 lp->multicast_timer.function = lance_set_multicast_retry; 1259 1260 ret = register_netdev(dev); 1261 if (ret) { 1262 printk(KERN_ERR 1263 "%s: Unable to register netdev, aborting.\n", name); 1264 goto err_out_resource; 1265 } 1266 1267 if (!bdev) { 1268 lp->next = root_lance_dev; 1269 root_lance_dev = dev; 1270 } 1271 1272 printk("%s: registered as %s.\n", name, dev->name); 1273 return 0; 1274 1275err_out_resource: 1276 if (bdev) 1277 release_mem_region(start, len); 1278 1279err_out_dev: 1280 free_netdev(dev); 1281 1282err_out: 1283 return ret; 1284} 1285 1286static void __exit dec_lance_remove(struct device *bdev) 1287{ 1288 struct net_device *dev = dev_get_drvdata(bdev); 1289 resource_size_t start, len; 1290 1291 unregister_netdev(dev); 1292 start = to_tc_dev(bdev)->resource.start; 1293 len = to_tc_dev(bdev)->resource.end - start + 1; 1294 release_mem_region(start, len); 1295 free_netdev(dev); 1296} 1297 1298/* Find all the lance cards on the system and initialize them */ 1299static int __init dec_lance_platform_probe(void) 1300{ 1301 int count = 0; 1302 1303 if (dec_interrupt[DEC_IRQ_LANCE] >= 0) { 1304 if (dec_interrupt[DEC_IRQ_LANCE_MERR] >= 0) { 1305 if (dec_lance_probe(NULL, ASIC_LANCE) >= 0) 1306 count++; 1307 } else if (!TURBOCHANNEL) { 1308 if (dec_lance_probe(NULL, PMAX_LANCE) >= 0) 1309 count++; 1310 } 1311 } 1312 1313 return (count > 0) ? 0 : -ENODEV; 1314} 1315 1316static void __exit dec_lance_platform_remove(void) 1317{ 1318 while (root_lance_dev) { 1319 struct net_device *dev = root_lance_dev; 1320 struct lance_private *lp = netdev_priv(dev); 1321 1322 unregister_netdev(dev); 1323 root_lance_dev = lp->next; 1324 free_netdev(dev); 1325 } 1326} 1327 1328#ifdef CONFIG_TC 1329static int __devinit dec_lance_tc_probe(struct device *dev); 1330static int __exit dec_lance_tc_remove(struct device *dev); 1331 1332static const struct tc_device_id dec_lance_tc_table[] = { 1333 { "DEC ", "PMAD-AA " }, 1334 { } 1335}; 1336MODULE_DEVICE_TABLE(tc, dec_lance_tc_table); 1337 1338static struct tc_driver dec_lance_tc_driver = { 1339 .id_table = dec_lance_tc_table, 1340 .driver = { 1341 .name = "declance", 1342 .bus = &tc_bus_type, 1343 .probe = dec_lance_tc_probe, 1344 .remove = __exit_p(dec_lance_tc_remove), 1345 }, 1346}; 1347 1348static int __devinit dec_lance_tc_probe(struct device *dev) 1349{ 1350 int status = dec_lance_probe(dev, PMAD_LANCE); 1351 if (!status) 1352 get_device(dev); 1353 return status; 1354} 1355 1356static int __exit dec_lance_tc_remove(struct device *dev) 1357{ 1358 put_device(dev); 1359 dec_lance_remove(dev); 1360 return 0; 1361} 1362#endif 1363 1364static int __init dec_lance_init(void) 1365{ 1366 int status; 1367 1368 status = tc_register_driver(&dec_lance_tc_driver); 1369 if (!status) 1370 dec_lance_platform_probe(); 1371 return status; 1372} 1373 1374static void __exit dec_lance_exit(void) 1375{ 1376 dec_lance_platform_remove(); 1377 tc_unregister_driver(&dec_lance_tc_driver); 1378} 1379 1380 1381module_init(dec_lance_init); 1382module_exit(dec_lance_exit);