Linux kernel mirror (for testing)
git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
tjh.dev
kernel
os
linux
1menu "Platform support"
2
3source "arch/powerpc/platforms/pseries/Kconfig"
4source "arch/powerpc/platforms/iseries/Kconfig"
5source "arch/powerpc/platforms/chrp/Kconfig"
6source "arch/powerpc/platforms/512x/Kconfig"
7source "arch/powerpc/platforms/52xx/Kconfig"
8source "arch/powerpc/platforms/powermac/Kconfig"
9source "arch/powerpc/platforms/prep/Kconfig"
10source "arch/powerpc/platforms/maple/Kconfig"
11source "arch/powerpc/platforms/pasemi/Kconfig"
12source "arch/powerpc/platforms/ps3/Kconfig"
13source "arch/powerpc/platforms/cell/Kconfig"
14source "arch/powerpc/platforms/8xx/Kconfig"
15source "arch/powerpc/platforms/82xx/Kconfig"
16source "arch/powerpc/platforms/83xx/Kconfig"
17source "arch/powerpc/platforms/85xx/Kconfig"
18source "arch/powerpc/platforms/86xx/Kconfig"
19source "arch/powerpc/platforms/embedded6xx/Kconfig"
20source "arch/powerpc/platforms/44x/Kconfig"
21source "arch/powerpc/platforms/40x/Kconfig"
22source "arch/powerpc/platforms/amigaone/Kconfig"
23source "arch/powerpc/platforms/wsp/Kconfig"
24
25config KVM_GUEST
26 bool "KVM Guest support"
27 default y
28 ---help---
29 This option enables various optimizations for running under the KVM
30 hypervisor. Overhead for the kernel when not running inside KVM should
31 be minimal.
32
33 In case of doubt, say Y
34
35config PPC_NATIVE
36 bool
37 depends on 6xx || PPC64
38 help
39 Support for running natively on the hardware, i.e. without
40 a hypervisor. This option is not user-selectable but should
41 be selected by all platforms that need it.
42
43config PPC_OF_BOOT_TRAMPOLINE
44 bool "Support booting from Open Firmware or yaboot"
45 depends on 6xx || PPC64
46 default y
47 help
48 Support from booting from Open Firmware or yaboot using an
49 Open Firmware client interface. This enables the kernel to
50 communicate with open firmware to retrieve system information
51 such as the device tree.
52
53 In case of doubt, say Y
54
55config UDBG_RTAS_CONSOLE
56 bool "RTAS based debug console"
57 depends on PPC_RTAS
58 default n
59
60config PPC_SMP_MUXED_IPI
61 bool
62 help
63 Select this opton if your platform supports SMP and your
64 interrupt controller provides less than 4 interrupts to each
65 cpu. This will enable the generic code to multiplex the 4
66 messages on to one ipi.
67
68config PPC_UDBG_BEAT
69 bool "BEAT based debug console"
70 depends on PPC_CELLEB
71 default n
72
73config IPIC
74 bool
75 default n
76
77config MPIC
78 bool
79 default n
80
81config MPIC_WEIRD
82 bool
83 default n
84
85config PPC_I8259
86 bool
87 default n
88
89config U3_DART
90 bool
91 depends on PPC64
92 default n
93
94config PPC_RTAS
95 bool
96 default n
97
98config RTAS_ERROR_LOGGING
99 bool
100 depends on PPC_RTAS
101 default n
102
103config PPC_RTAS_DAEMON
104 bool
105 depends on PPC_RTAS
106 default n
107
108config RTAS_PROC
109 bool "Proc interface to RTAS"
110 depends on PPC_RTAS
111 default y
112
113config RTAS_FLASH
114 tristate "Firmware flash interface"
115 depends on PPC64 && RTAS_PROC
116
117config MMIO_NVRAM
118 bool
119 default n
120
121config MPIC_U3_HT_IRQS
122 bool
123 default n
124
125config MPIC_BROKEN_REGREAD
126 bool
127 depends on MPIC
128 help
129 This option enables a MPIC driver workaround for some chips
130 that have a bug that causes some interrupt source information
131 to not read back properly. It is safe to use on other chips as
132 well, but enabling it uses about 8KB of memory to keep copies
133 of the register contents in software.
134
135config IBMVIO
136 depends on PPC_PSERIES || PPC_ISERIES
137 bool
138 default y
139
140config IBMEBUS
141 depends on PPC_PSERIES
142 bool "Support for GX bus based adapters"
143 help
144 Bus device driver for GX bus based adapters.
145
146config PPC_MPC106
147 bool
148 default n
149
150config PPC_970_NAP
151 bool
152 default n
153
154config PPC_P7_NAP
155 bool
156 default n
157
158config PPC_INDIRECT_IO
159 bool
160 select GENERIC_IOMAP
161
162config PPC_INDIRECT_PIO
163 bool
164 select PPC_INDIRECT_IO
165
166config PPC_INDIRECT_MMIO
167 bool
168 select PPC_INDIRECT_IO
169
170config PPC_IO_WORKAROUNDS
171 bool
172
173config GENERIC_IOMAP
174 bool
175
176source "drivers/cpufreq/Kconfig"
177
178menu "CPU Frequency drivers"
179 depends on CPU_FREQ
180
181config CPU_FREQ_PMAC
182 bool "Support for Apple PowerBooks"
183 depends on ADB_PMU && PPC32
184 select CPU_FREQ_TABLE
185 help
186 This adds support for frequency switching on Apple PowerBooks,
187 this currently includes some models of iBook & Titanium
188 PowerBook.
189
190config CPU_FREQ_PMAC64
191 bool "Support for some Apple G5s"
192 depends on PPC_PMAC && PPC64
193 select CPU_FREQ_TABLE
194 help
195 This adds support for frequency switching on Apple iMac G5,
196 and some of the more recent desktop G5 machines as well.
197
198config PPC_PASEMI_CPUFREQ
199 bool "Support for PA Semi PWRficient"
200 depends on PPC_PASEMI
201 default y
202 select CPU_FREQ_TABLE
203 help
204 This adds the support for frequency switching on PA Semi
205 PWRficient processors.
206
207endmenu
208
209config PPC601_SYNC_FIX
210 bool "Workarounds for PPC601 bugs"
211 depends on 6xx && (PPC_PREP || PPC_PMAC)
212 help
213 Some versions of the PPC601 (the first PowerPC chip) have bugs which
214 mean that extra synchronization instructions are required near
215 certain instructions, typically those that make major changes to the
216 CPU state. These extra instructions reduce performance slightly.
217 If you say N here, these extra instructions will not be included,
218 resulting in a kernel which will run faster but may not run at all
219 on some systems with the PPC601 chip.
220
221 If in doubt, say Y here.
222
223config TAU
224 bool "On-chip CPU temperature sensor support"
225 depends on 6xx
226 help
227 G3 and G4 processors have an on-chip temperature sensor called the
228 'Thermal Assist Unit (TAU)', which, in theory, can measure the on-die
229 temperature within 2-4 degrees Celsius. This option shows the current
230 on-die temperature in /proc/cpuinfo if the cpu supports it.
231
232 Unfortunately, on some chip revisions, this sensor is very inaccurate
233 and in many cases, does not work at all, so don't assume the cpu
234 temp is actually what /proc/cpuinfo says it is.
235
236config TAU_INT
237 bool "Interrupt driven TAU driver (DANGEROUS)"
238 depends on TAU
239 ---help---
240 The TAU supports an interrupt driven mode which causes an interrupt
241 whenever the temperature goes out of range. This is the fastest way
242 to get notified the temp has exceeded a range. With this option off,
243 a timer is used to re-check the temperature periodically.
244
245 However, on some cpus it appears that the TAU interrupt hardware
246 is buggy and can cause a situation which would lead unexplained hard
247 lockups.
248
249 Unless you are extending the TAU driver, or enjoy kernel/hardware
250 debugging, leave this option off.
251
252config TAU_AVERAGE
253 bool "Average high and low temp"
254 depends on TAU
255 ---help---
256 The TAU hardware can compare the temperature to an upper and lower
257 bound. The default behavior is to show both the upper and lower
258 bound in /proc/cpuinfo. If the range is large, the temperature is
259 either changing a lot, or the TAU hardware is broken (likely on some
260 G4's). If the range is small (around 4 degrees), the temperature is
261 relatively stable. If you say Y here, a single temperature value,
262 halfway between the upper and lower bounds, will be reported in
263 /proc/cpuinfo.
264
265 If in doubt, say N here.
266
267config QUICC_ENGINE
268 bool "Freescale QUICC Engine (QE) Support"
269 depends on FSL_SOC
270 select PPC_LIB_RHEAP
271 select CRC32
272 help
273 The QUICC Engine (QE) is a new generation of communications
274 coprocessors on Freescale embedded CPUs (akin to CPM in older chips).
275 Selecting this option means that you wish to build a kernel
276 for a machine with a QE coprocessor.
277
278config QE_GPIO
279 bool "QE GPIO support"
280 depends on QUICC_ENGINE
281 select GENERIC_GPIO
282 select ARCH_REQUIRE_GPIOLIB
283 help
284 Say Y here if you're going to use hardware that connects to the
285 QE GPIOs.
286
287config CPM2
288 bool "Enable support for the CPM2 (Communications Processor Module)"
289 depends on (FSL_SOC_BOOKE && PPC32) || 8260
290 select CPM
291 select PPC_LIB_RHEAP
292 select PPC_PCI_CHOICE
293 select ARCH_REQUIRE_GPIOLIB
294 select GENERIC_GPIO
295 help
296 The CPM2 (Communications Processor Module) is a coprocessor on
297 embedded CPUs made by Freescale. Selecting this option means that
298 you wish to build a kernel for a machine with a CPM2 coprocessor
299 on it (826x, 827x, 8560).
300
301config AXON_RAM
302 tristate "Axon DDR2 memory device driver"
303 depends on PPC_IBM_CELL_BLADE && BLOCK
304 default m
305 help
306 It registers one block device per Axon's DDR2 memory bank found
307 on a system. Block devices are called axonram?, their major and
308 minor numbers are available in /proc/devices, /proc/partitions or
309 in /sys/block/axonram?/dev.
310
311config FSL_ULI1575
312 bool
313 default n
314 select GENERIC_ISA_DMA
315 help
316 Supports for the ULI1575 PCIe south bridge that exists on some
317 Freescale reference boards. The boards all use the ULI in pretty
318 much the same way.
319
320config CPM
321 bool
322 select PPC_CLOCK
323
324config OF_RTC
325 bool
326 help
327 Uses information from the OF or flattened device tree to instantiate
328 platform devices for direct mapped RTC chips like the DS1742 or DS1743.
329
330source "arch/powerpc/sysdev/bestcomm/Kconfig"
331
332config MPC8xxx_GPIO
333 bool "MPC512x/MPC8xxx GPIO support"
334 depends on PPC_MPC512x || PPC_MPC831x || PPC_MPC834x || PPC_MPC837x || \
335 FSL_SOC_BOOKE || PPC_86xx
336 select GENERIC_GPIO
337 select ARCH_REQUIRE_GPIOLIB
338 help
339 Say Y here if you're going to use hardware that connects to the
340 MPC512x/831x/834x/837x/8572/8610 GPIOs.
341
342config SIMPLE_GPIO
343 bool "Support for simple, memory-mapped GPIO controllers"
344 depends on PPC
345 select GENERIC_GPIO
346 select ARCH_REQUIRE_GPIOLIB
347 help
348 Say Y here to support simple, memory-mapped GPIO controllers.
349 These are usually BCSRs used to control board's switches, LEDs,
350 chip-selects, Ethernet/USB PHY's power and various other small
351 on-board peripherals.
352
353config MCU_MPC8349EMITX
354 tristate "MPC8349E-mITX MCU driver"
355 depends on I2C && PPC_83xx
356 select GENERIC_GPIO
357 select ARCH_REQUIRE_GPIOLIB
358 help
359 Say Y here to enable soft power-off functionality on the Freescale
360 boards with the MPC8349E-mITX-compatible MCU chips. This driver will
361 also register MCU GPIOs with the generic GPIO API, so you'll able
362 to use MCU pins as GPIOs.
363
364config XILINX_PCI
365 bool "Xilinx PCI host bridge support"
366 depends on PCI && XILINX_VIRTEX
367
368endmenu