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1/* 2 * Xen event channels 3 * 4 * Xen models interrupts with abstract event channels. Because each 5 * domain gets 1024 event channels, but NR_IRQ is not that large, we 6 * must dynamically map irqs<->event channels. The event channels 7 * interface with the rest of the kernel by defining a xen interrupt 8 * chip. When an event is received, it is mapped to an irq and sent 9 * through the normal interrupt processing path. 10 * 11 * There are four kinds of events which can be mapped to an event 12 * channel: 13 * 14 * 1. Inter-domain notifications. This includes all the virtual 15 * device events, since they're driven by front-ends in another domain 16 * (typically dom0). 17 * 2. VIRQs, typically used for timers. These are per-cpu events. 18 * 3. IPIs. 19 * 4. PIRQs - Hardware interrupts. 20 * 21 * Jeremy Fitzhardinge <jeremy@xensource.com>, XenSource Inc, 2007 22 */ 23 24#include <linux/linkage.h> 25#include <linux/interrupt.h> 26#include <linux/irq.h> 27#include <linux/module.h> 28#include <linux/string.h> 29#include <linux/bootmem.h> 30#include <linux/slab.h> 31#include <linux/irqnr.h> 32#include <linux/pci.h> 33 34#include <asm/desc.h> 35#include <asm/ptrace.h> 36#include <asm/irq.h> 37#include <asm/idle.h> 38#include <asm/io_apic.h> 39#include <asm/sync_bitops.h> 40#include <asm/xen/pci.h> 41#include <asm/xen/hypercall.h> 42#include <asm/xen/hypervisor.h> 43 44#include <xen/xen.h> 45#include <xen/hvm.h> 46#include <xen/xen-ops.h> 47#include <xen/events.h> 48#include <xen/interface/xen.h> 49#include <xen/interface/event_channel.h> 50#include <xen/interface/hvm/hvm_op.h> 51#include <xen/interface/hvm/params.h> 52 53/* 54 * This lock protects updates to the following mapping and reference-count 55 * arrays. The lock does not need to be acquired to read the mapping tables. 56 */ 57static DEFINE_SPINLOCK(irq_mapping_update_lock); 58 59static LIST_HEAD(xen_irq_list_head); 60 61/* IRQ <-> VIRQ mapping. */ 62static DEFINE_PER_CPU(int [NR_VIRQS], virq_to_irq) = {[0 ... NR_VIRQS-1] = -1}; 63 64/* IRQ <-> IPI mapping */ 65static DEFINE_PER_CPU(int [XEN_NR_IPIS], ipi_to_irq) = {[0 ... XEN_NR_IPIS-1] = -1}; 66 67/* Interrupt types. */ 68enum xen_irq_type { 69 IRQT_UNBOUND = 0, 70 IRQT_PIRQ, 71 IRQT_VIRQ, 72 IRQT_IPI, 73 IRQT_EVTCHN 74}; 75 76/* 77 * Packed IRQ information: 78 * type - enum xen_irq_type 79 * event channel - irq->event channel mapping 80 * cpu - cpu this event channel is bound to 81 * index - type-specific information: 82 * PIRQ - vector, with MSB being "needs EIO", or physical IRQ of the HVM 83 * guest, or GSI (real passthrough IRQ) of the device. 84 * VIRQ - virq number 85 * IPI - IPI vector 86 * EVTCHN - 87 */ 88struct irq_info 89{ 90 struct list_head list; 91 enum xen_irq_type type; /* type */ 92 unsigned irq; 93 unsigned short evtchn; /* event channel */ 94 unsigned short cpu; /* cpu bound */ 95 96 union { 97 unsigned short virq; 98 enum ipi_vector ipi; 99 struct { 100 unsigned short pirq; 101 unsigned short gsi; 102 unsigned char vector; 103 unsigned char flags; 104 uint16_t domid; 105 } pirq; 106 } u; 107}; 108#define PIRQ_NEEDS_EOI (1 << 0) 109#define PIRQ_SHAREABLE (1 << 1) 110 111static int *evtchn_to_irq; 112 113static DEFINE_PER_CPU(unsigned long [NR_EVENT_CHANNELS/BITS_PER_LONG], 114 cpu_evtchn_mask); 115 116/* Xen will never allocate port zero for any purpose. */ 117#define VALID_EVTCHN(chn) ((chn) != 0) 118 119static struct irq_chip xen_dynamic_chip; 120static struct irq_chip xen_percpu_chip; 121static struct irq_chip xen_pirq_chip; 122static void enable_dynirq(struct irq_data *data); 123static void disable_dynirq(struct irq_data *data); 124 125/* Get info for IRQ */ 126static struct irq_info *info_for_irq(unsigned irq) 127{ 128 return irq_get_handler_data(irq); 129} 130 131/* Constructors for packed IRQ information. */ 132static void xen_irq_info_common_init(struct irq_info *info, 133 unsigned irq, 134 enum xen_irq_type type, 135 unsigned short evtchn, 136 unsigned short cpu) 137{ 138 139 BUG_ON(info->type != IRQT_UNBOUND && info->type != type); 140 141 info->type = type; 142 info->irq = irq; 143 info->evtchn = evtchn; 144 info->cpu = cpu; 145 146 evtchn_to_irq[evtchn] = irq; 147} 148 149static void xen_irq_info_evtchn_init(unsigned irq, 150 unsigned short evtchn) 151{ 152 struct irq_info *info = info_for_irq(irq); 153 154 xen_irq_info_common_init(info, irq, IRQT_EVTCHN, evtchn, 0); 155} 156 157static void xen_irq_info_ipi_init(unsigned cpu, 158 unsigned irq, 159 unsigned short evtchn, 160 enum ipi_vector ipi) 161{ 162 struct irq_info *info = info_for_irq(irq); 163 164 xen_irq_info_common_init(info, irq, IRQT_IPI, evtchn, 0); 165 166 info->u.ipi = ipi; 167 168 per_cpu(ipi_to_irq, cpu)[ipi] = irq; 169} 170 171static void xen_irq_info_virq_init(unsigned cpu, 172 unsigned irq, 173 unsigned short evtchn, 174 unsigned short virq) 175{ 176 struct irq_info *info = info_for_irq(irq); 177 178 xen_irq_info_common_init(info, irq, IRQT_VIRQ, evtchn, 0); 179 180 info->u.virq = virq; 181 182 per_cpu(virq_to_irq, cpu)[virq] = irq; 183} 184 185static void xen_irq_info_pirq_init(unsigned irq, 186 unsigned short evtchn, 187 unsigned short pirq, 188 unsigned short gsi, 189 unsigned short vector, 190 uint16_t domid, 191 unsigned char flags) 192{ 193 struct irq_info *info = info_for_irq(irq); 194 195 xen_irq_info_common_init(info, irq, IRQT_PIRQ, evtchn, 0); 196 197 info->u.pirq.pirq = pirq; 198 info->u.pirq.gsi = gsi; 199 info->u.pirq.vector = vector; 200 info->u.pirq.domid = domid; 201 info->u.pirq.flags = flags; 202} 203 204/* 205 * Accessors for packed IRQ information. 206 */ 207static unsigned int evtchn_from_irq(unsigned irq) 208{ 209 if (unlikely(WARN(irq < 0 || irq >= nr_irqs, "Invalid irq %d!\n", irq))) 210 return 0; 211 212 return info_for_irq(irq)->evtchn; 213} 214 215unsigned irq_from_evtchn(unsigned int evtchn) 216{ 217 return evtchn_to_irq[evtchn]; 218} 219EXPORT_SYMBOL_GPL(irq_from_evtchn); 220 221static enum ipi_vector ipi_from_irq(unsigned irq) 222{ 223 struct irq_info *info = info_for_irq(irq); 224 225 BUG_ON(info == NULL); 226 BUG_ON(info->type != IRQT_IPI); 227 228 return info->u.ipi; 229} 230 231static unsigned virq_from_irq(unsigned irq) 232{ 233 struct irq_info *info = info_for_irq(irq); 234 235 BUG_ON(info == NULL); 236 BUG_ON(info->type != IRQT_VIRQ); 237 238 return info->u.virq; 239} 240 241static unsigned pirq_from_irq(unsigned irq) 242{ 243 struct irq_info *info = info_for_irq(irq); 244 245 BUG_ON(info == NULL); 246 BUG_ON(info->type != IRQT_PIRQ); 247 248 return info->u.pirq.pirq; 249} 250 251static enum xen_irq_type type_from_irq(unsigned irq) 252{ 253 return info_for_irq(irq)->type; 254} 255 256static unsigned cpu_from_irq(unsigned irq) 257{ 258 return info_for_irq(irq)->cpu; 259} 260 261static unsigned int cpu_from_evtchn(unsigned int evtchn) 262{ 263 int irq = evtchn_to_irq[evtchn]; 264 unsigned ret = 0; 265 266 if (irq != -1) 267 ret = cpu_from_irq(irq); 268 269 return ret; 270} 271 272static bool pirq_needs_eoi(unsigned irq) 273{ 274 struct irq_info *info = info_for_irq(irq); 275 276 BUG_ON(info->type != IRQT_PIRQ); 277 278 return info->u.pirq.flags & PIRQ_NEEDS_EOI; 279} 280 281static inline unsigned long active_evtchns(unsigned int cpu, 282 struct shared_info *sh, 283 unsigned int idx) 284{ 285 return (sh->evtchn_pending[idx] & 286 per_cpu(cpu_evtchn_mask, cpu)[idx] & 287 ~sh->evtchn_mask[idx]); 288} 289 290static void bind_evtchn_to_cpu(unsigned int chn, unsigned int cpu) 291{ 292 int irq = evtchn_to_irq[chn]; 293 294 BUG_ON(irq == -1); 295#ifdef CONFIG_SMP 296 cpumask_copy(irq_to_desc(irq)->irq_data.affinity, cpumask_of(cpu)); 297#endif 298 299 clear_bit(chn, per_cpu(cpu_evtchn_mask, cpu_from_irq(irq))); 300 set_bit(chn, per_cpu(cpu_evtchn_mask, cpu)); 301 302 info_for_irq(irq)->cpu = cpu; 303} 304 305static void init_evtchn_cpu_bindings(void) 306{ 307 int i; 308#ifdef CONFIG_SMP 309 struct irq_info *info; 310 311 /* By default all event channels notify CPU#0. */ 312 list_for_each_entry(info, &xen_irq_list_head, list) { 313 struct irq_desc *desc = irq_to_desc(info->irq); 314 cpumask_copy(desc->irq_data.affinity, cpumask_of(0)); 315 } 316#endif 317 318 for_each_possible_cpu(i) 319 memset(per_cpu(cpu_evtchn_mask, i), 320 (i == 0) ? ~0 : 0, sizeof(*per_cpu(cpu_evtchn_mask, i))); 321} 322 323static inline void clear_evtchn(int port) 324{ 325 struct shared_info *s = HYPERVISOR_shared_info; 326 sync_clear_bit(port, &s->evtchn_pending[0]); 327} 328 329static inline void set_evtchn(int port) 330{ 331 struct shared_info *s = HYPERVISOR_shared_info; 332 sync_set_bit(port, &s->evtchn_pending[0]); 333} 334 335static inline int test_evtchn(int port) 336{ 337 struct shared_info *s = HYPERVISOR_shared_info; 338 return sync_test_bit(port, &s->evtchn_pending[0]); 339} 340 341 342/** 343 * notify_remote_via_irq - send event to remote end of event channel via irq 344 * @irq: irq of event channel to send event to 345 * 346 * Unlike notify_remote_via_evtchn(), this is safe to use across 347 * save/restore. Notifications on a broken connection are silently 348 * dropped. 349 */ 350void notify_remote_via_irq(int irq) 351{ 352 int evtchn = evtchn_from_irq(irq); 353 354 if (VALID_EVTCHN(evtchn)) 355 notify_remote_via_evtchn(evtchn); 356} 357EXPORT_SYMBOL_GPL(notify_remote_via_irq); 358 359static void mask_evtchn(int port) 360{ 361 struct shared_info *s = HYPERVISOR_shared_info; 362 sync_set_bit(port, &s->evtchn_mask[0]); 363} 364 365static void unmask_evtchn(int port) 366{ 367 struct shared_info *s = HYPERVISOR_shared_info; 368 unsigned int cpu = get_cpu(); 369 370 BUG_ON(!irqs_disabled()); 371 372 /* Slow path (hypercall) if this is a non-local port. */ 373 if (unlikely(cpu != cpu_from_evtchn(port))) { 374 struct evtchn_unmask unmask = { .port = port }; 375 (void)HYPERVISOR_event_channel_op(EVTCHNOP_unmask, &unmask); 376 } else { 377 struct vcpu_info *vcpu_info = __this_cpu_read(xen_vcpu); 378 379 sync_clear_bit(port, &s->evtchn_mask[0]); 380 381 /* 382 * The following is basically the equivalent of 383 * 'hw_resend_irq'. Just like a real IO-APIC we 'lose 384 * the interrupt edge' if the channel is masked. 385 */ 386 if (sync_test_bit(port, &s->evtchn_pending[0]) && 387 !sync_test_and_set_bit(port / BITS_PER_LONG, 388 &vcpu_info->evtchn_pending_sel)) 389 vcpu_info->evtchn_upcall_pending = 1; 390 } 391 392 put_cpu(); 393} 394 395static void xen_irq_init(unsigned irq) 396{ 397 struct irq_info *info; 398 struct irq_desc *desc = irq_to_desc(irq); 399 400#ifdef CONFIG_SMP 401 /* By default all event channels notify CPU#0. */ 402 cpumask_copy(desc->irq_data.affinity, cpumask_of(0)); 403#endif 404 405 info = kzalloc(sizeof(*info), GFP_KERNEL); 406 if (info == NULL) 407 panic("Unable to allocate metadata for IRQ%d\n", irq); 408 409 info->type = IRQT_UNBOUND; 410 411 irq_set_handler_data(irq, info); 412 413 list_add_tail(&info->list, &xen_irq_list_head); 414} 415 416static int __must_check xen_allocate_irq_dynamic(void) 417{ 418 int first = 0; 419 int irq; 420 421#ifdef CONFIG_X86_IO_APIC 422 /* 423 * For an HVM guest or domain 0 which see "real" (emulated or 424 * actual respectively) GSIs we allocate dynamic IRQs 425 * e.g. those corresponding to event channels or MSIs 426 * etc. from the range above those "real" GSIs to avoid 427 * collisions. 428 */ 429 if (xen_initial_domain() || xen_hvm_domain()) 430 first = get_nr_irqs_gsi(); 431#endif 432 433 irq = irq_alloc_desc_from(first, -1); 434 435 xen_irq_init(irq); 436 437 return irq; 438} 439 440static int __must_check xen_allocate_irq_gsi(unsigned gsi) 441{ 442 int irq; 443 444 /* 445 * A PV guest has no concept of a GSI (since it has no ACPI 446 * nor access to/knowledge of the physical APICs). Therefore 447 * all IRQs are dynamically allocated from the entire IRQ 448 * space. 449 */ 450 if (xen_pv_domain() && !xen_initial_domain()) 451 return xen_allocate_irq_dynamic(); 452 453 /* Legacy IRQ descriptors are already allocated by the arch. */ 454 if (gsi < NR_IRQS_LEGACY) 455 irq = gsi; 456 else 457 irq = irq_alloc_desc_at(gsi, -1); 458 459 xen_irq_init(irq); 460 461 return irq; 462} 463 464static void xen_free_irq(unsigned irq) 465{ 466 struct irq_info *info = irq_get_handler_data(irq); 467 468 list_del(&info->list); 469 470 irq_set_handler_data(irq, NULL); 471 472 kfree(info); 473 474 /* Legacy IRQ descriptors are managed by the arch. */ 475 if (irq < NR_IRQS_LEGACY) 476 return; 477 478 irq_free_desc(irq); 479} 480 481static void pirq_query_unmask(int irq) 482{ 483 struct physdev_irq_status_query irq_status; 484 struct irq_info *info = info_for_irq(irq); 485 486 BUG_ON(info->type != IRQT_PIRQ); 487 488 irq_status.irq = pirq_from_irq(irq); 489 if (HYPERVISOR_physdev_op(PHYSDEVOP_irq_status_query, &irq_status)) 490 irq_status.flags = 0; 491 492 info->u.pirq.flags &= ~PIRQ_NEEDS_EOI; 493 if (irq_status.flags & XENIRQSTAT_needs_eoi) 494 info->u.pirq.flags |= PIRQ_NEEDS_EOI; 495} 496 497static bool probing_irq(int irq) 498{ 499 struct irq_desc *desc = irq_to_desc(irq); 500 501 return desc && desc->action == NULL; 502} 503 504static void eoi_pirq(struct irq_data *data) 505{ 506 int evtchn = evtchn_from_irq(data->irq); 507 struct physdev_eoi eoi = { .irq = pirq_from_irq(data->irq) }; 508 int rc = 0; 509 510 irq_move_irq(data); 511 512 if (VALID_EVTCHN(evtchn)) 513 clear_evtchn(evtchn); 514 515 if (pirq_needs_eoi(data->irq)) { 516 rc = HYPERVISOR_physdev_op(PHYSDEVOP_eoi, &eoi); 517 WARN_ON(rc); 518 } 519} 520 521static void mask_ack_pirq(struct irq_data *data) 522{ 523 disable_dynirq(data); 524 eoi_pirq(data); 525} 526 527static unsigned int __startup_pirq(unsigned int irq) 528{ 529 struct evtchn_bind_pirq bind_pirq; 530 struct irq_info *info = info_for_irq(irq); 531 int evtchn = evtchn_from_irq(irq); 532 int rc; 533 534 BUG_ON(info->type != IRQT_PIRQ); 535 536 if (VALID_EVTCHN(evtchn)) 537 goto out; 538 539 bind_pirq.pirq = pirq_from_irq(irq); 540 /* NB. We are happy to share unless we are probing. */ 541 bind_pirq.flags = info->u.pirq.flags & PIRQ_SHAREABLE ? 542 BIND_PIRQ__WILL_SHARE : 0; 543 rc = HYPERVISOR_event_channel_op(EVTCHNOP_bind_pirq, &bind_pirq); 544 if (rc != 0) { 545 if (!probing_irq(irq)) 546 printk(KERN_INFO "Failed to obtain physical IRQ %d\n", 547 irq); 548 return 0; 549 } 550 evtchn = bind_pirq.port; 551 552 pirq_query_unmask(irq); 553 554 evtchn_to_irq[evtchn] = irq; 555 bind_evtchn_to_cpu(evtchn, 0); 556 info->evtchn = evtchn; 557 558out: 559 unmask_evtchn(evtchn); 560 eoi_pirq(irq_get_irq_data(irq)); 561 562 return 0; 563} 564 565static unsigned int startup_pirq(struct irq_data *data) 566{ 567 return __startup_pirq(data->irq); 568} 569 570static void shutdown_pirq(struct irq_data *data) 571{ 572 struct evtchn_close close; 573 unsigned int irq = data->irq; 574 struct irq_info *info = info_for_irq(irq); 575 int evtchn = evtchn_from_irq(irq); 576 577 BUG_ON(info->type != IRQT_PIRQ); 578 579 if (!VALID_EVTCHN(evtchn)) 580 return; 581 582 mask_evtchn(evtchn); 583 584 close.port = evtchn; 585 if (HYPERVISOR_event_channel_op(EVTCHNOP_close, &close) != 0) 586 BUG(); 587 588 bind_evtchn_to_cpu(evtchn, 0); 589 evtchn_to_irq[evtchn] = -1; 590 info->evtchn = 0; 591} 592 593static void enable_pirq(struct irq_data *data) 594{ 595 startup_pirq(data); 596} 597 598static void disable_pirq(struct irq_data *data) 599{ 600 disable_dynirq(data); 601} 602 603static int find_irq_by_gsi(unsigned gsi) 604{ 605 struct irq_info *info; 606 607 list_for_each_entry(info, &xen_irq_list_head, list) { 608 if (info->type != IRQT_PIRQ) 609 continue; 610 611 if (info->u.pirq.gsi == gsi) 612 return info->irq; 613 } 614 615 return -1; 616} 617 618int xen_allocate_pirq_gsi(unsigned gsi) 619{ 620 return gsi; 621} 622 623/* 624 * Do not make any assumptions regarding the relationship between the 625 * IRQ number returned here and the Xen pirq argument. 626 * 627 * Note: We don't assign an event channel until the irq actually started 628 * up. Return an existing irq if we've already got one for the gsi. 629 * 630 * Shareable implies level triggered, not shareable implies edge 631 * triggered here. 632 */ 633int xen_bind_pirq_gsi_to_irq(unsigned gsi, 634 unsigned pirq, int shareable, char *name) 635{ 636 int irq = -1; 637 struct physdev_irq irq_op; 638 639 spin_lock(&irq_mapping_update_lock); 640 641 irq = find_irq_by_gsi(gsi); 642 if (irq != -1) { 643 printk(KERN_INFO "xen_map_pirq_gsi: returning irq %d for gsi %u\n", 644 irq, gsi); 645 goto out; /* XXX need refcount? */ 646 } 647 648 irq = xen_allocate_irq_gsi(gsi); 649 if (irq < 0) 650 goto out; 651 652 irq_op.irq = irq; 653 irq_op.vector = 0; 654 655 /* Only the privileged domain can do this. For non-priv, the pcifront 656 * driver provides a PCI bus that does the call to do exactly 657 * this in the priv domain. */ 658 if (xen_initial_domain() && 659 HYPERVISOR_physdev_op(PHYSDEVOP_alloc_irq_vector, &irq_op)) { 660 xen_free_irq(irq); 661 irq = -ENOSPC; 662 goto out; 663 } 664 665 xen_irq_info_pirq_init(irq, 0, pirq, gsi, irq_op.vector, DOMID_SELF, 666 shareable ? PIRQ_SHAREABLE : 0); 667 668 pirq_query_unmask(irq); 669 /* We try to use the handler with the appropriate semantic for the 670 * type of interrupt: if the interrupt is an edge triggered 671 * interrupt we use handle_edge_irq. 672 * 673 * On the other hand if the interrupt is level triggered we use 674 * handle_fasteoi_irq like the native code does for this kind of 675 * interrupts. 676 * 677 * Depending on the Xen version, pirq_needs_eoi might return true 678 * not only for level triggered interrupts but for edge triggered 679 * interrupts too. In any case Xen always honors the eoi mechanism, 680 * not injecting any more pirqs of the same kind if the first one 681 * hasn't received an eoi yet. Therefore using the fasteoi handler 682 * is the right choice either way. 683 */ 684 if (shareable) 685 irq_set_chip_and_handler_name(irq, &xen_pirq_chip, 686 handle_fasteoi_irq, name); 687 else 688 irq_set_chip_and_handler_name(irq, &xen_pirq_chip, 689 handle_edge_irq, name); 690 691out: 692 spin_unlock(&irq_mapping_update_lock); 693 694 return irq; 695} 696 697#ifdef CONFIG_PCI_MSI 698int xen_allocate_pirq_msi(struct pci_dev *dev, struct msi_desc *msidesc) 699{ 700 int rc; 701 struct physdev_get_free_pirq op_get_free_pirq; 702 703 op_get_free_pirq.type = MAP_PIRQ_TYPE_MSI; 704 rc = HYPERVISOR_physdev_op(PHYSDEVOP_get_free_pirq, &op_get_free_pirq); 705 706 WARN_ONCE(rc == -ENOSYS, 707 "hypervisor does not support the PHYSDEVOP_get_free_pirq interface\n"); 708 709 return rc ? -1 : op_get_free_pirq.pirq; 710} 711 712int xen_bind_pirq_msi_to_irq(struct pci_dev *dev, struct msi_desc *msidesc, 713 int pirq, int vector, const char *name, 714 domid_t domid) 715{ 716 int irq, ret; 717 718 spin_lock(&irq_mapping_update_lock); 719 720 irq = xen_allocate_irq_dynamic(); 721 if (irq == -1) 722 goto out; 723 724 irq_set_chip_and_handler_name(irq, &xen_pirq_chip, handle_edge_irq, 725 name); 726 727 xen_irq_info_pirq_init(irq, 0, pirq, 0, vector, domid, 0); 728 ret = irq_set_msi_desc(irq, msidesc); 729 if (ret < 0) 730 goto error_irq; 731out: 732 spin_unlock(&irq_mapping_update_lock); 733 return irq; 734error_irq: 735 spin_unlock(&irq_mapping_update_lock); 736 xen_free_irq(irq); 737 return -1; 738} 739#endif 740 741int xen_destroy_irq(int irq) 742{ 743 struct irq_desc *desc; 744 struct physdev_unmap_pirq unmap_irq; 745 struct irq_info *info = info_for_irq(irq); 746 int rc = -ENOENT; 747 748 spin_lock(&irq_mapping_update_lock); 749 750 desc = irq_to_desc(irq); 751 if (!desc) 752 goto out; 753 754 if (xen_initial_domain()) { 755 unmap_irq.pirq = info->u.pirq.pirq; 756 unmap_irq.domid = info->u.pirq.domid; 757 rc = HYPERVISOR_physdev_op(PHYSDEVOP_unmap_pirq, &unmap_irq); 758 /* If another domain quits without making the pci_disable_msix 759 * call, the Xen hypervisor takes care of freeing the PIRQs 760 * (free_domain_pirqs). 761 */ 762 if ((rc == -ESRCH && info->u.pirq.domid != DOMID_SELF)) 763 printk(KERN_INFO "domain %d does not have %d anymore\n", 764 info->u.pirq.domid, info->u.pirq.pirq); 765 else if (rc) { 766 printk(KERN_WARNING "unmap irq failed %d\n", rc); 767 goto out; 768 } 769 } 770 771 xen_free_irq(irq); 772 773out: 774 spin_unlock(&irq_mapping_update_lock); 775 return rc; 776} 777 778int xen_irq_from_pirq(unsigned pirq) 779{ 780 int irq; 781 782 struct irq_info *info; 783 784 spin_lock(&irq_mapping_update_lock); 785 786 list_for_each_entry(info, &xen_irq_list_head, list) { 787 if (info == NULL || info->type != IRQT_PIRQ) 788 continue; 789 irq = info->irq; 790 if (info->u.pirq.pirq == pirq) 791 goto out; 792 } 793 irq = -1; 794out: 795 spin_unlock(&irq_mapping_update_lock); 796 797 return irq; 798} 799 800 801int xen_pirq_from_irq(unsigned irq) 802{ 803 return pirq_from_irq(irq); 804} 805EXPORT_SYMBOL_GPL(xen_pirq_from_irq); 806int bind_evtchn_to_irq(unsigned int evtchn) 807{ 808 int irq; 809 810 spin_lock(&irq_mapping_update_lock); 811 812 irq = evtchn_to_irq[evtchn]; 813 814 if (irq == -1) { 815 irq = xen_allocate_irq_dynamic(); 816 if (irq == -1) 817 goto out; 818 819 irq_set_chip_and_handler_name(irq, &xen_dynamic_chip, 820 handle_edge_irq, "event"); 821 822 xen_irq_info_evtchn_init(irq, evtchn); 823 } 824 825out: 826 spin_unlock(&irq_mapping_update_lock); 827 828 return irq; 829} 830EXPORT_SYMBOL_GPL(bind_evtchn_to_irq); 831 832static int bind_ipi_to_irq(unsigned int ipi, unsigned int cpu) 833{ 834 struct evtchn_bind_ipi bind_ipi; 835 int evtchn, irq; 836 837 spin_lock(&irq_mapping_update_lock); 838 839 irq = per_cpu(ipi_to_irq, cpu)[ipi]; 840 841 if (irq == -1) { 842 irq = xen_allocate_irq_dynamic(); 843 if (irq < 0) 844 goto out; 845 846 irq_set_chip_and_handler_name(irq, &xen_percpu_chip, 847 handle_percpu_irq, "ipi"); 848 849 bind_ipi.vcpu = cpu; 850 if (HYPERVISOR_event_channel_op(EVTCHNOP_bind_ipi, 851 &bind_ipi) != 0) 852 BUG(); 853 evtchn = bind_ipi.port; 854 855 xen_irq_info_ipi_init(cpu, irq, evtchn, ipi); 856 857 bind_evtchn_to_cpu(evtchn, cpu); 858 } 859 860 out: 861 spin_unlock(&irq_mapping_update_lock); 862 return irq; 863} 864 865static int bind_interdomain_evtchn_to_irq(unsigned int remote_domain, 866 unsigned int remote_port) 867{ 868 struct evtchn_bind_interdomain bind_interdomain; 869 int err; 870 871 bind_interdomain.remote_dom = remote_domain; 872 bind_interdomain.remote_port = remote_port; 873 874 err = HYPERVISOR_event_channel_op(EVTCHNOP_bind_interdomain, 875 &bind_interdomain); 876 877 return err ? : bind_evtchn_to_irq(bind_interdomain.local_port); 878} 879 880 881int bind_virq_to_irq(unsigned int virq, unsigned int cpu) 882{ 883 struct evtchn_bind_virq bind_virq; 884 int evtchn, irq; 885 886 spin_lock(&irq_mapping_update_lock); 887 888 irq = per_cpu(virq_to_irq, cpu)[virq]; 889 890 if (irq == -1) { 891 irq = xen_allocate_irq_dynamic(); 892 if (irq == -1) 893 goto out; 894 895 irq_set_chip_and_handler_name(irq, &xen_percpu_chip, 896 handle_percpu_irq, "virq"); 897 898 bind_virq.virq = virq; 899 bind_virq.vcpu = cpu; 900 if (HYPERVISOR_event_channel_op(EVTCHNOP_bind_virq, 901 &bind_virq) != 0) 902 BUG(); 903 evtchn = bind_virq.port; 904 905 xen_irq_info_virq_init(cpu, irq, evtchn, virq); 906 907 bind_evtchn_to_cpu(evtchn, cpu); 908 } 909 910out: 911 spin_unlock(&irq_mapping_update_lock); 912 913 return irq; 914} 915 916static void unbind_from_irq(unsigned int irq) 917{ 918 struct evtchn_close close; 919 int evtchn = evtchn_from_irq(irq); 920 921 spin_lock(&irq_mapping_update_lock); 922 923 if (VALID_EVTCHN(evtchn)) { 924 close.port = evtchn; 925 if (HYPERVISOR_event_channel_op(EVTCHNOP_close, &close) != 0) 926 BUG(); 927 928 switch (type_from_irq(irq)) { 929 case IRQT_VIRQ: 930 per_cpu(virq_to_irq, cpu_from_evtchn(evtchn)) 931 [virq_from_irq(irq)] = -1; 932 break; 933 case IRQT_IPI: 934 per_cpu(ipi_to_irq, cpu_from_evtchn(evtchn)) 935 [ipi_from_irq(irq)] = -1; 936 break; 937 default: 938 break; 939 } 940 941 /* Closed ports are implicitly re-bound to VCPU0. */ 942 bind_evtchn_to_cpu(evtchn, 0); 943 944 evtchn_to_irq[evtchn] = -1; 945 } 946 947 BUG_ON(info_for_irq(irq)->type == IRQT_UNBOUND); 948 949 xen_free_irq(irq); 950 951 spin_unlock(&irq_mapping_update_lock); 952} 953 954int bind_evtchn_to_irqhandler(unsigned int evtchn, 955 irq_handler_t handler, 956 unsigned long irqflags, 957 const char *devname, void *dev_id) 958{ 959 int irq, retval; 960 961 irq = bind_evtchn_to_irq(evtchn); 962 if (irq < 0) 963 return irq; 964 retval = request_irq(irq, handler, irqflags, devname, dev_id); 965 if (retval != 0) { 966 unbind_from_irq(irq); 967 return retval; 968 } 969 970 return irq; 971} 972EXPORT_SYMBOL_GPL(bind_evtchn_to_irqhandler); 973 974int bind_interdomain_evtchn_to_irqhandler(unsigned int remote_domain, 975 unsigned int remote_port, 976 irq_handler_t handler, 977 unsigned long irqflags, 978 const char *devname, 979 void *dev_id) 980{ 981 int irq, retval; 982 983 irq = bind_interdomain_evtchn_to_irq(remote_domain, remote_port); 984 if (irq < 0) 985 return irq; 986 987 retval = request_irq(irq, handler, irqflags, devname, dev_id); 988 if (retval != 0) { 989 unbind_from_irq(irq); 990 return retval; 991 } 992 993 return irq; 994} 995EXPORT_SYMBOL_GPL(bind_interdomain_evtchn_to_irqhandler); 996 997int bind_virq_to_irqhandler(unsigned int virq, unsigned int cpu, 998 irq_handler_t handler, 999 unsigned long irqflags, const char *devname, void *dev_id) 1000{ 1001 int irq, retval; 1002 1003 irq = bind_virq_to_irq(virq, cpu); 1004 if (irq < 0) 1005 return irq; 1006 retval = request_irq(irq, handler, irqflags, devname, dev_id); 1007 if (retval != 0) { 1008 unbind_from_irq(irq); 1009 return retval; 1010 } 1011 1012 return irq; 1013} 1014EXPORT_SYMBOL_GPL(bind_virq_to_irqhandler); 1015 1016int bind_ipi_to_irqhandler(enum ipi_vector ipi, 1017 unsigned int cpu, 1018 irq_handler_t handler, 1019 unsigned long irqflags, 1020 const char *devname, 1021 void *dev_id) 1022{ 1023 int irq, retval; 1024 1025 irq = bind_ipi_to_irq(ipi, cpu); 1026 if (irq < 0) 1027 return irq; 1028 1029 irqflags |= IRQF_NO_SUSPEND | IRQF_FORCE_RESUME; 1030 retval = request_irq(irq, handler, irqflags, devname, dev_id); 1031 if (retval != 0) { 1032 unbind_from_irq(irq); 1033 return retval; 1034 } 1035 1036 return irq; 1037} 1038 1039void unbind_from_irqhandler(unsigned int irq, void *dev_id) 1040{ 1041 free_irq(irq, dev_id); 1042 unbind_from_irq(irq); 1043} 1044EXPORT_SYMBOL_GPL(unbind_from_irqhandler); 1045 1046void xen_send_IPI_one(unsigned int cpu, enum ipi_vector vector) 1047{ 1048 int irq = per_cpu(ipi_to_irq, cpu)[vector]; 1049 BUG_ON(irq < 0); 1050 notify_remote_via_irq(irq); 1051} 1052 1053irqreturn_t xen_debug_interrupt(int irq, void *dev_id) 1054{ 1055 struct shared_info *sh = HYPERVISOR_shared_info; 1056 int cpu = smp_processor_id(); 1057 unsigned long *cpu_evtchn = per_cpu(cpu_evtchn_mask, cpu); 1058 int i; 1059 unsigned long flags; 1060 static DEFINE_SPINLOCK(debug_lock); 1061 struct vcpu_info *v; 1062 1063 spin_lock_irqsave(&debug_lock, flags); 1064 1065 printk("\nvcpu %d\n ", cpu); 1066 1067 for_each_online_cpu(i) { 1068 int pending; 1069 v = per_cpu(xen_vcpu, i); 1070 pending = (get_irq_regs() && i == cpu) 1071 ? xen_irqs_disabled(get_irq_regs()) 1072 : v->evtchn_upcall_mask; 1073 printk("%d: masked=%d pending=%d event_sel %0*lx\n ", i, 1074 pending, v->evtchn_upcall_pending, 1075 (int)(sizeof(v->evtchn_pending_sel)*2), 1076 v->evtchn_pending_sel); 1077 } 1078 v = per_cpu(xen_vcpu, cpu); 1079 1080 printk("\npending:\n "); 1081 for (i = ARRAY_SIZE(sh->evtchn_pending)-1; i >= 0; i--) 1082 printk("%0*lx%s", (int)sizeof(sh->evtchn_pending[0])*2, 1083 sh->evtchn_pending[i], 1084 i % 8 == 0 ? "\n " : " "); 1085 printk("\nglobal mask:\n "); 1086 for (i = ARRAY_SIZE(sh->evtchn_mask)-1; i >= 0; i--) 1087 printk("%0*lx%s", 1088 (int)(sizeof(sh->evtchn_mask[0])*2), 1089 sh->evtchn_mask[i], 1090 i % 8 == 0 ? "\n " : " "); 1091 1092 printk("\nglobally unmasked:\n "); 1093 for (i = ARRAY_SIZE(sh->evtchn_mask)-1; i >= 0; i--) 1094 printk("%0*lx%s", (int)(sizeof(sh->evtchn_mask[0])*2), 1095 sh->evtchn_pending[i] & ~sh->evtchn_mask[i], 1096 i % 8 == 0 ? "\n " : " "); 1097 1098 printk("\nlocal cpu%d mask:\n ", cpu); 1099 for (i = (NR_EVENT_CHANNELS/BITS_PER_LONG)-1; i >= 0; i--) 1100 printk("%0*lx%s", (int)(sizeof(cpu_evtchn[0])*2), 1101 cpu_evtchn[i], 1102 i % 8 == 0 ? "\n " : " "); 1103 1104 printk("\nlocally unmasked:\n "); 1105 for (i = ARRAY_SIZE(sh->evtchn_mask)-1; i >= 0; i--) { 1106 unsigned long pending = sh->evtchn_pending[i] 1107 & ~sh->evtchn_mask[i] 1108 & cpu_evtchn[i]; 1109 printk("%0*lx%s", (int)(sizeof(sh->evtchn_mask[0])*2), 1110 pending, i % 8 == 0 ? "\n " : " "); 1111 } 1112 1113 printk("\npending list:\n"); 1114 for (i = 0; i < NR_EVENT_CHANNELS; i++) { 1115 if (sync_test_bit(i, sh->evtchn_pending)) { 1116 int word_idx = i / BITS_PER_LONG; 1117 printk(" %d: event %d -> irq %d%s%s%s\n", 1118 cpu_from_evtchn(i), i, 1119 evtchn_to_irq[i], 1120 sync_test_bit(word_idx, &v->evtchn_pending_sel) 1121 ? "" : " l2-clear", 1122 !sync_test_bit(i, sh->evtchn_mask) 1123 ? "" : " globally-masked", 1124 sync_test_bit(i, cpu_evtchn) 1125 ? "" : " locally-masked"); 1126 } 1127 } 1128 1129 spin_unlock_irqrestore(&debug_lock, flags); 1130 1131 return IRQ_HANDLED; 1132} 1133 1134static DEFINE_PER_CPU(unsigned, xed_nesting_count); 1135static DEFINE_PER_CPU(unsigned int, current_word_idx); 1136static DEFINE_PER_CPU(unsigned int, current_bit_idx); 1137 1138/* 1139 * Mask out the i least significant bits of w 1140 */ 1141#define MASK_LSBS(w, i) (w & ((~0UL) << i)) 1142 1143/* 1144 * Search the CPUs pending events bitmasks. For each one found, map 1145 * the event number to an irq, and feed it into do_IRQ() for 1146 * handling. 1147 * 1148 * Xen uses a two-level bitmap to speed searching. The first level is 1149 * a bitset of words which contain pending event bits. The second 1150 * level is a bitset of pending events themselves. 1151 */ 1152static void __xen_evtchn_do_upcall(void) 1153{ 1154 int start_word_idx, start_bit_idx; 1155 int word_idx, bit_idx; 1156 int i; 1157 int cpu = get_cpu(); 1158 struct shared_info *s = HYPERVISOR_shared_info; 1159 struct vcpu_info *vcpu_info = __this_cpu_read(xen_vcpu); 1160 unsigned count; 1161 1162 do { 1163 unsigned long pending_words; 1164 1165 vcpu_info->evtchn_upcall_pending = 0; 1166 1167 if (__this_cpu_inc_return(xed_nesting_count) - 1) 1168 goto out; 1169 1170#ifndef CONFIG_X86 /* No need for a barrier -- XCHG is a barrier on x86. */ 1171 /* Clear master flag /before/ clearing selector flag. */ 1172 wmb(); 1173#endif 1174 pending_words = xchg(&vcpu_info->evtchn_pending_sel, 0); 1175 1176 start_word_idx = __this_cpu_read(current_word_idx); 1177 start_bit_idx = __this_cpu_read(current_bit_idx); 1178 1179 word_idx = start_word_idx; 1180 1181 for (i = 0; pending_words != 0; i++) { 1182 unsigned long pending_bits; 1183 unsigned long words; 1184 1185 words = MASK_LSBS(pending_words, word_idx); 1186 1187 /* 1188 * If we masked out all events, wrap to beginning. 1189 */ 1190 if (words == 0) { 1191 word_idx = 0; 1192 bit_idx = 0; 1193 continue; 1194 } 1195 word_idx = __ffs(words); 1196 1197 pending_bits = active_evtchns(cpu, s, word_idx); 1198 bit_idx = 0; /* usually scan entire word from start */ 1199 if (word_idx == start_word_idx) { 1200 /* We scan the starting word in two parts */ 1201 if (i == 0) 1202 /* 1st time: start in the middle */ 1203 bit_idx = start_bit_idx; 1204 else 1205 /* 2nd time: mask bits done already */ 1206 bit_idx &= (1UL << start_bit_idx) - 1; 1207 } 1208 1209 do { 1210 unsigned long bits; 1211 int port, irq; 1212 struct irq_desc *desc; 1213 1214 bits = MASK_LSBS(pending_bits, bit_idx); 1215 1216 /* If we masked out all events, move on. */ 1217 if (bits == 0) 1218 break; 1219 1220 bit_idx = __ffs(bits); 1221 1222 /* Process port. */ 1223 port = (word_idx * BITS_PER_LONG) + bit_idx; 1224 irq = evtchn_to_irq[port]; 1225 1226 if (irq != -1) { 1227 desc = irq_to_desc(irq); 1228 if (desc) 1229 generic_handle_irq_desc(irq, desc); 1230 } 1231 1232 bit_idx = (bit_idx + 1) % BITS_PER_LONG; 1233 1234 /* Next caller starts at last processed + 1 */ 1235 __this_cpu_write(current_word_idx, 1236 bit_idx ? word_idx : 1237 (word_idx+1) % BITS_PER_LONG); 1238 __this_cpu_write(current_bit_idx, bit_idx); 1239 } while (bit_idx != 0); 1240 1241 /* Scan start_l1i twice; all others once. */ 1242 if ((word_idx != start_word_idx) || (i != 0)) 1243 pending_words &= ~(1UL << word_idx); 1244 1245 word_idx = (word_idx + 1) % BITS_PER_LONG; 1246 } 1247 1248 BUG_ON(!irqs_disabled()); 1249 1250 count = __this_cpu_read(xed_nesting_count); 1251 __this_cpu_write(xed_nesting_count, 0); 1252 } while (count != 1 || vcpu_info->evtchn_upcall_pending); 1253 1254out: 1255 1256 put_cpu(); 1257} 1258 1259void xen_evtchn_do_upcall(struct pt_regs *regs) 1260{ 1261 struct pt_regs *old_regs = set_irq_regs(regs); 1262 1263 exit_idle(); 1264 irq_enter(); 1265 1266 __xen_evtchn_do_upcall(); 1267 1268 irq_exit(); 1269 set_irq_regs(old_regs); 1270} 1271 1272void xen_hvm_evtchn_do_upcall(void) 1273{ 1274 __xen_evtchn_do_upcall(); 1275} 1276EXPORT_SYMBOL_GPL(xen_hvm_evtchn_do_upcall); 1277 1278/* Rebind a new event channel to an existing irq. */ 1279void rebind_evtchn_irq(int evtchn, int irq) 1280{ 1281 struct irq_info *info = info_for_irq(irq); 1282 1283 /* Make sure the irq is masked, since the new event channel 1284 will also be masked. */ 1285 disable_irq(irq); 1286 1287 spin_lock(&irq_mapping_update_lock); 1288 1289 /* After resume the irq<->evtchn mappings are all cleared out */ 1290 BUG_ON(evtchn_to_irq[evtchn] != -1); 1291 /* Expect irq to have been bound before, 1292 so there should be a proper type */ 1293 BUG_ON(info->type == IRQT_UNBOUND); 1294 1295 xen_irq_info_evtchn_init(irq, evtchn); 1296 1297 spin_unlock(&irq_mapping_update_lock); 1298 1299 /* new event channels are always bound to cpu 0 */ 1300 irq_set_affinity(irq, cpumask_of(0)); 1301 1302 /* Unmask the event channel. */ 1303 enable_irq(irq); 1304} 1305 1306/* Rebind an evtchn so that it gets delivered to a specific cpu */ 1307static int rebind_irq_to_cpu(unsigned irq, unsigned tcpu) 1308{ 1309 struct evtchn_bind_vcpu bind_vcpu; 1310 int evtchn = evtchn_from_irq(irq); 1311 1312 if (!VALID_EVTCHN(evtchn)) 1313 return -1; 1314 1315 /* 1316 * Events delivered via platform PCI interrupts are always 1317 * routed to vcpu 0 and hence cannot be rebound. 1318 */ 1319 if (xen_hvm_domain() && !xen_have_vector_callback) 1320 return -1; 1321 1322 /* Send future instances of this interrupt to other vcpu. */ 1323 bind_vcpu.port = evtchn; 1324 bind_vcpu.vcpu = tcpu; 1325 1326 /* 1327 * If this fails, it usually just indicates that we're dealing with a 1328 * virq or IPI channel, which don't actually need to be rebound. Ignore 1329 * it, but don't do the xenlinux-level rebind in that case. 1330 */ 1331 if (HYPERVISOR_event_channel_op(EVTCHNOP_bind_vcpu, &bind_vcpu) >= 0) 1332 bind_evtchn_to_cpu(evtchn, tcpu); 1333 1334 return 0; 1335} 1336 1337static int set_affinity_irq(struct irq_data *data, const struct cpumask *dest, 1338 bool force) 1339{ 1340 unsigned tcpu = cpumask_first(dest); 1341 1342 return rebind_irq_to_cpu(data->irq, tcpu); 1343} 1344 1345int resend_irq_on_evtchn(unsigned int irq) 1346{ 1347 int masked, evtchn = evtchn_from_irq(irq); 1348 struct shared_info *s = HYPERVISOR_shared_info; 1349 1350 if (!VALID_EVTCHN(evtchn)) 1351 return 1; 1352 1353 masked = sync_test_and_set_bit(evtchn, s->evtchn_mask); 1354 sync_set_bit(evtchn, s->evtchn_pending); 1355 if (!masked) 1356 unmask_evtchn(evtchn); 1357 1358 return 1; 1359} 1360 1361static void enable_dynirq(struct irq_data *data) 1362{ 1363 int evtchn = evtchn_from_irq(data->irq); 1364 1365 if (VALID_EVTCHN(evtchn)) 1366 unmask_evtchn(evtchn); 1367} 1368 1369static void disable_dynirq(struct irq_data *data) 1370{ 1371 int evtchn = evtchn_from_irq(data->irq); 1372 1373 if (VALID_EVTCHN(evtchn)) 1374 mask_evtchn(evtchn); 1375} 1376 1377static void ack_dynirq(struct irq_data *data) 1378{ 1379 int evtchn = evtchn_from_irq(data->irq); 1380 1381 irq_move_irq(data); 1382 1383 if (VALID_EVTCHN(evtchn)) 1384 clear_evtchn(evtchn); 1385} 1386 1387static void mask_ack_dynirq(struct irq_data *data) 1388{ 1389 disable_dynirq(data); 1390 ack_dynirq(data); 1391} 1392 1393static int retrigger_dynirq(struct irq_data *data) 1394{ 1395 int evtchn = evtchn_from_irq(data->irq); 1396 struct shared_info *sh = HYPERVISOR_shared_info; 1397 int ret = 0; 1398 1399 if (VALID_EVTCHN(evtchn)) { 1400 int masked; 1401 1402 masked = sync_test_and_set_bit(evtchn, sh->evtchn_mask); 1403 sync_set_bit(evtchn, sh->evtchn_pending); 1404 if (!masked) 1405 unmask_evtchn(evtchn); 1406 ret = 1; 1407 } 1408 1409 return ret; 1410} 1411 1412static void restore_pirqs(void) 1413{ 1414 int pirq, rc, irq, gsi; 1415 struct physdev_map_pirq map_irq; 1416 struct irq_info *info; 1417 1418 list_for_each_entry(info, &xen_irq_list_head, list) { 1419 if (info->type != IRQT_PIRQ) 1420 continue; 1421 1422 pirq = info->u.pirq.pirq; 1423 gsi = info->u.pirq.gsi; 1424 irq = info->irq; 1425 1426 /* save/restore of PT devices doesn't work, so at this point the 1427 * only devices present are GSI based emulated devices */ 1428 if (!gsi) 1429 continue; 1430 1431 map_irq.domid = DOMID_SELF; 1432 map_irq.type = MAP_PIRQ_TYPE_GSI; 1433 map_irq.index = gsi; 1434 map_irq.pirq = pirq; 1435 1436 rc = HYPERVISOR_physdev_op(PHYSDEVOP_map_pirq, &map_irq); 1437 if (rc) { 1438 printk(KERN_WARNING "xen map irq failed gsi=%d irq=%d pirq=%d rc=%d\n", 1439 gsi, irq, pirq, rc); 1440 xen_free_irq(irq); 1441 continue; 1442 } 1443 1444 printk(KERN_DEBUG "xen: --> irq=%d, pirq=%d\n", irq, map_irq.pirq); 1445 1446 __startup_pirq(irq); 1447 } 1448} 1449 1450static void restore_cpu_virqs(unsigned int cpu) 1451{ 1452 struct evtchn_bind_virq bind_virq; 1453 int virq, irq, evtchn; 1454 1455 for (virq = 0; virq < NR_VIRQS; virq++) { 1456 if ((irq = per_cpu(virq_to_irq, cpu)[virq]) == -1) 1457 continue; 1458 1459 BUG_ON(virq_from_irq(irq) != virq); 1460 1461 /* Get a new binding from Xen. */ 1462 bind_virq.virq = virq; 1463 bind_virq.vcpu = cpu; 1464 if (HYPERVISOR_event_channel_op(EVTCHNOP_bind_virq, 1465 &bind_virq) != 0) 1466 BUG(); 1467 evtchn = bind_virq.port; 1468 1469 /* Record the new mapping. */ 1470 xen_irq_info_virq_init(cpu, irq, evtchn, virq); 1471 bind_evtchn_to_cpu(evtchn, cpu); 1472 } 1473} 1474 1475static void restore_cpu_ipis(unsigned int cpu) 1476{ 1477 struct evtchn_bind_ipi bind_ipi; 1478 int ipi, irq, evtchn; 1479 1480 for (ipi = 0; ipi < XEN_NR_IPIS; ipi++) { 1481 if ((irq = per_cpu(ipi_to_irq, cpu)[ipi]) == -1) 1482 continue; 1483 1484 BUG_ON(ipi_from_irq(irq) != ipi); 1485 1486 /* Get a new binding from Xen. */ 1487 bind_ipi.vcpu = cpu; 1488 if (HYPERVISOR_event_channel_op(EVTCHNOP_bind_ipi, 1489 &bind_ipi) != 0) 1490 BUG(); 1491 evtchn = bind_ipi.port; 1492 1493 /* Record the new mapping. */ 1494 xen_irq_info_ipi_init(cpu, irq, evtchn, ipi); 1495 bind_evtchn_to_cpu(evtchn, cpu); 1496 } 1497} 1498 1499/* Clear an irq's pending state, in preparation for polling on it */ 1500void xen_clear_irq_pending(int irq) 1501{ 1502 int evtchn = evtchn_from_irq(irq); 1503 1504 if (VALID_EVTCHN(evtchn)) 1505 clear_evtchn(evtchn); 1506} 1507EXPORT_SYMBOL(xen_clear_irq_pending); 1508void xen_set_irq_pending(int irq) 1509{ 1510 int evtchn = evtchn_from_irq(irq); 1511 1512 if (VALID_EVTCHN(evtchn)) 1513 set_evtchn(evtchn); 1514} 1515 1516bool xen_test_irq_pending(int irq) 1517{ 1518 int evtchn = evtchn_from_irq(irq); 1519 bool ret = false; 1520 1521 if (VALID_EVTCHN(evtchn)) 1522 ret = test_evtchn(evtchn); 1523 1524 return ret; 1525} 1526 1527/* Poll waiting for an irq to become pending with timeout. In the usual case, 1528 * the irq will be disabled so it won't deliver an interrupt. */ 1529void xen_poll_irq_timeout(int irq, u64 timeout) 1530{ 1531 evtchn_port_t evtchn = evtchn_from_irq(irq); 1532 1533 if (VALID_EVTCHN(evtchn)) { 1534 struct sched_poll poll; 1535 1536 poll.nr_ports = 1; 1537 poll.timeout = timeout; 1538 set_xen_guest_handle(poll.ports, &evtchn); 1539 1540 if (HYPERVISOR_sched_op(SCHEDOP_poll, &poll) != 0) 1541 BUG(); 1542 } 1543} 1544EXPORT_SYMBOL(xen_poll_irq_timeout); 1545/* Poll waiting for an irq to become pending. In the usual case, the 1546 * irq will be disabled so it won't deliver an interrupt. */ 1547void xen_poll_irq(int irq) 1548{ 1549 xen_poll_irq_timeout(irq, 0 /* no timeout */); 1550} 1551 1552/* Check whether the IRQ line is shared with other guests. */ 1553int xen_test_irq_shared(int irq) 1554{ 1555 struct irq_info *info = info_for_irq(irq); 1556 struct physdev_irq_status_query irq_status = { .irq = info->u.pirq.pirq }; 1557 1558 if (HYPERVISOR_physdev_op(PHYSDEVOP_irq_status_query, &irq_status)) 1559 return 0; 1560 return !(irq_status.flags & XENIRQSTAT_shared); 1561} 1562EXPORT_SYMBOL_GPL(xen_test_irq_shared); 1563 1564void xen_irq_resume(void) 1565{ 1566 unsigned int cpu, evtchn; 1567 struct irq_info *info; 1568 1569 init_evtchn_cpu_bindings(); 1570 1571 /* New event-channel space is not 'live' yet. */ 1572 for (evtchn = 0; evtchn < NR_EVENT_CHANNELS; evtchn++) 1573 mask_evtchn(evtchn); 1574 1575 /* No IRQ <-> event-channel mappings. */ 1576 list_for_each_entry(info, &xen_irq_list_head, list) 1577 info->evtchn = 0; /* zap event-channel binding */ 1578 1579 for (evtchn = 0; evtchn < NR_EVENT_CHANNELS; evtchn++) 1580 evtchn_to_irq[evtchn] = -1; 1581 1582 for_each_possible_cpu(cpu) { 1583 restore_cpu_virqs(cpu); 1584 restore_cpu_ipis(cpu); 1585 } 1586 1587 restore_pirqs(); 1588} 1589 1590static struct irq_chip xen_dynamic_chip __read_mostly = { 1591 .name = "xen-dyn", 1592 1593 .irq_disable = disable_dynirq, 1594 .irq_mask = disable_dynirq, 1595 .irq_unmask = enable_dynirq, 1596 1597 .irq_ack = ack_dynirq, 1598 .irq_mask_ack = mask_ack_dynirq, 1599 1600 .irq_set_affinity = set_affinity_irq, 1601 .irq_retrigger = retrigger_dynirq, 1602}; 1603 1604static struct irq_chip xen_pirq_chip __read_mostly = { 1605 .name = "xen-pirq", 1606 1607 .irq_startup = startup_pirq, 1608 .irq_shutdown = shutdown_pirq, 1609 .irq_enable = enable_pirq, 1610 .irq_disable = disable_pirq, 1611 1612 .irq_mask = disable_dynirq, 1613 .irq_unmask = enable_dynirq, 1614 1615 .irq_ack = eoi_pirq, 1616 .irq_eoi = eoi_pirq, 1617 .irq_mask_ack = mask_ack_pirq, 1618 1619 .irq_set_affinity = set_affinity_irq, 1620 1621 .irq_retrigger = retrigger_dynirq, 1622}; 1623 1624static struct irq_chip xen_percpu_chip __read_mostly = { 1625 .name = "xen-percpu", 1626 1627 .irq_disable = disable_dynirq, 1628 .irq_mask = disable_dynirq, 1629 .irq_unmask = enable_dynirq, 1630 1631 .irq_ack = ack_dynirq, 1632}; 1633 1634int xen_set_callback_via(uint64_t via) 1635{ 1636 struct xen_hvm_param a; 1637 a.domid = DOMID_SELF; 1638 a.index = HVM_PARAM_CALLBACK_IRQ; 1639 a.value = via; 1640 return HYPERVISOR_hvm_op(HVMOP_set_param, &a); 1641} 1642EXPORT_SYMBOL_GPL(xen_set_callback_via); 1643 1644#ifdef CONFIG_XEN_PVHVM 1645/* Vector callbacks are better than PCI interrupts to receive event 1646 * channel notifications because we can receive vector callbacks on any 1647 * vcpu and we don't need PCI support or APIC interactions. */ 1648void xen_callback_vector(void) 1649{ 1650 int rc; 1651 uint64_t callback_via; 1652 if (xen_have_vector_callback) { 1653 callback_via = HVM_CALLBACK_VECTOR(XEN_HVM_EVTCHN_CALLBACK); 1654 rc = xen_set_callback_via(callback_via); 1655 if (rc) { 1656 printk(KERN_ERR "Request for Xen HVM callback vector" 1657 " failed.\n"); 1658 xen_have_vector_callback = 0; 1659 return; 1660 } 1661 printk(KERN_INFO "Xen HVM callback vector for event delivery is " 1662 "enabled\n"); 1663 /* in the restore case the vector has already been allocated */ 1664 if (!test_bit(XEN_HVM_EVTCHN_CALLBACK, used_vectors)) 1665 alloc_intr_gate(XEN_HVM_EVTCHN_CALLBACK, xen_hvm_callback_vector); 1666 } 1667} 1668#else 1669void xen_callback_vector(void) {} 1670#endif 1671 1672void __init xen_init_IRQ(void) 1673{ 1674 int i; 1675 1676 evtchn_to_irq = kcalloc(NR_EVENT_CHANNELS, sizeof(*evtchn_to_irq), 1677 GFP_KERNEL); 1678 for (i = 0; i < NR_EVENT_CHANNELS; i++) 1679 evtchn_to_irq[i] = -1; 1680 1681 init_evtchn_cpu_bindings(); 1682 1683 /* No event channels are 'live' right now. */ 1684 for (i = 0; i < NR_EVENT_CHANNELS; i++) 1685 mask_evtchn(i); 1686 1687 if (xen_hvm_domain()) { 1688 xen_callback_vector(); 1689 native_init_IRQ(); 1690 /* pci_xen_hvm_init must be called after native_init_IRQ so that 1691 * __acpi_register_gsi can point at the right function */ 1692 pci_xen_hvm_init(); 1693 } else { 1694 irq_ctx_init(smp_processor_id()); 1695 if (xen_initial_domain()) 1696 xen_setup_pirqs(); 1697 } 1698}