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1/* 2 * Copyright (C) ST-Ericsson SA 2010 3 * 4 * License Terms: GNU General Public License v2 5 * Author: Arun R Murthy <arun.murthy@stericsson.com> 6 * Author: Daniel Willerud <daniel.willerud@stericsson.com> 7 * Author: Johan Palsson <johan.palsson@stericsson.com> 8 */ 9#include <linux/init.h> 10#include <linux/module.h> 11#include <linux/device.h> 12#include <linux/interrupt.h> 13#include <linux/spinlock.h> 14#include <linux/delay.h> 15#include <linux/platform_device.h> 16#include <linux/completion.h> 17#include <linux/regulator/consumer.h> 18#include <linux/err.h> 19#include <linux/slab.h> 20#include <linux/list.h> 21#include <linux/mfd/ab8500.h> 22#include <linux/mfd/abx500.h> 23#include <linux/mfd/ab8500/gpadc.h> 24 25/* 26 * GPADC register offsets 27 * Bank : 0x0A 28 */ 29#define AB8500_GPADC_CTRL1_REG 0x00 30#define AB8500_GPADC_CTRL2_REG 0x01 31#define AB8500_GPADC_CTRL3_REG 0x02 32#define AB8500_GPADC_AUTO_TIMER_REG 0x03 33#define AB8500_GPADC_STAT_REG 0x04 34#define AB8500_GPADC_MANDATAL_REG 0x05 35#define AB8500_GPADC_MANDATAH_REG 0x06 36#define AB8500_GPADC_AUTODATAL_REG 0x07 37#define AB8500_GPADC_AUTODATAH_REG 0x08 38#define AB8500_GPADC_MUX_CTRL_REG 0x09 39 40/* 41 * OTP register offsets 42 * Bank : 0x15 43 */ 44#define AB8500_GPADC_CAL_1 0x0F 45#define AB8500_GPADC_CAL_2 0x10 46#define AB8500_GPADC_CAL_3 0x11 47#define AB8500_GPADC_CAL_4 0x12 48#define AB8500_GPADC_CAL_5 0x13 49#define AB8500_GPADC_CAL_6 0x14 50#define AB8500_GPADC_CAL_7 0x15 51 52/* gpadc constants */ 53#define EN_VINTCORE12 0x04 54#define EN_VTVOUT 0x02 55#define EN_GPADC 0x01 56#define DIS_GPADC 0x00 57#define SW_AVG_16 0x60 58#define ADC_SW_CONV 0x04 59#define EN_ICHAR 0x80 60#define BTEMP_PULL_UP 0x08 61#define EN_BUF 0x40 62#define DIS_ZERO 0x00 63#define GPADC_BUSY 0x01 64 65/* GPADC constants from AB8500 spec, UM0836 */ 66#define ADC_RESOLUTION 1024 67#define ADC_CH_BTEMP_MIN 0 68#define ADC_CH_BTEMP_MAX 1350 69#define ADC_CH_DIETEMP_MIN 0 70#define ADC_CH_DIETEMP_MAX 1350 71#define ADC_CH_CHG_V_MIN 0 72#define ADC_CH_CHG_V_MAX 20030 73#define ADC_CH_ACCDET2_MIN 0 74#define ADC_CH_ACCDET2_MAX 2500 75#define ADC_CH_VBAT_MIN 2300 76#define ADC_CH_VBAT_MAX 4800 77#define ADC_CH_CHG_I_MIN 0 78#define ADC_CH_CHG_I_MAX 1500 79#define ADC_CH_BKBAT_MIN 0 80#define ADC_CH_BKBAT_MAX 3200 81 82/* This is used to not lose precision when dividing to get gain and offset */ 83#define CALIB_SCALE 1000 84 85enum cal_channels { 86 ADC_INPUT_VMAIN = 0, 87 ADC_INPUT_BTEMP, 88 ADC_INPUT_VBAT, 89 NBR_CAL_INPUTS, 90}; 91 92/** 93 * struct adc_cal_data - Table for storing gain and offset for the calibrated 94 * ADC channels 95 * @gain: Gain of the ADC channel 96 * @offset: Offset of the ADC channel 97 */ 98struct adc_cal_data { 99 u64 gain; 100 u64 offset; 101}; 102 103/** 104 * struct ab8500_gpadc - AB8500 GPADC device information 105 * @chip_id ABB chip id 106 * @dev: pointer to the struct device 107 * @node: a list of AB8500 GPADCs, hence prepared for 108 reentrance 109 * @ab8500_gpadc_complete: pointer to the struct completion, to indicate 110 * the completion of gpadc conversion 111 * @ab8500_gpadc_lock: structure of type mutex 112 * @regu: pointer to the struct regulator 113 * @irq: interrupt number that is used by gpadc 114 * @cal_data array of ADC calibration data structs 115 */ 116struct ab8500_gpadc { 117 u8 chip_id; 118 struct device *dev; 119 struct list_head node; 120 struct completion ab8500_gpadc_complete; 121 struct mutex ab8500_gpadc_lock; 122 struct regulator *regu; 123 int irq; 124 struct adc_cal_data cal_data[NBR_CAL_INPUTS]; 125}; 126 127static LIST_HEAD(ab8500_gpadc_list); 128 129/** 130 * ab8500_gpadc_get() - returns a reference to the primary AB8500 GPADC 131 * (i.e. the first GPADC in the instance list) 132 */ 133struct ab8500_gpadc *ab8500_gpadc_get(char *name) 134{ 135 struct ab8500_gpadc *gpadc; 136 137 list_for_each_entry(gpadc, &ab8500_gpadc_list, node) { 138 if (!strcmp(name, dev_name(gpadc->dev))) 139 return gpadc; 140 } 141 142 return ERR_PTR(-ENOENT); 143} 144EXPORT_SYMBOL(ab8500_gpadc_get); 145 146static int ab8500_gpadc_ad_to_voltage(struct ab8500_gpadc *gpadc, u8 input, 147 int ad_value) 148{ 149 int res; 150 151 switch (input) { 152 case MAIN_CHARGER_V: 153 /* For some reason we don't have calibrated data */ 154 if (!gpadc->cal_data[ADC_INPUT_VMAIN].gain) { 155 res = ADC_CH_CHG_V_MIN + (ADC_CH_CHG_V_MAX - 156 ADC_CH_CHG_V_MIN) * ad_value / 157 ADC_RESOLUTION; 158 break; 159 } 160 /* Here we can use the calibrated data */ 161 res = (int) (ad_value * gpadc->cal_data[ADC_INPUT_VMAIN].gain + 162 gpadc->cal_data[ADC_INPUT_VMAIN].offset) / CALIB_SCALE; 163 break; 164 165 case BAT_CTRL: 166 case BTEMP_BALL: 167 case ACC_DETECT1: 168 case ADC_AUX1: 169 case ADC_AUX2: 170 /* For some reason we don't have calibrated data */ 171 if (!gpadc->cal_data[ADC_INPUT_BTEMP].gain) { 172 res = ADC_CH_BTEMP_MIN + (ADC_CH_BTEMP_MAX - 173 ADC_CH_BTEMP_MIN) * ad_value / 174 ADC_RESOLUTION; 175 break; 176 } 177 /* Here we can use the calibrated data */ 178 res = (int) (ad_value * gpadc->cal_data[ADC_INPUT_BTEMP].gain + 179 gpadc->cal_data[ADC_INPUT_BTEMP].offset) / CALIB_SCALE; 180 break; 181 182 case MAIN_BAT_V: 183 /* For some reason we don't have calibrated data */ 184 if (!gpadc->cal_data[ADC_INPUT_VBAT].gain) { 185 res = ADC_CH_VBAT_MIN + (ADC_CH_VBAT_MAX - 186 ADC_CH_VBAT_MIN) * ad_value / 187 ADC_RESOLUTION; 188 break; 189 } 190 /* Here we can use the calibrated data */ 191 res = (int) (ad_value * gpadc->cal_data[ADC_INPUT_VBAT].gain + 192 gpadc->cal_data[ADC_INPUT_VBAT].offset) / CALIB_SCALE; 193 break; 194 195 case DIE_TEMP: 196 res = ADC_CH_DIETEMP_MIN + 197 (ADC_CH_DIETEMP_MAX - ADC_CH_DIETEMP_MIN) * ad_value / 198 ADC_RESOLUTION; 199 break; 200 201 case ACC_DETECT2: 202 res = ADC_CH_ACCDET2_MIN + 203 (ADC_CH_ACCDET2_MAX - ADC_CH_ACCDET2_MIN) * ad_value / 204 ADC_RESOLUTION; 205 break; 206 207 case VBUS_V: 208 res = ADC_CH_CHG_V_MIN + 209 (ADC_CH_CHG_V_MAX - ADC_CH_CHG_V_MIN) * ad_value / 210 ADC_RESOLUTION; 211 break; 212 213 case MAIN_CHARGER_C: 214 case USB_CHARGER_C: 215 res = ADC_CH_CHG_I_MIN + 216 (ADC_CH_CHG_I_MAX - ADC_CH_CHG_I_MIN) * ad_value / 217 ADC_RESOLUTION; 218 break; 219 220 case BK_BAT_V: 221 res = ADC_CH_BKBAT_MIN + 222 (ADC_CH_BKBAT_MAX - ADC_CH_BKBAT_MIN) * ad_value / 223 ADC_RESOLUTION; 224 break; 225 226 default: 227 dev_err(gpadc->dev, 228 "unknown channel, not possible to convert\n"); 229 res = -EINVAL; 230 break; 231 232 } 233 return res; 234} 235 236/** 237 * ab8500_gpadc_convert() - gpadc conversion 238 * @input: analog input to be converted to digital data 239 * 240 * This function converts the selected analog i/p to digital 241 * data. 242 */ 243int ab8500_gpadc_convert(struct ab8500_gpadc *gpadc, u8 input) 244{ 245 int ret; 246 u16 data = 0; 247 int looplimit = 0; 248 u8 val, low_data, high_data; 249 250 if (!gpadc) 251 return -ENODEV; 252 253 mutex_lock(&gpadc->ab8500_gpadc_lock); 254 /* Enable VTVout LDO this is required for GPADC */ 255 regulator_enable(gpadc->regu); 256 257 /* Check if ADC is not busy, lock and proceed */ 258 do { 259 ret = abx500_get_register_interruptible(gpadc->dev, 260 AB8500_GPADC, AB8500_GPADC_STAT_REG, &val); 261 if (ret < 0) 262 goto out; 263 if (!(val & GPADC_BUSY)) 264 break; 265 msleep(10); 266 } while (++looplimit < 10); 267 if (looplimit >= 10 && (val & GPADC_BUSY)) { 268 dev_err(gpadc->dev, "gpadc_conversion: GPADC busy"); 269 ret = -EINVAL; 270 goto out; 271 } 272 273 /* Enable GPADC */ 274 ret = abx500_mask_and_set_register_interruptible(gpadc->dev, 275 AB8500_GPADC, AB8500_GPADC_CTRL1_REG, EN_GPADC, EN_GPADC); 276 if (ret < 0) { 277 dev_err(gpadc->dev, "gpadc_conversion: enable gpadc failed\n"); 278 goto out; 279 } 280 281 /* Select the input source and set average samples to 16 */ 282 ret = abx500_set_register_interruptible(gpadc->dev, AB8500_GPADC, 283 AB8500_GPADC_CTRL2_REG, (input | SW_AVG_16)); 284 if (ret < 0) { 285 dev_err(gpadc->dev, 286 "gpadc_conversion: set avg samples failed\n"); 287 goto out; 288 } 289 290 /* 291 * Enable ADC, buffering, select rising edge and enable ADC path 292 * charging current sense if it needed, ABB 3.0 needs some special 293 * treatment too. 294 */ 295 switch (input) { 296 case MAIN_CHARGER_C: 297 case USB_CHARGER_C: 298 ret = abx500_mask_and_set_register_interruptible(gpadc->dev, 299 AB8500_GPADC, AB8500_GPADC_CTRL1_REG, 300 EN_BUF | EN_ICHAR, 301 EN_BUF | EN_ICHAR); 302 break; 303 case BTEMP_BALL: 304 if (gpadc->chip_id >= AB8500_CUT3P0) { 305 /* Turn on btemp pull-up on ABB 3.0 */ 306 ret = abx500_mask_and_set_register_interruptible( 307 gpadc->dev, 308 AB8500_GPADC, AB8500_GPADC_CTRL1_REG, 309 EN_BUF | BTEMP_PULL_UP, 310 EN_BUF | BTEMP_PULL_UP); 311 312 /* 313 * Delay might be needed for ABB8500 cut 3.0, if not, remove 314 * when hardware will be availible 315 */ 316 msleep(1); 317 break; 318 } 319 /* Intentional fallthrough */ 320 default: 321 ret = abx500_mask_and_set_register_interruptible(gpadc->dev, 322 AB8500_GPADC, AB8500_GPADC_CTRL1_REG, EN_BUF, EN_BUF); 323 break; 324 } 325 if (ret < 0) { 326 dev_err(gpadc->dev, 327 "gpadc_conversion: select falling edge failed\n"); 328 goto out; 329 } 330 331 ret = abx500_mask_and_set_register_interruptible(gpadc->dev, 332 AB8500_GPADC, AB8500_GPADC_CTRL1_REG, ADC_SW_CONV, ADC_SW_CONV); 333 if (ret < 0) { 334 dev_err(gpadc->dev, 335 "gpadc_conversion: start s/w conversion failed\n"); 336 goto out; 337 } 338 /* wait for completion of conversion */ 339 if (!wait_for_completion_timeout(&gpadc->ab8500_gpadc_complete, 2*HZ)) { 340 dev_err(gpadc->dev, 341 "timeout: didn't receive GPADC conversion interrupt\n"); 342 ret = -EINVAL; 343 goto out; 344 } 345 346 /* Read the converted RAW data */ 347 ret = abx500_get_register_interruptible(gpadc->dev, AB8500_GPADC, 348 AB8500_GPADC_MANDATAL_REG, &low_data); 349 if (ret < 0) { 350 dev_err(gpadc->dev, "gpadc_conversion: read low data failed\n"); 351 goto out; 352 } 353 354 ret = abx500_get_register_interruptible(gpadc->dev, AB8500_GPADC, 355 AB8500_GPADC_MANDATAH_REG, &high_data); 356 if (ret < 0) { 357 dev_err(gpadc->dev, 358 "gpadc_conversion: read high data failed\n"); 359 goto out; 360 } 361 362 data = (high_data << 8) | low_data; 363 /* Disable GPADC */ 364 ret = abx500_set_register_interruptible(gpadc->dev, AB8500_GPADC, 365 AB8500_GPADC_CTRL1_REG, DIS_GPADC); 366 if (ret < 0) { 367 dev_err(gpadc->dev, "gpadc_conversion: disable gpadc failed\n"); 368 goto out; 369 } 370 /* Disable VTVout LDO this is required for GPADC */ 371 regulator_disable(gpadc->regu); 372 mutex_unlock(&gpadc->ab8500_gpadc_lock); 373 ret = ab8500_gpadc_ad_to_voltage(gpadc, input, data); 374 return ret; 375 376out: 377 /* 378 * It has shown to be needed to turn off the GPADC if an error occurs, 379 * otherwise we might have problem when waiting for the busy bit in the 380 * GPADC status register to go low. In V1.1 there wait_for_completion 381 * seems to timeout when waiting for an interrupt.. Not seen in V2.0 382 */ 383 (void) abx500_set_register_interruptible(gpadc->dev, AB8500_GPADC, 384 AB8500_GPADC_CTRL1_REG, DIS_GPADC); 385 regulator_disable(gpadc->regu); 386 mutex_unlock(&gpadc->ab8500_gpadc_lock); 387 dev_err(gpadc->dev, 388 "gpadc_conversion: Failed to AD convert channel %d\n", input); 389 return ret; 390} 391EXPORT_SYMBOL(ab8500_gpadc_convert); 392 393/** 394 * ab8500_bm_gpswadcconvend_handler() - isr for s/w gpadc conversion completion 395 * @irq: irq number 396 * @data: pointer to the data passed during request irq 397 * 398 * This is a interrupt service routine for s/w gpadc conversion completion. 399 * Notifies the gpadc completion is completed and the converted raw value 400 * can be read from the registers. 401 * Returns IRQ status(IRQ_HANDLED) 402 */ 403static irqreturn_t ab8500_bm_gpswadcconvend_handler(int irq, void *_gpadc) 404{ 405 struct ab8500_gpadc *gpadc = _gpadc; 406 407 complete(&gpadc->ab8500_gpadc_complete); 408 409 return IRQ_HANDLED; 410} 411 412static int otp_cal_regs[] = { 413 AB8500_GPADC_CAL_1, 414 AB8500_GPADC_CAL_2, 415 AB8500_GPADC_CAL_3, 416 AB8500_GPADC_CAL_4, 417 AB8500_GPADC_CAL_5, 418 AB8500_GPADC_CAL_6, 419 AB8500_GPADC_CAL_7, 420}; 421 422static void ab8500_gpadc_read_calibration_data(struct ab8500_gpadc *gpadc) 423{ 424 int i; 425 int ret[ARRAY_SIZE(otp_cal_regs)]; 426 u8 gpadc_cal[ARRAY_SIZE(otp_cal_regs)]; 427 428 int vmain_high, vmain_low; 429 int btemp_high, btemp_low; 430 int vbat_high, vbat_low; 431 432 /* First we read all OTP registers and store the error code */ 433 for (i = 0; i < ARRAY_SIZE(otp_cal_regs); i++) { 434 ret[i] = abx500_get_register_interruptible(gpadc->dev, 435 AB8500_OTP_EMUL, otp_cal_regs[i], &gpadc_cal[i]); 436 if (ret[i] < 0) 437 dev_err(gpadc->dev, "%s: read otp reg 0x%02x failed\n", 438 __func__, otp_cal_regs[i]); 439 } 440 441 /* 442 * The ADC calibration data is stored in OTP registers. 443 * The layout of the calibration data is outlined below and a more 444 * detailed description can be found in UM0836 445 * 446 * vm_h/l = vmain_high/low 447 * bt_h/l = btemp_high/low 448 * vb_h/l = vbat_high/low 449 * 450 * Data bits: 451 * | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 452 * |.......|.......|.......|.......|.......|.......|.......|....... 453 * | | vm_h9 | vm_h8 454 * |.......|.......|.......|.......|.......|.......|.......|....... 455 * | | vm_h7 | vm_h6 | vm_h5 | vm_h4 | vm_h3 | vm_h2 456 * |.......|.......|.......|.......|.......|.......|.......|....... 457 * | vm_h1 | vm_h0 | vm_l4 | vm_l3 | vm_l2 | vm_l1 | vm_l0 | bt_h9 458 * |.......|.......|.......|.......|.......|.......|.......|....... 459 * | bt_h8 | bt_h7 | bt_h6 | bt_h5 | bt_h4 | bt_h3 | bt_h2 | bt_h1 460 * |.......|.......|.......|.......|.......|.......|.......|....... 461 * | bt_h0 | bt_l4 | bt_l3 | bt_l2 | bt_l1 | bt_l0 | vb_h9 | vb_h8 462 * |.......|.......|.......|.......|.......|.......|.......|....... 463 * | vb_h7 | vb_h6 | vb_h5 | vb_h4 | vb_h3 | vb_h2 | vb_h1 | vb_h0 464 * |.......|.......|.......|.......|.......|.......|.......|....... 465 * | vb_l5 | vb_l4 | vb_l3 | vb_l2 | vb_l1 | vb_l0 | 466 * |.......|.......|.......|.......|.......|.......|.......|....... 467 * 468 * 469 * Ideal output ADC codes corresponding to injected input voltages 470 * during manufacturing is: 471 * 472 * vmain_high: Vin = 19500mV / ADC ideal code = 997 473 * vmain_low: Vin = 315mV / ADC ideal code = 16 474 * btemp_high: Vin = 1300mV / ADC ideal code = 985 475 * btemp_low: Vin = 21mV / ADC ideal code = 16 476 * vbat_high: Vin = 4700mV / ADC ideal code = 982 477 * vbat_low: Vin = 2380mV / ADC ideal code = 33 478 */ 479 480 /* Calculate gain and offset for VMAIN if all reads succeeded */ 481 if (!(ret[0] < 0 || ret[1] < 0 || ret[2] < 0)) { 482 vmain_high = (((gpadc_cal[0] & 0x03) << 8) | 483 ((gpadc_cal[1] & 0x3F) << 2) | 484 ((gpadc_cal[2] & 0xC0) >> 6)); 485 486 vmain_low = ((gpadc_cal[2] & 0x3E) >> 1); 487 488 gpadc->cal_data[ADC_INPUT_VMAIN].gain = CALIB_SCALE * 489 (19500 - 315) / (vmain_high - vmain_low); 490 491 gpadc->cal_data[ADC_INPUT_VMAIN].offset = CALIB_SCALE * 19500 - 492 (CALIB_SCALE * (19500 - 315) / 493 (vmain_high - vmain_low)) * vmain_high; 494 } else { 495 gpadc->cal_data[ADC_INPUT_VMAIN].gain = 0; 496 } 497 498 /* Calculate gain and offset for BTEMP if all reads succeeded */ 499 if (!(ret[2] < 0 || ret[3] < 0 || ret[4] < 0)) { 500 btemp_high = (((gpadc_cal[2] & 0x01) << 9) | 501 (gpadc_cal[3] << 1) | 502 ((gpadc_cal[4] & 0x80) >> 7)); 503 504 btemp_low = ((gpadc_cal[4] & 0x7C) >> 2); 505 506 gpadc->cal_data[ADC_INPUT_BTEMP].gain = 507 CALIB_SCALE * (1300 - 21) / (btemp_high - btemp_low); 508 509 gpadc->cal_data[ADC_INPUT_BTEMP].offset = CALIB_SCALE * 1300 - 510 (CALIB_SCALE * (1300 - 21) / 511 (btemp_high - btemp_low)) * btemp_high; 512 } else { 513 gpadc->cal_data[ADC_INPUT_BTEMP].gain = 0; 514 } 515 516 /* Calculate gain and offset for VBAT if all reads succeeded */ 517 if (!(ret[4] < 0 || ret[5] < 0 || ret[6] < 0)) { 518 vbat_high = (((gpadc_cal[4] & 0x03) << 8) | gpadc_cal[5]); 519 vbat_low = ((gpadc_cal[6] & 0xFC) >> 2); 520 521 gpadc->cal_data[ADC_INPUT_VBAT].gain = CALIB_SCALE * 522 (4700 - 2380) / (vbat_high - vbat_low); 523 524 gpadc->cal_data[ADC_INPUT_VBAT].offset = CALIB_SCALE * 4700 - 525 (CALIB_SCALE * (4700 - 2380) / 526 (vbat_high - vbat_low)) * vbat_high; 527 } else { 528 gpadc->cal_data[ADC_INPUT_VBAT].gain = 0; 529 } 530 531 dev_dbg(gpadc->dev, "VMAIN gain %llu offset %llu\n", 532 gpadc->cal_data[ADC_INPUT_VMAIN].gain, 533 gpadc->cal_data[ADC_INPUT_VMAIN].offset); 534 535 dev_dbg(gpadc->dev, "BTEMP gain %llu offset %llu\n", 536 gpadc->cal_data[ADC_INPUT_BTEMP].gain, 537 gpadc->cal_data[ADC_INPUT_BTEMP].offset); 538 539 dev_dbg(gpadc->dev, "VBAT gain %llu offset %llu\n", 540 gpadc->cal_data[ADC_INPUT_VBAT].gain, 541 gpadc->cal_data[ADC_INPUT_VBAT].offset); 542} 543 544static int __devinit ab8500_gpadc_probe(struct platform_device *pdev) 545{ 546 int ret = 0; 547 struct ab8500_gpadc *gpadc; 548 549 gpadc = kzalloc(sizeof(struct ab8500_gpadc), GFP_KERNEL); 550 if (!gpadc) { 551 dev_err(&pdev->dev, "Error: No memory\n"); 552 return -ENOMEM; 553 } 554 555 gpadc->irq = platform_get_irq_byname(pdev, "SW_CONV_END"); 556 if (gpadc->irq < 0) { 557 dev_err(gpadc->dev, "failed to get platform irq-%d\n", 558 gpadc->irq); 559 ret = gpadc->irq; 560 goto fail; 561 } 562 563 gpadc->dev = &pdev->dev; 564 mutex_init(&gpadc->ab8500_gpadc_lock); 565 566 /* Initialize completion used to notify completion of conversion */ 567 init_completion(&gpadc->ab8500_gpadc_complete); 568 569 /* Register interrupt - SwAdcComplete */ 570 ret = request_threaded_irq(gpadc->irq, NULL, 571 ab8500_bm_gpswadcconvend_handler, 572 IRQF_NO_SUSPEND | IRQF_SHARED, "ab8500-gpadc", gpadc); 573 if (ret < 0) { 574 dev_err(gpadc->dev, "Failed to register interrupt, irq: %d\n", 575 gpadc->irq); 576 goto fail; 577 } 578 579 /* Get Chip ID of the ABB ASIC */ 580 ret = abx500_get_chip_id(gpadc->dev); 581 if (ret < 0) { 582 dev_err(gpadc->dev, "failed to get chip ID\n"); 583 goto fail_irq; 584 } 585 gpadc->chip_id = (u8) ret; 586 587 /* VTVout LDO used to power up ab8500-GPADC */ 588 gpadc->regu = regulator_get(&pdev->dev, "vddadc"); 589 if (IS_ERR(gpadc->regu)) { 590 ret = PTR_ERR(gpadc->regu); 591 dev_err(gpadc->dev, "failed to get vtvout LDO\n"); 592 goto fail_irq; 593 } 594 ab8500_gpadc_read_calibration_data(gpadc); 595 list_add_tail(&gpadc->node, &ab8500_gpadc_list); 596 dev_dbg(gpadc->dev, "probe success\n"); 597 return 0; 598fail_irq: 599 free_irq(gpadc->irq, gpadc); 600fail: 601 kfree(gpadc); 602 gpadc = NULL; 603 return ret; 604} 605 606static int __devexit ab8500_gpadc_remove(struct platform_device *pdev) 607{ 608 struct ab8500_gpadc *gpadc = platform_get_drvdata(pdev); 609 610 /* remove this gpadc entry from the list */ 611 list_del(&gpadc->node); 612 /* remove interrupt - completion of Sw ADC conversion */ 613 free_irq(gpadc->irq, gpadc); 614 /* disable VTVout LDO that is being used by GPADC */ 615 regulator_put(gpadc->regu); 616 kfree(gpadc); 617 gpadc = NULL; 618 return 0; 619} 620 621static struct platform_driver ab8500_gpadc_driver = { 622 .probe = ab8500_gpadc_probe, 623 .remove = __devexit_p(ab8500_gpadc_remove), 624 .driver = { 625 .name = "ab8500-gpadc", 626 .owner = THIS_MODULE, 627 }, 628}; 629 630static int __init ab8500_gpadc_init(void) 631{ 632 return platform_driver_register(&ab8500_gpadc_driver); 633} 634 635static void __exit ab8500_gpadc_exit(void) 636{ 637 platform_driver_unregister(&ab8500_gpadc_driver); 638} 639 640subsys_initcall_sync(ab8500_gpadc_init); 641module_exit(ab8500_gpadc_exit); 642 643MODULE_LICENSE("GPL v2"); 644MODULE_AUTHOR("Arun R Murthy, Daniel Willerud, Johan Palsson"); 645MODULE_ALIAS("platform:ab8500_gpadc"); 646MODULE_DESCRIPTION("AB8500 GPADC driver");