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1/*
2 * linux/drivers/char/serial_core.h
3 *
4 * Copyright (C) 2000 Deep Blue Solutions Ltd.
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
15 *
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, write to the Free Software
18 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
19 */
20#ifndef LINUX_SERIAL_CORE_H
21#define LINUX_SERIAL_CORE_H
22
23#include <linux/serial.h>
24
25/*
26 * The type definitions. These are from Ted Ts'o's serial.h
27 */
28#define PORT_UNKNOWN 0
29#define PORT_8250 1
30#define PORT_16450 2
31#define PORT_16550 3
32#define PORT_16550A 4
33#define PORT_CIRRUS 5
34#define PORT_16650 6
35#define PORT_16650V2 7
36#define PORT_16750 8
37#define PORT_STARTECH 9
38#define PORT_16C950 10
39#define PORT_16654 11
40#define PORT_16850 12
41#define PORT_RSA 13
42#define PORT_NS16550A 14
43#define PORT_XSCALE 15
44#define PORT_RM9000 16 /* PMC-Sierra RM9xxx internal UART */
45#define PORT_OCTEON 17 /* Cavium OCTEON internal UART */
46#define PORT_AR7 18 /* Texas Instruments AR7 internal UART */
47#define PORT_U6_16550A 19 /* ST-Ericsson U6xxx internal UART */
48#define PORT_MAX_8250 19 /* max port ID */
49
50/*
51 * ARM specific type numbers. These are not currently guaranteed
52 * to be implemented, and will change in the future. These are
53 * separate so any additions to the old serial.c that occur before
54 * we are merged can be easily merged here.
55 */
56#define PORT_PXA 31
57#define PORT_AMBA 32
58#define PORT_CLPS711X 33
59#define PORT_SA1100 34
60#define PORT_UART00 35
61#define PORT_21285 37
62
63/* Sparc type numbers. */
64#define PORT_SUNZILOG 38
65#define PORT_SUNSAB 39
66
67/* DEC */
68#define PORT_DZ 46
69#define PORT_ZS 47
70
71/* Parisc type numbers. */
72#define PORT_MUX 48
73
74/* Atmel AT91 / AT32 SoC */
75#define PORT_ATMEL 49
76
77/* Macintosh Zilog type numbers */
78#define PORT_MAC_ZILOG 50 /* m68k : not yet implemented */
79#define PORT_PMAC_ZILOG 51
80
81/* SH-SCI */
82#define PORT_SCI 52
83#define PORT_SCIF 53
84#define PORT_IRDA 54
85
86/* Samsung S3C2410 SoC and derivatives thereof */
87#define PORT_S3C2410 55
88
89/* SGI IP22 aka Indy / Challenge S / Indigo 2 */
90#define PORT_IP22ZILOG 56
91
92/* Sharp LH7a40x -- an ARM9 SoC series */
93#define PORT_LH7A40X 57
94
95/* PPC CPM type number */
96#define PORT_CPM 58
97
98/* MPC52xx (and MPC512x) type numbers */
99#define PORT_MPC52xx 59
100
101/* IBM icom */
102#define PORT_ICOM 60
103
104/* Samsung S3C2440 SoC */
105#define PORT_S3C2440 61
106
107/* Motorola i.MX SoC */
108#define PORT_IMX 62
109
110/* Marvell MPSC */
111#define PORT_MPSC 63
112
113/* TXX9 type number */
114#define PORT_TXX9 64
115
116/* NEC VR4100 series SIU/DSIU */
117#define PORT_VR41XX_SIU 65
118#define PORT_VR41XX_DSIU 66
119
120/* Samsung S3C2400 SoC */
121#define PORT_S3C2400 67
122
123/* M32R SIO */
124#define PORT_M32R_SIO 68
125
126/*Digi jsm */
127#define PORT_JSM 69
128
129#define PORT_PNX8XXX 70
130
131/* Hilscher netx */
132#define PORT_NETX 71
133
134/* SUN4V Hypervisor Console */
135#define PORT_SUNHV 72
136
137#define PORT_S3C2412 73
138
139/* Xilinx uartlite */
140#define PORT_UARTLITE 74
141
142/* Blackfin bf5xx */
143#define PORT_BFIN 75
144
145/* Micrel KS8695 */
146#define PORT_KS8695 76
147
148/* Broadcom SB1250, etc. SOC */
149#define PORT_SB1250_DUART 77
150
151/* Freescale ColdFire */
152#define PORT_MCF 78
153
154/* Blackfin SPORT */
155#define PORT_BFIN_SPORT 79
156
157/* MN10300 on-chip UART numbers */
158#define PORT_MN10300 80
159#define PORT_MN10300_CTS 81
160
161#define PORT_SC26XX 82
162
163/* SH-SCI */
164#define PORT_SCIFA 83
165
166#define PORT_S3C6400 84
167
168/* NWPSERIAL */
169#define PORT_NWPSERIAL 85
170
171/* MAX3100 */
172#define PORT_MAX3100 86
173
174/* Timberdale UART */
175#define PORT_TIMBUART 87
176
177/* Qualcomm MSM SoCs */
178#define PORT_MSM 88
179
180/* BCM63xx family SoCs */
181#define PORT_BCM63XX 89
182
183/* Aeroflex Gaisler GRLIB APBUART */
184#define PORT_APBUART 90
185
186/* Altera UARTs */
187#define PORT_ALTERA_JTAGUART 91
188#define PORT_ALTERA_UART 92
189
190/* SH-SCI */
191#define PORT_SCIFB 93
192
193/* MAX3107 */
194#define PORT_MAX3107 94
195
196/* High Speed UART for Medfield */
197#define PORT_MFD 95
198
199/* TI OMAP-UART */
200#define PORT_OMAP 96
201
202/* VIA VT8500 SoC */
203#define PORT_VT8500 97
204
205#ifdef __KERNEL__
206
207#include <linux/compiler.h>
208#include <linux/interrupt.h>
209#include <linux/circ_buf.h>
210#include <linux/spinlock.h>
211#include <linux/sched.h>
212#include <linux/tty.h>
213#include <linux/mutex.h>
214#include <linux/sysrq.h>
215#include <linux/pps_kernel.h>
216
217struct uart_port;
218struct serial_struct;
219struct device;
220
221/*
222 * This structure describes all the operations that can be
223 * done on the physical hardware.
224 */
225struct uart_ops {
226 unsigned int (*tx_empty)(struct uart_port *);
227 void (*set_mctrl)(struct uart_port *, unsigned int mctrl);
228 unsigned int (*get_mctrl)(struct uart_port *);
229 void (*stop_tx)(struct uart_port *);
230 void (*start_tx)(struct uart_port *);
231 void (*send_xchar)(struct uart_port *, char ch);
232 void (*stop_rx)(struct uart_port *);
233 void (*enable_ms)(struct uart_port *);
234 void (*break_ctl)(struct uart_port *, int ctl);
235 int (*startup)(struct uart_port *);
236 void (*shutdown)(struct uart_port *);
237 void (*flush_buffer)(struct uart_port *);
238 void (*set_termios)(struct uart_port *, struct ktermios *new,
239 struct ktermios *old);
240 void (*set_ldisc)(struct uart_port *, int new);
241 void (*pm)(struct uart_port *, unsigned int state,
242 unsigned int oldstate);
243 int (*set_wake)(struct uart_port *, unsigned int state);
244
245 /*
246 * Return a string describing the type of the port
247 */
248 const char *(*type)(struct uart_port *);
249
250 /*
251 * Release IO and memory resources used by the port.
252 * This includes iounmap if necessary.
253 */
254 void (*release_port)(struct uart_port *);
255
256 /*
257 * Request IO and memory resources used by the port.
258 * This includes iomapping the port if necessary.
259 */
260 int (*request_port)(struct uart_port *);
261 void (*config_port)(struct uart_port *, int);
262 int (*verify_port)(struct uart_port *, struct serial_struct *);
263 int (*ioctl)(struct uart_port *, unsigned int, unsigned long);
264#ifdef CONFIG_CONSOLE_POLL
265 void (*poll_put_char)(struct uart_port *, unsigned char);
266 int (*poll_get_char)(struct uart_port *);
267#endif
268};
269
270#define NO_POLL_CHAR 0x00ff0000
271#define UART_CONFIG_TYPE (1 << 0)
272#define UART_CONFIG_IRQ (1 << 1)
273
274struct uart_icount {
275 __u32 cts;
276 __u32 dsr;
277 __u32 rng;
278 __u32 dcd;
279 __u32 rx;
280 __u32 tx;
281 __u32 frame;
282 __u32 overrun;
283 __u32 parity;
284 __u32 brk;
285 __u32 buf_overrun;
286};
287
288typedef unsigned int __bitwise__ upf_t;
289
290struct uart_port {
291 spinlock_t lock; /* port lock */
292 unsigned long iobase; /* in/out[bwl] */
293 unsigned char __iomem *membase; /* read/write[bwl] */
294 unsigned int (*serial_in)(struct uart_port *, int);
295 void (*serial_out)(struct uart_port *, int, int);
296 void (*set_termios)(struct uart_port *,
297 struct ktermios *new,
298 struct ktermios *old);
299 void (*pm)(struct uart_port *, unsigned int state,
300 unsigned int old);
301 unsigned int irq; /* irq number */
302 unsigned long irqflags; /* irq flags */
303 unsigned int uartclk; /* base uart clock */
304 unsigned int fifosize; /* tx fifo size */
305 unsigned char x_char; /* xon/xoff char */
306 unsigned char regshift; /* reg offset shift */
307 unsigned char iotype; /* io access style */
308 unsigned char unused1;
309
310#define UPIO_PORT (0)
311#define UPIO_HUB6 (1)
312#define UPIO_MEM (2)
313#define UPIO_MEM32 (3)
314#define UPIO_AU (4) /* Au1x00 type IO */
315#define UPIO_TSI (5) /* Tsi108/109 type IO */
316#define UPIO_DWAPB (6) /* DesignWare APB UART */
317#define UPIO_RM9000 (7) /* RM9000 type IO */
318#define UPIO_DWAPB32 (8) /* DesignWare APB UART (32 bit accesses) */
319
320 unsigned int read_status_mask; /* driver specific */
321 unsigned int ignore_status_mask; /* driver specific */
322 struct uart_state *state; /* pointer to parent state */
323 struct uart_icount icount; /* statistics */
324
325 struct console *cons; /* struct console, if any */
326#if defined(CONFIG_SERIAL_CORE_CONSOLE) || defined(SUPPORT_SYSRQ)
327 unsigned long sysrq; /* sysrq timeout */
328#endif
329
330 upf_t flags;
331
332#define UPF_FOURPORT ((__force upf_t) (1 << 1))
333#define UPF_SAK ((__force upf_t) (1 << 2))
334#define UPF_SPD_MASK ((__force upf_t) (0x1030))
335#define UPF_SPD_HI ((__force upf_t) (0x0010))
336#define UPF_SPD_VHI ((__force upf_t) (0x0020))
337#define UPF_SPD_CUST ((__force upf_t) (0x0030))
338#define UPF_SPD_SHI ((__force upf_t) (0x1000))
339#define UPF_SPD_WARP ((__force upf_t) (0x1010))
340#define UPF_SKIP_TEST ((__force upf_t) (1 << 6))
341#define UPF_AUTO_IRQ ((__force upf_t) (1 << 7))
342#define UPF_HARDPPS_CD ((__force upf_t) (1 << 11))
343#define UPF_LOW_LATENCY ((__force upf_t) (1 << 13))
344#define UPF_BUGGY_UART ((__force upf_t) (1 << 14))
345#define UPF_NO_TXEN_TEST ((__force upf_t) (1 << 15))
346#define UPF_MAGIC_MULTIPLIER ((__force upf_t) (1 << 16))
347#define UPF_CONS_FLOW ((__force upf_t) (1 << 23))
348#define UPF_SHARE_IRQ ((__force upf_t) (1 << 24))
349/* The exact UART type is known and should not be probed. */
350#define UPF_FIXED_TYPE ((__force upf_t) (1 << 27))
351#define UPF_BOOT_AUTOCONF ((__force upf_t) (1 << 28))
352#define UPF_FIXED_PORT ((__force upf_t) (1 << 29))
353#define UPF_DEAD ((__force upf_t) (1 << 30))
354#define UPF_IOREMAP ((__force upf_t) (1 << 31))
355
356#define UPF_CHANGE_MASK ((__force upf_t) (0x17fff))
357#define UPF_USR_MASK ((__force upf_t) (UPF_SPD_MASK|UPF_LOW_LATENCY))
358
359 unsigned int mctrl; /* current modem ctrl settings */
360 unsigned int timeout; /* character-based timeout */
361 unsigned int type; /* port type */
362 const struct uart_ops *ops;
363 unsigned int custom_divisor;
364 unsigned int line; /* port index */
365 resource_size_t mapbase; /* for ioremap */
366 struct device *dev; /* parent device */
367 unsigned char hub6; /* this should be in the 8250 driver */
368 unsigned char suspended;
369 unsigned char irq_wake;
370 unsigned char unused[2];
371 void *private_data; /* generic platform data pointer */
372};
373
374/*
375 * This is the state information which is persistent across opens.
376 */
377struct uart_state {
378 struct tty_port port;
379
380 int pm_state;
381 struct circ_buf xmit;
382
383 struct tasklet_struct tlet;
384 struct uart_port *uart_port;
385};
386
387#define UART_XMIT_SIZE PAGE_SIZE
388
389
390/* number of characters left in xmit buffer before we ask for more */
391#define WAKEUP_CHARS 256
392
393struct module;
394struct tty_driver;
395
396struct uart_driver {
397 struct module *owner;
398 const char *driver_name;
399 const char *dev_name;
400 int major;
401 int minor;
402 int nr;
403 struct console *cons;
404
405 /*
406 * these are private; the low level driver should not
407 * touch these; they should be initialised to NULL
408 */
409 struct uart_state *state;
410 struct tty_driver *tty_driver;
411};
412
413void uart_write_wakeup(struct uart_port *port);
414
415/*
416 * Baud rate helpers.
417 */
418void uart_update_timeout(struct uart_port *port, unsigned int cflag,
419 unsigned int baud);
420unsigned int uart_get_baud_rate(struct uart_port *port, struct ktermios *termios,
421 struct ktermios *old, unsigned int min,
422 unsigned int max);
423unsigned int uart_get_divisor(struct uart_port *port, unsigned int baud);
424
425/* Base timer interval for polling */
426static inline int uart_poll_timeout(struct uart_port *port)
427{
428 int timeout = port->timeout;
429
430 return timeout > 6 ? (timeout / 2 - 2) : 1;
431}
432
433/*
434 * Console helpers.
435 */
436struct uart_port *uart_get_console(struct uart_port *ports, int nr,
437 struct console *c);
438void uart_parse_options(char *options, int *baud, int *parity, int *bits,
439 int *flow);
440int uart_set_options(struct uart_port *port, struct console *co, int baud,
441 int parity, int bits, int flow);
442struct tty_driver *uart_console_device(struct console *co, int *index);
443void uart_console_write(struct uart_port *port, const char *s,
444 unsigned int count,
445 void (*putchar)(struct uart_port *, int));
446
447/*
448 * Port/driver registration/removal
449 */
450int uart_register_driver(struct uart_driver *uart);
451void uart_unregister_driver(struct uart_driver *uart);
452int uart_add_one_port(struct uart_driver *reg, struct uart_port *port);
453int uart_remove_one_port(struct uart_driver *reg, struct uart_port *port);
454int uart_match_port(struct uart_port *port1, struct uart_port *port2);
455
456/*
457 * Power Management
458 */
459int uart_suspend_port(struct uart_driver *reg, struct uart_port *port);
460int uart_resume_port(struct uart_driver *reg, struct uart_port *port);
461
462#define uart_circ_empty(circ) ((circ)->head == (circ)->tail)
463#define uart_circ_clear(circ) ((circ)->head = (circ)->tail = 0)
464
465#define uart_circ_chars_pending(circ) \
466 (CIRC_CNT((circ)->head, (circ)->tail, UART_XMIT_SIZE))
467
468#define uart_circ_chars_free(circ) \
469 (CIRC_SPACE((circ)->head, (circ)->tail, UART_XMIT_SIZE))
470
471static inline int uart_tx_stopped(struct uart_port *port)
472{
473 struct tty_struct *tty = port->state->port.tty;
474 if(tty->stopped || tty->hw_stopped)
475 return 1;
476 return 0;
477}
478
479/*
480 * The following are helper functions for the low level drivers.
481 */
482static inline int
483uart_handle_sysrq_char(struct uart_port *port, unsigned int ch)
484{
485#ifdef SUPPORT_SYSRQ
486 if (port->sysrq) {
487 if (ch && time_before(jiffies, port->sysrq)) {
488 handle_sysrq(ch);
489 port->sysrq = 0;
490 return 1;
491 }
492 port->sysrq = 0;
493 }
494#endif
495 return 0;
496}
497#ifndef SUPPORT_SYSRQ
498#define uart_handle_sysrq_char(port,ch) uart_handle_sysrq_char(port, 0)
499#endif
500
501/*
502 * We do the SysRQ and SAK checking like this...
503 */
504static inline int uart_handle_break(struct uart_port *port)
505{
506 struct uart_state *state = port->state;
507#ifdef SUPPORT_SYSRQ
508 if (port->cons && port->cons->index == port->line) {
509 if (!port->sysrq) {
510 port->sysrq = jiffies + HZ*5;
511 return 1;
512 }
513 port->sysrq = 0;
514 }
515#endif
516 if (port->flags & UPF_SAK)
517 do_SAK(state->port.tty);
518 return 0;
519}
520
521/**
522 * uart_handle_dcd_change - handle a change of carrier detect state
523 * @uport: uart_port structure for the open port
524 * @status: new carrier detect status, nonzero if active
525 */
526static inline void
527uart_handle_dcd_change(struct uart_port *uport, unsigned int status)
528{
529 struct uart_state *state = uport->state;
530 struct tty_port *port = &state->port;
531 struct tty_ldisc *ld = tty_ldisc_ref(port->tty);
532 struct pps_event_time ts;
533
534 if (ld && ld->ops->dcd_change)
535 pps_get_ts(&ts);
536
537 uport->icount.dcd++;
538#ifdef CONFIG_HARD_PPS
539 if ((uport->flags & UPF_HARDPPS_CD) && status)
540 hardpps();
541#endif
542
543 if (port->flags & ASYNC_CHECK_CD) {
544 if (status)
545 wake_up_interruptible(&port->open_wait);
546 else if (port->tty)
547 tty_hangup(port->tty);
548 }
549
550 if (ld && ld->ops->dcd_change)
551 ld->ops->dcd_change(port->tty, status, &ts);
552 if (ld)
553 tty_ldisc_deref(ld);
554}
555
556/**
557 * uart_handle_cts_change - handle a change of clear-to-send state
558 * @uport: uart_port structure for the open port
559 * @status: new clear to send status, nonzero if active
560 */
561static inline void
562uart_handle_cts_change(struct uart_port *uport, unsigned int status)
563{
564 struct tty_port *port = &uport->state->port;
565 struct tty_struct *tty = port->tty;
566
567 uport->icount.cts++;
568
569 if (port->flags & ASYNC_CTS_FLOW) {
570 if (tty->hw_stopped) {
571 if (status) {
572 tty->hw_stopped = 0;
573 uport->ops->start_tx(uport);
574 uart_write_wakeup(uport);
575 }
576 } else {
577 if (!status) {
578 tty->hw_stopped = 1;
579 uport->ops->stop_tx(uport);
580 }
581 }
582 }
583}
584
585#include <linux/tty_flip.h>
586
587static inline void
588uart_insert_char(struct uart_port *port, unsigned int status,
589 unsigned int overrun, unsigned int ch, unsigned int flag)
590{
591 struct tty_struct *tty = port->state->port.tty;
592
593 if ((status & port->ignore_status_mask & ~overrun) == 0)
594 tty_insert_flip_char(tty, ch, flag);
595
596 /*
597 * Overrun is special. Since it's reported immediately,
598 * it doesn't affect the current character.
599 */
600 if (status & ~port->ignore_status_mask & overrun)
601 tty_insert_flip_char(tty, 0, TTY_OVERRUN);
602}
603
604/*
605 * UART_ENABLE_MS - determine if port should enable modem status irqs
606 */
607#define UART_ENABLE_MS(port,cflag) ((port)->flags & UPF_HARDPPS_CD || \
608 (cflag) & CRTSCTS || \
609 !((cflag) & CLOCAL))
610
611#endif
612
613#endif /* LINUX_SERIAL_CORE_H */