Linux kernel mirror (for testing)
git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
tjh.dev
kernel
os
linux
1/*
2 * core.h -- Core driver for NXP PCF50633
3 *
4 * (C) 2006-2008 by Openmoko, Inc.
5 * All rights reserved.
6 *
7 * This program is free software; you can redistribute it and/or modify it
8 * under the terms of the GNU General Public License as published by the
9 * Free Software Foundation; either version 2 of the License, or (at your
10 * option) any later version.
11 */
12
13#ifndef __LINUX_MFD_PCF50633_CORE_H
14#define __LINUX_MFD_PCF50633_CORE_H
15
16#include <linux/i2c.h>
17#include <linux/workqueue.h>
18#include <linux/regulator/driver.h>
19#include <linux/regulator/machine.h>
20#include <linux/power_supply.h>
21#include <linux/mfd/pcf50633/backlight.h>
22
23struct pcf50633;
24
25#define PCF50633_NUM_REGULATORS 11
26
27struct pcf50633_platform_data {
28 struct regulator_init_data reg_init_data[PCF50633_NUM_REGULATORS];
29
30 char **batteries;
31 int num_batteries;
32
33 /*
34 * Should be set accordingly to the reference resistor used, see
35 * I_{ch(ref)} charger reference current in the pcf50633 User
36 * Manual.
37 */
38 int charger_reference_current_ma;
39
40 /* Callbacks */
41 void (*probe_done)(struct pcf50633 *);
42 void (*mbc_event_callback)(struct pcf50633 *, int);
43 void (*regulator_registered)(struct pcf50633 *, int);
44 void (*force_shutdown)(struct pcf50633 *);
45
46 u8 resumers[5];
47
48 struct pcf50633_bl_platform_data *backlight_data;
49};
50
51struct pcf50633_irq {
52 void (*handler) (int, void *);
53 void *data;
54};
55
56int pcf50633_register_irq(struct pcf50633 *pcf, int irq,
57 void (*handler) (int, void *), void *data);
58int pcf50633_free_irq(struct pcf50633 *pcf, int irq);
59
60int pcf50633_irq_mask(struct pcf50633 *pcf, int irq);
61int pcf50633_irq_unmask(struct pcf50633 *pcf, int irq);
62int pcf50633_irq_mask_get(struct pcf50633 *pcf, int irq);
63
64int pcf50633_read_block(struct pcf50633 *, u8 reg,
65 int nr_regs, u8 *data);
66int pcf50633_write_block(struct pcf50633 *pcf, u8 reg,
67 int nr_regs, u8 *data);
68u8 pcf50633_reg_read(struct pcf50633 *, u8 reg);
69int pcf50633_reg_write(struct pcf50633 *pcf, u8 reg, u8 val);
70
71int pcf50633_reg_set_bit_mask(struct pcf50633 *pcf, u8 reg, u8 mask, u8 val);
72int pcf50633_reg_clear_bits(struct pcf50633 *pcf, u8 reg, u8 bits);
73
74/* Interrupt registers */
75
76#define PCF50633_REG_INT1 0x02
77#define PCF50633_REG_INT2 0x03
78#define PCF50633_REG_INT3 0x04
79#define PCF50633_REG_INT4 0x05
80#define PCF50633_REG_INT5 0x06
81
82#define PCF50633_REG_INT1M 0x07
83#define PCF50633_REG_INT2M 0x08
84#define PCF50633_REG_INT3M 0x09
85#define PCF50633_REG_INT4M 0x0a
86#define PCF50633_REG_INT5M 0x0b
87
88enum {
89 /* Chip IRQs */
90 PCF50633_IRQ_ADPINS,
91 PCF50633_IRQ_ADPREM,
92 PCF50633_IRQ_USBINS,
93 PCF50633_IRQ_USBREM,
94 PCF50633_IRQ_RESERVED1,
95 PCF50633_IRQ_RESERVED2,
96 PCF50633_IRQ_ALARM,
97 PCF50633_IRQ_SECOND,
98 PCF50633_IRQ_ONKEYR,
99 PCF50633_IRQ_ONKEYF,
100 PCF50633_IRQ_EXTON1R,
101 PCF50633_IRQ_EXTON1F,
102 PCF50633_IRQ_EXTON2R,
103 PCF50633_IRQ_EXTON2F,
104 PCF50633_IRQ_EXTON3R,
105 PCF50633_IRQ_EXTON3F,
106 PCF50633_IRQ_BATFULL,
107 PCF50633_IRQ_CHGHALT,
108 PCF50633_IRQ_THLIMON,
109 PCF50633_IRQ_THLIMOFF,
110 PCF50633_IRQ_USBLIMON,
111 PCF50633_IRQ_USBLIMOFF,
112 PCF50633_IRQ_ADCRDY,
113 PCF50633_IRQ_ONKEY1S,
114 PCF50633_IRQ_LOWSYS,
115 PCF50633_IRQ_LOWBAT,
116 PCF50633_IRQ_HIGHTMP,
117 PCF50633_IRQ_AUTOPWRFAIL,
118 PCF50633_IRQ_DWN1PWRFAIL,
119 PCF50633_IRQ_DWN2PWRFAIL,
120 PCF50633_IRQ_LEDPWRFAIL,
121 PCF50633_IRQ_LEDOVP,
122 PCF50633_IRQ_LDO1PWRFAIL,
123 PCF50633_IRQ_LDO2PWRFAIL,
124 PCF50633_IRQ_LDO3PWRFAIL,
125 PCF50633_IRQ_LDO4PWRFAIL,
126 PCF50633_IRQ_LDO5PWRFAIL,
127 PCF50633_IRQ_LDO6PWRFAIL,
128 PCF50633_IRQ_HCLDOPWRFAIL,
129 PCF50633_IRQ_HCLDOOVL,
130
131 /* Always last */
132 PCF50633_NUM_IRQ,
133};
134
135struct pcf50633 {
136 struct device *dev;
137 struct i2c_client *i2c_client;
138
139 struct pcf50633_platform_data *pdata;
140 int irq;
141 struct pcf50633_irq irq_handler[PCF50633_NUM_IRQ];
142 struct work_struct irq_work;
143 struct workqueue_struct *work_queue;
144 struct mutex lock;
145
146 u8 mask_regs[5];
147
148 u8 suspend_irq_masks[5];
149 u8 resume_reason[5];
150 int is_suspended;
151
152 int onkey1s_held;
153
154 struct platform_device *rtc_pdev;
155 struct platform_device *mbc_pdev;
156 struct platform_device *adc_pdev;
157 struct platform_device *input_pdev;
158 struct platform_device *bl_pdev;
159 struct platform_device *regulator_pdev[PCF50633_NUM_REGULATORS];
160};
161
162enum pcf50633_reg_int1 {
163 PCF50633_INT1_ADPINS = 0x01, /* Adapter inserted */
164 PCF50633_INT1_ADPREM = 0x02, /* Adapter removed */
165 PCF50633_INT1_USBINS = 0x04, /* USB inserted */
166 PCF50633_INT1_USBREM = 0x08, /* USB removed */
167 /* reserved */
168 PCF50633_INT1_ALARM = 0x40, /* RTC alarm time is reached */
169 PCF50633_INT1_SECOND = 0x80, /* RTC periodic second interrupt */
170};
171
172enum pcf50633_reg_int2 {
173 PCF50633_INT2_ONKEYR = 0x01, /* ONKEY rising edge */
174 PCF50633_INT2_ONKEYF = 0x02, /* ONKEY falling edge */
175 PCF50633_INT2_EXTON1R = 0x04, /* EXTON1 rising edge */
176 PCF50633_INT2_EXTON1F = 0x08, /* EXTON1 falling edge */
177 PCF50633_INT2_EXTON2R = 0x10, /* EXTON2 rising edge */
178 PCF50633_INT2_EXTON2F = 0x20, /* EXTON2 falling edge */
179 PCF50633_INT2_EXTON3R = 0x40, /* EXTON3 rising edge */
180 PCF50633_INT2_EXTON3F = 0x80, /* EXTON3 falling edge */
181};
182
183enum pcf50633_reg_int3 {
184 PCF50633_INT3_BATFULL = 0x01, /* Battery full */
185 PCF50633_INT3_CHGHALT = 0x02, /* Charger halt */
186 PCF50633_INT3_THLIMON = 0x04,
187 PCF50633_INT3_THLIMOFF = 0x08,
188 PCF50633_INT3_USBLIMON = 0x10,
189 PCF50633_INT3_USBLIMOFF = 0x20,
190 PCF50633_INT3_ADCRDY = 0x40, /* ADC result ready */
191 PCF50633_INT3_ONKEY1S = 0x80, /* ONKEY pressed 1 second */
192};
193
194enum pcf50633_reg_int4 {
195 PCF50633_INT4_LOWSYS = 0x01,
196 PCF50633_INT4_LOWBAT = 0x02,
197 PCF50633_INT4_HIGHTMP = 0x04,
198 PCF50633_INT4_AUTOPWRFAIL = 0x08,
199 PCF50633_INT4_DWN1PWRFAIL = 0x10,
200 PCF50633_INT4_DWN2PWRFAIL = 0x20,
201 PCF50633_INT4_LEDPWRFAIL = 0x40,
202 PCF50633_INT4_LEDOVP = 0x80,
203};
204
205enum pcf50633_reg_int5 {
206 PCF50633_INT5_LDO1PWRFAIL = 0x01,
207 PCF50633_INT5_LDO2PWRFAIL = 0x02,
208 PCF50633_INT5_LDO3PWRFAIL = 0x04,
209 PCF50633_INT5_LDO4PWRFAIL = 0x08,
210 PCF50633_INT5_LDO5PWRFAIL = 0x10,
211 PCF50633_INT5_LDO6PWRFAIL = 0x20,
212 PCF50633_INT5_HCLDOPWRFAIL = 0x40,
213 PCF50633_INT5_HCLDOOVL = 0x80,
214};
215
216/* misc. registers */
217#define PCF50633_REG_OOCSHDWN 0x0c
218
219/* LED registers */
220#define PCF50633_REG_LEDOUT 0x28
221#define PCF50633_REG_LEDENA 0x29
222#define PCF50633_REG_LEDCTL 0x2a
223#define PCF50633_REG_LEDDIM 0x2b
224
225static inline struct pcf50633 *dev_to_pcf50633(struct device *dev)
226{
227 return dev_get_drvdata(dev);
228}
229
230int pcf50633_irq_init(struct pcf50633 *pcf, int irq);
231void pcf50633_irq_free(struct pcf50633 *pcf);
232#ifdef CONFIG_PM
233int pcf50633_irq_suspend(struct pcf50633 *pcf);
234int pcf50633_irq_resume(struct pcf50633 *pcf);
235#endif
236
237#endif