Linux kernel mirror (for testing) git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel os linux
1
fork

Configure Feed

Select the types of activity you want to include in your feed.

at v2.6.38 681 lines 17 kB view raw
1 2/* 3 * Linux device driver for PCI based Prism54 4 * 5 * Copyright (c) 2006, Michael Wu <flamingice@sourmilk.net> 6 * Copyright (c) 2008, Christian Lamparter <chunkeey@web.de> 7 * 8 * Based on the islsm (softmac prism54) driver, which is: 9 * Copyright 2004-2006 Jean-Baptiste Note <jean-baptiste.note@m4x.org>, et al. 10 * 11 * This program is free software; you can redistribute it and/or modify 12 * it under the terms of the GNU General Public License version 2 as 13 * published by the Free Software Foundation. 14 */ 15 16#include <linux/init.h> 17#include <linux/pci.h> 18#include <linux/slab.h> 19#include <linux/firmware.h> 20#include <linux/etherdevice.h> 21#include <linux/delay.h> 22#include <linux/completion.h> 23#include <net/mac80211.h> 24 25#include "p54.h" 26#include "lmac.h" 27#include "p54pci.h" 28 29MODULE_AUTHOR("Michael Wu <flamingice@sourmilk.net>"); 30MODULE_DESCRIPTION("Prism54 PCI wireless driver"); 31MODULE_LICENSE("GPL"); 32MODULE_ALIAS("prism54pci"); 33MODULE_FIRMWARE("isl3886pci"); 34 35static DEFINE_PCI_DEVICE_TABLE(p54p_table) = { 36 /* Intersil PRISM Duette/Prism GT Wireless LAN adapter */ 37 { PCI_DEVICE(0x1260, 0x3890) }, 38 /* 3COM 3CRWE154G72 Wireless LAN adapter */ 39 { PCI_DEVICE(0x10b7, 0x6001) }, 40 /* Intersil PRISM Indigo Wireless LAN adapter */ 41 { PCI_DEVICE(0x1260, 0x3877) }, 42 /* Intersil PRISM Javelin/Xbow Wireless LAN adapter */ 43 { PCI_DEVICE(0x1260, 0x3886) }, 44 /* Intersil PRISM Xbow Wireless LAN adapter (Symbol AP-300) */ 45 { PCI_DEVICE(0x1260, 0xffff) }, 46 { }, 47}; 48 49MODULE_DEVICE_TABLE(pci, p54p_table); 50 51static int p54p_upload_firmware(struct ieee80211_hw *dev) 52{ 53 struct p54p_priv *priv = dev->priv; 54 __le32 reg; 55 int err; 56 __le32 *data; 57 u32 remains, left, device_addr; 58 59 P54P_WRITE(int_enable, cpu_to_le32(0)); 60 P54P_READ(int_enable); 61 udelay(10); 62 63 reg = P54P_READ(ctrl_stat); 64 reg &= cpu_to_le32(~ISL38XX_CTRL_STAT_RESET); 65 reg &= cpu_to_le32(~ISL38XX_CTRL_STAT_RAMBOOT); 66 P54P_WRITE(ctrl_stat, reg); 67 P54P_READ(ctrl_stat); 68 udelay(10); 69 70 reg |= cpu_to_le32(ISL38XX_CTRL_STAT_RESET); 71 P54P_WRITE(ctrl_stat, reg); 72 wmb(); 73 udelay(10); 74 75 reg &= cpu_to_le32(~ISL38XX_CTRL_STAT_RESET); 76 P54P_WRITE(ctrl_stat, reg); 77 wmb(); 78 79 /* wait for the firmware to reset properly */ 80 mdelay(10); 81 82 err = p54_parse_firmware(dev, priv->firmware); 83 if (err) 84 return err; 85 86 if (priv->common.fw_interface != FW_LM86) { 87 dev_err(&priv->pdev->dev, "wrong firmware, " 88 "please get a LM86(PCI) firmware a try again.\n"); 89 return -EINVAL; 90 } 91 92 data = (__le32 *) priv->firmware->data; 93 remains = priv->firmware->size; 94 device_addr = ISL38XX_DEV_FIRMWARE_ADDR; 95 while (remains) { 96 u32 i = 0; 97 left = min((u32)0x1000, remains); 98 P54P_WRITE(direct_mem_base, cpu_to_le32(device_addr)); 99 P54P_READ(int_enable); 100 101 device_addr += 0x1000; 102 while (i < left) { 103 P54P_WRITE(direct_mem_win[i], *data++); 104 i += sizeof(u32); 105 } 106 107 remains -= left; 108 P54P_READ(int_enable); 109 } 110 111 reg = P54P_READ(ctrl_stat); 112 reg &= cpu_to_le32(~ISL38XX_CTRL_STAT_CLKRUN); 113 reg &= cpu_to_le32(~ISL38XX_CTRL_STAT_RESET); 114 reg |= cpu_to_le32(ISL38XX_CTRL_STAT_RAMBOOT); 115 P54P_WRITE(ctrl_stat, reg); 116 P54P_READ(ctrl_stat); 117 udelay(10); 118 119 reg |= cpu_to_le32(ISL38XX_CTRL_STAT_RESET); 120 P54P_WRITE(ctrl_stat, reg); 121 wmb(); 122 udelay(10); 123 124 reg &= cpu_to_le32(~ISL38XX_CTRL_STAT_RESET); 125 P54P_WRITE(ctrl_stat, reg); 126 wmb(); 127 udelay(10); 128 129 /* wait for the firmware to boot properly */ 130 mdelay(100); 131 132 return 0; 133} 134 135static void p54p_refill_rx_ring(struct ieee80211_hw *dev, 136 int ring_index, struct p54p_desc *ring, u32 ring_limit, 137 struct sk_buff **rx_buf, u32 index) 138{ 139 struct p54p_priv *priv = dev->priv; 140 struct p54p_ring_control *ring_control = priv->ring_control; 141 u32 limit, idx, i; 142 143 idx = le32_to_cpu(ring_control->host_idx[ring_index]); 144 limit = idx; 145 limit -= index; 146 limit = ring_limit - limit; 147 148 i = idx % ring_limit; 149 while (limit-- > 1) { 150 struct p54p_desc *desc = &ring[i]; 151 152 if (!desc->host_addr) { 153 struct sk_buff *skb; 154 dma_addr_t mapping; 155 skb = dev_alloc_skb(priv->common.rx_mtu + 32); 156 if (!skb) 157 break; 158 159 mapping = pci_map_single(priv->pdev, 160 skb_tail_pointer(skb), 161 priv->common.rx_mtu + 32, 162 PCI_DMA_FROMDEVICE); 163 164 if (pci_dma_mapping_error(priv->pdev, mapping)) { 165 dev_kfree_skb_any(skb); 166 dev_err(&priv->pdev->dev, 167 "RX DMA Mapping error\n"); 168 break; 169 } 170 171 desc->host_addr = cpu_to_le32(mapping); 172 desc->device_addr = 0; // FIXME: necessary? 173 desc->len = cpu_to_le16(priv->common.rx_mtu + 32); 174 desc->flags = 0; 175 rx_buf[i] = skb; 176 } 177 178 i++; 179 idx++; 180 i %= ring_limit; 181 } 182 183 wmb(); 184 ring_control->host_idx[ring_index] = cpu_to_le32(idx); 185} 186 187static void p54p_check_rx_ring(struct ieee80211_hw *dev, u32 *index, 188 int ring_index, struct p54p_desc *ring, u32 ring_limit, 189 struct sk_buff **rx_buf) 190{ 191 struct p54p_priv *priv = dev->priv; 192 struct p54p_ring_control *ring_control = priv->ring_control; 193 struct p54p_desc *desc; 194 u32 idx, i; 195 196 i = (*index) % ring_limit; 197 (*index) = idx = le32_to_cpu(ring_control->device_idx[ring_index]); 198 idx %= ring_limit; 199 while (i != idx) { 200 u16 len; 201 struct sk_buff *skb; 202 dma_addr_t dma_addr; 203 desc = &ring[i]; 204 len = le16_to_cpu(desc->len); 205 skb = rx_buf[i]; 206 207 if (!skb) { 208 i++; 209 i %= ring_limit; 210 continue; 211 } 212 213 if (unlikely(len > priv->common.rx_mtu)) { 214 if (net_ratelimit()) 215 dev_err(&priv->pdev->dev, "rx'd frame size " 216 "exceeds length threshold.\n"); 217 218 len = priv->common.rx_mtu; 219 } 220 dma_addr = le32_to_cpu(desc->host_addr); 221 pci_dma_sync_single_for_cpu(priv->pdev, dma_addr, 222 priv->common.rx_mtu + 32, PCI_DMA_FROMDEVICE); 223 skb_put(skb, len); 224 225 if (p54_rx(dev, skb)) { 226 pci_unmap_single(priv->pdev, dma_addr, 227 priv->common.rx_mtu + 32, PCI_DMA_FROMDEVICE); 228 rx_buf[i] = NULL; 229 desc->host_addr = cpu_to_le32(0); 230 } else { 231 skb_trim(skb, 0); 232 pci_dma_sync_single_for_device(priv->pdev, dma_addr, 233 priv->common.rx_mtu + 32, PCI_DMA_FROMDEVICE); 234 desc->len = cpu_to_le16(priv->common.rx_mtu + 32); 235 } 236 237 i++; 238 i %= ring_limit; 239 } 240 241 p54p_refill_rx_ring(dev, ring_index, ring, ring_limit, rx_buf, *index); 242} 243 244static void p54p_check_tx_ring(struct ieee80211_hw *dev, u32 *index, 245 int ring_index, struct p54p_desc *ring, u32 ring_limit, 246 struct sk_buff **tx_buf) 247{ 248 struct p54p_priv *priv = dev->priv; 249 struct p54p_ring_control *ring_control = priv->ring_control; 250 struct p54p_desc *desc; 251 struct sk_buff *skb; 252 u32 idx, i; 253 254 i = (*index) % ring_limit; 255 (*index) = idx = le32_to_cpu(ring_control->device_idx[ring_index]); 256 idx %= ring_limit; 257 258 while (i != idx) { 259 desc = &ring[i]; 260 261 skb = tx_buf[i]; 262 tx_buf[i] = NULL; 263 264 pci_unmap_single(priv->pdev, le32_to_cpu(desc->host_addr), 265 le16_to_cpu(desc->len), PCI_DMA_TODEVICE); 266 267 desc->host_addr = 0; 268 desc->device_addr = 0; 269 desc->len = 0; 270 desc->flags = 0; 271 272 if (skb && FREE_AFTER_TX(skb)) 273 p54_free_skb(dev, skb); 274 275 i++; 276 i %= ring_limit; 277 } 278} 279 280static void p54p_tasklet(unsigned long dev_id) 281{ 282 struct ieee80211_hw *dev = (struct ieee80211_hw *)dev_id; 283 struct p54p_priv *priv = dev->priv; 284 struct p54p_ring_control *ring_control = priv->ring_control; 285 286 p54p_check_tx_ring(dev, &priv->tx_idx_mgmt, 3, ring_control->tx_mgmt, 287 ARRAY_SIZE(ring_control->tx_mgmt), 288 priv->tx_buf_mgmt); 289 290 p54p_check_tx_ring(dev, &priv->tx_idx_data, 1, ring_control->tx_data, 291 ARRAY_SIZE(ring_control->tx_data), 292 priv->tx_buf_data); 293 294 p54p_check_rx_ring(dev, &priv->rx_idx_mgmt, 2, ring_control->rx_mgmt, 295 ARRAY_SIZE(ring_control->rx_mgmt), priv->rx_buf_mgmt); 296 297 p54p_check_rx_ring(dev, &priv->rx_idx_data, 0, ring_control->rx_data, 298 ARRAY_SIZE(ring_control->rx_data), priv->rx_buf_data); 299 300 wmb(); 301 P54P_WRITE(dev_int, cpu_to_le32(ISL38XX_DEV_INT_UPDATE)); 302} 303 304static irqreturn_t p54p_interrupt(int irq, void *dev_id) 305{ 306 struct ieee80211_hw *dev = dev_id; 307 struct p54p_priv *priv = dev->priv; 308 __le32 reg; 309 310 reg = P54P_READ(int_ident); 311 if (unlikely(reg == cpu_to_le32(0xFFFFFFFF))) { 312 goto out; 313 } 314 P54P_WRITE(int_ack, reg); 315 316 reg &= P54P_READ(int_enable); 317 318 if (reg & cpu_to_le32(ISL38XX_INT_IDENT_UPDATE)) 319 tasklet_schedule(&priv->tasklet); 320 else if (reg & cpu_to_le32(ISL38XX_INT_IDENT_INIT)) 321 complete(&priv->boot_comp); 322 323out: 324 return reg ? IRQ_HANDLED : IRQ_NONE; 325} 326 327static void p54p_tx(struct ieee80211_hw *dev, struct sk_buff *skb) 328{ 329 unsigned long flags; 330 struct p54p_priv *priv = dev->priv; 331 struct p54p_ring_control *ring_control = priv->ring_control; 332 struct p54p_desc *desc; 333 dma_addr_t mapping; 334 u32 device_idx, idx, i; 335 336 spin_lock_irqsave(&priv->lock, flags); 337 device_idx = le32_to_cpu(ring_control->device_idx[1]); 338 idx = le32_to_cpu(ring_control->host_idx[1]); 339 i = idx % ARRAY_SIZE(ring_control->tx_data); 340 341 mapping = pci_map_single(priv->pdev, skb->data, skb->len, 342 PCI_DMA_TODEVICE); 343 if (pci_dma_mapping_error(priv->pdev, mapping)) { 344 spin_unlock_irqrestore(&priv->lock, flags); 345 p54_free_skb(dev, skb); 346 dev_err(&priv->pdev->dev, "TX DMA mapping error\n"); 347 return ; 348 } 349 priv->tx_buf_data[i] = skb; 350 351 desc = &ring_control->tx_data[i]; 352 desc->host_addr = cpu_to_le32(mapping); 353 desc->device_addr = ((struct p54_hdr *)skb->data)->req_id; 354 desc->len = cpu_to_le16(skb->len); 355 desc->flags = 0; 356 357 wmb(); 358 ring_control->host_idx[1] = cpu_to_le32(idx + 1); 359 spin_unlock_irqrestore(&priv->lock, flags); 360 361 P54P_WRITE(dev_int, cpu_to_le32(ISL38XX_DEV_INT_UPDATE)); 362 P54P_READ(dev_int); 363} 364 365static void p54p_stop(struct ieee80211_hw *dev) 366{ 367 struct p54p_priv *priv = dev->priv; 368 struct p54p_ring_control *ring_control = priv->ring_control; 369 unsigned int i; 370 struct p54p_desc *desc; 371 372 P54P_WRITE(int_enable, cpu_to_le32(0)); 373 P54P_READ(int_enable); 374 udelay(10); 375 376 free_irq(priv->pdev->irq, dev); 377 378 tasklet_kill(&priv->tasklet); 379 380 P54P_WRITE(dev_int, cpu_to_le32(ISL38XX_DEV_INT_RESET)); 381 382 for (i = 0; i < ARRAY_SIZE(priv->rx_buf_data); i++) { 383 desc = &ring_control->rx_data[i]; 384 if (desc->host_addr) 385 pci_unmap_single(priv->pdev, 386 le32_to_cpu(desc->host_addr), 387 priv->common.rx_mtu + 32, 388 PCI_DMA_FROMDEVICE); 389 kfree_skb(priv->rx_buf_data[i]); 390 priv->rx_buf_data[i] = NULL; 391 } 392 393 for (i = 0; i < ARRAY_SIZE(priv->rx_buf_mgmt); i++) { 394 desc = &ring_control->rx_mgmt[i]; 395 if (desc->host_addr) 396 pci_unmap_single(priv->pdev, 397 le32_to_cpu(desc->host_addr), 398 priv->common.rx_mtu + 32, 399 PCI_DMA_FROMDEVICE); 400 kfree_skb(priv->rx_buf_mgmt[i]); 401 priv->rx_buf_mgmt[i] = NULL; 402 } 403 404 for (i = 0; i < ARRAY_SIZE(priv->tx_buf_data); i++) { 405 desc = &ring_control->tx_data[i]; 406 if (desc->host_addr) 407 pci_unmap_single(priv->pdev, 408 le32_to_cpu(desc->host_addr), 409 le16_to_cpu(desc->len), 410 PCI_DMA_TODEVICE); 411 412 p54_free_skb(dev, priv->tx_buf_data[i]); 413 priv->tx_buf_data[i] = NULL; 414 } 415 416 for (i = 0; i < ARRAY_SIZE(priv->tx_buf_mgmt); i++) { 417 desc = &ring_control->tx_mgmt[i]; 418 if (desc->host_addr) 419 pci_unmap_single(priv->pdev, 420 le32_to_cpu(desc->host_addr), 421 le16_to_cpu(desc->len), 422 PCI_DMA_TODEVICE); 423 424 p54_free_skb(dev, priv->tx_buf_mgmt[i]); 425 priv->tx_buf_mgmt[i] = NULL; 426 } 427 428 memset(ring_control, 0, sizeof(*ring_control)); 429} 430 431static int p54p_open(struct ieee80211_hw *dev) 432{ 433 struct p54p_priv *priv = dev->priv; 434 int err; 435 436 init_completion(&priv->boot_comp); 437 err = request_irq(priv->pdev->irq, p54p_interrupt, 438 IRQF_SHARED, "p54pci", dev); 439 if (err) { 440 dev_err(&priv->pdev->dev, "failed to register IRQ handler\n"); 441 return err; 442 } 443 444 memset(priv->ring_control, 0, sizeof(*priv->ring_control)); 445 err = p54p_upload_firmware(dev); 446 if (err) { 447 free_irq(priv->pdev->irq, dev); 448 return err; 449 } 450 priv->rx_idx_data = priv->tx_idx_data = 0; 451 priv->rx_idx_mgmt = priv->tx_idx_mgmt = 0; 452 453 p54p_refill_rx_ring(dev, 0, priv->ring_control->rx_data, 454 ARRAY_SIZE(priv->ring_control->rx_data), priv->rx_buf_data, 0); 455 456 p54p_refill_rx_ring(dev, 2, priv->ring_control->rx_mgmt, 457 ARRAY_SIZE(priv->ring_control->rx_mgmt), priv->rx_buf_mgmt, 0); 458 459 P54P_WRITE(ring_control_base, cpu_to_le32(priv->ring_control_dma)); 460 P54P_READ(ring_control_base); 461 wmb(); 462 udelay(10); 463 464 P54P_WRITE(int_enable, cpu_to_le32(ISL38XX_INT_IDENT_INIT)); 465 P54P_READ(int_enable); 466 wmb(); 467 udelay(10); 468 469 P54P_WRITE(dev_int, cpu_to_le32(ISL38XX_DEV_INT_RESET)); 470 P54P_READ(dev_int); 471 472 if (!wait_for_completion_interruptible_timeout(&priv->boot_comp, HZ)) { 473 wiphy_err(dev->wiphy, "Cannot boot firmware!\n"); 474 p54p_stop(dev); 475 return -ETIMEDOUT; 476 } 477 478 P54P_WRITE(int_enable, cpu_to_le32(ISL38XX_INT_IDENT_UPDATE)); 479 P54P_READ(int_enable); 480 wmb(); 481 udelay(10); 482 483 P54P_WRITE(dev_int, cpu_to_le32(ISL38XX_DEV_INT_UPDATE)); 484 P54P_READ(dev_int); 485 wmb(); 486 udelay(10); 487 488 return 0; 489} 490 491static int __devinit p54p_probe(struct pci_dev *pdev, 492 const struct pci_device_id *id) 493{ 494 struct p54p_priv *priv; 495 struct ieee80211_hw *dev; 496 unsigned long mem_addr, mem_len; 497 int err; 498 499 err = pci_enable_device(pdev); 500 if (err) { 501 dev_err(&pdev->dev, "Cannot enable new PCI device\n"); 502 return err; 503 } 504 505 mem_addr = pci_resource_start(pdev, 0); 506 mem_len = pci_resource_len(pdev, 0); 507 if (mem_len < sizeof(struct p54p_csr)) { 508 dev_err(&pdev->dev, "Too short PCI resources\n"); 509 goto err_disable_dev; 510 } 511 512 err = pci_request_regions(pdev, "p54pci"); 513 if (err) { 514 dev_err(&pdev->dev, "Cannot obtain PCI resources\n"); 515 goto err_disable_dev; 516 } 517 518 if (pci_set_dma_mask(pdev, DMA_BIT_MASK(32)) || 519 pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(32))) { 520 dev_err(&pdev->dev, "No suitable DMA available\n"); 521 goto err_free_reg; 522 } 523 524 pci_set_master(pdev); 525 pci_try_set_mwi(pdev); 526 527 pci_write_config_byte(pdev, 0x40, 0); 528 pci_write_config_byte(pdev, 0x41, 0); 529 530 dev = p54_init_common(sizeof(*priv)); 531 if (!dev) { 532 dev_err(&pdev->dev, "ieee80211 alloc failed\n"); 533 err = -ENOMEM; 534 goto err_free_reg; 535 } 536 537 priv = dev->priv; 538 priv->pdev = pdev; 539 540 SET_IEEE80211_DEV(dev, &pdev->dev); 541 pci_set_drvdata(pdev, dev); 542 543 priv->map = ioremap(mem_addr, mem_len); 544 if (!priv->map) { 545 dev_err(&pdev->dev, "Cannot map device memory\n"); 546 err = -ENOMEM; 547 goto err_free_dev; 548 } 549 550 priv->ring_control = pci_alloc_consistent(pdev, sizeof(*priv->ring_control), 551 &priv->ring_control_dma); 552 if (!priv->ring_control) { 553 dev_err(&pdev->dev, "Cannot allocate rings\n"); 554 err = -ENOMEM; 555 goto err_iounmap; 556 } 557 priv->common.open = p54p_open; 558 priv->common.stop = p54p_stop; 559 priv->common.tx = p54p_tx; 560 561 spin_lock_init(&priv->lock); 562 tasklet_init(&priv->tasklet, p54p_tasklet, (unsigned long)dev); 563 564 err = request_firmware(&priv->firmware, "isl3886pci", 565 &priv->pdev->dev); 566 if (err) { 567 dev_err(&pdev->dev, "Cannot find firmware (isl3886pci)\n"); 568 err = request_firmware(&priv->firmware, "isl3886", 569 &priv->pdev->dev); 570 if (err) 571 goto err_free_common; 572 } 573 574 err = p54p_open(dev); 575 if (err) 576 goto err_free_common; 577 err = p54_read_eeprom(dev); 578 p54p_stop(dev); 579 if (err) 580 goto err_free_common; 581 582 err = p54_register_common(dev, &pdev->dev); 583 if (err) 584 goto err_free_common; 585 586 return 0; 587 588 err_free_common: 589 release_firmware(priv->firmware); 590 pci_free_consistent(pdev, sizeof(*priv->ring_control), 591 priv->ring_control, priv->ring_control_dma); 592 593 err_iounmap: 594 iounmap(priv->map); 595 596 err_free_dev: 597 pci_set_drvdata(pdev, NULL); 598 p54_free_common(dev); 599 600 err_free_reg: 601 pci_release_regions(pdev); 602 err_disable_dev: 603 pci_disable_device(pdev); 604 return err; 605} 606 607static void __devexit p54p_remove(struct pci_dev *pdev) 608{ 609 struct ieee80211_hw *dev = pci_get_drvdata(pdev); 610 struct p54p_priv *priv; 611 612 if (!dev) 613 return; 614 615 p54_unregister_common(dev); 616 priv = dev->priv; 617 release_firmware(priv->firmware); 618 pci_free_consistent(pdev, sizeof(*priv->ring_control), 619 priv->ring_control, priv->ring_control_dma); 620 iounmap(priv->map); 621 pci_release_regions(pdev); 622 pci_disable_device(pdev); 623 p54_free_common(dev); 624} 625 626#ifdef CONFIG_PM 627static int p54p_suspend(struct pci_dev *pdev, pm_message_t state) 628{ 629 struct ieee80211_hw *dev = pci_get_drvdata(pdev); 630 struct p54p_priv *priv = dev->priv; 631 632 if (priv->common.mode != NL80211_IFTYPE_UNSPECIFIED) { 633 ieee80211_stop_queues(dev); 634 p54p_stop(dev); 635 } 636 637 pci_save_state(pdev); 638 pci_set_power_state(pdev, pci_choose_state(pdev, state)); 639 return 0; 640} 641 642static int p54p_resume(struct pci_dev *pdev) 643{ 644 struct ieee80211_hw *dev = pci_get_drvdata(pdev); 645 struct p54p_priv *priv = dev->priv; 646 647 pci_set_power_state(pdev, PCI_D0); 648 pci_restore_state(pdev); 649 650 if (priv->common.mode != NL80211_IFTYPE_UNSPECIFIED) { 651 p54p_open(dev); 652 ieee80211_wake_queues(dev); 653 } 654 655 return 0; 656} 657#endif /* CONFIG_PM */ 658 659static struct pci_driver p54p_driver = { 660 .name = "p54pci", 661 .id_table = p54p_table, 662 .probe = p54p_probe, 663 .remove = __devexit_p(p54p_remove), 664#ifdef CONFIG_PM 665 .suspend = p54p_suspend, 666 .resume = p54p_resume, 667#endif /* CONFIG_PM */ 668}; 669 670static int __init p54p_init(void) 671{ 672 return pci_register_driver(&p54p_driver); 673} 674 675static void __exit p54p_exit(void) 676{ 677 pci_unregister_driver(&p54p_driver); 678} 679 680module_init(p54p_init); 681module_exit(p54p_exit);