Linux kernel mirror (for testing) git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel os linux
at v2.6.38 6256 lines 176 kB view raw
1/******************************************************************************* 2 3 Intel PRO/1000 Linux driver 4 Copyright(c) 1999 - 2011 Intel Corporation. 5 6 This program is free software; you can redistribute it and/or modify it 7 under the terms and conditions of the GNU General Public License, 8 version 2, as published by the Free Software Foundation. 9 10 This program is distributed in the hope it will be useful, but WITHOUT 11 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or 12 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for 13 more details. 14 15 You should have received a copy of the GNU General Public License along with 16 this program; if not, write to the Free Software Foundation, Inc., 17 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA. 18 19 The full GNU General Public License is included in this distribution in 20 the file called "COPYING". 21 22 Contact Information: 23 Linux NICS <linux.nics@intel.com> 24 e1000-devel Mailing List <e1000-devel@lists.sourceforge.net> 25 Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497 26 27*******************************************************************************/ 28 29#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt 30 31#include <linux/module.h> 32#include <linux/types.h> 33#include <linux/init.h> 34#include <linux/pci.h> 35#include <linux/vmalloc.h> 36#include <linux/pagemap.h> 37#include <linux/delay.h> 38#include <linux/netdevice.h> 39#include <linux/tcp.h> 40#include <linux/ipv6.h> 41#include <linux/slab.h> 42#include <net/checksum.h> 43#include <net/ip6_checksum.h> 44#include <linux/mii.h> 45#include <linux/ethtool.h> 46#include <linux/if_vlan.h> 47#include <linux/cpu.h> 48#include <linux/smp.h> 49#include <linux/pm_qos_params.h> 50#include <linux/pm_runtime.h> 51#include <linux/aer.h> 52 53#include "e1000.h" 54 55#define DRV_EXTRAVERSION "-k2" 56 57#define DRV_VERSION "1.2.20" DRV_EXTRAVERSION 58char e1000e_driver_name[] = "e1000e"; 59const char e1000e_driver_version[] = DRV_VERSION; 60 61static const struct e1000_info *e1000_info_tbl[] = { 62 [board_82571] = &e1000_82571_info, 63 [board_82572] = &e1000_82572_info, 64 [board_82573] = &e1000_82573_info, 65 [board_82574] = &e1000_82574_info, 66 [board_82583] = &e1000_82583_info, 67 [board_80003es2lan] = &e1000_es2_info, 68 [board_ich8lan] = &e1000_ich8_info, 69 [board_ich9lan] = &e1000_ich9_info, 70 [board_ich10lan] = &e1000_ich10_info, 71 [board_pchlan] = &e1000_pch_info, 72 [board_pch2lan] = &e1000_pch2_info, 73}; 74 75struct e1000_reg_info { 76 u32 ofs; 77 char *name; 78}; 79 80#define E1000_RDFH 0x02410 /* Rx Data FIFO Head - RW */ 81#define E1000_RDFT 0x02418 /* Rx Data FIFO Tail - RW */ 82#define E1000_RDFHS 0x02420 /* Rx Data FIFO Head Saved - RW */ 83#define E1000_RDFTS 0x02428 /* Rx Data FIFO Tail Saved - RW */ 84#define E1000_RDFPC 0x02430 /* Rx Data FIFO Packet Count - RW */ 85 86#define E1000_TDFH 0x03410 /* Tx Data FIFO Head - RW */ 87#define E1000_TDFT 0x03418 /* Tx Data FIFO Tail - RW */ 88#define E1000_TDFHS 0x03420 /* Tx Data FIFO Head Saved - RW */ 89#define E1000_TDFTS 0x03428 /* Tx Data FIFO Tail Saved - RW */ 90#define E1000_TDFPC 0x03430 /* Tx Data FIFO Packet Count - RW */ 91 92static const struct e1000_reg_info e1000_reg_info_tbl[] = { 93 94 /* General Registers */ 95 {E1000_CTRL, "CTRL"}, 96 {E1000_STATUS, "STATUS"}, 97 {E1000_CTRL_EXT, "CTRL_EXT"}, 98 99 /* Interrupt Registers */ 100 {E1000_ICR, "ICR"}, 101 102 /* Rx Registers */ 103 {E1000_RCTL, "RCTL"}, 104 {E1000_RDLEN, "RDLEN"}, 105 {E1000_RDH, "RDH"}, 106 {E1000_RDT, "RDT"}, 107 {E1000_RDTR, "RDTR"}, 108 {E1000_RXDCTL(0), "RXDCTL"}, 109 {E1000_ERT, "ERT"}, 110 {E1000_RDBAL, "RDBAL"}, 111 {E1000_RDBAH, "RDBAH"}, 112 {E1000_RDFH, "RDFH"}, 113 {E1000_RDFT, "RDFT"}, 114 {E1000_RDFHS, "RDFHS"}, 115 {E1000_RDFTS, "RDFTS"}, 116 {E1000_RDFPC, "RDFPC"}, 117 118 /* Tx Registers */ 119 {E1000_TCTL, "TCTL"}, 120 {E1000_TDBAL, "TDBAL"}, 121 {E1000_TDBAH, "TDBAH"}, 122 {E1000_TDLEN, "TDLEN"}, 123 {E1000_TDH, "TDH"}, 124 {E1000_TDT, "TDT"}, 125 {E1000_TIDV, "TIDV"}, 126 {E1000_TXDCTL(0), "TXDCTL"}, 127 {E1000_TADV, "TADV"}, 128 {E1000_TARC(0), "TARC"}, 129 {E1000_TDFH, "TDFH"}, 130 {E1000_TDFT, "TDFT"}, 131 {E1000_TDFHS, "TDFHS"}, 132 {E1000_TDFTS, "TDFTS"}, 133 {E1000_TDFPC, "TDFPC"}, 134 135 /* List Terminator */ 136 {} 137}; 138 139/* 140 * e1000_regdump - register printout routine 141 */ 142static void e1000_regdump(struct e1000_hw *hw, struct e1000_reg_info *reginfo) 143{ 144 int n = 0; 145 char rname[16]; 146 u32 regs[8]; 147 148 switch (reginfo->ofs) { 149 case E1000_RXDCTL(0): 150 for (n = 0; n < 2; n++) 151 regs[n] = __er32(hw, E1000_RXDCTL(n)); 152 break; 153 case E1000_TXDCTL(0): 154 for (n = 0; n < 2; n++) 155 regs[n] = __er32(hw, E1000_TXDCTL(n)); 156 break; 157 case E1000_TARC(0): 158 for (n = 0; n < 2; n++) 159 regs[n] = __er32(hw, E1000_TARC(n)); 160 break; 161 default: 162 printk(KERN_INFO "%-15s %08x\n", 163 reginfo->name, __er32(hw, reginfo->ofs)); 164 return; 165 } 166 167 snprintf(rname, 16, "%s%s", reginfo->name, "[0-1]"); 168 printk(KERN_INFO "%-15s ", rname); 169 for (n = 0; n < 2; n++) 170 printk(KERN_CONT "%08x ", regs[n]); 171 printk(KERN_CONT "\n"); 172} 173 174/* 175 * e1000e_dump - Print registers, Tx-ring and Rx-ring 176 */ 177static void e1000e_dump(struct e1000_adapter *adapter) 178{ 179 struct net_device *netdev = adapter->netdev; 180 struct e1000_hw *hw = &adapter->hw; 181 struct e1000_reg_info *reginfo; 182 struct e1000_ring *tx_ring = adapter->tx_ring; 183 struct e1000_tx_desc *tx_desc; 184 struct my_u0 { 185 u64 a; 186 u64 b; 187 } *u0; 188 struct e1000_buffer *buffer_info; 189 struct e1000_ring *rx_ring = adapter->rx_ring; 190 union e1000_rx_desc_packet_split *rx_desc_ps; 191 struct e1000_rx_desc *rx_desc; 192 struct my_u1 { 193 u64 a; 194 u64 b; 195 u64 c; 196 u64 d; 197 } *u1; 198 u32 staterr; 199 int i = 0; 200 201 if (!netif_msg_hw(adapter)) 202 return; 203 204 /* Print netdevice Info */ 205 if (netdev) { 206 dev_info(&adapter->pdev->dev, "Net device Info\n"); 207 printk(KERN_INFO "Device Name state " 208 "trans_start last_rx\n"); 209 printk(KERN_INFO "%-15s %016lX %016lX %016lX\n", 210 netdev->name, netdev->state, netdev->trans_start, 211 netdev->last_rx); 212 } 213 214 /* Print Registers */ 215 dev_info(&adapter->pdev->dev, "Register Dump\n"); 216 printk(KERN_INFO " Register Name Value\n"); 217 for (reginfo = (struct e1000_reg_info *)e1000_reg_info_tbl; 218 reginfo->name; reginfo++) { 219 e1000_regdump(hw, reginfo); 220 } 221 222 /* Print Tx Ring Summary */ 223 if (!netdev || !netif_running(netdev)) 224 goto exit; 225 226 dev_info(&adapter->pdev->dev, "Tx Ring Summary\n"); 227 printk(KERN_INFO "Queue [NTU] [NTC] [bi(ntc)->dma ]" 228 " leng ntw timestamp\n"); 229 buffer_info = &tx_ring->buffer_info[tx_ring->next_to_clean]; 230 printk(KERN_INFO " %5d %5X %5X %016llX %04X %3X %016llX\n", 231 0, tx_ring->next_to_use, tx_ring->next_to_clean, 232 (unsigned long long)buffer_info->dma, 233 buffer_info->length, 234 buffer_info->next_to_watch, 235 (unsigned long long)buffer_info->time_stamp); 236 237 /* Print Tx Ring */ 238 if (!netif_msg_tx_done(adapter)) 239 goto rx_ring_summary; 240 241 dev_info(&adapter->pdev->dev, "Tx Ring Dump\n"); 242 243 /* Transmit Descriptor Formats - DEXT[29] is 0 (Legacy) or 1 (Extended) 244 * 245 * Legacy Transmit Descriptor 246 * +--------------------------------------------------------------+ 247 * 0 | Buffer Address [63:0] (Reserved on Write Back) | 248 * +--------------------------------------------------------------+ 249 * 8 | Special | CSS | Status | CMD | CSO | Length | 250 * +--------------------------------------------------------------+ 251 * 63 48 47 36 35 32 31 24 23 16 15 0 252 * 253 * Extended Context Descriptor (DTYP=0x0) for TSO or checksum offload 254 * 63 48 47 40 39 32 31 16 15 8 7 0 255 * +----------------------------------------------------------------+ 256 * 0 | TUCSE | TUCS0 | TUCSS | IPCSE | IPCS0 | IPCSS | 257 * +----------------------------------------------------------------+ 258 * 8 | MSS | HDRLEN | RSV | STA | TUCMD | DTYP | PAYLEN | 259 * +----------------------------------------------------------------+ 260 * 63 48 47 40 39 36 35 32 31 24 23 20 19 0 261 * 262 * Extended Data Descriptor (DTYP=0x1) 263 * +----------------------------------------------------------------+ 264 * 0 | Buffer Address [63:0] | 265 * +----------------------------------------------------------------+ 266 * 8 | VLAN tag | POPTS | Rsvd | Status | Command | DTYP | DTALEN | 267 * +----------------------------------------------------------------+ 268 * 63 48 47 40 39 36 35 32 31 24 23 20 19 0 269 */ 270 printk(KERN_INFO "Tl[desc] [address 63:0 ] [SpeCssSCmCsLen]" 271 " [bi->dma ] leng ntw timestamp bi->skb " 272 "<-- Legacy format\n"); 273 printk(KERN_INFO "Tc[desc] [Ce CoCsIpceCoS] [MssHlRSCm0Plen]" 274 " [bi->dma ] leng ntw timestamp bi->skb " 275 "<-- Ext Context format\n"); 276 printk(KERN_INFO "Td[desc] [address 63:0 ] [VlaPoRSCm1Dlen]" 277 " [bi->dma ] leng ntw timestamp bi->skb " 278 "<-- Ext Data format\n"); 279 for (i = 0; tx_ring->desc && (i < tx_ring->count); i++) { 280 tx_desc = E1000_TX_DESC(*tx_ring, i); 281 buffer_info = &tx_ring->buffer_info[i]; 282 u0 = (struct my_u0 *)tx_desc; 283 printk(KERN_INFO "T%c[0x%03X] %016llX %016llX %016llX " 284 "%04X %3X %016llX %p", 285 (!(le64_to_cpu(u0->b) & (1 << 29)) ? 'l' : 286 ((le64_to_cpu(u0->b) & (1 << 20)) ? 'd' : 'c')), i, 287 (unsigned long long)le64_to_cpu(u0->a), 288 (unsigned long long)le64_to_cpu(u0->b), 289 (unsigned long long)buffer_info->dma, 290 buffer_info->length, buffer_info->next_to_watch, 291 (unsigned long long)buffer_info->time_stamp, 292 buffer_info->skb); 293 if (i == tx_ring->next_to_use && i == tx_ring->next_to_clean) 294 printk(KERN_CONT " NTC/U\n"); 295 else if (i == tx_ring->next_to_use) 296 printk(KERN_CONT " NTU\n"); 297 else if (i == tx_ring->next_to_clean) 298 printk(KERN_CONT " NTC\n"); 299 else 300 printk(KERN_CONT "\n"); 301 302 if (netif_msg_pktdata(adapter) && buffer_info->dma != 0) 303 print_hex_dump(KERN_INFO, "", DUMP_PREFIX_ADDRESS, 304 16, 1, phys_to_virt(buffer_info->dma), 305 buffer_info->length, true); 306 } 307 308 /* Print Rx Ring Summary */ 309rx_ring_summary: 310 dev_info(&adapter->pdev->dev, "Rx Ring Summary\n"); 311 printk(KERN_INFO "Queue [NTU] [NTC]\n"); 312 printk(KERN_INFO " %5d %5X %5X\n", 0, 313 rx_ring->next_to_use, rx_ring->next_to_clean); 314 315 /* Print Rx Ring */ 316 if (!netif_msg_rx_status(adapter)) 317 goto exit; 318 319 dev_info(&adapter->pdev->dev, "Rx Ring Dump\n"); 320 switch (adapter->rx_ps_pages) { 321 case 1: 322 case 2: 323 case 3: 324 /* [Extended] Packet Split Receive Descriptor Format 325 * 326 * +-----------------------------------------------------+ 327 * 0 | Buffer Address 0 [63:0] | 328 * +-----------------------------------------------------+ 329 * 8 | Buffer Address 1 [63:0] | 330 * +-----------------------------------------------------+ 331 * 16 | Buffer Address 2 [63:0] | 332 * +-----------------------------------------------------+ 333 * 24 | Buffer Address 3 [63:0] | 334 * +-----------------------------------------------------+ 335 */ 336 printk(KERN_INFO "R [desc] [buffer 0 63:0 ] " 337 "[buffer 1 63:0 ] " 338 "[buffer 2 63:0 ] [buffer 3 63:0 ] [bi->dma ] " 339 "[bi->skb] <-- Ext Pkt Split format\n"); 340 /* [Extended] Receive Descriptor (Write-Back) Format 341 * 342 * 63 48 47 32 31 13 12 8 7 4 3 0 343 * +------------------------------------------------------+ 344 * 0 | Packet | IP | Rsvd | MRQ | Rsvd | MRQ RSS | 345 * | Checksum | Ident | | Queue | | Type | 346 * +------------------------------------------------------+ 347 * 8 | VLAN Tag | Length | Extended Error | Extended Status | 348 * +------------------------------------------------------+ 349 * 63 48 47 32 31 20 19 0 350 */ 351 printk(KERN_INFO "RWB[desc] [ck ipid mrqhsh] " 352 "[vl l0 ee es] " 353 "[ l3 l2 l1 hs] [reserved ] ---------------- " 354 "[bi->skb] <-- Ext Rx Write-Back format\n"); 355 for (i = 0; i < rx_ring->count; i++) { 356 buffer_info = &rx_ring->buffer_info[i]; 357 rx_desc_ps = E1000_RX_DESC_PS(*rx_ring, i); 358 u1 = (struct my_u1 *)rx_desc_ps; 359 staterr = 360 le32_to_cpu(rx_desc_ps->wb.middle.status_error); 361 if (staterr & E1000_RXD_STAT_DD) { 362 /* Descriptor Done */ 363 printk(KERN_INFO "RWB[0x%03X] %016llX " 364 "%016llX %016llX %016llX " 365 "---------------- %p", i, 366 (unsigned long long)le64_to_cpu(u1->a), 367 (unsigned long long)le64_to_cpu(u1->b), 368 (unsigned long long)le64_to_cpu(u1->c), 369 (unsigned long long)le64_to_cpu(u1->d), 370 buffer_info->skb); 371 } else { 372 printk(KERN_INFO "R [0x%03X] %016llX " 373 "%016llX %016llX %016llX %016llX %p", i, 374 (unsigned long long)le64_to_cpu(u1->a), 375 (unsigned long long)le64_to_cpu(u1->b), 376 (unsigned long long)le64_to_cpu(u1->c), 377 (unsigned long long)le64_to_cpu(u1->d), 378 (unsigned long long)buffer_info->dma, 379 buffer_info->skb); 380 381 if (netif_msg_pktdata(adapter)) 382 print_hex_dump(KERN_INFO, "", 383 DUMP_PREFIX_ADDRESS, 16, 1, 384 phys_to_virt(buffer_info->dma), 385 adapter->rx_ps_bsize0, true); 386 } 387 388 if (i == rx_ring->next_to_use) 389 printk(KERN_CONT " NTU\n"); 390 else if (i == rx_ring->next_to_clean) 391 printk(KERN_CONT " NTC\n"); 392 else 393 printk(KERN_CONT "\n"); 394 } 395 break; 396 default: 397 case 0: 398 /* Legacy Receive Descriptor Format 399 * 400 * +-----------------------------------------------------+ 401 * | Buffer Address [63:0] | 402 * +-----------------------------------------------------+ 403 * | VLAN Tag | Errors | Status 0 | Packet csum | Length | 404 * +-----------------------------------------------------+ 405 * 63 48 47 40 39 32 31 16 15 0 406 */ 407 printk(KERN_INFO "Rl[desc] [address 63:0 ] " 408 "[vl er S cks ln] [bi->dma ] [bi->skb] " 409 "<-- Legacy format\n"); 410 for (i = 0; rx_ring->desc && (i < rx_ring->count); i++) { 411 rx_desc = E1000_RX_DESC(*rx_ring, i); 412 buffer_info = &rx_ring->buffer_info[i]; 413 u0 = (struct my_u0 *)rx_desc; 414 printk(KERN_INFO "Rl[0x%03X] %016llX %016llX " 415 "%016llX %p", i, 416 (unsigned long long)le64_to_cpu(u0->a), 417 (unsigned long long)le64_to_cpu(u0->b), 418 (unsigned long long)buffer_info->dma, 419 buffer_info->skb); 420 if (i == rx_ring->next_to_use) 421 printk(KERN_CONT " NTU\n"); 422 else if (i == rx_ring->next_to_clean) 423 printk(KERN_CONT " NTC\n"); 424 else 425 printk(KERN_CONT "\n"); 426 427 if (netif_msg_pktdata(adapter)) 428 print_hex_dump(KERN_INFO, "", 429 DUMP_PREFIX_ADDRESS, 430 16, 1, 431 phys_to_virt(buffer_info->dma), 432 adapter->rx_buffer_len, true); 433 } 434 } 435 436exit: 437 return; 438} 439 440/** 441 * e1000_desc_unused - calculate if we have unused descriptors 442 **/ 443static int e1000_desc_unused(struct e1000_ring *ring) 444{ 445 if (ring->next_to_clean > ring->next_to_use) 446 return ring->next_to_clean - ring->next_to_use - 1; 447 448 return ring->count + ring->next_to_clean - ring->next_to_use - 1; 449} 450 451/** 452 * e1000_receive_skb - helper function to handle Rx indications 453 * @adapter: board private structure 454 * @status: descriptor status field as written by hardware 455 * @vlan: descriptor vlan field as written by hardware (no le/be conversion) 456 * @skb: pointer to sk_buff to be indicated to stack 457 **/ 458static void e1000_receive_skb(struct e1000_adapter *adapter, 459 struct net_device *netdev, struct sk_buff *skb, 460 u8 status, __le16 vlan) 461{ 462 skb->protocol = eth_type_trans(skb, netdev); 463 464 if (adapter->vlgrp && (status & E1000_RXD_STAT_VP)) 465 vlan_gro_receive(&adapter->napi, adapter->vlgrp, 466 le16_to_cpu(vlan), skb); 467 else 468 napi_gro_receive(&adapter->napi, skb); 469} 470 471/** 472 * e1000_rx_checksum - Receive Checksum Offload 473 * @adapter: board private structure 474 * @status_err: receive descriptor status and error fields 475 * @csum: receive descriptor csum field 476 * @sk_buff: socket buffer with received data 477 **/ 478static void e1000_rx_checksum(struct e1000_adapter *adapter, u32 status_err, 479 u32 csum, struct sk_buff *skb) 480{ 481 u16 status = (u16)status_err; 482 u8 errors = (u8)(status_err >> 24); 483 484 skb_checksum_none_assert(skb); 485 486 /* Ignore Checksum bit is set */ 487 if (status & E1000_RXD_STAT_IXSM) 488 return; 489 /* TCP/UDP checksum error bit is set */ 490 if (errors & E1000_RXD_ERR_TCPE) { 491 /* let the stack verify checksum errors */ 492 adapter->hw_csum_err++; 493 return; 494 } 495 496 /* TCP/UDP Checksum has not been calculated */ 497 if (!(status & (E1000_RXD_STAT_TCPCS | E1000_RXD_STAT_UDPCS))) 498 return; 499 500 /* It must be a TCP or UDP packet with a valid checksum */ 501 if (status & E1000_RXD_STAT_TCPCS) { 502 /* TCP checksum is good */ 503 skb->ip_summed = CHECKSUM_UNNECESSARY; 504 } else { 505 /* 506 * IP fragment with UDP payload 507 * Hardware complements the payload checksum, so we undo it 508 * and then put the value in host order for further stack use. 509 */ 510 __sum16 sum = (__force __sum16)htons(csum); 511 skb->csum = csum_unfold(~sum); 512 skb->ip_summed = CHECKSUM_COMPLETE; 513 } 514 adapter->hw_csum_good++; 515} 516 517/** 518 * e1000_alloc_rx_buffers - Replace used receive buffers; legacy & extended 519 * @adapter: address of board private structure 520 **/ 521static void e1000_alloc_rx_buffers(struct e1000_adapter *adapter, 522 int cleaned_count) 523{ 524 struct net_device *netdev = adapter->netdev; 525 struct pci_dev *pdev = adapter->pdev; 526 struct e1000_ring *rx_ring = adapter->rx_ring; 527 struct e1000_rx_desc *rx_desc; 528 struct e1000_buffer *buffer_info; 529 struct sk_buff *skb; 530 unsigned int i; 531 unsigned int bufsz = adapter->rx_buffer_len; 532 533 i = rx_ring->next_to_use; 534 buffer_info = &rx_ring->buffer_info[i]; 535 536 while (cleaned_count--) { 537 skb = buffer_info->skb; 538 if (skb) { 539 skb_trim(skb, 0); 540 goto map_skb; 541 } 542 543 skb = netdev_alloc_skb_ip_align(netdev, bufsz); 544 if (!skb) { 545 /* Better luck next round */ 546 adapter->alloc_rx_buff_failed++; 547 break; 548 } 549 550 buffer_info->skb = skb; 551map_skb: 552 buffer_info->dma = dma_map_single(&pdev->dev, skb->data, 553 adapter->rx_buffer_len, 554 DMA_FROM_DEVICE); 555 if (dma_mapping_error(&pdev->dev, buffer_info->dma)) { 556 dev_err(&pdev->dev, "Rx DMA map failed\n"); 557 adapter->rx_dma_failed++; 558 break; 559 } 560 561 rx_desc = E1000_RX_DESC(*rx_ring, i); 562 rx_desc->buffer_addr = cpu_to_le64(buffer_info->dma); 563 564 if (unlikely(!(i & (E1000_RX_BUFFER_WRITE - 1)))) { 565 /* 566 * Force memory writes to complete before letting h/w 567 * know there are new descriptors to fetch. (Only 568 * applicable for weak-ordered memory model archs, 569 * such as IA-64). 570 */ 571 wmb(); 572 writel(i, adapter->hw.hw_addr + rx_ring->tail); 573 } 574 i++; 575 if (i == rx_ring->count) 576 i = 0; 577 buffer_info = &rx_ring->buffer_info[i]; 578 } 579 580 rx_ring->next_to_use = i; 581} 582 583/** 584 * e1000_alloc_rx_buffers_ps - Replace used receive buffers; packet split 585 * @adapter: address of board private structure 586 **/ 587static void e1000_alloc_rx_buffers_ps(struct e1000_adapter *adapter, 588 int cleaned_count) 589{ 590 struct net_device *netdev = adapter->netdev; 591 struct pci_dev *pdev = adapter->pdev; 592 union e1000_rx_desc_packet_split *rx_desc; 593 struct e1000_ring *rx_ring = adapter->rx_ring; 594 struct e1000_buffer *buffer_info; 595 struct e1000_ps_page *ps_page; 596 struct sk_buff *skb; 597 unsigned int i, j; 598 599 i = rx_ring->next_to_use; 600 buffer_info = &rx_ring->buffer_info[i]; 601 602 while (cleaned_count--) { 603 rx_desc = E1000_RX_DESC_PS(*rx_ring, i); 604 605 for (j = 0; j < PS_PAGE_BUFFERS; j++) { 606 ps_page = &buffer_info->ps_pages[j]; 607 if (j >= adapter->rx_ps_pages) { 608 /* all unused desc entries get hw null ptr */ 609 rx_desc->read.buffer_addr[j + 1] = 610 ~cpu_to_le64(0); 611 continue; 612 } 613 if (!ps_page->page) { 614 ps_page->page = alloc_page(GFP_ATOMIC); 615 if (!ps_page->page) { 616 adapter->alloc_rx_buff_failed++; 617 goto no_buffers; 618 } 619 ps_page->dma = dma_map_page(&pdev->dev, 620 ps_page->page, 621 0, PAGE_SIZE, 622 DMA_FROM_DEVICE); 623 if (dma_mapping_error(&pdev->dev, 624 ps_page->dma)) { 625 dev_err(&adapter->pdev->dev, 626 "Rx DMA page map failed\n"); 627 adapter->rx_dma_failed++; 628 goto no_buffers; 629 } 630 } 631 /* 632 * Refresh the desc even if buffer_addrs 633 * didn't change because each write-back 634 * erases this info. 635 */ 636 rx_desc->read.buffer_addr[j + 1] = 637 cpu_to_le64(ps_page->dma); 638 } 639 640 skb = netdev_alloc_skb_ip_align(netdev, 641 adapter->rx_ps_bsize0); 642 643 if (!skb) { 644 adapter->alloc_rx_buff_failed++; 645 break; 646 } 647 648 buffer_info->skb = skb; 649 buffer_info->dma = dma_map_single(&pdev->dev, skb->data, 650 adapter->rx_ps_bsize0, 651 DMA_FROM_DEVICE); 652 if (dma_mapping_error(&pdev->dev, buffer_info->dma)) { 653 dev_err(&pdev->dev, "Rx DMA map failed\n"); 654 adapter->rx_dma_failed++; 655 /* cleanup skb */ 656 dev_kfree_skb_any(skb); 657 buffer_info->skb = NULL; 658 break; 659 } 660 661 rx_desc->read.buffer_addr[0] = cpu_to_le64(buffer_info->dma); 662 663 if (unlikely(!(i & (E1000_RX_BUFFER_WRITE - 1)))) { 664 /* 665 * Force memory writes to complete before letting h/w 666 * know there are new descriptors to fetch. (Only 667 * applicable for weak-ordered memory model archs, 668 * such as IA-64). 669 */ 670 wmb(); 671 writel(i << 1, adapter->hw.hw_addr + rx_ring->tail); 672 } 673 674 i++; 675 if (i == rx_ring->count) 676 i = 0; 677 buffer_info = &rx_ring->buffer_info[i]; 678 } 679 680no_buffers: 681 rx_ring->next_to_use = i; 682} 683 684/** 685 * e1000_alloc_jumbo_rx_buffers - Replace used jumbo receive buffers 686 * @adapter: address of board private structure 687 * @cleaned_count: number of buffers to allocate this pass 688 **/ 689 690static void e1000_alloc_jumbo_rx_buffers(struct e1000_adapter *adapter, 691 int cleaned_count) 692{ 693 struct net_device *netdev = adapter->netdev; 694 struct pci_dev *pdev = adapter->pdev; 695 struct e1000_rx_desc *rx_desc; 696 struct e1000_ring *rx_ring = adapter->rx_ring; 697 struct e1000_buffer *buffer_info; 698 struct sk_buff *skb; 699 unsigned int i; 700 unsigned int bufsz = 256 - 16 /* for skb_reserve */; 701 702 i = rx_ring->next_to_use; 703 buffer_info = &rx_ring->buffer_info[i]; 704 705 while (cleaned_count--) { 706 skb = buffer_info->skb; 707 if (skb) { 708 skb_trim(skb, 0); 709 goto check_page; 710 } 711 712 skb = netdev_alloc_skb_ip_align(netdev, bufsz); 713 if (unlikely(!skb)) { 714 /* Better luck next round */ 715 adapter->alloc_rx_buff_failed++; 716 break; 717 } 718 719 buffer_info->skb = skb; 720check_page: 721 /* allocate a new page if necessary */ 722 if (!buffer_info->page) { 723 buffer_info->page = alloc_page(GFP_ATOMIC); 724 if (unlikely(!buffer_info->page)) { 725 adapter->alloc_rx_buff_failed++; 726 break; 727 } 728 } 729 730 if (!buffer_info->dma) 731 buffer_info->dma = dma_map_page(&pdev->dev, 732 buffer_info->page, 0, 733 PAGE_SIZE, 734 DMA_FROM_DEVICE); 735 736 rx_desc = E1000_RX_DESC(*rx_ring, i); 737 rx_desc->buffer_addr = cpu_to_le64(buffer_info->dma); 738 739 if (unlikely(++i == rx_ring->count)) 740 i = 0; 741 buffer_info = &rx_ring->buffer_info[i]; 742 } 743 744 if (likely(rx_ring->next_to_use != i)) { 745 rx_ring->next_to_use = i; 746 if (unlikely(i-- == 0)) 747 i = (rx_ring->count - 1); 748 749 /* Force memory writes to complete before letting h/w 750 * know there are new descriptors to fetch. (Only 751 * applicable for weak-ordered memory model archs, 752 * such as IA-64). */ 753 wmb(); 754 writel(i, adapter->hw.hw_addr + rx_ring->tail); 755 } 756} 757 758/** 759 * e1000_clean_rx_irq - Send received data up the network stack; legacy 760 * @adapter: board private structure 761 * 762 * the return value indicates whether actual cleaning was done, there 763 * is no guarantee that everything was cleaned 764 **/ 765static bool e1000_clean_rx_irq(struct e1000_adapter *adapter, 766 int *work_done, int work_to_do) 767{ 768 struct net_device *netdev = adapter->netdev; 769 struct pci_dev *pdev = adapter->pdev; 770 struct e1000_hw *hw = &adapter->hw; 771 struct e1000_ring *rx_ring = adapter->rx_ring; 772 struct e1000_rx_desc *rx_desc, *next_rxd; 773 struct e1000_buffer *buffer_info, *next_buffer; 774 u32 length; 775 unsigned int i; 776 int cleaned_count = 0; 777 bool cleaned = 0; 778 unsigned int total_rx_bytes = 0, total_rx_packets = 0; 779 780 i = rx_ring->next_to_clean; 781 rx_desc = E1000_RX_DESC(*rx_ring, i); 782 buffer_info = &rx_ring->buffer_info[i]; 783 784 while (rx_desc->status & E1000_RXD_STAT_DD) { 785 struct sk_buff *skb; 786 u8 status; 787 788 if (*work_done >= work_to_do) 789 break; 790 (*work_done)++; 791 rmb(); /* read descriptor and rx_buffer_info after status DD */ 792 793 status = rx_desc->status; 794 skb = buffer_info->skb; 795 buffer_info->skb = NULL; 796 797 prefetch(skb->data - NET_IP_ALIGN); 798 799 i++; 800 if (i == rx_ring->count) 801 i = 0; 802 next_rxd = E1000_RX_DESC(*rx_ring, i); 803 prefetch(next_rxd); 804 805 next_buffer = &rx_ring->buffer_info[i]; 806 807 cleaned = 1; 808 cleaned_count++; 809 dma_unmap_single(&pdev->dev, 810 buffer_info->dma, 811 adapter->rx_buffer_len, 812 DMA_FROM_DEVICE); 813 buffer_info->dma = 0; 814 815 length = le16_to_cpu(rx_desc->length); 816 817 /* 818 * !EOP means multiple descriptors were used to store a single 819 * packet, if that's the case we need to toss it. In fact, we 820 * need to toss every packet with the EOP bit clear and the 821 * next frame that _does_ have the EOP bit set, as it is by 822 * definition only a frame fragment 823 */ 824 if (unlikely(!(status & E1000_RXD_STAT_EOP))) 825 adapter->flags2 |= FLAG2_IS_DISCARDING; 826 827 if (adapter->flags2 & FLAG2_IS_DISCARDING) { 828 /* All receives must fit into a single buffer */ 829 e_dbg("Receive packet consumed multiple buffers\n"); 830 /* recycle */ 831 buffer_info->skb = skb; 832 if (status & E1000_RXD_STAT_EOP) 833 adapter->flags2 &= ~FLAG2_IS_DISCARDING; 834 goto next_desc; 835 } 836 837 if (rx_desc->errors & E1000_RXD_ERR_FRAME_ERR_MASK) { 838 /* recycle */ 839 buffer_info->skb = skb; 840 goto next_desc; 841 } 842 843 /* adjust length to remove Ethernet CRC */ 844 if (!(adapter->flags2 & FLAG2_CRC_STRIPPING)) 845 length -= 4; 846 847 total_rx_bytes += length; 848 total_rx_packets++; 849 850 /* 851 * code added for copybreak, this should improve 852 * performance for small packets with large amounts 853 * of reassembly being done in the stack 854 */ 855 if (length < copybreak) { 856 struct sk_buff *new_skb = 857 netdev_alloc_skb_ip_align(netdev, length); 858 if (new_skb) { 859 skb_copy_to_linear_data_offset(new_skb, 860 -NET_IP_ALIGN, 861 (skb->data - 862 NET_IP_ALIGN), 863 (length + 864 NET_IP_ALIGN)); 865 /* save the skb in buffer_info as good */ 866 buffer_info->skb = skb; 867 skb = new_skb; 868 } 869 /* else just continue with the old one */ 870 } 871 /* end copybreak code */ 872 skb_put(skb, length); 873 874 /* Receive Checksum Offload */ 875 e1000_rx_checksum(adapter, 876 (u32)(status) | 877 ((u32)(rx_desc->errors) << 24), 878 le16_to_cpu(rx_desc->csum), skb); 879 880 e1000_receive_skb(adapter, netdev, skb,status,rx_desc->special); 881 882next_desc: 883 rx_desc->status = 0; 884 885 /* return some buffers to hardware, one at a time is too slow */ 886 if (cleaned_count >= E1000_RX_BUFFER_WRITE) { 887 adapter->alloc_rx_buf(adapter, cleaned_count); 888 cleaned_count = 0; 889 } 890 891 /* use prefetched values */ 892 rx_desc = next_rxd; 893 buffer_info = next_buffer; 894 } 895 rx_ring->next_to_clean = i; 896 897 cleaned_count = e1000_desc_unused(rx_ring); 898 if (cleaned_count) 899 adapter->alloc_rx_buf(adapter, cleaned_count); 900 901 adapter->total_rx_bytes += total_rx_bytes; 902 adapter->total_rx_packets += total_rx_packets; 903 netdev->stats.rx_bytes += total_rx_bytes; 904 netdev->stats.rx_packets += total_rx_packets; 905 return cleaned; 906} 907 908static void e1000_put_txbuf(struct e1000_adapter *adapter, 909 struct e1000_buffer *buffer_info) 910{ 911 if (buffer_info->dma) { 912 if (buffer_info->mapped_as_page) 913 dma_unmap_page(&adapter->pdev->dev, buffer_info->dma, 914 buffer_info->length, DMA_TO_DEVICE); 915 else 916 dma_unmap_single(&adapter->pdev->dev, buffer_info->dma, 917 buffer_info->length, DMA_TO_DEVICE); 918 buffer_info->dma = 0; 919 } 920 if (buffer_info->skb) { 921 dev_kfree_skb_any(buffer_info->skb); 922 buffer_info->skb = NULL; 923 } 924 buffer_info->time_stamp = 0; 925} 926 927static void e1000_print_hw_hang(struct work_struct *work) 928{ 929 struct e1000_adapter *adapter = container_of(work, 930 struct e1000_adapter, 931 print_hang_task); 932 struct e1000_ring *tx_ring = adapter->tx_ring; 933 unsigned int i = tx_ring->next_to_clean; 934 unsigned int eop = tx_ring->buffer_info[i].next_to_watch; 935 struct e1000_tx_desc *eop_desc = E1000_TX_DESC(*tx_ring, eop); 936 struct e1000_hw *hw = &adapter->hw; 937 u16 phy_status, phy_1000t_status, phy_ext_status; 938 u16 pci_status; 939 940 if (test_bit(__E1000_DOWN, &adapter->state)) 941 return; 942 943 e1e_rphy(hw, PHY_STATUS, &phy_status); 944 e1e_rphy(hw, PHY_1000T_STATUS, &phy_1000t_status); 945 e1e_rphy(hw, PHY_EXT_STATUS, &phy_ext_status); 946 947 pci_read_config_word(adapter->pdev, PCI_STATUS, &pci_status); 948 949 /* detected Hardware unit hang */ 950 e_err("Detected Hardware Unit Hang:\n" 951 " TDH <%x>\n" 952 " TDT <%x>\n" 953 " next_to_use <%x>\n" 954 " next_to_clean <%x>\n" 955 "buffer_info[next_to_clean]:\n" 956 " time_stamp <%lx>\n" 957 " next_to_watch <%x>\n" 958 " jiffies <%lx>\n" 959 " next_to_watch.status <%x>\n" 960 "MAC Status <%x>\n" 961 "PHY Status <%x>\n" 962 "PHY 1000BASE-T Status <%x>\n" 963 "PHY Extended Status <%x>\n" 964 "PCI Status <%x>\n", 965 readl(adapter->hw.hw_addr + tx_ring->head), 966 readl(adapter->hw.hw_addr + tx_ring->tail), 967 tx_ring->next_to_use, 968 tx_ring->next_to_clean, 969 tx_ring->buffer_info[eop].time_stamp, 970 eop, 971 jiffies, 972 eop_desc->upper.fields.status, 973 er32(STATUS), 974 phy_status, 975 phy_1000t_status, 976 phy_ext_status, 977 pci_status); 978} 979 980/** 981 * e1000_clean_tx_irq - Reclaim resources after transmit completes 982 * @adapter: board private structure 983 * 984 * the return value indicates whether actual cleaning was done, there 985 * is no guarantee that everything was cleaned 986 **/ 987static bool e1000_clean_tx_irq(struct e1000_adapter *adapter) 988{ 989 struct net_device *netdev = adapter->netdev; 990 struct e1000_hw *hw = &adapter->hw; 991 struct e1000_ring *tx_ring = adapter->tx_ring; 992 struct e1000_tx_desc *tx_desc, *eop_desc; 993 struct e1000_buffer *buffer_info; 994 unsigned int i, eop; 995 unsigned int count = 0; 996 unsigned int total_tx_bytes = 0, total_tx_packets = 0; 997 998 i = tx_ring->next_to_clean; 999 eop = tx_ring->buffer_info[i].next_to_watch; 1000 eop_desc = E1000_TX_DESC(*tx_ring, eop); 1001 1002 while ((eop_desc->upper.data & cpu_to_le32(E1000_TXD_STAT_DD)) && 1003 (count < tx_ring->count)) { 1004 bool cleaned = false; 1005 rmb(); /* read buffer_info after eop_desc */ 1006 for (; !cleaned; count++) { 1007 tx_desc = E1000_TX_DESC(*tx_ring, i); 1008 buffer_info = &tx_ring->buffer_info[i]; 1009 cleaned = (i == eop); 1010 1011 if (cleaned) { 1012 total_tx_packets += buffer_info->segs; 1013 total_tx_bytes += buffer_info->bytecount; 1014 } 1015 1016 e1000_put_txbuf(adapter, buffer_info); 1017 tx_desc->upper.data = 0; 1018 1019 i++; 1020 if (i == tx_ring->count) 1021 i = 0; 1022 } 1023 1024 if (i == tx_ring->next_to_use) 1025 break; 1026 eop = tx_ring->buffer_info[i].next_to_watch; 1027 eop_desc = E1000_TX_DESC(*tx_ring, eop); 1028 } 1029 1030 tx_ring->next_to_clean = i; 1031 1032#define TX_WAKE_THRESHOLD 32 1033 if (count && netif_carrier_ok(netdev) && 1034 e1000_desc_unused(tx_ring) >= TX_WAKE_THRESHOLD) { 1035 /* Make sure that anybody stopping the queue after this 1036 * sees the new next_to_clean. 1037 */ 1038 smp_mb(); 1039 1040 if (netif_queue_stopped(netdev) && 1041 !(test_bit(__E1000_DOWN, &adapter->state))) { 1042 netif_wake_queue(netdev); 1043 ++adapter->restart_queue; 1044 } 1045 } 1046 1047 if (adapter->detect_tx_hung) { 1048 /* 1049 * Detect a transmit hang in hardware, this serializes the 1050 * check with the clearing of time_stamp and movement of i 1051 */ 1052 adapter->detect_tx_hung = 0; 1053 if (tx_ring->buffer_info[i].time_stamp && 1054 time_after(jiffies, tx_ring->buffer_info[i].time_stamp 1055 + (adapter->tx_timeout_factor * HZ)) && 1056 !(er32(STATUS) & E1000_STATUS_TXOFF)) { 1057 schedule_work(&adapter->print_hang_task); 1058 netif_stop_queue(netdev); 1059 } 1060 } 1061 adapter->total_tx_bytes += total_tx_bytes; 1062 adapter->total_tx_packets += total_tx_packets; 1063 netdev->stats.tx_bytes += total_tx_bytes; 1064 netdev->stats.tx_packets += total_tx_packets; 1065 return count < tx_ring->count; 1066} 1067 1068/** 1069 * e1000_clean_rx_irq_ps - Send received data up the network stack; packet split 1070 * @adapter: board private structure 1071 * 1072 * the return value indicates whether actual cleaning was done, there 1073 * is no guarantee that everything was cleaned 1074 **/ 1075static bool e1000_clean_rx_irq_ps(struct e1000_adapter *adapter, 1076 int *work_done, int work_to_do) 1077{ 1078 struct e1000_hw *hw = &adapter->hw; 1079 union e1000_rx_desc_packet_split *rx_desc, *next_rxd; 1080 struct net_device *netdev = adapter->netdev; 1081 struct pci_dev *pdev = adapter->pdev; 1082 struct e1000_ring *rx_ring = adapter->rx_ring; 1083 struct e1000_buffer *buffer_info, *next_buffer; 1084 struct e1000_ps_page *ps_page; 1085 struct sk_buff *skb; 1086 unsigned int i, j; 1087 u32 length, staterr; 1088 int cleaned_count = 0; 1089 bool cleaned = 0; 1090 unsigned int total_rx_bytes = 0, total_rx_packets = 0; 1091 1092 i = rx_ring->next_to_clean; 1093 rx_desc = E1000_RX_DESC_PS(*rx_ring, i); 1094 staterr = le32_to_cpu(rx_desc->wb.middle.status_error); 1095 buffer_info = &rx_ring->buffer_info[i]; 1096 1097 while (staterr & E1000_RXD_STAT_DD) { 1098 if (*work_done >= work_to_do) 1099 break; 1100 (*work_done)++; 1101 skb = buffer_info->skb; 1102 rmb(); /* read descriptor and rx_buffer_info after status DD */ 1103 1104 /* in the packet split case this is header only */ 1105 prefetch(skb->data - NET_IP_ALIGN); 1106 1107 i++; 1108 if (i == rx_ring->count) 1109 i = 0; 1110 next_rxd = E1000_RX_DESC_PS(*rx_ring, i); 1111 prefetch(next_rxd); 1112 1113 next_buffer = &rx_ring->buffer_info[i]; 1114 1115 cleaned = 1; 1116 cleaned_count++; 1117 dma_unmap_single(&pdev->dev, buffer_info->dma, 1118 adapter->rx_ps_bsize0, DMA_FROM_DEVICE); 1119 buffer_info->dma = 0; 1120 1121 /* see !EOP comment in other Rx routine */ 1122 if (!(staterr & E1000_RXD_STAT_EOP)) 1123 adapter->flags2 |= FLAG2_IS_DISCARDING; 1124 1125 if (adapter->flags2 & FLAG2_IS_DISCARDING) { 1126 e_dbg("Packet Split buffers didn't pick up the full " 1127 "packet\n"); 1128 dev_kfree_skb_irq(skb); 1129 if (staterr & E1000_RXD_STAT_EOP) 1130 adapter->flags2 &= ~FLAG2_IS_DISCARDING; 1131 goto next_desc; 1132 } 1133 1134 if (staterr & E1000_RXDEXT_ERR_FRAME_ERR_MASK) { 1135 dev_kfree_skb_irq(skb); 1136 goto next_desc; 1137 } 1138 1139 length = le16_to_cpu(rx_desc->wb.middle.length0); 1140 1141 if (!length) { 1142 e_dbg("Last part of the packet spanning multiple " 1143 "descriptors\n"); 1144 dev_kfree_skb_irq(skb); 1145 goto next_desc; 1146 } 1147 1148 /* Good Receive */ 1149 skb_put(skb, length); 1150 1151 { 1152 /* 1153 * this looks ugly, but it seems compiler issues make it 1154 * more efficient than reusing j 1155 */ 1156 int l1 = le16_to_cpu(rx_desc->wb.upper.length[0]); 1157 1158 /* 1159 * page alloc/put takes too long and effects small packet 1160 * throughput, so unsplit small packets and save the alloc/put 1161 * only valid in softirq (napi) context to call kmap_* 1162 */ 1163 if (l1 && (l1 <= copybreak) && 1164 ((length + l1) <= adapter->rx_ps_bsize0)) { 1165 u8 *vaddr; 1166 1167 ps_page = &buffer_info->ps_pages[0]; 1168 1169 /* 1170 * there is no documentation about how to call 1171 * kmap_atomic, so we can't hold the mapping 1172 * very long 1173 */ 1174 dma_sync_single_for_cpu(&pdev->dev, ps_page->dma, 1175 PAGE_SIZE, DMA_FROM_DEVICE); 1176 vaddr = kmap_atomic(ps_page->page, KM_SKB_DATA_SOFTIRQ); 1177 memcpy(skb_tail_pointer(skb), vaddr, l1); 1178 kunmap_atomic(vaddr, KM_SKB_DATA_SOFTIRQ); 1179 dma_sync_single_for_device(&pdev->dev, ps_page->dma, 1180 PAGE_SIZE, DMA_FROM_DEVICE); 1181 1182 /* remove the CRC */ 1183 if (!(adapter->flags2 & FLAG2_CRC_STRIPPING)) 1184 l1 -= 4; 1185 1186 skb_put(skb, l1); 1187 goto copydone; 1188 } /* if */ 1189 } 1190 1191 for (j = 0; j < PS_PAGE_BUFFERS; j++) { 1192 length = le16_to_cpu(rx_desc->wb.upper.length[j]); 1193 if (!length) 1194 break; 1195 1196 ps_page = &buffer_info->ps_pages[j]; 1197 dma_unmap_page(&pdev->dev, ps_page->dma, PAGE_SIZE, 1198 DMA_FROM_DEVICE); 1199 ps_page->dma = 0; 1200 skb_fill_page_desc(skb, j, ps_page->page, 0, length); 1201 ps_page->page = NULL; 1202 skb->len += length; 1203 skb->data_len += length; 1204 skb->truesize += length; 1205 } 1206 1207 /* strip the ethernet crc, problem is we're using pages now so 1208 * this whole operation can get a little cpu intensive 1209 */ 1210 if (!(adapter->flags2 & FLAG2_CRC_STRIPPING)) 1211 pskb_trim(skb, skb->len - 4); 1212 1213copydone: 1214 total_rx_bytes += skb->len; 1215 total_rx_packets++; 1216 1217 e1000_rx_checksum(adapter, staterr, le16_to_cpu( 1218 rx_desc->wb.lower.hi_dword.csum_ip.csum), skb); 1219 1220 if (rx_desc->wb.upper.header_status & 1221 cpu_to_le16(E1000_RXDPS_HDRSTAT_HDRSP)) 1222 adapter->rx_hdr_split++; 1223 1224 e1000_receive_skb(adapter, netdev, skb, 1225 staterr, rx_desc->wb.middle.vlan); 1226 1227next_desc: 1228 rx_desc->wb.middle.status_error &= cpu_to_le32(~0xFF); 1229 buffer_info->skb = NULL; 1230 1231 /* return some buffers to hardware, one at a time is too slow */ 1232 if (cleaned_count >= E1000_RX_BUFFER_WRITE) { 1233 adapter->alloc_rx_buf(adapter, cleaned_count); 1234 cleaned_count = 0; 1235 } 1236 1237 /* use prefetched values */ 1238 rx_desc = next_rxd; 1239 buffer_info = next_buffer; 1240 1241 staterr = le32_to_cpu(rx_desc->wb.middle.status_error); 1242 } 1243 rx_ring->next_to_clean = i; 1244 1245 cleaned_count = e1000_desc_unused(rx_ring); 1246 if (cleaned_count) 1247 adapter->alloc_rx_buf(adapter, cleaned_count); 1248 1249 adapter->total_rx_bytes += total_rx_bytes; 1250 adapter->total_rx_packets += total_rx_packets; 1251 netdev->stats.rx_bytes += total_rx_bytes; 1252 netdev->stats.rx_packets += total_rx_packets; 1253 return cleaned; 1254} 1255 1256/** 1257 * e1000_consume_page - helper function 1258 **/ 1259static void e1000_consume_page(struct e1000_buffer *bi, struct sk_buff *skb, 1260 u16 length) 1261{ 1262 bi->page = NULL; 1263 skb->len += length; 1264 skb->data_len += length; 1265 skb->truesize += length; 1266} 1267 1268/** 1269 * e1000_clean_jumbo_rx_irq - Send received data up the network stack; legacy 1270 * @adapter: board private structure 1271 * 1272 * the return value indicates whether actual cleaning was done, there 1273 * is no guarantee that everything was cleaned 1274 **/ 1275 1276static bool e1000_clean_jumbo_rx_irq(struct e1000_adapter *adapter, 1277 int *work_done, int work_to_do) 1278{ 1279 struct net_device *netdev = adapter->netdev; 1280 struct pci_dev *pdev = adapter->pdev; 1281 struct e1000_ring *rx_ring = adapter->rx_ring; 1282 struct e1000_rx_desc *rx_desc, *next_rxd; 1283 struct e1000_buffer *buffer_info, *next_buffer; 1284 u32 length; 1285 unsigned int i; 1286 int cleaned_count = 0; 1287 bool cleaned = false; 1288 unsigned int total_rx_bytes=0, total_rx_packets=0; 1289 1290 i = rx_ring->next_to_clean; 1291 rx_desc = E1000_RX_DESC(*rx_ring, i); 1292 buffer_info = &rx_ring->buffer_info[i]; 1293 1294 while (rx_desc->status & E1000_RXD_STAT_DD) { 1295 struct sk_buff *skb; 1296 u8 status; 1297 1298 if (*work_done >= work_to_do) 1299 break; 1300 (*work_done)++; 1301 rmb(); /* read descriptor and rx_buffer_info after status DD */ 1302 1303 status = rx_desc->status; 1304 skb = buffer_info->skb; 1305 buffer_info->skb = NULL; 1306 1307 ++i; 1308 if (i == rx_ring->count) 1309 i = 0; 1310 next_rxd = E1000_RX_DESC(*rx_ring, i); 1311 prefetch(next_rxd); 1312 1313 next_buffer = &rx_ring->buffer_info[i]; 1314 1315 cleaned = true; 1316 cleaned_count++; 1317 dma_unmap_page(&pdev->dev, buffer_info->dma, PAGE_SIZE, 1318 DMA_FROM_DEVICE); 1319 buffer_info->dma = 0; 1320 1321 length = le16_to_cpu(rx_desc->length); 1322 1323 /* errors is only valid for DD + EOP descriptors */ 1324 if (unlikely((status & E1000_RXD_STAT_EOP) && 1325 (rx_desc->errors & E1000_RXD_ERR_FRAME_ERR_MASK))) { 1326 /* recycle both page and skb */ 1327 buffer_info->skb = skb; 1328 /* an error means any chain goes out the window 1329 * too */ 1330 if (rx_ring->rx_skb_top) 1331 dev_kfree_skb(rx_ring->rx_skb_top); 1332 rx_ring->rx_skb_top = NULL; 1333 goto next_desc; 1334 } 1335 1336#define rxtop (rx_ring->rx_skb_top) 1337 if (!(status & E1000_RXD_STAT_EOP)) { 1338 /* this descriptor is only the beginning (or middle) */ 1339 if (!rxtop) { 1340 /* this is the beginning of a chain */ 1341 rxtop = skb; 1342 skb_fill_page_desc(rxtop, 0, buffer_info->page, 1343 0, length); 1344 } else { 1345 /* this is the middle of a chain */ 1346 skb_fill_page_desc(rxtop, 1347 skb_shinfo(rxtop)->nr_frags, 1348 buffer_info->page, 0, length); 1349 /* re-use the skb, only consumed the page */ 1350 buffer_info->skb = skb; 1351 } 1352 e1000_consume_page(buffer_info, rxtop, length); 1353 goto next_desc; 1354 } else { 1355 if (rxtop) { 1356 /* end of the chain */ 1357 skb_fill_page_desc(rxtop, 1358 skb_shinfo(rxtop)->nr_frags, 1359 buffer_info->page, 0, length); 1360 /* re-use the current skb, we only consumed the 1361 * page */ 1362 buffer_info->skb = skb; 1363 skb = rxtop; 1364 rxtop = NULL; 1365 e1000_consume_page(buffer_info, skb, length); 1366 } else { 1367 /* no chain, got EOP, this buf is the packet 1368 * copybreak to save the put_page/alloc_page */ 1369 if (length <= copybreak && 1370 skb_tailroom(skb) >= length) { 1371 u8 *vaddr; 1372 vaddr = kmap_atomic(buffer_info->page, 1373 KM_SKB_DATA_SOFTIRQ); 1374 memcpy(skb_tail_pointer(skb), vaddr, 1375 length); 1376 kunmap_atomic(vaddr, 1377 KM_SKB_DATA_SOFTIRQ); 1378 /* re-use the page, so don't erase 1379 * buffer_info->page */ 1380 skb_put(skb, length); 1381 } else { 1382 skb_fill_page_desc(skb, 0, 1383 buffer_info->page, 0, 1384 length); 1385 e1000_consume_page(buffer_info, skb, 1386 length); 1387 } 1388 } 1389 } 1390 1391 /* Receive Checksum Offload XXX recompute due to CRC strip? */ 1392 e1000_rx_checksum(adapter, 1393 (u32)(status) | 1394 ((u32)(rx_desc->errors) << 24), 1395 le16_to_cpu(rx_desc->csum), skb); 1396 1397 /* probably a little skewed due to removing CRC */ 1398 total_rx_bytes += skb->len; 1399 total_rx_packets++; 1400 1401 /* eth type trans needs skb->data to point to something */ 1402 if (!pskb_may_pull(skb, ETH_HLEN)) { 1403 e_err("pskb_may_pull failed.\n"); 1404 dev_kfree_skb(skb); 1405 goto next_desc; 1406 } 1407 1408 e1000_receive_skb(adapter, netdev, skb, status, 1409 rx_desc->special); 1410 1411next_desc: 1412 rx_desc->status = 0; 1413 1414 /* return some buffers to hardware, one at a time is too slow */ 1415 if (unlikely(cleaned_count >= E1000_RX_BUFFER_WRITE)) { 1416 adapter->alloc_rx_buf(adapter, cleaned_count); 1417 cleaned_count = 0; 1418 } 1419 1420 /* use prefetched values */ 1421 rx_desc = next_rxd; 1422 buffer_info = next_buffer; 1423 } 1424 rx_ring->next_to_clean = i; 1425 1426 cleaned_count = e1000_desc_unused(rx_ring); 1427 if (cleaned_count) 1428 adapter->alloc_rx_buf(adapter, cleaned_count); 1429 1430 adapter->total_rx_bytes += total_rx_bytes; 1431 adapter->total_rx_packets += total_rx_packets; 1432 netdev->stats.rx_bytes += total_rx_bytes; 1433 netdev->stats.rx_packets += total_rx_packets; 1434 return cleaned; 1435} 1436 1437/** 1438 * e1000_clean_rx_ring - Free Rx Buffers per Queue 1439 * @adapter: board private structure 1440 **/ 1441static void e1000_clean_rx_ring(struct e1000_adapter *adapter) 1442{ 1443 struct e1000_ring *rx_ring = adapter->rx_ring; 1444 struct e1000_buffer *buffer_info; 1445 struct e1000_ps_page *ps_page; 1446 struct pci_dev *pdev = adapter->pdev; 1447 unsigned int i, j; 1448 1449 /* Free all the Rx ring sk_buffs */ 1450 for (i = 0; i < rx_ring->count; i++) { 1451 buffer_info = &rx_ring->buffer_info[i]; 1452 if (buffer_info->dma) { 1453 if (adapter->clean_rx == e1000_clean_rx_irq) 1454 dma_unmap_single(&pdev->dev, buffer_info->dma, 1455 adapter->rx_buffer_len, 1456 DMA_FROM_DEVICE); 1457 else if (adapter->clean_rx == e1000_clean_jumbo_rx_irq) 1458 dma_unmap_page(&pdev->dev, buffer_info->dma, 1459 PAGE_SIZE, 1460 DMA_FROM_DEVICE); 1461 else if (adapter->clean_rx == e1000_clean_rx_irq_ps) 1462 dma_unmap_single(&pdev->dev, buffer_info->dma, 1463 adapter->rx_ps_bsize0, 1464 DMA_FROM_DEVICE); 1465 buffer_info->dma = 0; 1466 } 1467 1468 if (buffer_info->page) { 1469 put_page(buffer_info->page); 1470 buffer_info->page = NULL; 1471 } 1472 1473 if (buffer_info->skb) { 1474 dev_kfree_skb(buffer_info->skb); 1475 buffer_info->skb = NULL; 1476 } 1477 1478 for (j = 0; j < PS_PAGE_BUFFERS; j++) { 1479 ps_page = &buffer_info->ps_pages[j]; 1480 if (!ps_page->page) 1481 break; 1482 dma_unmap_page(&pdev->dev, ps_page->dma, PAGE_SIZE, 1483 DMA_FROM_DEVICE); 1484 ps_page->dma = 0; 1485 put_page(ps_page->page); 1486 ps_page->page = NULL; 1487 } 1488 } 1489 1490 /* there also may be some cached data from a chained receive */ 1491 if (rx_ring->rx_skb_top) { 1492 dev_kfree_skb(rx_ring->rx_skb_top); 1493 rx_ring->rx_skb_top = NULL; 1494 } 1495 1496 /* Zero out the descriptor ring */ 1497 memset(rx_ring->desc, 0, rx_ring->size); 1498 1499 rx_ring->next_to_clean = 0; 1500 rx_ring->next_to_use = 0; 1501 adapter->flags2 &= ~FLAG2_IS_DISCARDING; 1502 1503 writel(0, adapter->hw.hw_addr + rx_ring->head); 1504 writel(0, adapter->hw.hw_addr + rx_ring->tail); 1505} 1506 1507static void e1000e_downshift_workaround(struct work_struct *work) 1508{ 1509 struct e1000_adapter *adapter = container_of(work, 1510 struct e1000_adapter, downshift_task); 1511 1512 if (test_bit(__E1000_DOWN, &adapter->state)) 1513 return; 1514 1515 e1000e_gig_downshift_workaround_ich8lan(&adapter->hw); 1516} 1517 1518/** 1519 * e1000_intr_msi - Interrupt Handler 1520 * @irq: interrupt number 1521 * @data: pointer to a network interface device structure 1522 **/ 1523static irqreturn_t e1000_intr_msi(int irq, void *data) 1524{ 1525 struct net_device *netdev = data; 1526 struct e1000_adapter *adapter = netdev_priv(netdev); 1527 struct e1000_hw *hw = &adapter->hw; 1528 u32 icr = er32(ICR); 1529 1530 /* 1531 * read ICR disables interrupts using IAM 1532 */ 1533 1534 if (icr & E1000_ICR_LSC) { 1535 hw->mac.get_link_status = 1; 1536 /* 1537 * ICH8 workaround-- Call gig speed drop workaround on cable 1538 * disconnect (LSC) before accessing any PHY registers 1539 */ 1540 if ((adapter->flags & FLAG_LSC_GIG_SPEED_DROP) && 1541 (!(er32(STATUS) & E1000_STATUS_LU))) 1542 schedule_work(&adapter->downshift_task); 1543 1544 /* 1545 * 80003ES2LAN workaround-- For packet buffer work-around on 1546 * link down event; disable receives here in the ISR and reset 1547 * adapter in watchdog 1548 */ 1549 if (netif_carrier_ok(netdev) && 1550 adapter->flags & FLAG_RX_NEEDS_RESTART) { 1551 /* disable receives */ 1552 u32 rctl = er32(RCTL); 1553 ew32(RCTL, rctl & ~E1000_RCTL_EN); 1554 adapter->flags |= FLAG_RX_RESTART_NOW; 1555 } 1556 /* guard against interrupt when we're going down */ 1557 if (!test_bit(__E1000_DOWN, &adapter->state)) 1558 mod_timer(&adapter->watchdog_timer, jiffies + 1); 1559 } 1560 1561 if (napi_schedule_prep(&adapter->napi)) { 1562 adapter->total_tx_bytes = 0; 1563 adapter->total_tx_packets = 0; 1564 adapter->total_rx_bytes = 0; 1565 adapter->total_rx_packets = 0; 1566 __napi_schedule(&adapter->napi); 1567 } 1568 1569 return IRQ_HANDLED; 1570} 1571 1572/** 1573 * e1000_intr - Interrupt Handler 1574 * @irq: interrupt number 1575 * @data: pointer to a network interface device structure 1576 **/ 1577static irqreturn_t e1000_intr(int irq, void *data) 1578{ 1579 struct net_device *netdev = data; 1580 struct e1000_adapter *adapter = netdev_priv(netdev); 1581 struct e1000_hw *hw = &adapter->hw; 1582 u32 rctl, icr = er32(ICR); 1583 1584 if (!icr || test_bit(__E1000_DOWN, &adapter->state)) 1585 return IRQ_NONE; /* Not our interrupt */ 1586 1587 /* 1588 * IMS will not auto-mask if INT_ASSERTED is not set, and if it is 1589 * not set, then the adapter didn't send an interrupt 1590 */ 1591 if (!(icr & E1000_ICR_INT_ASSERTED)) 1592 return IRQ_NONE; 1593 1594 /* 1595 * Interrupt Auto-Mask...upon reading ICR, 1596 * interrupts are masked. No need for the 1597 * IMC write 1598 */ 1599 1600 if (icr & E1000_ICR_LSC) { 1601 hw->mac.get_link_status = 1; 1602 /* 1603 * ICH8 workaround-- Call gig speed drop workaround on cable 1604 * disconnect (LSC) before accessing any PHY registers 1605 */ 1606 if ((adapter->flags & FLAG_LSC_GIG_SPEED_DROP) && 1607 (!(er32(STATUS) & E1000_STATUS_LU))) 1608 schedule_work(&adapter->downshift_task); 1609 1610 /* 1611 * 80003ES2LAN workaround-- 1612 * For packet buffer work-around on link down event; 1613 * disable receives here in the ISR and 1614 * reset adapter in watchdog 1615 */ 1616 if (netif_carrier_ok(netdev) && 1617 (adapter->flags & FLAG_RX_NEEDS_RESTART)) { 1618 /* disable receives */ 1619 rctl = er32(RCTL); 1620 ew32(RCTL, rctl & ~E1000_RCTL_EN); 1621 adapter->flags |= FLAG_RX_RESTART_NOW; 1622 } 1623 /* guard against interrupt when we're going down */ 1624 if (!test_bit(__E1000_DOWN, &adapter->state)) 1625 mod_timer(&adapter->watchdog_timer, jiffies + 1); 1626 } 1627 1628 if (napi_schedule_prep(&adapter->napi)) { 1629 adapter->total_tx_bytes = 0; 1630 adapter->total_tx_packets = 0; 1631 adapter->total_rx_bytes = 0; 1632 adapter->total_rx_packets = 0; 1633 __napi_schedule(&adapter->napi); 1634 } 1635 1636 return IRQ_HANDLED; 1637} 1638 1639static irqreturn_t e1000_msix_other(int irq, void *data) 1640{ 1641 struct net_device *netdev = data; 1642 struct e1000_adapter *adapter = netdev_priv(netdev); 1643 struct e1000_hw *hw = &adapter->hw; 1644 u32 icr = er32(ICR); 1645 1646 if (!(icr & E1000_ICR_INT_ASSERTED)) { 1647 if (!test_bit(__E1000_DOWN, &adapter->state)) 1648 ew32(IMS, E1000_IMS_OTHER); 1649 return IRQ_NONE; 1650 } 1651 1652 if (icr & adapter->eiac_mask) 1653 ew32(ICS, (icr & adapter->eiac_mask)); 1654 1655 if (icr & E1000_ICR_OTHER) { 1656 if (!(icr & E1000_ICR_LSC)) 1657 goto no_link_interrupt; 1658 hw->mac.get_link_status = 1; 1659 /* guard against interrupt when we're going down */ 1660 if (!test_bit(__E1000_DOWN, &adapter->state)) 1661 mod_timer(&adapter->watchdog_timer, jiffies + 1); 1662 } 1663 1664no_link_interrupt: 1665 if (!test_bit(__E1000_DOWN, &adapter->state)) 1666 ew32(IMS, E1000_IMS_LSC | E1000_IMS_OTHER); 1667 1668 return IRQ_HANDLED; 1669} 1670 1671 1672static irqreturn_t e1000_intr_msix_tx(int irq, void *data) 1673{ 1674 struct net_device *netdev = data; 1675 struct e1000_adapter *adapter = netdev_priv(netdev); 1676 struct e1000_hw *hw = &adapter->hw; 1677 struct e1000_ring *tx_ring = adapter->tx_ring; 1678 1679 1680 adapter->total_tx_bytes = 0; 1681 adapter->total_tx_packets = 0; 1682 1683 if (!e1000_clean_tx_irq(adapter)) 1684 /* Ring was not completely cleaned, so fire another interrupt */ 1685 ew32(ICS, tx_ring->ims_val); 1686 1687 return IRQ_HANDLED; 1688} 1689 1690static irqreturn_t e1000_intr_msix_rx(int irq, void *data) 1691{ 1692 struct net_device *netdev = data; 1693 struct e1000_adapter *adapter = netdev_priv(netdev); 1694 1695 /* Write the ITR value calculated at the end of the 1696 * previous interrupt. 1697 */ 1698 if (adapter->rx_ring->set_itr) { 1699 writel(1000000000 / (adapter->rx_ring->itr_val * 256), 1700 adapter->hw.hw_addr + adapter->rx_ring->itr_register); 1701 adapter->rx_ring->set_itr = 0; 1702 } 1703 1704 if (napi_schedule_prep(&adapter->napi)) { 1705 adapter->total_rx_bytes = 0; 1706 adapter->total_rx_packets = 0; 1707 __napi_schedule(&adapter->napi); 1708 } 1709 return IRQ_HANDLED; 1710} 1711 1712/** 1713 * e1000_configure_msix - Configure MSI-X hardware 1714 * 1715 * e1000_configure_msix sets up the hardware to properly 1716 * generate MSI-X interrupts. 1717 **/ 1718static void e1000_configure_msix(struct e1000_adapter *adapter) 1719{ 1720 struct e1000_hw *hw = &adapter->hw; 1721 struct e1000_ring *rx_ring = adapter->rx_ring; 1722 struct e1000_ring *tx_ring = adapter->tx_ring; 1723 int vector = 0; 1724 u32 ctrl_ext, ivar = 0; 1725 1726 adapter->eiac_mask = 0; 1727 1728 /* Workaround issue with spurious interrupts on 82574 in MSI-X mode */ 1729 if (hw->mac.type == e1000_82574) { 1730 u32 rfctl = er32(RFCTL); 1731 rfctl |= E1000_RFCTL_ACK_DIS; 1732 ew32(RFCTL, rfctl); 1733 } 1734 1735#define E1000_IVAR_INT_ALLOC_VALID 0x8 1736 /* Configure Rx vector */ 1737 rx_ring->ims_val = E1000_IMS_RXQ0; 1738 adapter->eiac_mask |= rx_ring->ims_val; 1739 if (rx_ring->itr_val) 1740 writel(1000000000 / (rx_ring->itr_val * 256), 1741 hw->hw_addr + rx_ring->itr_register); 1742 else 1743 writel(1, hw->hw_addr + rx_ring->itr_register); 1744 ivar = E1000_IVAR_INT_ALLOC_VALID | vector; 1745 1746 /* Configure Tx vector */ 1747 tx_ring->ims_val = E1000_IMS_TXQ0; 1748 vector++; 1749 if (tx_ring->itr_val) 1750 writel(1000000000 / (tx_ring->itr_val * 256), 1751 hw->hw_addr + tx_ring->itr_register); 1752 else 1753 writel(1, hw->hw_addr + tx_ring->itr_register); 1754 adapter->eiac_mask |= tx_ring->ims_val; 1755 ivar |= ((E1000_IVAR_INT_ALLOC_VALID | vector) << 8); 1756 1757 /* set vector for Other Causes, e.g. link changes */ 1758 vector++; 1759 ivar |= ((E1000_IVAR_INT_ALLOC_VALID | vector) << 16); 1760 if (rx_ring->itr_val) 1761 writel(1000000000 / (rx_ring->itr_val * 256), 1762 hw->hw_addr + E1000_EITR_82574(vector)); 1763 else 1764 writel(1, hw->hw_addr + E1000_EITR_82574(vector)); 1765 1766 /* Cause Tx interrupts on every write back */ 1767 ivar |= (1 << 31); 1768 1769 ew32(IVAR, ivar); 1770 1771 /* enable MSI-X PBA support */ 1772 ctrl_ext = er32(CTRL_EXT); 1773 ctrl_ext |= E1000_CTRL_EXT_PBA_CLR; 1774 1775 /* Auto-Mask Other interrupts upon ICR read */ 1776#define E1000_EIAC_MASK_82574 0x01F00000 1777 ew32(IAM, ~E1000_EIAC_MASK_82574 | E1000_IMS_OTHER); 1778 ctrl_ext |= E1000_CTRL_EXT_EIAME; 1779 ew32(CTRL_EXT, ctrl_ext); 1780 e1e_flush(); 1781} 1782 1783void e1000e_reset_interrupt_capability(struct e1000_adapter *adapter) 1784{ 1785 if (adapter->msix_entries) { 1786 pci_disable_msix(adapter->pdev); 1787 kfree(adapter->msix_entries); 1788 adapter->msix_entries = NULL; 1789 } else if (adapter->flags & FLAG_MSI_ENABLED) { 1790 pci_disable_msi(adapter->pdev); 1791 adapter->flags &= ~FLAG_MSI_ENABLED; 1792 } 1793} 1794 1795/** 1796 * e1000e_set_interrupt_capability - set MSI or MSI-X if supported 1797 * 1798 * Attempt to configure interrupts using the best available 1799 * capabilities of the hardware and kernel. 1800 **/ 1801void e1000e_set_interrupt_capability(struct e1000_adapter *adapter) 1802{ 1803 int err; 1804 int i; 1805 1806 switch (adapter->int_mode) { 1807 case E1000E_INT_MODE_MSIX: 1808 if (adapter->flags & FLAG_HAS_MSIX) { 1809 adapter->num_vectors = 3; /* RxQ0, TxQ0 and other */ 1810 adapter->msix_entries = kcalloc(adapter->num_vectors, 1811 sizeof(struct msix_entry), 1812 GFP_KERNEL); 1813 if (adapter->msix_entries) { 1814 for (i = 0; i < adapter->num_vectors; i++) 1815 adapter->msix_entries[i].entry = i; 1816 1817 err = pci_enable_msix(adapter->pdev, 1818 adapter->msix_entries, 1819 adapter->num_vectors); 1820 if (err == 0) 1821 return; 1822 } 1823 /* MSI-X failed, so fall through and try MSI */ 1824 e_err("Failed to initialize MSI-X interrupts. " 1825 "Falling back to MSI interrupts.\n"); 1826 e1000e_reset_interrupt_capability(adapter); 1827 } 1828 adapter->int_mode = E1000E_INT_MODE_MSI; 1829 /* Fall through */ 1830 case E1000E_INT_MODE_MSI: 1831 if (!pci_enable_msi(adapter->pdev)) { 1832 adapter->flags |= FLAG_MSI_ENABLED; 1833 } else { 1834 adapter->int_mode = E1000E_INT_MODE_LEGACY; 1835 e_err("Failed to initialize MSI interrupts. Falling " 1836 "back to legacy interrupts.\n"); 1837 } 1838 /* Fall through */ 1839 case E1000E_INT_MODE_LEGACY: 1840 /* Don't do anything; this is the system default */ 1841 break; 1842 } 1843 1844 /* store the number of vectors being used */ 1845 adapter->num_vectors = 1; 1846} 1847 1848/** 1849 * e1000_request_msix - Initialize MSI-X interrupts 1850 * 1851 * e1000_request_msix allocates MSI-X vectors and requests interrupts from the 1852 * kernel. 1853 **/ 1854static int e1000_request_msix(struct e1000_adapter *adapter) 1855{ 1856 struct net_device *netdev = adapter->netdev; 1857 int err = 0, vector = 0; 1858 1859 if (strlen(netdev->name) < (IFNAMSIZ - 5)) 1860 sprintf(adapter->rx_ring->name, "%s-rx-0", netdev->name); 1861 else 1862 memcpy(adapter->rx_ring->name, netdev->name, IFNAMSIZ); 1863 err = request_irq(adapter->msix_entries[vector].vector, 1864 e1000_intr_msix_rx, 0, adapter->rx_ring->name, 1865 netdev); 1866 if (err) 1867 goto out; 1868 adapter->rx_ring->itr_register = E1000_EITR_82574(vector); 1869 adapter->rx_ring->itr_val = adapter->itr; 1870 vector++; 1871 1872 if (strlen(netdev->name) < (IFNAMSIZ - 5)) 1873 sprintf(adapter->tx_ring->name, "%s-tx-0", netdev->name); 1874 else 1875 memcpy(adapter->tx_ring->name, netdev->name, IFNAMSIZ); 1876 err = request_irq(adapter->msix_entries[vector].vector, 1877 e1000_intr_msix_tx, 0, adapter->tx_ring->name, 1878 netdev); 1879 if (err) 1880 goto out; 1881 adapter->tx_ring->itr_register = E1000_EITR_82574(vector); 1882 adapter->tx_ring->itr_val = adapter->itr; 1883 vector++; 1884 1885 err = request_irq(adapter->msix_entries[vector].vector, 1886 e1000_msix_other, 0, netdev->name, netdev); 1887 if (err) 1888 goto out; 1889 1890 e1000_configure_msix(adapter); 1891 return 0; 1892out: 1893 return err; 1894} 1895 1896/** 1897 * e1000_request_irq - initialize interrupts 1898 * 1899 * Attempts to configure interrupts using the best available 1900 * capabilities of the hardware and kernel. 1901 **/ 1902static int e1000_request_irq(struct e1000_adapter *adapter) 1903{ 1904 struct net_device *netdev = adapter->netdev; 1905 int err; 1906 1907 if (adapter->msix_entries) { 1908 err = e1000_request_msix(adapter); 1909 if (!err) 1910 return err; 1911 /* fall back to MSI */ 1912 e1000e_reset_interrupt_capability(adapter); 1913 adapter->int_mode = E1000E_INT_MODE_MSI; 1914 e1000e_set_interrupt_capability(adapter); 1915 } 1916 if (adapter->flags & FLAG_MSI_ENABLED) { 1917 err = request_irq(adapter->pdev->irq, e1000_intr_msi, 0, 1918 netdev->name, netdev); 1919 if (!err) 1920 return err; 1921 1922 /* fall back to legacy interrupt */ 1923 e1000e_reset_interrupt_capability(adapter); 1924 adapter->int_mode = E1000E_INT_MODE_LEGACY; 1925 } 1926 1927 err = request_irq(adapter->pdev->irq, e1000_intr, IRQF_SHARED, 1928 netdev->name, netdev); 1929 if (err) 1930 e_err("Unable to allocate interrupt, Error: %d\n", err); 1931 1932 return err; 1933} 1934 1935static void e1000_free_irq(struct e1000_adapter *adapter) 1936{ 1937 struct net_device *netdev = adapter->netdev; 1938 1939 if (adapter->msix_entries) { 1940 int vector = 0; 1941 1942 free_irq(adapter->msix_entries[vector].vector, netdev); 1943 vector++; 1944 1945 free_irq(adapter->msix_entries[vector].vector, netdev); 1946 vector++; 1947 1948 /* Other Causes interrupt vector */ 1949 free_irq(adapter->msix_entries[vector].vector, netdev); 1950 return; 1951 } 1952 1953 free_irq(adapter->pdev->irq, netdev); 1954} 1955 1956/** 1957 * e1000_irq_disable - Mask off interrupt generation on the NIC 1958 **/ 1959static void e1000_irq_disable(struct e1000_adapter *adapter) 1960{ 1961 struct e1000_hw *hw = &adapter->hw; 1962 1963 ew32(IMC, ~0); 1964 if (adapter->msix_entries) 1965 ew32(EIAC_82574, 0); 1966 e1e_flush(); 1967 1968 if (adapter->msix_entries) { 1969 int i; 1970 for (i = 0; i < adapter->num_vectors; i++) 1971 synchronize_irq(adapter->msix_entries[i].vector); 1972 } else { 1973 synchronize_irq(adapter->pdev->irq); 1974 } 1975} 1976 1977/** 1978 * e1000_irq_enable - Enable default interrupt generation settings 1979 **/ 1980static void e1000_irq_enable(struct e1000_adapter *adapter) 1981{ 1982 struct e1000_hw *hw = &adapter->hw; 1983 1984 if (adapter->msix_entries) { 1985 ew32(EIAC_82574, adapter->eiac_mask & E1000_EIAC_MASK_82574); 1986 ew32(IMS, adapter->eiac_mask | E1000_IMS_OTHER | E1000_IMS_LSC); 1987 } else { 1988 ew32(IMS, IMS_ENABLE_MASK); 1989 } 1990 e1e_flush(); 1991} 1992 1993/** 1994 * e1000e_get_hw_control - get control of the h/w from f/w 1995 * @adapter: address of board private structure 1996 * 1997 * e1000e_get_hw_control sets {CTRL_EXT|SWSM}:DRV_LOAD bit. 1998 * For ASF and Pass Through versions of f/w this means that 1999 * the driver is loaded. For AMT version (only with 82573) 2000 * of the f/w this means that the network i/f is open. 2001 **/ 2002void e1000e_get_hw_control(struct e1000_adapter *adapter) 2003{ 2004 struct e1000_hw *hw = &adapter->hw; 2005 u32 ctrl_ext; 2006 u32 swsm; 2007 2008 /* Let firmware know the driver has taken over */ 2009 if (adapter->flags & FLAG_HAS_SWSM_ON_LOAD) { 2010 swsm = er32(SWSM); 2011 ew32(SWSM, swsm | E1000_SWSM_DRV_LOAD); 2012 } else if (adapter->flags & FLAG_HAS_CTRLEXT_ON_LOAD) { 2013 ctrl_ext = er32(CTRL_EXT); 2014 ew32(CTRL_EXT, ctrl_ext | E1000_CTRL_EXT_DRV_LOAD); 2015 } 2016} 2017 2018/** 2019 * e1000e_release_hw_control - release control of the h/w to f/w 2020 * @adapter: address of board private structure 2021 * 2022 * e1000e_release_hw_control resets {CTRL_EXT|SWSM}:DRV_LOAD bit. 2023 * For ASF and Pass Through versions of f/w this means that the 2024 * driver is no longer loaded. For AMT version (only with 82573) i 2025 * of the f/w this means that the network i/f is closed. 2026 * 2027 **/ 2028void e1000e_release_hw_control(struct e1000_adapter *adapter) 2029{ 2030 struct e1000_hw *hw = &adapter->hw; 2031 u32 ctrl_ext; 2032 u32 swsm; 2033 2034 /* Let firmware taken over control of h/w */ 2035 if (adapter->flags & FLAG_HAS_SWSM_ON_LOAD) { 2036 swsm = er32(SWSM); 2037 ew32(SWSM, swsm & ~E1000_SWSM_DRV_LOAD); 2038 } else if (adapter->flags & FLAG_HAS_CTRLEXT_ON_LOAD) { 2039 ctrl_ext = er32(CTRL_EXT); 2040 ew32(CTRL_EXT, ctrl_ext & ~E1000_CTRL_EXT_DRV_LOAD); 2041 } 2042} 2043 2044/** 2045 * @e1000_alloc_ring - allocate memory for a ring structure 2046 **/ 2047static int e1000_alloc_ring_dma(struct e1000_adapter *adapter, 2048 struct e1000_ring *ring) 2049{ 2050 struct pci_dev *pdev = adapter->pdev; 2051 2052 ring->desc = dma_alloc_coherent(&pdev->dev, ring->size, &ring->dma, 2053 GFP_KERNEL); 2054 if (!ring->desc) 2055 return -ENOMEM; 2056 2057 return 0; 2058} 2059 2060/** 2061 * e1000e_setup_tx_resources - allocate Tx resources (Descriptors) 2062 * @adapter: board private structure 2063 * 2064 * Return 0 on success, negative on failure 2065 **/ 2066int e1000e_setup_tx_resources(struct e1000_adapter *adapter) 2067{ 2068 struct e1000_ring *tx_ring = adapter->tx_ring; 2069 int err = -ENOMEM, size; 2070 2071 size = sizeof(struct e1000_buffer) * tx_ring->count; 2072 tx_ring->buffer_info = vzalloc(size); 2073 if (!tx_ring->buffer_info) 2074 goto err; 2075 2076 /* round up to nearest 4K */ 2077 tx_ring->size = tx_ring->count * sizeof(struct e1000_tx_desc); 2078 tx_ring->size = ALIGN(tx_ring->size, 4096); 2079 2080 err = e1000_alloc_ring_dma(adapter, tx_ring); 2081 if (err) 2082 goto err; 2083 2084 tx_ring->next_to_use = 0; 2085 tx_ring->next_to_clean = 0; 2086 2087 return 0; 2088err: 2089 vfree(tx_ring->buffer_info); 2090 e_err("Unable to allocate memory for the transmit descriptor ring\n"); 2091 return err; 2092} 2093 2094/** 2095 * e1000e_setup_rx_resources - allocate Rx resources (Descriptors) 2096 * @adapter: board private structure 2097 * 2098 * Returns 0 on success, negative on failure 2099 **/ 2100int e1000e_setup_rx_resources(struct e1000_adapter *adapter) 2101{ 2102 struct e1000_ring *rx_ring = adapter->rx_ring; 2103 struct e1000_buffer *buffer_info; 2104 int i, size, desc_len, err = -ENOMEM; 2105 2106 size = sizeof(struct e1000_buffer) * rx_ring->count; 2107 rx_ring->buffer_info = vzalloc(size); 2108 if (!rx_ring->buffer_info) 2109 goto err; 2110 2111 for (i = 0; i < rx_ring->count; i++) { 2112 buffer_info = &rx_ring->buffer_info[i]; 2113 buffer_info->ps_pages = kcalloc(PS_PAGE_BUFFERS, 2114 sizeof(struct e1000_ps_page), 2115 GFP_KERNEL); 2116 if (!buffer_info->ps_pages) 2117 goto err_pages; 2118 } 2119 2120 desc_len = sizeof(union e1000_rx_desc_packet_split); 2121 2122 /* Round up to nearest 4K */ 2123 rx_ring->size = rx_ring->count * desc_len; 2124 rx_ring->size = ALIGN(rx_ring->size, 4096); 2125 2126 err = e1000_alloc_ring_dma(adapter, rx_ring); 2127 if (err) 2128 goto err_pages; 2129 2130 rx_ring->next_to_clean = 0; 2131 rx_ring->next_to_use = 0; 2132 rx_ring->rx_skb_top = NULL; 2133 2134 return 0; 2135 2136err_pages: 2137 for (i = 0; i < rx_ring->count; i++) { 2138 buffer_info = &rx_ring->buffer_info[i]; 2139 kfree(buffer_info->ps_pages); 2140 } 2141err: 2142 vfree(rx_ring->buffer_info); 2143 e_err("Unable to allocate memory for the receive descriptor ring\n"); 2144 return err; 2145} 2146 2147/** 2148 * e1000_clean_tx_ring - Free Tx Buffers 2149 * @adapter: board private structure 2150 **/ 2151static void e1000_clean_tx_ring(struct e1000_adapter *adapter) 2152{ 2153 struct e1000_ring *tx_ring = adapter->tx_ring; 2154 struct e1000_buffer *buffer_info; 2155 unsigned long size; 2156 unsigned int i; 2157 2158 for (i = 0; i < tx_ring->count; i++) { 2159 buffer_info = &tx_ring->buffer_info[i]; 2160 e1000_put_txbuf(adapter, buffer_info); 2161 } 2162 2163 size = sizeof(struct e1000_buffer) * tx_ring->count; 2164 memset(tx_ring->buffer_info, 0, size); 2165 2166 memset(tx_ring->desc, 0, tx_ring->size); 2167 2168 tx_ring->next_to_use = 0; 2169 tx_ring->next_to_clean = 0; 2170 2171 writel(0, adapter->hw.hw_addr + tx_ring->head); 2172 writel(0, adapter->hw.hw_addr + tx_ring->tail); 2173} 2174 2175/** 2176 * e1000e_free_tx_resources - Free Tx Resources per Queue 2177 * @adapter: board private structure 2178 * 2179 * Free all transmit software resources 2180 **/ 2181void e1000e_free_tx_resources(struct e1000_adapter *adapter) 2182{ 2183 struct pci_dev *pdev = adapter->pdev; 2184 struct e1000_ring *tx_ring = adapter->tx_ring; 2185 2186 e1000_clean_tx_ring(adapter); 2187 2188 vfree(tx_ring->buffer_info); 2189 tx_ring->buffer_info = NULL; 2190 2191 dma_free_coherent(&pdev->dev, tx_ring->size, tx_ring->desc, 2192 tx_ring->dma); 2193 tx_ring->desc = NULL; 2194} 2195 2196/** 2197 * e1000e_free_rx_resources - Free Rx Resources 2198 * @adapter: board private structure 2199 * 2200 * Free all receive software resources 2201 **/ 2202 2203void e1000e_free_rx_resources(struct e1000_adapter *adapter) 2204{ 2205 struct pci_dev *pdev = adapter->pdev; 2206 struct e1000_ring *rx_ring = adapter->rx_ring; 2207 int i; 2208 2209 e1000_clean_rx_ring(adapter); 2210 2211 for (i = 0; i < rx_ring->count; i++) 2212 kfree(rx_ring->buffer_info[i].ps_pages); 2213 2214 vfree(rx_ring->buffer_info); 2215 rx_ring->buffer_info = NULL; 2216 2217 dma_free_coherent(&pdev->dev, rx_ring->size, rx_ring->desc, 2218 rx_ring->dma); 2219 rx_ring->desc = NULL; 2220} 2221 2222/** 2223 * e1000_update_itr - update the dynamic ITR value based on statistics 2224 * @adapter: pointer to adapter 2225 * @itr_setting: current adapter->itr 2226 * @packets: the number of packets during this measurement interval 2227 * @bytes: the number of bytes during this measurement interval 2228 * 2229 * Stores a new ITR value based on packets and byte 2230 * counts during the last interrupt. The advantage of per interrupt 2231 * computation is faster updates and more accurate ITR for the current 2232 * traffic pattern. Constants in this function were computed 2233 * based on theoretical maximum wire speed and thresholds were set based 2234 * on testing data as well as attempting to minimize response time 2235 * while increasing bulk throughput. This functionality is controlled 2236 * by the InterruptThrottleRate module parameter. 2237 **/ 2238static unsigned int e1000_update_itr(struct e1000_adapter *adapter, 2239 u16 itr_setting, int packets, 2240 int bytes) 2241{ 2242 unsigned int retval = itr_setting; 2243 2244 if (packets == 0) 2245 goto update_itr_done; 2246 2247 switch (itr_setting) { 2248 case lowest_latency: 2249 /* handle TSO and jumbo frames */ 2250 if (bytes/packets > 8000) 2251 retval = bulk_latency; 2252 else if ((packets < 5) && (bytes > 512)) 2253 retval = low_latency; 2254 break; 2255 case low_latency: /* 50 usec aka 20000 ints/s */ 2256 if (bytes > 10000) { 2257 /* this if handles the TSO accounting */ 2258 if (bytes/packets > 8000) 2259 retval = bulk_latency; 2260 else if ((packets < 10) || ((bytes/packets) > 1200)) 2261 retval = bulk_latency; 2262 else if ((packets > 35)) 2263 retval = lowest_latency; 2264 } else if (bytes/packets > 2000) { 2265 retval = bulk_latency; 2266 } else if (packets <= 2 && bytes < 512) { 2267 retval = lowest_latency; 2268 } 2269 break; 2270 case bulk_latency: /* 250 usec aka 4000 ints/s */ 2271 if (bytes > 25000) { 2272 if (packets > 35) 2273 retval = low_latency; 2274 } else if (bytes < 6000) { 2275 retval = low_latency; 2276 } 2277 break; 2278 } 2279 2280update_itr_done: 2281 return retval; 2282} 2283 2284static void e1000_set_itr(struct e1000_adapter *adapter) 2285{ 2286 struct e1000_hw *hw = &adapter->hw; 2287 u16 current_itr; 2288 u32 new_itr = adapter->itr; 2289 2290 /* for non-gigabit speeds, just fix the interrupt rate at 4000 */ 2291 if (adapter->link_speed != SPEED_1000) { 2292 current_itr = 0; 2293 new_itr = 4000; 2294 goto set_itr_now; 2295 } 2296 2297 if (adapter->flags2 & FLAG2_DISABLE_AIM) { 2298 new_itr = 0; 2299 goto set_itr_now; 2300 } 2301 2302 adapter->tx_itr = e1000_update_itr(adapter, 2303 adapter->tx_itr, 2304 adapter->total_tx_packets, 2305 adapter->total_tx_bytes); 2306 /* conservative mode (itr 3) eliminates the lowest_latency setting */ 2307 if (adapter->itr_setting == 3 && adapter->tx_itr == lowest_latency) 2308 adapter->tx_itr = low_latency; 2309 2310 adapter->rx_itr = e1000_update_itr(adapter, 2311 adapter->rx_itr, 2312 adapter->total_rx_packets, 2313 adapter->total_rx_bytes); 2314 /* conservative mode (itr 3) eliminates the lowest_latency setting */ 2315 if (adapter->itr_setting == 3 && adapter->rx_itr == lowest_latency) 2316 adapter->rx_itr = low_latency; 2317 2318 current_itr = max(adapter->rx_itr, adapter->tx_itr); 2319 2320 switch (current_itr) { 2321 /* counts and packets in update_itr are dependent on these numbers */ 2322 case lowest_latency: 2323 new_itr = 70000; 2324 break; 2325 case low_latency: 2326 new_itr = 20000; /* aka hwitr = ~200 */ 2327 break; 2328 case bulk_latency: 2329 new_itr = 4000; 2330 break; 2331 default: 2332 break; 2333 } 2334 2335set_itr_now: 2336 if (new_itr != adapter->itr) { 2337 /* 2338 * this attempts to bias the interrupt rate towards Bulk 2339 * by adding intermediate steps when interrupt rate is 2340 * increasing 2341 */ 2342 new_itr = new_itr > adapter->itr ? 2343 min(adapter->itr + (new_itr >> 2), new_itr) : 2344 new_itr; 2345 adapter->itr = new_itr; 2346 adapter->rx_ring->itr_val = new_itr; 2347 if (adapter->msix_entries) 2348 adapter->rx_ring->set_itr = 1; 2349 else 2350 if (new_itr) 2351 ew32(ITR, 1000000000 / (new_itr * 256)); 2352 else 2353 ew32(ITR, 0); 2354 } 2355} 2356 2357/** 2358 * e1000_alloc_queues - Allocate memory for all rings 2359 * @adapter: board private structure to initialize 2360 **/ 2361static int __devinit e1000_alloc_queues(struct e1000_adapter *adapter) 2362{ 2363 adapter->tx_ring = kzalloc(sizeof(struct e1000_ring), GFP_KERNEL); 2364 if (!adapter->tx_ring) 2365 goto err; 2366 2367 adapter->rx_ring = kzalloc(sizeof(struct e1000_ring), GFP_KERNEL); 2368 if (!adapter->rx_ring) 2369 goto err; 2370 2371 return 0; 2372err: 2373 e_err("Unable to allocate memory for queues\n"); 2374 kfree(adapter->rx_ring); 2375 kfree(adapter->tx_ring); 2376 return -ENOMEM; 2377} 2378 2379/** 2380 * e1000_clean - NAPI Rx polling callback 2381 * @napi: struct associated with this polling callback 2382 * @budget: amount of packets driver is allowed to process this poll 2383 **/ 2384static int e1000_clean(struct napi_struct *napi, int budget) 2385{ 2386 struct e1000_adapter *adapter = container_of(napi, struct e1000_adapter, napi); 2387 struct e1000_hw *hw = &adapter->hw; 2388 struct net_device *poll_dev = adapter->netdev; 2389 int tx_cleaned = 1, work_done = 0; 2390 2391 adapter = netdev_priv(poll_dev); 2392 2393 if (adapter->msix_entries && 2394 !(adapter->rx_ring->ims_val & adapter->tx_ring->ims_val)) 2395 goto clean_rx; 2396 2397 tx_cleaned = e1000_clean_tx_irq(adapter); 2398 2399clean_rx: 2400 adapter->clean_rx(adapter, &work_done, budget); 2401 2402 if (!tx_cleaned) 2403 work_done = budget; 2404 2405 /* If budget not fully consumed, exit the polling mode */ 2406 if (work_done < budget) { 2407 if (adapter->itr_setting & 3) 2408 e1000_set_itr(adapter); 2409 napi_complete(napi); 2410 if (!test_bit(__E1000_DOWN, &adapter->state)) { 2411 if (adapter->msix_entries) 2412 ew32(IMS, adapter->rx_ring->ims_val); 2413 else 2414 e1000_irq_enable(adapter); 2415 } 2416 } 2417 2418 return work_done; 2419} 2420 2421static void e1000_vlan_rx_add_vid(struct net_device *netdev, u16 vid) 2422{ 2423 struct e1000_adapter *adapter = netdev_priv(netdev); 2424 struct e1000_hw *hw = &adapter->hw; 2425 u32 vfta, index; 2426 2427 /* don't update vlan cookie if already programmed */ 2428 if ((adapter->hw.mng_cookie.status & 2429 E1000_MNG_DHCP_COOKIE_STATUS_VLAN) && 2430 (vid == adapter->mng_vlan_id)) 2431 return; 2432 2433 /* add VID to filter table */ 2434 if (adapter->flags & FLAG_HAS_HW_VLAN_FILTER) { 2435 index = (vid >> 5) & 0x7F; 2436 vfta = E1000_READ_REG_ARRAY(hw, E1000_VFTA, index); 2437 vfta |= (1 << (vid & 0x1F)); 2438 hw->mac.ops.write_vfta(hw, index, vfta); 2439 } 2440} 2441 2442static void e1000_vlan_rx_kill_vid(struct net_device *netdev, u16 vid) 2443{ 2444 struct e1000_adapter *adapter = netdev_priv(netdev); 2445 struct e1000_hw *hw = &adapter->hw; 2446 u32 vfta, index; 2447 2448 if (!test_bit(__E1000_DOWN, &adapter->state)) 2449 e1000_irq_disable(adapter); 2450 vlan_group_set_device(adapter->vlgrp, vid, NULL); 2451 2452 if (!test_bit(__E1000_DOWN, &adapter->state)) 2453 e1000_irq_enable(adapter); 2454 2455 if ((adapter->hw.mng_cookie.status & 2456 E1000_MNG_DHCP_COOKIE_STATUS_VLAN) && 2457 (vid == adapter->mng_vlan_id)) { 2458 /* release control to f/w */ 2459 e1000e_release_hw_control(adapter); 2460 return; 2461 } 2462 2463 /* remove VID from filter table */ 2464 if (adapter->flags & FLAG_HAS_HW_VLAN_FILTER) { 2465 index = (vid >> 5) & 0x7F; 2466 vfta = E1000_READ_REG_ARRAY(hw, E1000_VFTA, index); 2467 vfta &= ~(1 << (vid & 0x1F)); 2468 hw->mac.ops.write_vfta(hw, index, vfta); 2469 } 2470} 2471 2472static void e1000_update_mng_vlan(struct e1000_adapter *adapter) 2473{ 2474 struct net_device *netdev = adapter->netdev; 2475 u16 vid = adapter->hw.mng_cookie.vlan_id; 2476 u16 old_vid = adapter->mng_vlan_id; 2477 2478 if (!adapter->vlgrp) 2479 return; 2480 2481 if (!vlan_group_get_device(adapter->vlgrp, vid)) { 2482 adapter->mng_vlan_id = E1000_MNG_VLAN_NONE; 2483 if (adapter->hw.mng_cookie.status & 2484 E1000_MNG_DHCP_COOKIE_STATUS_VLAN) { 2485 e1000_vlan_rx_add_vid(netdev, vid); 2486 adapter->mng_vlan_id = vid; 2487 } 2488 2489 if ((old_vid != (u16)E1000_MNG_VLAN_NONE) && 2490 (vid != old_vid) && 2491 !vlan_group_get_device(adapter->vlgrp, old_vid)) 2492 e1000_vlan_rx_kill_vid(netdev, old_vid); 2493 } else { 2494 adapter->mng_vlan_id = vid; 2495 } 2496} 2497 2498 2499static void e1000_vlan_rx_register(struct net_device *netdev, 2500 struct vlan_group *grp) 2501{ 2502 struct e1000_adapter *adapter = netdev_priv(netdev); 2503 struct e1000_hw *hw = &adapter->hw; 2504 u32 ctrl, rctl; 2505 2506 if (!test_bit(__E1000_DOWN, &adapter->state)) 2507 e1000_irq_disable(adapter); 2508 adapter->vlgrp = grp; 2509 2510 if (grp) { 2511 /* enable VLAN tag insert/strip */ 2512 ctrl = er32(CTRL); 2513 ctrl |= E1000_CTRL_VME; 2514 ew32(CTRL, ctrl); 2515 2516 if (adapter->flags & FLAG_HAS_HW_VLAN_FILTER) { 2517 /* enable VLAN receive filtering */ 2518 rctl = er32(RCTL); 2519 rctl &= ~E1000_RCTL_CFIEN; 2520 ew32(RCTL, rctl); 2521 e1000_update_mng_vlan(adapter); 2522 } 2523 } else { 2524 /* disable VLAN tag insert/strip */ 2525 ctrl = er32(CTRL); 2526 ctrl &= ~E1000_CTRL_VME; 2527 ew32(CTRL, ctrl); 2528 2529 if (adapter->flags & FLAG_HAS_HW_VLAN_FILTER) { 2530 if (adapter->mng_vlan_id != 2531 (u16)E1000_MNG_VLAN_NONE) { 2532 e1000_vlan_rx_kill_vid(netdev, 2533 adapter->mng_vlan_id); 2534 adapter->mng_vlan_id = E1000_MNG_VLAN_NONE; 2535 } 2536 } 2537 } 2538 2539 if (!test_bit(__E1000_DOWN, &adapter->state)) 2540 e1000_irq_enable(adapter); 2541} 2542 2543static void e1000_restore_vlan(struct e1000_adapter *adapter) 2544{ 2545 u16 vid; 2546 2547 e1000_vlan_rx_register(adapter->netdev, adapter->vlgrp); 2548 2549 if (!adapter->vlgrp) 2550 return; 2551 2552 for (vid = 0; vid < VLAN_N_VID; vid++) { 2553 if (!vlan_group_get_device(adapter->vlgrp, vid)) 2554 continue; 2555 e1000_vlan_rx_add_vid(adapter->netdev, vid); 2556 } 2557} 2558 2559static void e1000_init_manageability_pt(struct e1000_adapter *adapter) 2560{ 2561 struct e1000_hw *hw = &adapter->hw; 2562 u32 manc, manc2h, mdef, i, j; 2563 2564 if (!(adapter->flags & FLAG_MNG_PT_ENABLED)) 2565 return; 2566 2567 manc = er32(MANC); 2568 2569 /* 2570 * enable receiving management packets to the host. this will probably 2571 * generate destination unreachable messages from the host OS, but 2572 * the packets will be handled on SMBUS 2573 */ 2574 manc |= E1000_MANC_EN_MNG2HOST; 2575 manc2h = er32(MANC2H); 2576 2577 switch (hw->mac.type) { 2578 default: 2579 manc2h |= (E1000_MANC2H_PORT_623 | E1000_MANC2H_PORT_664); 2580 break; 2581 case e1000_82574: 2582 case e1000_82583: 2583 /* 2584 * Check if IPMI pass-through decision filter already exists; 2585 * if so, enable it. 2586 */ 2587 for (i = 0, j = 0; i < 8; i++) { 2588 mdef = er32(MDEF(i)); 2589 2590 /* Ignore filters with anything other than IPMI ports */ 2591 if (mdef & ~(E1000_MDEF_PORT_623 | E1000_MDEF_PORT_664)) 2592 continue; 2593 2594 /* Enable this decision filter in MANC2H */ 2595 if (mdef) 2596 manc2h |= (1 << i); 2597 2598 j |= mdef; 2599 } 2600 2601 if (j == (E1000_MDEF_PORT_623 | E1000_MDEF_PORT_664)) 2602 break; 2603 2604 /* Create new decision filter in an empty filter */ 2605 for (i = 0, j = 0; i < 8; i++) 2606 if (er32(MDEF(i)) == 0) { 2607 ew32(MDEF(i), (E1000_MDEF_PORT_623 | 2608 E1000_MDEF_PORT_664)); 2609 manc2h |= (1 << 1); 2610 j++; 2611 break; 2612 } 2613 2614 if (!j) 2615 e_warn("Unable to create IPMI pass-through filter\n"); 2616 break; 2617 } 2618 2619 ew32(MANC2H, manc2h); 2620 ew32(MANC, manc); 2621} 2622 2623/** 2624 * e1000_configure_tx - Configure Transmit Unit after Reset 2625 * @adapter: board private structure 2626 * 2627 * Configure the Tx unit of the MAC after a reset. 2628 **/ 2629static void e1000_configure_tx(struct e1000_adapter *adapter) 2630{ 2631 struct e1000_hw *hw = &adapter->hw; 2632 struct e1000_ring *tx_ring = adapter->tx_ring; 2633 u64 tdba; 2634 u32 tdlen, tctl, tipg, tarc; 2635 u32 ipgr1, ipgr2; 2636 2637 /* Setup the HW Tx Head and Tail descriptor pointers */ 2638 tdba = tx_ring->dma; 2639 tdlen = tx_ring->count * sizeof(struct e1000_tx_desc); 2640 ew32(TDBAL, (tdba & DMA_BIT_MASK(32))); 2641 ew32(TDBAH, (tdba >> 32)); 2642 ew32(TDLEN, tdlen); 2643 ew32(TDH, 0); 2644 ew32(TDT, 0); 2645 tx_ring->head = E1000_TDH; 2646 tx_ring->tail = E1000_TDT; 2647 2648 /* Set the default values for the Tx Inter Packet Gap timer */ 2649 tipg = DEFAULT_82543_TIPG_IPGT_COPPER; /* 8 */ 2650 ipgr1 = DEFAULT_82543_TIPG_IPGR1; /* 8 */ 2651 ipgr2 = DEFAULT_82543_TIPG_IPGR2; /* 6 */ 2652 2653 if (adapter->flags & FLAG_TIPG_MEDIUM_FOR_80003ESLAN) 2654 ipgr2 = DEFAULT_80003ES2LAN_TIPG_IPGR2; /* 7 */ 2655 2656 tipg |= ipgr1 << E1000_TIPG_IPGR1_SHIFT; 2657 tipg |= ipgr2 << E1000_TIPG_IPGR2_SHIFT; 2658 ew32(TIPG, tipg); 2659 2660 /* Set the Tx Interrupt Delay register */ 2661 ew32(TIDV, adapter->tx_int_delay); 2662 /* Tx irq moderation */ 2663 ew32(TADV, adapter->tx_abs_int_delay); 2664 2665 if (adapter->flags2 & FLAG2_DMA_BURST) { 2666 u32 txdctl = er32(TXDCTL(0)); 2667 txdctl &= ~(E1000_TXDCTL_PTHRESH | E1000_TXDCTL_HTHRESH | 2668 E1000_TXDCTL_WTHRESH); 2669 /* 2670 * set up some performance related parameters to encourage the 2671 * hardware to use the bus more efficiently in bursts, depends 2672 * on the tx_int_delay to be enabled, 2673 * wthresh = 5 ==> burst write a cacheline (64 bytes) at a time 2674 * hthresh = 1 ==> prefetch when one or more available 2675 * pthresh = 0x1f ==> prefetch if internal cache 31 or less 2676 * BEWARE: this seems to work but should be considered first if 2677 * there are Tx hangs or other Tx related bugs 2678 */ 2679 txdctl |= E1000_TXDCTL_DMA_BURST_ENABLE; 2680 ew32(TXDCTL(0), txdctl); 2681 /* erratum work around: set txdctl the same for both queues */ 2682 ew32(TXDCTL(1), txdctl); 2683 } 2684 2685 /* Program the Transmit Control Register */ 2686 tctl = er32(TCTL); 2687 tctl &= ~E1000_TCTL_CT; 2688 tctl |= E1000_TCTL_PSP | E1000_TCTL_RTLC | 2689 (E1000_COLLISION_THRESHOLD << E1000_CT_SHIFT); 2690 2691 if (adapter->flags & FLAG_TARC_SPEED_MODE_BIT) { 2692 tarc = er32(TARC(0)); 2693 /* 2694 * set the speed mode bit, we'll clear it if we're not at 2695 * gigabit link later 2696 */ 2697#define SPEED_MODE_BIT (1 << 21) 2698 tarc |= SPEED_MODE_BIT; 2699 ew32(TARC(0), tarc); 2700 } 2701 2702 /* errata: program both queues to unweighted RR */ 2703 if (adapter->flags & FLAG_TARC_SET_BIT_ZERO) { 2704 tarc = er32(TARC(0)); 2705 tarc |= 1; 2706 ew32(TARC(0), tarc); 2707 tarc = er32(TARC(1)); 2708 tarc |= 1; 2709 ew32(TARC(1), tarc); 2710 } 2711 2712 /* Setup Transmit Descriptor Settings for eop descriptor */ 2713 adapter->txd_cmd = E1000_TXD_CMD_EOP | E1000_TXD_CMD_IFCS; 2714 2715 /* only set IDE if we are delaying interrupts using the timers */ 2716 if (adapter->tx_int_delay) 2717 adapter->txd_cmd |= E1000_TXD_CMD_IDE; 2718 2719 /* enable Report Status bit */ 2720 adapter->txd_cmd |= E1000_TXD_CMD_RS; 2721 2722 ew32(TCTL, tctl); 2723 2724 e1000e_config_collision_dist(hw); 2725} 2726 2727/** 2728 * e1000_setup_rctl - configure the receive control registers 2729 * @adapter: Board private structure 2730 **/ 2731#define PAGE_USE_COUNT(S) (((S) >> PAGE_SHIFT) + \ 2732 (((S) & (PAGE_SIZE - 1)) ? 1 : 0)) 2733static void e1000_setup_rctl(struct e1000_adapter *adapter) 2734{ 2735 struct e1000_hw *hw = &adapter->hw; 2736 u32 rctl, rfctl; 2737 u32 psrctl = 0; 2738 u32 pages = 0; 2739 2740 /* Workaround Si errata on 82579 - configure jumbo frame flow */ 2741 if (hw->mac.type == e1000_pch2lan) { 2742 s32 ret_val; 2743 2744 if (adapter->netdev->mtu > ETH_DATA_LEN) 2745 ret_val = e1000_lv_jumbo_workaround_ich8lan(hw, true); 2746 else 2747 ret_val = e1000_lv_jumbo_workaround_ich8lan(hw, false); 2748 2749 if (ret_val) 2750 e_dbg("failed to enable jumbo frame workaround mode\n"); 2751 } 2752 2753 /* Program MC offset vector base */ 2754 rctl = er32(RCTL); 2755 rctl &= ~(3 << E1000_RCTL_MO_SHIFT); 2756 rctl |= E1000_RCTL_EN | E1000_RCTL_BAM | 2757 E1000_RCTL_LBM_NO | E1000_RCTL_RDMTS_HALF | 2758 (adapter->hw.mac.mc_filter_type << E1000_RCTL_MO_SHIFT); 2759 2760 /* Do not Store bad packets */ 2761 rctl &= ~E1000_RCTL_SBP; 2762 2763 /* Enable Long Packet receive */ 2764 if (adapter->netdev->mtu <= ETH_DATA_LEN) 2765 rctl &= ~E1000_RCTL_LPE; 2766 else 2767 rctl |= E1000_RCTL_LPE; 2768 2769 /* Some systems expect that the CRC is included in SMBUS traffic. The 2770 * hardware strips the CRC before sending to both SMBUS (BMC) and to 2771 * host memory when this is enabled 2772 */ 2773 if (adapter->flags2 & FLAG2_CRC_STRIPPING) 2774 rctl |= E1000_RCTL_SECRC; 2775 2776 /* Workaround Si errata on 82577 PHY - configure IPG for jumbos */ 2777 if ((hw->phy.type == e1000_phy_82577) && (rctl & E1000_RCTL_LPE)) { 2778 u16 phy_data; 2779 2780 e1e_rphy(hw, PHY_REG(770, 26), &phy_data); 2781 phy_data &= 0xfff8; 2782 phy_data |= (1 << 2); 2783 e1e_wphy(hw, PHY_REG(770, 26), phy_data); 2784 2785 e1e_rphy(hw, 22, &phy_data); 2786 phy_data &= 0x0fff; 2787 phy_data |= (1 << 14); 2788 e1e_wphy(hw, 0x10, 0x2823); 2789 e1e_wphy(hw, 0x11, 0x0003); 2790 e1e_wphy(hw, 22, phy_data); 2791 } 2792 2793 /* Setup buffer sizes */ 2794 rctl &= ~E1000_RCTL_SZ_4096; 2795 rctl |= E1000_RCTL_BSEX; 2796 switch (adapter->rx_buffer_len) { 2797 case 2048: 2798 default: 2799 rctl |= E1000_RCTL_SZ_2048; 2800 rctl &= ~E1000_RCTL_BSEX; 2801 break; 2802 case 4096: 2803 rctl |= E1000_RCTL_SZ_4096; 2804 break; 2805 case 8192: 2806 rctl |= E1000_RCTL_SZ_8192; 2807 break; 2808 case 16384: 2809 rctl |= E1000_RCTL_SZ_16384; 2810 break; 2811 } 2812 2813 /* 2814 * 82571 and greater support packet-split where the protocol 2815 * header is placed in skb->data and the packet data is 2816 * placed in pages hanging off of skb_shinfo(skb)->nr_frags. 2817 * In the case of a non-split, skb->data is linearly filled, 2818 * followed by the page buffers. Therefore, skb->data is 2819 * sized to hold the largest protocol header. 2820 * 2821 * allocations using alloc_page take too long for regular MTU 2822 * so only enable packet split for jumbo frames 2823 * 2824 * Using pages when the page size is greater than 16k wastes 2825 * a lot of memory, since we allocate 3 pages at all times 2826 * per packet. 2827 */ 2828 pages = PAGE_USE_COUNT(adapter->netdev->mtu); 2829 if (!(adapter->flags & FLAG_HAS_ERT) && (pages <= 3) && 2830 (PAGE_SIZE <= 16384) && (rctl & E1000_RCTL_LPE)) 2831 adapter->rx_ps_pages = pages; 2832 else 2833 adapter->rx_ps_pages = 0; 2834 2835 if (adapter->rx_ps_pages) { 2836 /* Configure extra packet-split registers */ 2837 rfctl = er32(RFCTL); 2838 rfctl |= E1000_RFCTL_EXTEN; 2839 /* 2840 * disable packet split support for IPv6 extension headers, 2841 * because some malformed IPv6 headers can hang the Rx 2842 */ 2843 rfctl |= (E1000_RFCTL_IPV6_EX_DIS | 2844 E1000_RFCTL_NEW_IPV6_EXT_DIS); 2845 2846 ew32(RFCTL, rfctl); 2847 2848 /* Enable Packet split descriptors */ 2849 rctl |= E1000_RCTL_DTYP_PS; 2850 2851 psrctl |= adapter->rx_ps_bsize0 >> 2852 E1000_PSRCTL_BSIZE0_SHIFT; 2853 2854 switch (adapter->rx_ps_pages) { 2855 case 3: 2856 psrctl |= PAGE_SIZE << 2857 E1000_PSRCTL_BSIZE3_SHIFT; 2858 case 2: 2859 psrctl |= PAGE_SIZE << 2860 E1000_PSRCTL_BSIZE2_SHIFT; 2861 case 1: 2862 psrctl |= PAGE_SIZE >> 2863 E1000_PSRCTL_BSIZE1_SHIFT; 2864 break; 2865 } 2866 2867 ew32(PSRCTL, psrctl); 2868 } 2869 2870 ew32(RCTL, rctl); 2871 /* just started the receive unit, no need to restart */ 2872 adapter->flags &= ~FLAG_RX_RESTART_NOW; 2873} 2874 2875/** 2876 * e1000_configure_rx - Configure Receive Unit after Reset 2877 * @adapter: board private structure 2878 * 2879 * Configure the Rx unit of the MAC after a reset. 2880 **/ 2881static void e1000_configure_rx(struct e1000_adapter *adapter) 2882{ 2883 struct e1000_hw *hw = &adapter->hw; 2884 struct e1000_ring *rx_ring = adapter->rx_ring; 2885 u64 rdba; 2886 u32 rdlen, rctl, rxcsum, ctrl_ext; 2887 2888 if (adapter->rx_ps_pages) { 2889 /* this is a 32 byte descriptor */ 2890 rdlen = rx_ring->count * 2891 sizeof(union e1000_rx_desc_packet_split); 2892 adapter->clean_rx = e1000_clean_rx_irq_ps; 2893 adapter->alloc_rx_buf = e1000_alloc_rx_buffers_ps; 2894 } else if (adapter->netdev->mtu > ETH_FRAME_LEN + ETH_FCS_LEN) { 2895 rdlen = rx_ring->count * sizeof(struct e1000_rx_desc); 2896 adapter->clean_rx = e1000_clean_jumbo_rx_irq; 2897 adapter->alloc_rx_buf = e1000_alloc_jumbo_rx_buffers; 2898 } else { 2899 rdlen = rx_ring->count * sizeof(struct e1000_rx_desc); 2900 adapter->clean_rx = e1000_clean_rx_irq; 2901 adapter->alloc_rx_buf = e1000_alloc_rx_buffers; 2902 } 2903 2904 /* disable receives while setting up the descriptors */ 2905 rctl = er32(RCTL); 2906 ew32(RCTL, rctl & ~E1000_RCTL_EN); 2907 e1e_flush(); 2908 msleep(10); 2909 2910 if (adapter->flags2 & FLAG2_DMA_BURST) { 2911 /* 2912 * set the writeback threshold (only takes effect if the RDTR 2913 * is set). set GRAN=1 and write back up to 0x4 worth, and 2914 * enable prefetching of 0x20 Rx descriptors 2915 * granularity = 01 2916 * wthresh = 04, 2917 * hthresh = 04, 2918 * pthresh = 0x20 2919 */ 2920 ew32(RXDCTL(0), E1000_RXDCTL_DMA_BURST_ENABLE); 2921 ew32(RXDCTL(1), E1000_RXDCTL_DMA_BURST_ENABLE); 2922 2923 /* 2924 * override the delay timers for enabling bursting, only if 2925 * the value was not set by the user via module options 2926 */ 2927 if (adapter->rx_int_delay == DEFAULT_RDTR) 2928 adapter->rx_int_delay = BURST_RDTR; 2929 if (adapter->rx_abs_int_delay == DEFAULT_RADV) 2930 adapter->rx_abs_int_delay = BURST_RADV; 2931 } 2932 2933 /* set the Receive Delay Timer Register */ 2934 ew32(RDTR, adapter->rx_int_delay); 2935 2936 /* irq moderation */ 2937 ew32(RADV, adapter->rx_abs_int_delay); 2938 if ((adapter->itr_setting != 0) && (adapter->itr != 0)) 2939 ew32(ITR, 1000000000 / (adapter->itr * 256)); 2940 2941 ctrl_ext = er32(CTRL_EXT); 2942 /* Auto-Mask interrupts upon ICR access */ 2943 ctrl_ext |= E1000_CTRL_EXT_IAME; 2944 ew32(IAM, 0xffffffff); 2945 ew32(CTRL_EXT, ctrl_ext); 2946 e1e_flush(); 2947 2948 /* 2949 * Setup the HW Rx Head and Tail Descriptor Pointers and 2950 * the Base and Length of the Rx Descriptor Ring 2951 */ 2952 rdba = rx_ring->dma; 2953 ew32(RDBAL, (rdba & DMA_BIT_MASK(32))); 2954 ew32(RDBAH, (rdba >> 32)); 2955 ew32(RDLEN, rdlen); 2956 ew32(RDH, 0); 2957 ew32(RDT, 0); 2958 rx_ring->head = E1000_RDH; 2959 rx_ring->tail = E1000_RDT; 2960 2961 /* Enable Receive Checksum Offload for TCP and UDP */ 2962 rxcsum = er32(RXCSUM); 2963 if (adapter->flags & FLAG_RX_CSUM_ENABLED) { 2964 rxcsum |= E1000_RXCSUM_TUOFL; 2965 2966 /* 2967 * IPv4 payload checksum for UDP fragments must be 2968 * used in conjunction with packet-split. 2969 */ 2970 if (adapter->rx_ps_pages) 2971 rxcsum |= E1000_RXCSUM_IPPCSE; 2972 } else { 2973 rxcsum &= ~E1000_RXCSUM_TUOFL; 2974 /* no need to clear IPPCSE as it defaults to 0 */ 2975 } 2976 ew32(RXCSUM, rxcsum); 2977 2978 /* 2979 * Enable early receives on supported devices, only takes effect when 2980 * packet size is equal or larger than the specified value (in 8 byte 2981 * units), e.g. using jumbo frames when setting to E1000_ERT_2048 2982 */ 2983 if ((adapter->flags & FLAG_HAS_ERT) || 2984 (adapter->hw.mac.type == e1000_pch2lan)) { 2985 if (adapter->netdev->mtu > ETH_DATA_LEN) { 2986 u32 rxdctl = er32(RXDCTL(0)); 2987 ew32(RXDCTL(0), rxdctl | 0x3); 2988 if (adapter->flags & FLAG_HAS_ERT) 2989 ew32(ERT, E1000_ERT_2048 | (1 << 13)); 2990 /* 2991 * With jumbo frames and early-receive enabled, 2992 * excessive C-state transition latencies result in 2993 * dropped transactions. 2994 */ 2995 pm_qos_update_request(&adapter->netdev->pm_qos_req, 55); 2996 } else { 2997 pm_qos_update_request(&adapter->netdev->pm_qos_req, 2998 PM_QOS_DEFAULT_VALUE); 2999 } 3000 } 3001 3002 /* Enable Receives */ 3003 ew32(RCTL, rctl); 3004} 3005 3006/** 3007 * e1000_update_mc_addr_list - Update Multicast addresses 3008 * @hw: pointer to the HW structure 3009 * @mc_addr_list: array of multicast addresses to program 3010 * @mc_addr_count: number of multicast addresses to program 3011 * 3012 * Updates the Multicast Table Array. 3013 * The caller must have a packed mc_addr_list of multicast addresses. 3014 **/ 3015static void e1000_update_mc_addr_list(struct e1000_hw *hw, u8 *mc_addr_list, 3016 u32 mc_addr_count) 3017{ 3018 hw->mac.ops.update_mc_addr_list(hw, mc_addr_list, mc_addr_count); 3019} 3020 3021/** 3022 * e1000_set_multi - Multicast and Promiscuous mode set 3023 * @netdev: network interface device structure 3024 * 3025 * The set_multi entry point is called whenever the multicast address 3026 * list or the network interface flags are updated. This routine is 3027 * responsible for configuring the hardware for proper multicast, 3028 * promiscuous mode, and all-multi behavior. 3029 **/ 3030static void e1000_set_multi(struct net_device *netdev) 3031{ 3032 struct e1000_adapter *adapter = netdev_priv(netdev); 3033 struct e1000_hw *hw = &adapter->hw; 3034 struct netdev_hw_addr *ha; 3035 u8 *mta_list; 3036 u32 rctl; 3037 int i; 3038 3039 /* Check for Promiscuous and All Multicast modes */ 3040 3041 rctl = er32(RCTL); 3042 3043 if (netdev->flags & IFF_PROMISC) { 3044 rctl |= (E1000_RCTL_UPE | E1000_RCTL_MPE); 3045 rctl &= ~E1000_RCTL_VFE; 3046 } else { 3047 if (netdev->flags & IFF_ALLMULTI) { 3048 rctl |= E1000_RCTL_MPE; 3049 rctl &= ~E1000_RCTL_UPE; 3050 } else { 3051 rctl &= ~(E1000_RCTL_UPE | E1000_RCTL_MPE); 3052 } 3053 if (adapter->flags & FLAG_HAS_HW_VLAN_FILTER) 3054 rctl |= E1000_RCTL_VFE; 3055 } 3056 3057 ew32(RCTL, rctl); 3058 3059 if (!netdev_mc_empty(netdev)) { 3060 mta_list = kmalloc(netdev_mc_count(netdev) * 6, GFP_ATOMIC); 3061 if (!mta_list) 3062 return; 3063 3064 /* prepare a packed array of only addresses. */ 3065 i = 0; 3066 netdev_for_each_mc_addr(ha, netdev) 3067 memcpy(mta_list + (i++ * ETH_ALEN), ha->addr, ETH_ALEN); 3068 3069 e1000_update_mc_addr_list(hw, mta_list, i); 3070 kfree(mta_list); 3071 } else { 3072 /* 3073 * if we're called from probe, we might not have 3074 * anything to do here, so clear out the list 3075 */ 3076 e1000_update_mc_addr_list(hw, NULL, 0); 3077 } 3078} 3079 3080/** 3081 * e1000_configure - configure the hardware for Rx and Tx 3082 * @adapter: private board structure 3083 **/ 3084static void e1000_configure(struct e1000_adapter *adapter) 3085{ 3086 e1000_set_multi(adapter->netdev); 3087 3088 e1000_restore_vlan(adapter); 3089 e1000_init_manageability_pt(adapter); 3090 3091 e1000_configure_tx(adapter); 3092 e1000_setup_rctl(adapter); 3093 e1000_configure_rx(adapter); 3094 adapter->alloc_rx_buf(adapter, e1000_desc_unused(adapter->rx_ring)); 3095} 3096 3097/** 3098 * e1000e_power_up_phy - restore link in case the phy was powered down 3099 * @adapter: address of board private structure 3100 * 3101 * The phy may be powered down to save power and turn off link when the 3102 * driver is unloaded and wake on lan is not enabled (among others) 3103 * *** this routine MUST be followed by a call to e1000e_reset *** 3104 **/ 3105void e1000e_power_up_phy(struct e1000_adapter *adapter) 3106{ 3107 if (adapter->hw.phy.ops.power_up) 3108 adapter->hw.phy.ops.power_up(&adapter->hw); 3109 3110 adapter->hw.mac.ops.setup_link(&adapter->hw); 3111} 3112 3113/** 3114 * e1000_power_down_phy - Power down the PHY 3115 * 3116 * Power down the PHY so no link is implied when interface is down. 3117 * The PHY cannot be powered down if management or WoL is active. 3118 */ 3119static void e1000_power_down_phy(struct e1000_adapter *adapter) 3120{ 3121 /* WoL is enabled */ 3122 if (adapter->wol) 3123 return; 3124 3125 if (adapter->hw.phy.ops.power_down) 3126 adapter->hw.phy.ops.power_down(&adapter->hw); 3127} 3128 3129/** 3130 * e1000e_reset - bring the hardware into a known good state 3131 * 3132 * This function boots the hardware and enables some settings that 3133 * require a configuration cycle of the hardware - those cannot be 3134 * set/changed during runtime. After reset the device needs to be 3135 * properly configured for Rx, Tx etc. 3136 */ 3137void e1000e_reset(struct e1000_adapter *adapter) 3138{ 3139 struct e1000_mac_info *mac = &adapter->hw.mac; 3140 struct e1000_fc_info *fc = &adapter->hw.fc; 3141 struct e1000_hw *hw = &adapter->hw; 3142 u32 tx_space, min_tx_space, min_rx_space; 3143 u32 pba = adapter->pba; 3144 u16 hwm; 3145 3146 /* reset Packet Buffer Allocation to default */ 3147 ew32(PBA, pba); 3148 3149 if (adapter->max_frame_size > ETH_FRAME_LEN + ETH_FCS_LEN) { 3150 /* 3151 * To maintain wire speed transmits, the Tx FIFO should be 3152 * large enough to accommodate two full transmit packets, 3153 * rounded up to the next 1KB and expressed in KB. Likewise, 3154 * the Rx FIFO should be large enough to accommodate at least 3155 * one full receive packet and is similarly rounded up and 3156 * expressed in KB. 3157 */ 3158 pba = er32(PBA); 3159 /* upper 16 bits has Tx packet buffer allocation size in KB */ 3160 tx_space = pba >> 16; 3161 /* lower 16 bits has Rx packet buffer allocation size in KB */ 3162 pba &= 0xffff; 3163 /* 3164 * the Tx fifo also stores 16 bytes of information about the Tx 3165 * but don't include ethernet FCS because hardware appends it 3166 */ 3167 min_tx_space = (adapter->max_frame_size + 3168 sizeof(struct e1000_tx_desc) - 3169 ETH_FCS_LEN) * 2; 3170 min_tx_space = ALIGN(min_tx_space, 1024); 3171 min_tx_space >>= 10; 3172 /* software strips receive CRC, so leave room for it */ 3173 min_rx_space = adapter->max_frame_size; 3174 min_rx_space = ALIGN(min_rx_space, 1024); 3175 min_rx_space >>= 10; 3176 3177 /* 3178 * If current Tx allocation is less than the min Tx FIFO size, 3179 * and the min Tx FIFO size is less than the current Rx FIFO 3180 * allocation, take space away from current Rx allocation 3181 */ 3182 if ((tx_space < min_tx_space) && 3183 ((min_tx_space - tx_space) < pba)) { 3184 pba -= min_tx_space - tx_space; 3185 3186 /* 3187 * if short on Rx space, Rx wins and must trump Tx 3188 * adjustment or use Early Receive if available 3189 */ 3190 if ((pba < min_rx_space) && 3191 (!(adapter->flags & FLAG_HAS_ERT))) 3192 /* ERT enabled in e1000_configure_rx */ 3193 pba = min_rx_space; 3194 } 3195 3196 ew32(PBA, pba); 3197 } 3198 3199 /* 3200 * flow control settings 3201 * 3202 * The high water mark must be low enough to fit one full frame 3203 * (or the size used for early receive) above it in the Rx FIFO. 3204 * Set it to the lower of: 3205 * - 90% of the Rx FIFO size, and 3206 * - the full Rx FIFO size minus the early receive size (for parts 3207 * with ERT support assuming ERT set to E1000_ERT_2048), or 3208 * - the full Rx FIFO size minus one full frame 3209 */ 3210 if (adapter->flags & FLAG_DISABLE_FC_PAUSE_TIME) 3211 fc->pause_time = 0xFFFF; 3212 else 3213 fc->pause_time = E1000_FC_PAUSE_TIME; 3214 fc->send_xon = 1; 3215 fc->current_mode = fc->requested_mode; 3216 3217 switch (hw->mac.type) { 3218 default: 3219 if ((adapter->flags & FLAG_HAS_ERT) && 3220 (adapter->netdev->mtu > ETH_DATA_LEN)) 3221 hwm = min(((pba << 10) * 9 / 10), 3222 ((pba << 10) - (E1000_ERT_2048 << 3))); 3223 else 3224 hwm = min(((pba << 10) * 9 / 10), 3225 ((pba << 10) - adapter->max_frame_size)); 3226 3227 fc->high_water = hwm & E1000_FCRTH_RTH; /* 8-byte granularity */ 3228 fc->low_water = fc->high_water - 8; 3229 break; 3230 case e1000_pchlan: 3231 /* 3232 * Workaround PCH LOM adapter hangs with certain network 3233 * loads. If hangs persist, try disabling Tx flow control. 3234 */ 3235 if (adapter->netdev->mtu > ETH_DATA_LEN) { 3236 fc->high_water = 0x3500; 3237 fc->low_water = 0x1500; 3238 } else { 3239 fc->high_water = 0x5000; 3240 fc->low_water = 0x3000; 3241 } 3242 fc->refresh_time = 0x1000; 3243 break; 3244 case e1000_pch2lan: 3245 fc->high_water = 0x05C20; 3246 fc->low_water = 0x05048; 3247 fc->pause_time = 0x0650; 3248 fc->refresh_time = 0x0400; 3249 if (adapter->netdev->mtu > ETH_DATA_LEN) { 3250 pba = 14; 3251 ew32(PBA, pba); 3252 } 3253 break; 3254 } 3255 3256 /* 3257 * Disable Adaptive Interrupt Moderation if 2 full packets cannot 3258 * fit in receive buffer and early-receive not supported. 3259 */ 3260 if (adapter->itr_setting & 0x3) { 3261 if (((adapter->max_frame_size * 2) > (pba << 10)) && 3262 !(adapter->flags & FLAG_HAS_ERT)) { 3263 if (!(adapter->flags2 & FLAG2_DISABLE_AIM)) { 3264 dev_info(&adapter->pdev->dev, 3265 "Interrupt Throttle Rate turned off\n"); 3266 adapter->flags2 |= FLAG2_DISABLE_AIM; 3267 ew32(ITR, 0); 3268 } 3269 } else if (adapter->flags2 & FLAG2_DISABLE_AIM) { 3270 dev_info(&adapter->pdev->dev, 3271 "Interrupt Throttle Rate turned on\n"); 3272 adapter->flags2 &= ~FLAG2_DISABLE_AIM; 3273 adapter->itr = 20000; 3274 ew32(ITR, 1000000000 / (adapter->itr * 256)); 3275 } 3276 } 3277 3278 /* Allow time for pending master requests to run */ 3279 mac->ops.reset_hw(hw); 3280 3281 /* 3282 * For parts with AMT enabled, let the firmware know 3283 * that the network interface is in control 3284 */ 3285 if (adapter->flags & FLAG_HAS_AMT) 3286 e1000e_get_hw_control(adapter); 3287 3288 ew32(WUC, 0); 3289 3290 if (mac->ops.init_hw(hw)) 3291 e_err("Hardware Error\n"); 3292 3293 e1000_update_mng_vlan(adapter); 3294 3295 /* Enable h/w to recognize an 802.1Q VLAN Ethernet packet */ 3296 ew32(VET, ETH_P_8021Q); 3297 3298 e1000e_reset_adaptive(hw); 3299 3300 if (!netif_running(adapter->netdev) && 3301 !test_bit(__E1000_TESTING, &adapter->state)) { 3302 e1000_power_down_phy(adapter); 3303 return; 3304 } 3305 3306 e1000_get_phy_info(hw); 3307 3308 if ((adapter->flags & FLAG_HAS_SMART_POWER_DOWN) && 3309 !(adapter->flags & FLAG_SMART_POWER_DOWN)) { 3310 u16 phy_data = 0; 3311 /* 3312 * speed up time to link by disabling smart power down, ignore 3313 * the return value of this function because there is nothing 3314 * different we would do if it failed 3315 */ 3316 e1e_rphy(hw, IGP02E1000_PHY_POWER_MGMT, &phy_data); 3317 phy_data &= ~IGP02E1000_PM_SPD; 3318 e1e_wphy(hw, IGP02E1000_PHY_POWER_MGMT, phy_data); 3319 } 3320} 3321 3322int e1000e_up(struct e1000_adapter *adapter) 3323{ 3324 struct e1000_hw *hw = &adapter->hw; 3325 3326 /* hardware has been reset, we need to reload some things */ 3327 e1000_configure(adapter); 3328 3329 clear_bit(__E1000_DOWN, &adapter->state); 3330 3331 napi_enable(&adapter->napi); 3332 if (adapter->msix_entries) 3333 e1000_configure_msix(adapter); 3334 e1000_irq_enable(adapter); 3335 3336 netif_wake_queue(adapter->netdev); 3337 3338 /* fire a link change interrupt to start the watchdog */ 3339 if (adapter->msix_entries) 3340 ew32(ICS, E1000_ICS_LSC | E1000_ICR_OTHER); 3341 else 3342 ew32(ICS, E1000_ICS_LSC); 3343 3344 return 0; 3345} 3346 3347static void e1000e_flush_descriptors(struct e1000_adapter *adapter) 3348{ 3349 struct e1000_hw *hw = &adapter->hw; 3350 3351 if (!(adapter->flags2 & FLAG2_DMA_BURST)) 3352 return; 3353 3354 /* flush pending descriptor writebacks to memory */ 3355 ew32(TIDV, adapter->tx_int_delay | E1000_TIDV_FPD); 3356 ew32(RDTR, adapter->rx_int_delay | E1000_RDTR_FPD); 3357 3358 /* execute the writes immediately */ 3359 e1e_flush(); 3360} 3361 3362void e1000e_down(struct e1000_adapter *adapter) 3363{ 3364 struct net_device *netdev = adapter->netdev; 3365 struct e1000_hw *hw = &adapter->hw; 3366 u32 tctl, rctl; 3367 3368 /* 3369 * signal that we're down so the interrupt handler does not 3370 * reschedule our watchdog timer 3371 */ 3372 set_bit(__E1000_DOWN, &adapter->state); 3373 3374 /* disable receives in the hardware */ 3375 rctl = er32(RCTL); 3376 ew32(RCTL, rctl & ~E1000_RCTL_EN); 3377 /* flush and sleep below */ 3378 3379 netif_stop_queue(netdev); 3380 3381 /* disable transmits in the hardware */ 3382 tctl = er32(TCTL); 3383 tctl &= ~E1000_TCTL_EN; 3384 ew32(TCTL, tctl); 3385 /* flush both disables and wait for them to finish */ 3386 e1e_flush(); 3387 msleep(10); 3388 3389 napi_disable(&adapter->napi); 3390 e1000_irq_disable(adapter); 3391 3392 del_timer_sync(&adapter->watchdog_timer); 3393 del_timer_sync(&adapter->phy_info_timer); 3394 3395 netif_carrier_off(netdev); 3396 adapter->link_speed = 0; 3397 adapter->link_duplex = 0; 3398 3399 if (!pci_channel_offline(adapter->pdev)) 3400 e1000e_reset(adapter); 3401 3402 e1000e_flush_descriptors(adapter); 3403 3404 e1000_clean_tx_ring(adapter); 3405 e1000_clean_rx_ring(adapter); 3406 3407 /* 3408 * TODO: for power management, we could drop the link and 3409 * pci_disable_device here. 3410 */ 3411} 3412 3413void e1000e_reinit_locked(struct e1000_adapter *adapter) 3414{ 3415 might_sleep(); 3416 while (test_and_set_bit(__E1000_RESETTING, &adapter->state)) 3417 msleep(1); 3418 e1000e_down(adapter); 3419 e1000e_up(adapter); 3420 clear_bit(__E1000_RESETTING, &adapter->state); 3421} 3422 3423/** 3424 * e1000_sw_init - Initialize general software structures (struct e1000_adapter) 3425 * @adapter: board private structure to initialize 3426 * 3427 * e1000_sw_init initializes the Adapter private data structure. 3428 * Fields are initialized based on PCI device information and 3429 * OS network device settings (MTU size). 3430 **/ 3431static int __devinit e1000_sw_init(struct e1000_adapter *adapter) 3432{ 3433 struct net_device *netdev = adapter->netdev; 3434 3435 adapter->rx_buffer_len = ETH_FRAME_LEN + VLAN_HLEN + ETH_FCS_LEN; 3436 adapter->rx_ps_bsize0 = 128; 3437 adapter->max_frame_size = netdev->mtu + ETH_HLEN + ETH_FCS_LEN; 3438 adapter->min_frame_size = ETH_ZLEN + ETH_FCS_LEN; 3439 3440 e1000e_set_interrupt_capability(adapter); 3441 3442 if (e1000_alloc_queues(adapter)) 3443 return -ENOMEM; 3444 3445 /* Explicitly disable IRQ since the NIC can be in any state. */ 3446 e1000_irq_disable(adapter); 3447 3448 set_bit(__E1000_DOWN, &adapter->state); 3449 return 0; 3450} 3451 3452/** 3453 * e1000_intr_msi_test - Interrupt Handler 3454 * @irq: interrupt number 3455 * @data: pointer to a network interface device structure 3456 **/ 3457static irqreturn_t e1000_intr_msi_test(int irq, void *data) 3458{ 3459 struct net_device *netdev = data; 3460 struct e1000_adapter *adapter = netdev_priv(netdev); 3461 struct e1000_hw *hw = &adapter->hw; 3462 u32 icr = er32(ICR); 3463 3464 e_dbg("icr is %08X\n", icr); 3465 if (icr & E1000_ICR_RXSEQ) { 3466 adapter->flags &= ~FLAG_MSI_TEST_FAILED; 3467 wmb(); 3468 } 3469 3470 return IRQ_HANDLED; 3471} 3472 3473/** 3474 * e1000_test_msi_interrupt - Returns 0 for successful test 3475 * @adapter: board private struct 3476 * 3477 * code flow taken from tg3.c 3478 **/ 3479static int e1000_test_msi_interrupt(struct e1000_adapter *adapter) 3480{ 3481 struct net_device *netdev = adapter->netdev; 3482 struct e1000_hw *hw = &adapter->hw; 3483 int err; 3484 3485 /* poll_enable hasn't been called yet, so don't need disable */ 3486 /* clear any pending events */ 3487 er32(ICR); 3488 3489 /* free the real vector and request a test handler */ 3490 e1000_free_irq(adapter); 3491 e1000e_reset_interrupt_capability(adapter); 3492 3493 /* Assume that the test fails, if it succeeds then the test 3494 * MSI irq handler will unset this flag */ 3495 adapter->flags |= FLAG_MSI_TEST_FAILED; 3496 3497 err = pci_enable_msi(adapter->pdev); 3498 if (err) 3499 goto msi_test_failed; 3500 3501 err = request_irq(adapter->pdev->irq, e1000_intr_msi_test, 0, 3502 netdev->name, netdev); 3503 if (err) { 3504 pci_disable_msi(adapter->pdev); 3505 goto msi_test_failed; 3506 } 3507 3508 wmb(); 3509 3510 e1000_irq_enable(adapter); 3511 3512 /* fire an unusual interrupt on the test handler */ 3513 ew32(ICS, E1000_ICS_RXSEQ); 3514 e1e_flush(); 3515 msleep(50); 3516 3517 e1000_irq_disable(adapter); 3518 3519 rmb(); 3520 3521 if (adapter->flags & FLAG_MSI_TEST_FAILED) { 3522 adapter->int_mode = E1000E_INT_MODE_LEGACY; 3523 e_info("MSI interrupt test failed, using legacy interrupt.\n"); 3524 } else 3525 e_dbg("MSI interrupt test succeeded!\n"); 3526 3527 free_irq(adapter->pdev->irq, netdev); 3528 pci_disable_msi(adapter->pdev); 3529 3530msi_test_failed: 3531 e1000e_set_interrupt_capability(adapter); 3532 return e1000_request_irq(adapter); 3533} 3534 3535/** 3536 * e1000_test_msi - Returns 0 if MSI test succeeds or INTx mode is restored 3537 * @adapter: board private struct 3538 * 3539 * code flow taken from tg3.c, called with e1000 interrupts disabled. 3540 **/ 3541static int e1000_test_msi(struct e1000_adapter *adapter) 3542{ 3543 int err; 3544 u16 pci_cmd; 3545 3546 if (!(adapter->flags & FLAG_MSI_ENABLED)) 3547 return 0; 3548 3549 /* disable SERR in case the MSI write causes a master abort */ 3550 pci_read_config_word(adapter->pdev, PCI_COMMAND, &pci_cmd); 3551 if (pci_cmd & PCI_COMMAND_SERR) 3552 pci_write_config_word(adapter->pdev, PCI_COMMAND, 3553 pci_cmd & ~PCI_COMMAND_SERR); 3554 3555 err = e1000_test_msi_interrupt(adapter); 3556 3557 /* re-enable SERR */ 3558 if (pci_cmd & PCI_COMMAND_SERR) { 3559 pci_read_config_word(adapter->pdev, PCI_COMMAND, &pci_cmd); 3560 pci_cmd |= PCI_COMMAND_SERR; 3561 pci_write_config_word(adapter->pdev, PCI_COMMAND, pci_cmd); 3562 } 3563 3564 return err; 3565} 3566 3567/** 3568 * e1000_open - Called when a network interface is made active 3569 * @netdev: network interface device structure 3570 * 3571 * Returns 0 on success, negative value on failure 3572 * 3573 * The open entry point is called when a network interface is made 3574 * active by the system (IFF_UP). At this point all resources needed 3575 * for transmit and receive operations are allocated, the interrupt 3576 * handler is registered with the OS, the watchdog timer is started, 3577 * and the stack is notified that the interface is ready. 3578 **/ 3579static int e1000_open(struct net_device *netdev) 3580{ 3581 struct e1000_adapter *adapter = netdev_priv(netdev); 3582 struct e1000_hw *hw = &adapter->hw; 3583 struct pci_dev *pdev = adapter->pdev; 3584 int err; 3585 3586 /* disallow open during test */ 3587 if (test_bit(__E1000_TESTING, &adapter->state)) 3588 return -EBUSY; 3589 3590 pm_runtime_get_sync(&pdev->dev); 3591 3592 netif_carrier_off(netdev); 3593 3594 /* allocate transmit descriptors */ 3595 err = e1000e_setup_tx_resources(adapter); 3596 if (err) 3597 goto err_setup_tx; 3598 3599 /* allocate receive descriptors */ 3600 err = e1000e_setup_rx_resources(adapter); 3601 if (err) 3602 goto err_setup_rx; 3603 3604 /* 3605 * If AMT is enabled, let the firmware know that the network 3606 * interface is now open and reset the part to a known state. 3607 */ 3608 if (adapter->flags & FLAG_HAS_AMT) { 3609 e1000e_get_hw_control(adapter); 3610 e1000e_reset(adapter); 3611 } 3612 3613 e1000e_power_up_phy(adapter); 3614 3615 adapter->mng_vlan_id = E1000_MNG_VLAN_NONE; 3616 if ((adapter->hw.mng_cookie.status & 3617 E1000_MNG_DHCP_COOKIE_STATUS_VLAN)) 3618 e1000_update_mng_vlan(adapter); 3619 3620 /* DMA latency requirement to workaround early-receive/jumbo issue */ 3621 if ((adapter->flags & FLAG_HAS_ERT) || 3622 (adapter->hw.mac.type == e1000_pch2lan)) 3623 pm_qos_add_request(&adapter->netdev->pm_qos_req, 3624 PM_QOS_CPU_DMA_LATENCY, 3625 PM_QOS_DEFAULT_VALUE); 3626 3627 /* 3628 * before we allocate an interrupt, we must be ready to handle it. 3629 * Setting DEBUG_SHIRQ in the kernel makes it fire an interrupt 3630 * as soon as we call pci_request_irq, so we have to setup our 3631 * clean_rx handler before we do so. 3632 */ 3633 e1000_configure(adapter); 3634 3635 err = e1000_request_irq(adapter); 3636 if (err) 3637 goto err_req_irq; 3638 3639 /* 3640 * Work around PCIe errata with MSI interrupts causing some chipsets to 3641 * ignore e1000e MSI messages, which means we need to test our MSI 3642 * interrupt now 3643 */ 3644 if (adapter->int_mode != E1000E_INT_MODE_LEGACY) { 3645 err = e1000_test_msi(adapter); 3646 if (err) { 3647 e_err("Interrupt allocation failed\n"); 3648 goto err_req_irq; 3649 } 3650 } 3651 3652 /* From here on the code is the same as e1000e_up() */ 3653 clear_bit(__E1000_DOWN, &adapter->state); 3654 3655 napi_enable(&adapter->napi); 3656 3657 e1000_irq_enable(adapter); 3658 3659 netif_start_queue(netdev); 3660 3661 adapter->idle_check = true; 3662 pm_runtime_put(&pdev->dev); 3663 3664 /* fire a link status change interrupt to start the watchdog */ 3665 if (adapter->msix_entries) 3666 ew32(ICS, E1000_ICS_LSC | E1000_ICR_OTHER); 3667 else 3668 ew32(ICS, E1000_ICS_LSC); 3669 3670 return 0; 3671 3672err_req_irq: 3673 e1000e_release_hw_control(adapter); 3674 e1000_power_down_phy(adapter); 3675 e1000e_free_rx_resources(adapter); 3676err_setup_rx: 3677 e1000e_free_tx_resources(adapter); 3678err_setup_tx: 3679 e1000e_reset(adapter); 3680 pm_runtime_put_sync(&pdev->dev); 3681 3682 return err; 3683} 3684 3685/** 3686 * e1000_close - Disables a network interface 3687 * @netdev: network interface device structure 3688 * 3689 * Returns 0, this is not allowed to fail 3690 * 3691 * The close entry point is called when an interface is de-activated 3692 * by the OS. The hardware is still under the drivers control, but 3693 * needs to be disabled. A global MAC reset is issued to stop the 3694 * hardware, and all transmit and receive resources are freed. 3695 **/ 3696static int e1000_close(struct net_device *netdev) 3697{ 3698 struct e1000_adapter *adapter = netdev_priv(netdev); 3699 struct pci_dev *pdev = adapter->pdev; 3700 3701 WARN_ON(test_bit(__E1000_RESETTING, &adapter->state)); 3702 3703 pm_runtime_get_sync(&pdev->dev); 3704 3705 if (!test_bit(__E1000_DOWN, &adapter->state)) { 3706 e1000e_down(adapter); 3707 e1000_free_irq(adapter); 3708 } 3709 e1000_power_down_phy(adapter); 3710 3711 e1000e_free_tx_resources(adapter); 3712 e1000e_free_rx_resources(adapter); 3713 3714 /* 3715 * kill manageability vlan ID if supported, but not if a vlan with 3716 * the same ID is registered on the host OS (let 8021q kill it) 3717 */ 3718 if ((adapter->hw.mng_cookie.status & 3719 E1000_MNG_DHCP_COOKIE_STATUS_VLAN) && 3720 !(adapter->vlgrp && 3721 vlan_group_get_device(adapter->vlgrp, adapter->mng_vlan_id))) 3722 e1000_vlan_rx_kill_vid(netdev, adapter->mng_vlan_id); 3723 3724 /* 3725 * If AMT is enabled, let the firmware know that the network 3726 * interface is now closed 3727 */ 3728 if ((adapter->flags & FLAG_HAS_AMT) && 3729 !test_bit(__E1000_TESTING, &adapter->state)) 3730 e1000e_release_hw_control(adapter); 3731 3732 if ((adapter->flags & FLAG_HAS_ERT) || 3733 (adapter->hw.mac.type == e1000_pch2lan)) 3734 pm_qos_remove_request(&adapter->netdev->pm_qos_req); 3735 3736 pm_runtime_put_sync(&pdev->dev); 3737 3738 return 0; 3739} 3740/** 3741 * e1000_set_mac - Change the Ethernet Address of the NIC 3742 * @netdev: network interface device structure 3743 * @p: pointer to an address structure 3744 * 3745 * Returns 0 on success, negative on failure 3746 **/ 3747static int e1000_set_mac(struct net_device *netdev, void *p) 3748{ 3749 struct e1000_adapter *adapter = netdev_priv(netdev); 3750 struct sockaddr *addr = p; 3751 3752 if (!is_valid_ether_addr(addr->sa_data)) 3753 return -EADDRNOTAVAIL; 3754 3755 memcpy(netdev->dev_addr, addr->sa_data, netdev->addr_len); 3756 memcpy(adapter->hw.mac.addr, addr->sa_data, netdev->addr_len); 3757 3758 e1000e_rar_set(&adapter->hw, adapter->hw.mac.addr, 0); 3759 3760 if (adapter->flags & FLAG_RESET_OVERWRITES_LAA) { 3761 /* activate the work around */ 3762 e1000e_set_laa_state_82571(&adapter->hw, 1); 3763 3764 /* 3765 * Hold a copy of the LAA in RAR[14] This is done so that 3766 * between the time RAR[0] gets clobbered and the time it 3767 * gets fixed (in e1000_watchdog), the actual LAA is in one 3768 * of the RARs and no incoming packets directed to this port 3769 * are dropped. Eventually the LAA will be in RAR[0] and 3770 * RAR[14] 3771 */ 3772 e1000e_rar_set(&adapter->hw, 3773 adapter->hw.mac.addr, 3774 adapter->hw.mac.rar_entry_count - 1); 3775 } 3776 3777 return 0; 3778} 3779 3780/** 3781 * e1000e_update_phy_task - work thread to update phy 3782 * @work: pointer to our work struct 3783 * 3784 * this worker thread exists because we must acquire a 3785 * semaphore to read the phy, which we could msleep while 3786 * waiting for it, and we can't msleep in a timer. 3787 **/ 3788static void e1000e_update_phy_task(struct work_struct *work) 3789{ 3790 struct e1000_adapter *adapter = container_of(work, 3791 struct e1000_adapter, update_phy_task); 3792 3793 if (test_bit(__E1000_DOWN, &adapter->state)) 3794 return; 3795 3796 e1000_get_phy_info(&adapter->hw); 3797} 3798 3799/* 3800 * Need to wait a few seconds after link up to get diagnostic information from 3801 * the phy 3802 */ 3803static void e1000_update_phy_info(unsigned long data) 3804{ 3805 struct e1000_adapter *adapter = (struct e1000_adapter *) data; 3806 3807 if (test_bit(__E1000_DOWN, &adapter->state)) 3808 return; 3809 3810 schedule_work(&adapter->update_phy_task); 3811} 3812 3813/** 3814 * e1000e_update_phy_stats - Update the PHY statistics counters 3815 * @adapter: board private structure 3816 **/ 3817static void e1000e_update_phy_stats(struct e1000_adapter *adapter) 3818{ 3819 struct e1000_hw *hw = &adapter->hw; 3820 s32 ret_val; 3821 u16 phy_data; 3822 3823 ret_val = hw->phy.ops.acquire(hw); 3824 if (ret_val) 3825 return; 3826 3827 hw->phy.addr = 1; 3828 3829#define HV_PHY_STATS_PAGE 778 3830 /* 3831 * A page set is expensive so check if already on desired page. 3832 * If not, set to the page with the PHY status registers. 3833 */ 3834 ret_val = e1000e_read_phy_reg_mdic(hw, IGP01E1000_PHY_PAGE_SELECT, 3835 &phy_data); 3836 if (ret_val) 3837 goto release; 3838 if (phy_data != (HV_PHY_STATS_PAGE << IGP_PAGE_SHIFT)) { 3839 ret_val = e1000e_write_phy_reg_mdic(hw, 3840 IGP01E1000_PHY_PAGE_SELECT, 3841 (HV_PHY_STATS_PAGE << 3842 IGP_PAGE_SHIFT)); 3843 if (ret_val) 3844 goto release; 3845 } 3846 3847 /* Read/clear the upper 16-bit registers and read/accumulate lower */ 3848 3849 /* Single Collision Count */ 3850 e1000e_read_phy_reg_mdic(hw, HV_SCC_UPPER & MAX_PHY_REG_ADDRESS, 3851 &phy_data); 3852 ret_val = e1000e_read_phy_reg_mdic(hw, 3853 HV_SCC_LOWER & MAX_PHY_REG_ADDRESS, 3854 &phy_data); 3855 if (!ret_val) 3856 adapter->stats.scc += phy_data; 3857 3858 /* Excessive Collision Count */ 3859 e1000e_read_phy_reg_mdic(hw, HV_ECOL_UPPER & MAX_PHY_REG_ADDRESS, 3860 &phy_data); 3861 ret_val = e1000e_read_phy_reg_mdic(hw, 3862 HV_ECOL_LOWER & MAX_PHY_REG_ADDRESS, 3863 &phy_data); 3864 if (!ret_val) 3865 adapter->stats.ecol += phy_data; 3866 3867 /* Multiple Collision Count */ 3868 e1000e_read_phy_reg_mdic(hw, HV_MCC_UPPER & MAX_PHY_REG_ADDRESS, 3869 &phy_data); 3870 ret_val = e1000e_read_phy_reg_mdic(hw, 3871 HV_MCC_LOWER & MAX_PHY_REG_ADDRESS, 3872 &phy_data); 3873 if (!ret_val) 3874 adapter->stats.mcc += phy_data; 3875 3876 /* Late Collision Count */ 3877 e1000e_read_phy_reg_mdic(hw, HV_LATECOL_UPPER & MAX_PHY_REG_ADDRESS, 3878 &phy_data); 3879 ret_val = e1000e_read_phy_reg_mdic(hw, 3880 HV_LATECOL_LOWER & 3881 MAX_PHY_REG_ADDRESS, 3882 &phy_data); 3883 if (!ret_val) 3884 adapter->stats.latecol += phy_data; 3885 3886 /* Collision Count - also used for adaptive IFS */ 3887 e1000e_read_phy_reg_mdic(hw, HV_COLC_UPPER & MAX_PHY_REG_ADDRESS, 3888 &phy_data); 3889 ret_val = e1000e_read_phy_reg_mdic(hw, 3890 HV_COLC_LOWER & MAX_PHY_REG_ADDRESS, 3891 &phy_data); 3892 if (!ret_val) 3893 hw->mac.collision_delta = phy_data; 3894 3895 /* Defer Count */ 3896 e1000e_read_phy_reg_mdic(hw, HV_DC_UPPER & MAX_PHY_REG_ADDRESS, 3897 &phy_data); 3898 ret_val = e1000e_read_phy_reg_mdic(hw, 3899 HV_DC_LOWER & MAX_PHY_REG_ADDRESS, 3900 &phy_data); 3901 if (!ret_val) 3902 adapter->stats.dc += phy_data; 3903 3904 /* Transmit with no CRS */ 3905 e1000e_read_phy_reg_mdic(hw, HV_TNCRS_UPPER & MAX_PHY_REG_ADDRESS, 3906 &phy_data); 3907 ret_val = e1000e_read_phy_reg_mdic(hw, 3908 HV_TNCRS_LOWER & MAX_PHY_REG_ADDRESS, 3909 &phy_data); 3910 if (!ret_val) 3911 adapter->stats.tncrs += phy_data; 3912 3913release: 3914 hw->phy.ops.release(hw); 3915} 3916 3917/** 3918 * e1000e_update_stats - Update the board statistics counters 3919 * @adapter: board private structure 3920 **/ 3921void e1000e_update_stats(struct e1000_adapter *adapter) 3922{ 3923 struct net_device *netdev = adapter->netdev; 3924 struct e1000_hw *hw = &adapter->hw; 3925 struct pci_dev *pdev = adapter->pdev; 3926 3927 /* 3928 * Prevent stats update while adapter is being reset, or if the pci 3929 * connection is down. 3930 */ 3931 if (adapter->link_speed == 0) 3932 return; 3933 if (pci_channel_offline(pdev)) 3934 return; 3935 3936 adapter->stats.crcerrs += er32(CRCERRS); 3937 adapter->stats.gprc += er32(GPRC); 3938 adapter->stats.gorc += er32(GORCL); 3939 er32(GORCH); /* Clear gorc */ 3940 adapter->stats.bprc += er32(BPRC); 3941 adapter->stats.mprc += er32(MPRC); 3942 adapter->stats.roc += er32(ROC); 3943 3944 adapter->stats.mpc += er32(MPC); 3945 3946 /* Half-duplex statistics */ 3947 if (adapter->link_duplex == HALF_DUPLEX) { 3948 if (adapter->flags2 & FLAG2_HAS_PHY_STATS) { 3949 e1000e_update_phy_stats(adapter); 3950 } else { 3951 adapter->stats.scc += er32(SCC); 3952 adapter->stats.ecol += er32(ECOL); 3953 adapter->stats.mcc += er32(MCC); 3954 adapter->stats.latecol += er32(LATECOL); 3955 adapter->stats.dc += er32(DC); 3956 3957 hw->mac.collision_delta = er32(COLC); 3958 3959 if ((hw->mac.type != e1000_82574) && 3960 (hw->mac.type != e1000_82583)) 3961 adapter->stats.tncrs += er32(TNCRS); 3962 } 3963 adapter->stats.colc += hw->mac.collision_delta; 3964 } 3965 3966 adapter->stats.xonrxc += er32(XONRXC); 3967 adapter->stats.xontxc += er32(XONTXC); 3968 adapter->stats.xoffrxc += er32(XOFFRXC); 3969 adapter->stats.xofftxc += er32(XOFFTXC); 3970 adapter->stats.gptc += er32(GPTC); 3971 adapter->stats.gotc += er32(GOTCL); 3972 er32(GOTCH); /* Clear gotc */ 3973 adapter->stats.rnbc += er32(RNBC); 3974 adapter->stats.ruc += er32(RUC); 3975 3976 adapter->stats.mptc += er32(MPTC); 3977 adapter->stats.bptc += er32(BPTC); 3978 3979 /* used for adaptive IFS */ 3980 3981 hw->mac.tx_packet_delta = er32(TPT); 3982 adapter->stats.tpt += hw->mac.tx_packet_delta; 3983 3984 adapter->stats.algnerrc += er32(ALGNERRC); 3985 adapter->stats.rxerrc += er32(RXERRC); 3986 adapter->stats.cexterr += er32(CEXTERR); 3987 adapter->stats.tsctc += er32(TSCTC); 3988 adapter->stats.tsctfc += er32(TSCTFC); 3989 3990 /* Fill out the OS statistics structure */ 3991 netdev->stats.multicast = adapter->stats.mprc; 3992 netdev->stats.collisions = adapter->stats.colc; 3993 3994 /* Rx Errors */ 3995 3996 /* 3997 * RLEC on some newer hardware can be incorrect so build 3998 * our own version based on RUC and ROC 3999 */ 4000 netdev->stats.rx_errors = adapter->stats.rxerrc + 4001 adapter->stats.crcerrs + adapter->stats.algnerrc + 4002 adapter->stats.ruc + adapter->stats.roc + 4003 adapter->stats.cexterr; 4004 netdev->stats.rx_length_errors = adapter->stats.ruc + 4005 adapter->stats.roc; 4006 netdev->stats.rx_crc_errors = adapter->stats.crcerrs; 4007 netdev->stats.rx_frame_errors = adapter->stats.algnerrc; 4008 netdev->stats.rx_missed_errors = adapter->stats.mpc; 4009 4010 /* Tx Errors */ 4011 netdev->stats.tx_errors = adapter->stats.ecol + 4012 adapter->stats.latecol; 4013 netdev->stats.tx_aborted_errors = adapter->stats.ecol; 4014 netdev->stats.tx_window_errors = adapter->stats.latecol; 4015 netdev->stats.tx_carrier_errors = adapter->stats.tncrs; 4016 4017 /* Tx Dropped needs to be maintained elsewhere */ 4018 4019 /* Management Stats */ 4020 adapter->stats.mgptc += er32(MGTPTC); 4021 adapter->stats.mgprc += er32(MGTPRC); 4022 adapter->stats.mgpdc += er32(MGTPDC); 4023} 4024 4025/** 4026 * e1000_phy_read_status - Update the PHY register status snapshot 4027 * @adapter: board private structure 4028 **/ 4029static void e1000_phy_read_status(struct e1000_adapter *adapter) 4030{ 4031 struct e1000_hw *hw = &adapter->hw; 4032 struct e1000_phy_regs *phy = &adapter->phy_regs; 4033 int ret_val; 4034 4035 if ((er32(STATUS) & E1000_STATUS_LU) && 4036 (adapter->hw.phy.media_type == e1000_media_type_copper)) { 4037 ret_val = e1e_rphy(hw, PHY_CONTROL, &phy->bmcr); 4038 ret_val |= e1e_rphy(hw, PHY_STATUS, &phy->bmsr); 4039 ret_val |= e1e_rphy(hw, PHY_AUTONEG_ADV, &phy->advertise); 4040 ret_val |= e1e_rphy(hw, PHY_LP_ABILITY, &phy->lpa); 4041 ret_val |= e1e_rphy(hw, PHY_AUTONEG_EXP, &phy->expansion); 4042 ret_val |= e1e_rphy(hw, PHY_1000T_CTRL, &phy->ctrl1000); 4043 ret_val |= e1e_rphy(hw, PHY_1000T_STATUS, &phy->stat1000); 4044 ret_val |= e1e_rphy(hw, PHY_EXT_STATUS, &phy->estatus); 4045 if (ret_val) 4046 e_warn("Error reading PHY register\n"); 4047 } else { 4048 /* 4049 * Do not read PHY registers if link is not up 4050 * Set values to typical power-on defaults 4051 */ 4052 phy->bmcr = (BMCR_SPEED1000 | BMCR_ANENABLE | BMCR_FULLDPLX); 4053 phy->bmsr = (BMSR_100FULL | BMSR_100HALF | BMSR_10FULL | 4054 BMSR_10HALF | BMSR_ESTATEN | BMSR_ANEGCAPABLE | 4055 BMSR_ERCAP); 4056 phy->advertise = (ADVERTISE_PAUSE_ASYM | ADVERTISE_PAUSE_CAP | 4057 ADVERTISE_ALL | ADVERTISE_CSMA); 4058 phy->lpa = 0; 4059 phy->expansion = EXPANSION_ENABLENPAGE; 4060 phy->ctrl1000 = ADVERTISE_1000FULL; 4061 phy->stat1000 = 0; 4062 phy->estatus = (ESTATUS_1000_TFULL | ESTATUS_1000_THALF); 4063 } 4064} 4065 4066static void e1000_print_link_info(struct e1000_adapter *adapter) 4067{ 4068 struct e1000_hw *hw = &adapter->hw; 4069 u32 ctrl = er32(CTRL); 4070 4071 /* Link status message must follow this format for user tools */ 4072 printk(KERN_INFO "e1000e: %s NIC Link is Up %d Mbps %s, " 4073 "Flow Control: %s\n", 4074 adapter->netdev->name, 4075 adapter->link_speed, 4076 (adapter->link_duplex == FULL_DUPLEX) ? 4077 "Full Duplex" : "Half Duplex", 4078 ((ctrl & E1000_CTRL_TFCE) && (ctrl & E1000_CTRL_RFCE)) ? 4079 "Rx/Tx" : 4080 ((ctrl & E1000_CTRL_RFCE) ? "Rx" : 4081 ((ctrl & E1000_CTRL_TFCE) ? "Tx" : "None"))); 4082} 4083 4084static bool e1000e_has_link(struct e1000_adapter *adapter) 4085{ 4086 struct e1000_hw *hw = &adapter->hw; 4087 bool link_active = 0; 4088 s32 ret_val = 0; 4089 4090 /* 4091 * get_link_status is set on LSC (link status) interrupt or 4092 * Rx sequence error interrupt. get_link_status will stay 4093 * false until the check_for_link establishes link 4094 * for copper adapters ONLY 4095 */ 4096 switch (hw->phy.media_type) { 4097 case e1000_media_type_copper: 4098 if (hw->mac.get_link_status) { 4099 ret_val = hw->mac.ops.check_for_link(hw); 4100 link_active = !hw->mac.get_link_status; 4101 } else { 4102 link_active = 1; 4103 } 4104 break; 4105 case e1000_media_type_fiber: 4106 ret_val = hw->mac.ops.check_for_link(hw); 4107 link_active = !!(er32(STATUS) & E1000_STATUS_LU); 4108 break; 4109 case e1000_media_type_internal_serdes: 4110 ret_val = hw->mac.ops.check_for_link(hw); 4111 link_active = adapter->hw.mac.serdes_has_link; 4112 break; 4113 default: 4114 case e1000_media_type_unknown: 4115 break; 4116 } 4117 4118 if ((ret_val == E1000_ERR_PHY) && (hw->phy.type == e1000_phy_igp_3) && 4119 (er32(CTRL) & E1000_PHY_CTRL_GBE_DISABLE)) { 4120 /* See e1000_kmrn_lock_loss_workaround_ich8lan() */ 4121 e_info("Gigabit has been disabled, downgrading speed\n"); 4122 } 4123 4124 return link_active; 4125} 4126 4127static void e1000e_enable_receives(struct e1000_adapter *adapter) 4128{ 4129 /* make sure the receive unit is started */ 4130 if ((adapter->flags & FLAG_RX_NEEDS_RESTART) && 4131 (adapter->flags & FLAG_RX_RESTART_NOW)) { 4132 struct e1000_hw *hw = &adapter->hw; 4133 u32 rctl = er32(RCTL); 4134 ew32(RCTL, rctl | E1000_RCTL_EN); 4135 adapter->flags &= ~FLAG_RX_RESTART_NOW; 4136 } 4137} 4138 4139static void e1000e_check_82574_phy_workaround(struct e1000_adapter *adapter) 4140{ 4141 struct e1000_hw *hw = &adapter->hw; 4142 4143 /* 4144 * With 82574 controllers, PHY needs to be checked periodically 4145 * for hung state and reset, if two calls return true 4146 */ 4147 if (e1000_check_phy_82574(hw)) 4148 adapter->phy_hang_count++; 4149 else 4150 adapter->phy_hang_count = 0; 4151 4152 if (adapter->phy_hang_count > 1) { 4153 adapter->phy_hang_count = 0; 4154 schedule_work(&adapter->reset_task); 4155 } 4156} 4157 4158/** 4159 * e1000_watchdog - Timer Call-back 4160 * @data: pointer to adapter cast into an unsigned long 4161 **/ 4162static void e1000_watchdog(unsigned long data) 4163{ 4164 struct e1000_adapter *adapter = (struct e1000_adapter *) data; 4165 4166 /* Do the rest outside of interrupt context */ 4167 schedule_work(&adapter->watchdog_task); 4168 4169 /* TODO: make this use queue_delayed_work() */ 4170} 4171 4172static void e1000_watchdog_task(struct work_struct *work) 4173{ 4174 struct e1000_adapter *adapter = container_of(work, 4175 struct e1000_adapter, watchdog_task); 4176 struct net_device *netdev = adapter->netdev; 4177 struct e1000_mac_info *mac = &adapter->hw.mac; 4178 struct e1000_phy_info *phy = &adapter->hw.phy; 4179 struct e1000_ring *tx_ring = adapter->tx_ring; 4180 struct e1000_hw *hw = &adapter->hw; 4181 u32 link, tctl; 4182 int tx_pending = 0; 4183 4184 if (test_bit(__E1000_DOWN, &adapter->state)) 4185 return; 4186 4187 link = e1000e_has_link(adapter); 4188 if ((netif_carrier_ok(netdev)) && link) { 4189 /* Cancel scheduled suspend requests. */ 4190 pm_runtime_resume(netdev->dev.parent); 4191 4192 e1000e_enable_receives(adapter); 4193 goto link_up; 4194 } 4195 4196 if ((e1000e_enable_tx_pkt_filtering(hw)) && 4197 (adapter->mng_vlan_id != adapter->hw.mng_cookie.vlan_id)) 4198 e1000_update_mng_vlan(adapter); 4199 4200 if (link) { 4201 if (!netif_carrier_ok(netdev)) { 4202 bool txb2b = 1; 4203 4204 /* Cancel scheduled suspend requests. */ 4205 pm_runtime_resume(netdev->dev.parent); 4206 4207 /* update snapshot of PHY registers on LSC */ 4208 e1000_phy_read_status(adapter); 4209 mac->ops.get_link_up_info(&adapter->hw, 4210 &adapter->link_speed, 4211 &adapter->link_duplex); 4212 e1000_print_link_info(adapter); 4213 /* 4214 * On supported PHYs, check for duplex mismatch only 4215 * if link has autonegotiated at 10/100 half 4216 */ 4217 if ((hw->phy.type == e1000_phy_igp_3 || 4218 hw->phy.type == e1000_phy_bm) && 4219 (hw->mac.autoneg == true) && 4220 (adapter->link_speed == SPEED_10 || 4221 adapter->link_speed == SPEED_100) && 4222 (adapter->link_duplex == HALF_DUPLEX)) { 4223 u16 autoneg_exp; 4224 4225 e1e_rphy(hw, PHY_AUTONEG_EXP, &autoneg_exp); 4226 4227 if (!(autoneg_exp & NWAY_ER_LP_NWAY_CAPS)) 4228 e_info("Autonegotiated half duplex but" 4229 " link partner cannot autoneg. " 4230 " Try forcing full duplex if " 4231 "link gets many collisions.\n"); 4232 } 4233 4234 /* adjust timeout factor according to speed/duplex */ 4235 adapter->tx_timeout_factor = 1; 4236 switch (adapter->link_speed) { 4237 case SPEED_10: 4238 txb2b = 0; 4239 adapter->tx_timeout_factor = 16; 4240 break; 4241 case SPEED_100: 4242 txb2b = 0; 4243 adapter->tx_timeout_factor = 10; 4244 break; 4245 } 4246 4247 /* 4248 * workaround: re-program speed mode bit after 4249 * link-up event 4250 */ 4251 if ((adapter->flags & FLAG_TARC_SPEED_MODE_BIT) && 4252 !txb2b) { 4253 u32 tarc0; 4254 tarc0 = er32(TARC(0)); 4255 tarc0 &= ~SPEED_MODE_BIT; 4256 ew32(TARC(0), tarc0); 4257 } 4258 4259 /* 4260 * disable TSO for pcie and 10/100 speeds, to avoid 4261 * some hardware issues 4262 */ 4263 if (!(adapter->flags & FLAG_TSO_FORCE)) { 4264 switch (adapter->link_speed) { 4265 case SPEED_10: 4266 case SPEED_100: 4267 e_info("10/100 speed: disabling TSO\n"); 4268 netdev->features &= ~NETIF_F_TSO; 4269 netdev->features &= ~NETIF_F_TSO6; 4270 break; 4271 case SPEED_1000: 4272 netdev->features |= NETIF_F_TSO; 4273 netdev->features |= NETIF_F_TSO6; 4274 break; 4275 default: 4276 /* oops */ 4277 break; 4278 } 4279 } 4280 4281 /* 4282 * enable transmits in the hardware, need to do this 4283 * after setting TARC(0) 4284 */ 4285 tctl = er32(TCTL); 4286 tctl |= E1000_TCTL_EN; 4287 ew32(TCTL, tctl); 4288 4289 /* 4290 * Perform any post-link-up configuration before 4291 * reporting link up. 4292 */ 4293 if (phy->ops.cfg_on_link_up) 4294 phy->ops.cfg_on_link_up(hw); 4295 4296 netif_carrier_on(netdev); 4297 4298 if (!test_bit(__E1000_DOWN, &adapter->state)) 4299 mod_timer(&adapter->phy_info_timer, 4300 round_jiffies(jiffies + 2 * HZ)); 4301 } 4302 } else { 4303 if (netif_carrier_ok(netdev)) { 4304 adapter->link_speed = 0; 4305 adapter->link_duplex = 0; 4306 /* Link status message must follow this format */ 4307 printk(KERN_INFO "e1000e: %s NIC Link is Down\n", 4308 adapter->netdev->name); 4309 netif_carrier_off(netdev); 4310 if (!test_bit(__E1000_DOWN, &adapter->state)) 4311 mod_timer(&adapter->phy_info_timer, 4312 round_jiffies(jiffies + 2 * HZ)); 4313 4314 if (adapter->flags & FLAG_RX_NEEDS_RESTART) 4315 schedule_work(&adapter->reset_task); 4316 else 4317 pm_schedule_suspend(netdev->dev.parent, 4318 LINK_TIMEOUT); 4319 } 4320 } 4321 4322link_up: 4323 e1000e_update_stats(adapter); 4324 4325 mac->tx_packet_delta = adapter->stats.tpt - adapter->tpt_old; 4326 adapter->tpt_old = adapter->stats.tpt; 4327 mac->collision_delta = adapter->stats.colc - adapter->colc_old; 4328 adapter->colc_old = adapter->stats.colc; 4329 4330 adapter->gorc = adapter->stats.gorc - adapter->gorc_old; 4331 adapter->gorc_old = adapter->stats.gorc; 4332 adapter->gotc = adapter->stats.gotc - adapter->gotc_old; 4333 adapter->gotc_old = adapter->stats.gotc; 4334 4335 e1000e_update_adaptive(&adapter->hw); 4336 4337 if (!netif_carrier_ok(netdev)) { 4338 tx_pending = (e1000_desc_unused(tx_ring) + 1 < 4339 tx_ring->count); 4340 if (tx_pending) { 4341 /* 4342 * We've lost link, so the controller stops DMA, 4343 * but we've got queued Tx work that's never going 4344 * to get done, so reset controller to flush Tx. 4345 * (Do the reset outside of interrupt context). 4346 */ 4347 schedule_work(&adapter->reset_task); 4348 /* return immediately since reset is imminent */ 4349 return; 4350 } 4351 } 4352 4353 /* Simple mode for Interrupt Throttle Rate (ITR) */ 4354 if (adapter->itr_setting == 4) { 4355 /* 4356 * Symmetric Tx/Rx gets a reduced ITR=2000; 4357 * Total asymmetrical Tx or Rx gets ITR=8000; 4358 * everyone else is between 2000-8000. 4359 */ 4360 u32 goc = (adapter->gotc + adapter->gorc) / 10000; 4361 u32 dif = (adapter->gotc > adapter->gorc ? 4362 adapter->gotc - adapter->gorc : 4363 adapter->gorc - adapter->gotc) / 10000; 4364 u32 itr = goc > 0 ? (dif * 6000 / goc + 2000) : 8000; 4365 4366 ew32(ITR, 1000000000 / (itr * 256)); 4367 } 4368 4369 /* Cause software interrupt to ensure Rx ring is cleaned */ 4370 if (adapter->msix_entries) 4371 ew32(ICS, adapter->rx_ring->ims_val); 4372 else 4373 ew32(ICS, E1000_ICS_RXDMT0); 4374 4375 /* flush pending descriptors to memory before detecting Tx hang */ 4376 e1000e_flush_descriptors(adapter); 4377 4378 /* Force detection of hung controller every watchdog period */ 4379 adapter->detect_tx_hung = 1; 4380 4381 /* 4382 * With 82571 controllers, LAA may be overwritten due to controller 4383 * reset from the other port. Set the appropriate LAA in RAR[0] 4384 */ 4385 if (e1000e_get_laa_state_82571(hw)) 4386 e1000e_rar_set(hw, adapter->hw.mac.addr, 0); 4387 4388 if (adapter->flags2 & FLAG2_CHECK_PHY_HANG) 4389 e1000e_check_82574_phy_workaround(adapter); 4390 4391 /* Reset the timer */ 4392 if (!test_bit(__E1000_DOWN, &adapter->state)) 4393 mod_timer(&adapter->watchdog_timer, 4394 round_jiffies(jiffies + 2 * HZ)); 4395} 4396 4397#define E1000_TX_FLAGS_CSUM 0x00000001 4398#define E1000_TX_FLAGS_VLAN 0x00000002 4399#define E1000_TX_FLAGS_TSO 0x00000004 4400#define E1000_TX_FLAGS_IPV4 0x00000008 4401#define E1000_TX_FLAGS_VLAN_MASK 0xffff0000 4402#define E1000_TX_FLAGS_VLAN_SHIFT 16 4403 4404static int e1000_tso(struct e1000_adapter *adapter, 4405 struct sk_buff *skb) 4406{ 4407 struct e1000_ring *tx_ring = adapter->tx_ring; 4408 struct e1000_context_desc *context_desc; 4409 struct e1000_buffer *buffer_info; 4410 unsigned int i; 4411 u32 cmd_length = 0; 4412 u16 ipcse = 0, tucse, mss; 4413 u8 ipcss, ipcso, tucss, tucso, hdr_len; 4414 int err; 4415 4416 if (!skb_is_gso(skb)) 4417 return 0; 4418 4419 if (skb_header_cloned(skb)) { 4420 err = pskb_expand_head(skb, 0, 0, GFP_ATOMIC); 4421 if (err) 4422 return err; 4423 } 4424 4425 hdr_len = skb_transport_offset(skb) + tcp_hdrlen(skb); 4426 mss = skb_shinfo(skb)->gso_size; 4427 if (skb->protocol == htons(ETH_P_IP)) { 4428 struct iphdr *iph = ip_hdr(skb); 4429 iph->tot_len = 0; 4430 iph->check = 0; 4431 tcp_hdr(skb)->check = ~csum_tcpudp_magic(iph->saddr, iph->daddr, 4432 0, IPPROTO_TCP, 0); 4433 cmd_length = E1000_TXD_CMD_IP; 4434 ipcse = skb_transport_offset(skb) - 1; 4435 } else if (skb_is_gso_v6(skb)) { 4436 ipv6_hdr(skb)->payload_len = 0; 4437 tcp_hdr(skb)->check = ~csum_ipv6_magic(&ipv6_hdr(skb)->saddr, 4438 &ipv6_hdr(skb)->daddr, 4439 0, IPPROTO_TCP, 0); 4440 ipcse = 0; 4441 } 4442 ipcss = skb_network_offset(skb); 4443 ipcso = (void *)&(ip_hdr(skb)->check) - (void *)skb->data; 4444 tucss = skb_transport_offset(skb); 4445 tucso = (void *)&(tcp_hdr(skb)->check) - (void *)skb->data; 4446 tucse = 0; 4447 4448 cmd_length |= (E1000_TXD_CMD_DEXT | E1000_TXD_CMD_TSE | 4449 E1000_TXD_CMD_TCP | (skb->len - (hdr_len))); 4450 4451 i = tx_ring->next_to_use; 4452 context_desc = E1000_CONTEXT_DESC(*tx_ring, i); 4453 buffer_info = &tx_ring->buffer_info[i]; 4454 4455 context_desc->lower_setup.ip_fields.ipcss = ipcss; 4456 context_desc->lower_setup.ip_fields.ipcso = ipcso; 4457 context_desc->lower_setup.ip_fields.ipcse = cpu_to_le16(ipcse); 4458 context_desc->upper_setup.tcp_fields.tucss = tucss; 4459 context_desc->upper_setup.tcp_fields.tucso = tucso; 4460 context_desc->upper_setup.tcp_fields.tucse = cpu_to_le16(tucse); 4461 context_desc->tcp_seg_setup.fields.mss = cpu_to_le16(mss); 4462 context_desc->tcp_seg_setup.fields.hdr_len = hdr_len; 4463 context_desc->cmd_and_length = cpu_to_le32(cmd_length); 4464 4465 buffer_info->time_stamp = jiffies; 4466 buffer_info->next_to_watch = i; 4467 4468 i++; 4469 if (i == tx_ring->count) 4470 i = 0; 4471 tx_ring->next_to_use = i; 4472 4473 return 1; 4474} 4475 4476static bool e1000_tx_csum(struct e1000_adapter *adapter, struct sk_buff *skb) 4477{ 4478 struct e1000_ring *tx_ring = adapter->tx_ring; 4479 struct e1000_context_desc *context_desc; 4480 struct e1000_buffer *buffer_info; 4481 unsigned int i; 4482 u8 css; 4483 u32 cmd_len = E1000_TXD_CMD_DEXT; 4484 __be16 protocol; 4485 4486 if (skb->ip_summed != CHECKSUM_PARTIAL) 4487 return 0; 4488 4489 if (skb->protocol == cpu_to_be16(ETH_P_8021Q)) 4490 protocol = vlan_eth_hdr(skb)->h_vlan_encapsulated_proto; 4491 else 4492 protocol = skb->protocol; 4493 4494 switch (protocol) { 4495 case cpu_to_be16(ETH_P_IP): 4496 if (ip_hdr(skb)->protocol == IPPROTO_TCP) 4497 cmd_len |= E1000_TXD_CMD_TCP; 4498 break; 4499 case cpu_to_be16(ETH_P_IPV6): 4500 /* XXX not handling all IPV6 headers */ 4501 if (ipv6_hdr(skb)->nexthdr == IPPROTO_TCP) 4502 cmd_len |= E1000_TXD_CMD_TCP; 4503 break; 4504 default: 4505 if (unlikely(net_ratelimit())) 4506 e_warn("checksum_partial proto=%x!\n", 4507 be16_to_cpu(protocol)); 4508 break; 4509 } 4510 4511 css = skb_checksum_start_offset(skb); 4512 4513 i = tx_ring->next_to_use; 4514 buffer_info = &tx_ring->buffer_info[i]; 4515 context_desc = E1000_CONTEXT_DESC(*tx_ring, i); 4516 4517 context_desc->lower_setup.ip_config = 0; 4518 context_desc->upper_setup.tcp_fields.tucss = css; 4519 context_desc->upper_setup.tcp_fields.tucso = 4520 css + skb->csum_offset; 4521 context_desc->upper_setup.tcp_fields.tucse = 0; 4522 context_desc->tcp_seg_setup.data = 0; 4523 context_desc->cmd_and_length = cpu_to_le32(cmd_len); 4524 4525 buffer_info->time_stamp = jiffies; 4526 buffer_info->next_to_watch = i; 4527 4528 i++; 4529 if (i == tx_ring->count) 4530 i = 0; 4531 tx_ring->next_to_use = i; 4532 4533 return 1; 4534} 4535 4536#define E1000_MAX_PER_TXD 8192 4537#define E1000_MAX_TXD_PWR 12 4538 4539static int e1000_tx_map(struct e1000_adapter *adapter, 4540 struct sk_buff *skb, unsigned int first, 4541 unsigned int max_per_txd, unsigned int nr_frags, 4542 unsigned int mss) 4543{ 4544 struct e1000_ring *tx_ring = adapter->tx_ring; 4545 struct pci_dev *pdev = adapter->pdev; 4546 struct e1000_buffer *buffer_info; 4547 unsigned int len = skb_headlen(skb); 4548 unsigned int offset = 0, size, count = 0, i; 4549 unsigned int f, bytecount, segs; 4550 4551 i = tx_ring->next_to_use; 4552 4553 while (len) { 4554 buffer_info = &tx_ring->buffer_info[i]; 4555 size = min(len, max_per_txd); 4556 4557 buffer_info->length = size; 4558 buffer_info->time_stamp = jiffies; 4559 buffer_info->next_to_watch = i; 4560 buffer_info->dma = dma_map_single(&pdev->dev, 4561 skb->data + offset, 4562 size, DMA_TO_DEVICE); 4563 buffer_info->mapped_as_page = false; 4564 if (dma_mapping_error(&pdev->dev, buffer_info->dma)) 4565 goto dma_error; 4566 4567 len -= size; 4568 offset += size; 4569 count++; 4570 4571 if (len) { 4572 i++; 4573 if (i == tx_ring->count) 4574 i = 0; 4575 } 4576 } 4577 4578 for (f = 0; f < nr_frags; f++) { 4579 struct skb_frag_struct *frag; 4580 4581 frag = &skb_shinfo(skb)->frags[f]; 4582 len = frag->size; 4583 offset = frag->page_offset; 4584 4585 while (len) { 4586 i++; 4587 if (i == tx_ring->count) 4588 i = 0; 4589 4590 buffer_info = &tx_ring->buffer_info[i]; 4591 size = min(len, max_per_txd); 4592 4593 buffer_info->length = size; 4594 buffer_info->time_stamp = jiffies; 4595 buffer_info->next_to_watch = i; 4596 buffer_info->dma = dma_map_page(&pdev->dev, frag->page, 4597 offset, size, 4598 DMA_TO_DEVICE); 4599 buffer_info->mapped_as_page = true; 4600 if (dma_mapping_error(&pdev->dev, buffer_info->dma)) 4601 goto dma_error; 4602 4603 len -= size; 4604 offset += size; 4605 count++; 4606 } 4607 } 4608 4609 segs = skb_shinfo(skb)->gso_segs ? : 1; 4610 /* multiply data chunks by size of headers */ 4611 bytecount = ((segs - 1) * skb_headlen(skb)) + skb->len; 4612 4613 tx_ring->buffer_info[i].skb = skb; 4614 tx_ring->buffer_info[i].segs = segs; 4615 tx_ring->buffer_info[i].bytecount = bytecount; 4616 tx_ring->buffer_info[first].next_to_watch = i; 4617 4618 return count; 4619 4620dma_error: 4621 dev_err(&pdev->dev, "Tx DMA map failed\n"); 4622 buffer_info->dma = 0; 4623 if (count) 4624 count--; 4625 4626 while (count--) { 4627 if (i == 0) 4628 i += tx_ring->count; 4629 i--; 4630 buffer_info = &tx_ring->buffer_info[i]; 4631 e1000_put_txbuf(adapter, buffer_info); 4632 } 4633 4634 return 0; 4635} 4636 4637static void e1000_tx_queue(struct e1000_adapter *adapter, 4638 int tx_flags, int count) 4639{ 4640 struct e1000_ring *tx_ring = adapter->tx_ring; 4641 struct e1000_tx_desc *tx_desc = NULL; 4642 struct e1000_buffer *buffer_info; 4643 u32 txd_upper = 0, txd_lower = E1000_TXD_CMD_IFCS; 4644 unsigned int i; 4645 4646 if (tx_flags & E1000_TX_FLAGS_TSO) { 4647 txd_lower |= E1000_TXD_CMD_DEXT | E1000_TXD_DTYP_D | 4648 E1000_TXD_CMD_TSE; 4649 txd_upper |= E1000_TXD_POPTS_TXSM << 8; 4650 4651 if (tx_flags & E1000_TX_FLAGS_IPV4) 4652 txd_upper |= E1000_TXD_POPTS_IXSM << 8; 4653 } 4654 4655 if (tx_flags & E1000_TX_FLAGS_CSUM) { 4656 txd_lower |= E1000_TXD_CMD_DEXT | E1000_TXD_DTYP_D; 4657 txd_upper |= E1000_TXD_POPTS_TXSM << 8; 4658 } 4659 4660 if (tx_flags & E1000_TX_FLAGS_VLAN) { 4661 txd_lower |= E1000_TXD_CMD_VLE; 4662 txd_upper |= (tx_flags & E1000_TX_FLAGS_VLAN_MASK); 4663 } 4664 4665 i = tx_ring->next_to_use; 4666 4667 do { 4668 buffer_info = &tx_ring->buffer_info[i]; 4669 tx_desc = E1000_TX_DESC(*tx_ring, i); 4670 tx_desc->buffer_addr = cpu_to_le64(buffer_info->dma); 4671 tx_desc->lower.data = 4672 cpu_to_le32(txd_lower | buffer_info->length); 4673 tx_desc->upper.data = cpu_to_le32(txd_upper); 4674 4675 i++; 4676 if (i == tx_ring->count) 4677 i = 0; 4678 } while (--count > 0); 4679 4680 tx_desc->lower.data |= cpu_to_le32(adapter->txd_cmd); 4681 4682 /* 4683 * Force memory writes to complete before letting h/w 4684 * know there are new descriptors to fetch. (Only 4685 * applicable for weak-ordered memory model archs, 4686 * such as IA-64). 4687 */ 4688 wmb(); 4689 4690 tx_ring->next_to_use = i; 4691 writel(i, adapter->hw.hw_addr + tx_ring->tail); 4692 /* 4693 * we need this if more than one processor can write to our tail 4694 * at a time, it synchronizes IO on IA64/Altix systems 4695 */ 4696 mmiowb(); 4697} 4698 4699#define MINIMUM_DHCP_PACKET_SIZE 282 4700static int e1000_transfer_dhcp_info(struct e1000_adapter *adapter, 4701 struct sk_buff *skb) 4702{ 4703 struct e1000_hw *hw = &adapter->hw; 4704 u16 length, offset; 4705 4706 if (vlan_tx_tag_present(skb)) { 4707 if (!((vlan_tx_tag_get(skb) == adapter->hw.mng_cookie.vlan_id) && 4708 (adapter->hw.mng_cookie.status & 4709 E1000_MNG_DHCP_COOKIE_STATUS_VLAN))) 4710 return 0; 4711 } 4712 4713 if (skb->len <= MINIMUM_DHCP_PACKET_SIZE) 4714 return 0; 4715 4716 if (((struct ethhdr *) skb->data)->h_proto != htons(ETH_P_IP)) 4717 return 0; 4718 4719 { 4720 const struct iphdr *ip = (struct iphdr *)((u8 *)skb->data+14); 4721 struct udphdr *udp; 4722 4723 if (ip->protocol != IPPROTO_UDP) 4724 return 0; 4725 4726 udp = (struct udphdr *)((u8 *)ip + (ip->ihl << 2)); 4727 if (ntohs(udp->dest) != 67) 4728 return 0; 4729 4730 offset = (u8 *)udp + 8 - skb->data; 4731 length = skb->len - offset; 4732 return e1000e_mng_write_dhcp_info(hw, (u8 *)udp + 8, length); 4733 } 4734 4735 return 0; 4736} 4737 4738static int __e1000_maybe_stop_tx(struct net_device *netdev, int size) 4739{ 4740 struct e1000_adapter *adapter = netdev_priv(netdev); 4741 4742 netif_stop_queue(netdev); 4743 /* 4744 * Herbert's original patch had: 4745 * smp_mb__after_netif_stop_queue(); 4746 * but since that doesn't exist yet, just open code it. 4747 */ 4748 smp_mb(); 4749 4750 /* 4751 * We need to check again in a case another CPU has just 4752 * made room available. 4753 */ 4754 if (e1000_desc_unused(adapter->tx_ring) < size) 4755 return -EBUSY; 4756 4757 /* A reprieve! */ 4758 netif_start_queue(netdev); 4759 ++adapter->restart_queue; 4760 return 0; 4761} 4762 4763static int e1000_maybe_stop_tx(struct net_device *netdev, int size) 4764{ 4765 struct e1000_adapter *adapter = netdev_priv(netdev); 4766 4767 if (e1000_desc_unused(adapter->tx_ring) >= size) 4768 return 0; 4769 return __e1000_maybe_stop_tx(netdev, size); 4770} 4771 4772#define TXD_USE_COUNT(S, X) (((S) >> (X)) + 1 ) 4773static netdev_tx_t e1000_xmit_frame(struct sk_buff *skb, 4774 struct net_device *netdev) 4775{ 4776 struct e1000_adapter *adapter = netdev_priv(netdev); 4777 struct e1000_ring *tx_ring = adapter->tx_ring; 4778 unsigned int first; 4779 unsigned int max_per_txd = E1000_MAX_PER_TXD; 4780 unsigned int max_txd_pwr = E1000_MAX_TXD_PWR; 4781 unsigned int tx_flags = 0; 4782 unsigned int len = skb_headlen(skb); 4783 unsigned int nr_frags; 4784 unsigned int mss; 4785 int count = 0; 4786 int tso; 4787 unsigned int f; 4788 4789 if (test_bit(__E1000_DOWN, &adapter->state)) { 4790 dev_kfree_skb_any(skb); 4791 return NETDEV_TX_OK; 4792 } 4793 4794 if (skb->len <= 0) { 4795 dev_kfree_skb_any(skb); 4796 return NETDEV_TX_OK; 4797 } 4798 4799 mss = skb_shinfo(skb)->gso_size; 4800 /* 4801 * The controller does a simple calculation to 4802 * make sure there is enough room in the FIFO before 4803 * initiating the DMA for each buffer. The calc is: 4804 * 4 = ceil(buffer len/mss). To make sure we don't 4805 * overrun the FIFO, adjust the max buffer len if mss 4806 * drops. 4807 */ 4808 if (mss) { 4809 u8 hdr_len; 4810 max_per_txd = min(mss << 2, max_per_txd); 4811 max_txd_pwr = fls(max_per_txd) - 1; 4812 4813 /* 4814 * TSO Workaround for 82571/2/3 Controllers -- if skb->data 4815 * points to just header, pull a few bytes of payload from 4816 * frags into skb->data 4817 */ 4818 hdr_len = skb_transport_offset(skb) + tcp_hdrlen(skb); 4819 /* 4820 * we do this workaround for ES2LAN, but it is un-necessary, 4821 * avoiding it could save a lot of cycles 4822 */ 4823 if (skb->data_len && (hdr_len == len)) { 4824 unsigned int pull_size; 4825 4826 pull_size = min((unsigned int)4, skb->data_len); 4827 if (!__pskb_pull_tail(skb, pull_size)) { 4828 e_err("__pskb_pull_tail failed.\n"); 4829 dev_kfree_skb_any(skb); 4830 return NETDEV_TX_OK; 4831 } 4832 len = skb_headlen(skb); 4833 } 4834 } 4835 4836 /* reserve a descriptor for the offload context */ 4837 if ((mss) || (skb->ip_summed == CHECKSUM_PARTIAL)) 4838 count++; 4839 count++; 4840 4841 count += TXD_USE_COUNT(len, max_txd_pwr); 4842 4843 nr_frags = skb_shinfo(skb)->nr_frags; 4844 for (f = 0; f < nr_frags; f++) 4845 count += TXD_USE_COUNT(skb_shinfo(skb)->frags[f].size, 4846 max_txd_pwr); 4847 4848 if (adapter->hw.mac.tx_pkt_filtering) 4849 e1000_transfer_dhcp_info(adapter, skb); 4850 4851 /* 4852 * need: count + 2 desc gap to keep tail from touching 4853 * head, otherwise try next time 4854 */ 4855 if (e1000_maybe_stop_tx(netdev, count + 2)) 4856 return NETDEV_TX_BUSY; 4857 4858 if (vlan_tx_tag_present(skb)) { 4859 tx_flags |= E1000_TX_FLAGS_VLAN; 4860 tx_flags |= (vlan_tx_tag_get(skb) << E1000_TX_FLAGS_VLAN_SHIFT); 4861 } 4862 4863 first = tx_ring->next_to_use; 4864 4865 tso = e1000_tso(adapter, skb); 4866 if (tso < 0) { 4867 dev_kfree_skb_any(skb); 4868 return NETDEV_TX_OK; 4869 } 4870 4871 if (tso) 4872 tx_flags |= E1000_TX_FLAGS_TSO; 4873 else if (e1000_tx_csum(adapter, skb)) 4874 tx_flags |= E1000_TX_FLAGS_CSUM; 4875 4876 /* 4877 * Old method was to assume IPv4 packet by default if TSO was enabled. 4878 * 82571 hardware supports TSO capabilities for IPv6 as well... 4879 * no longer assume, we must. 4880 */ 4881 if (skb->protocol == htons(ETH_P_IP)) 4882 tx_flags |= E1000_TX_FLAGS_IPV4; 4883 4884 /* if count is 0 then mapping error has occured */ 4885 count = e1000_tx_map(adapter, skb, first, max_per_txd, nr_frags, mss); 4886 if (count) { 4887 e1000_tx_queue(adapter, tx_flags, count); 4888 /* Make sure there is space in the ring for the next send. */ 4889 e1000_maybe_stop_tx(netdev, MAX_SKB_FRAGS + 2); 4890 4891 } else { 4892 dev_kfree_skb_any(skb); 4893 tx_ring->buffer_info[first].time_stamp = 0; 4894 tx_ring->next_to_use = first; 4895 } 4896 4897 return NETDEV_TX_OK; 4898} 4899 4900/** 4901 * e1000_tx_timeout - Respond to a Tx Hang 4902 * @netdev: network interface device structure 4903 **/ 4904static void e1000_tx_timeout(struct net_device *netdev) 4905{ 4906 struct e1000_adapter *adapter = netdev_priv(netdev); 4907 4908 /* Do the reset outside of interrupt context */ 4909 adapter->tx_timeout_count++; 4910 schedule_work(&adapter->reset_task); 4911} 4912 4913static void e1000_reset_task(struct work_struct *work) 4914{ 4915 struct e1000_adapter *adapter; 4916 adapter = container_of(work, struct e1000_adapter, reset_task); 4917 4918 /* don't run the task if already down */ 4919 if (test_bit(__E1000_DOWN, &adapter->state)) 4920 return; 4921 4922 if (!((adapter->flags & FLAG_RX_NEEDS_RESTART) && 4923 (adapter->flags & FLAG_RX_RESTART_NOW))) { 4924 e1000e_dump(adapter); 4925 e_err("Reset adapter\n"); 4926 } 4927 e1000e_reinit_locked(adapter); 4928} 4929 4930/** 4931 * e1000_get_stats - Get System Network Statistics 4932 * @netdev: network interface device structure 4933 * 4934 * Returns the address of the device statistics structure. 4935 * The statistics are actually updated from the timer callback. 4936 **/ 4937static struct net_device_stats *e1000_get_stats(struct net_device *netdev) 4938{ 4939 /* only return the current stats */ 4940 return &netdev->stats; 4941} 4942 4943/** 4944 * e1000_change_mtu - Change the Maximum Transfer Unit 4945 * @netdev: network interface device structure 4946 * @new_mtu: new value for maximum frame size 4947 * 4948 * Returns 0 on success, negative on failure 4949 **/ 4950static int e1000_change_mtu(struct net_device *netdev, int new_mtu) 4951{ 4952 struct e1000_adapter *adapter = netdev_priv(netdev); 4953 int max_frame = new_mtu + ETH_HLEN + ETH_FCS_LEN; 4954 4955 /* Jumbo frame support */ 4956 if ((max_frame > ETH_FRAME_LEN + ETH_FCS_LEN) && 4957 !(adapter->flags & FLAG_HAS_JUMBO_FRAMES)) { 4958 e_err("Jumbo Frames not supported.\n"); 4959 return -EINVAL; 4960 } 4961 4962 /* Supported frame sizes */ 4963 if ((new_mtu < ETH_ZLEN + ETH_FCS_LEN + VLAN_HLEN) || 4964 (max_frame > adapter->max_hw_frame_size)) { 4965 e_err("Unsupported MTU setting\n"); 4966 return -EINVAL; 4967 } 4968 4969 /* Jumbo frame workaround on 82579 requires CRC be stripped */ 4970 if ((adapter->hw.mac.type == e1000_pch2lan) && 4971 !(adapter->flags2 & FLAG2_CRC_STRIPPING) && 4972 (new_mtu > ETH_DATA_LEN)) { 4973 e_err("Jumbo Frames not supported on 82579 when CRC " 4974 "stripping is disabled.\n"); 4975 return -EINVAL; 4976 } 4977 4978 /* 82573 Errata 17 */ 4979 if (((adapter->hw.mac.type == e1000_82573) || 4980 (adapter->hw.mac.type == e1000_82574)) && 4981 (max_frame > ETH_FRAME_LEN + ETH_FCS_LEN)) { 4982 adapter->flags2 |= FLAG2_DISABLE_ASPM_L1; 4983 e1000e_disable_aspm(adapter->pdev, PCIE_LINK_STATE_L1); 4984 } 4985 4986 while (test_and_set_bit(__E1000_RESETTING, &adapter->state)) 4987 msleep(1); 4988 /* e1000e_down -> e1000e_reset dependent on max_frame_size & mtu */ 4989 adapter->max_frame_size = max_frame; 4990 e_info("changing MTU from %d to %d\n", netdev->mtu, new_mtu); 4991 netdev->mtu = new_mtu; 4992 if (netif_running(netdev)) 4993 e1000e_down(adapter); 4994 4995 /* 4996 * NOTE: netdev_alloc_skb reserves 16 bytes, and typically NET_IP_ALIGN 4997 * means we reserve 2 more, this pushes us to allocate from the next 4998 * larger slab size. 4999 * i.e. RXBUFFER_2048 --> size-4096 slab 5000 * However with the new *_jumbo_rx* routines, jumbo receives will use 5001 * fragmented skbs 5002 */ 5003 5004 if (max_frame <= 2048) 5005 adapter->rx_buffer_len = 2048; 5006 else 5007 adapter->rx_buffer_len = 4096; 5008 5009 /* adjust allocation if LPE protects us, and we aren't using SBP */ 5010 if ((max_frame == ETH_FRAME_LEN + ETH_FCS_LEN) || 5011 (max_frame == ETH_FRAME_LEN + VLAN_HLEN + ETH_FCS_LEN)) 5012 adapter->rx_buffer_len = ETH_FRAME_LEN + VLAN_HLEN 5013 + ETH_FCS_LEN; 5014 5015 if (netif_running(netdev)) 5016 e1000e_up(adapter); 5017 else 5018 e1000e_reset(adapter); 5019 5020 clear_bit(__E1000_RESETTING, &adapter->state); 5021 5022 return 0; 5023} 5024 5025static int e1000_mii_ioctl(struct net_device *netdev, struct ifreq *ifr, 5026 int cmd) 5027{ 5028 struct e1000_adapter *adapter = netdev_priv(netdev); 5029 struct mii_ioctl_data *data = if_mii(ifr); 5030 5031 if (adapter->hw.phy.media_type != e1000_media_type_copper) 5032 return -EOPNOTSUPP; 5033 5034 switch (cmd) { 5035 case SIOCGMIIPHY: 5036 data->phy_id = adapter->hw.phy.addr; 5037 break; 5038 case SIOCGMIIREG: 5039 e1000_phy_read_status(adapter); 5040 5041 switch (data->reg_num & 0x1F) { 5042 case MII_BMCR: 5043 data->val_out = adapter->phy_regs.bmcr; 5044 break; 5045 case MII_BMSR: 5046 data->val_out = adapter->phy_regs.bmsr; 5047 break; 5048 case MII_PHYSID1: 5049 data->val_out = (adapter->hw.phy.id >> 16); 5050 break; 5051 case MII_PHYSID2: 5052 data->val_out = (adapter->hw.phy.id & 0xFFFF); 5053 break; 5054 case MII_ADVERTISE: 5055 data->val_out = adapter->phy_regs.advertise; 5056 break; 5057 case MII_LPA: 5058 data->val_out = adapter->phy_regs.lpa; 5059 break; 5060 case MII_EXPANSION: 5061 data->val_out = adapter->phy_regs.expansion; 5062 break; 5063 case MII_CTRL1000: 5064 data->val_out = adapter->phy_regs.ctrl1000; 5065 break; 5066 case MII_STAT1000: 5067 data->val_out = adapter->phy_regs.stat1000; 5068 break; 5069 case MII_ESTATUS: 5070 data->val_out = adapter->phy_regs.estatus; 5071 break; 5072 default: 5073 return -EIO; 5074 } 5075 break; 5076 case SIOCSMIIREG: 5077 default: 5078 return -EOPNOTSUPP; 5079 } 5080 return 0; 5081} 5082 5083static int e1000_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd) 5084{ 5085 switch (cmd) { 5086 case SIOCGMIIPHY: 5087 case SIOCGMIIREG: 5088 case SIOCSMIIREG: 5089 return e1000_mii_ioctl(netdev, ifr, cmd); 5090 default: 5091 return -EOPNOTSUPP; 5092 } 5093} 5094 5095static int e1000_init_phy_wakeup(struct e1000_adapter *adapter, u32 wufc) 5096{ 5097 struct e1000_hw *hw = &adapter->hw; 5098 u32 i, mac_reg; 5099 u16 phy_reg; 5100 int retval = 0; 5101 5102 /* copy MAC RARs to PHY RARs */ 5103 e1000_copy_rx_addrs_to_phy_ich8lan(hw); 5104 5105 /* copy MAC MTA to PHY MTA */ 5106 for (i = 0; i < adapter->hw.mac.mta_reg_count; i++) { 5107 mac_reg = E1000_READ_REG_ARRAY(hw, E1000_MTA, i); 5108 e1e_wphy(hw, BM_MTA(i), (u16)(mac_reg & 0xFFFF)); 5109 e1e_wphy(hw, BM_MTA(i) + 1, (u16)((mac_reg >> 16) & 0xFFFF)); 5110 } 5111 5112 /* configure PHY Rx Control register */ 5113 e1e_rphy(&adapter->hw, BM_RCTL, &phy_reg); 5114 mac_reg = er32(RCTL); 5115 if (mac_reg & E1000_RCTL_UPE) 5116 phy_reg |= BM_RCTL_UPE; 5117 if (mac_reg & E1000_RCTL_MPE) 5118 phy_reg |= BM_RCTL_MPE; 5119 phy_reg &= ~(BM_RCTL_MO_MASK); 5120 if (mac_reg & E1000_RCTL_MO_3) 5121 phy_reg |= (((mac_reg & E1000_RCTL_MO_3) >> E1000_RCTL_MO_SHIFT) 5122 << BM_RCTL_MO_SHIFT); 5123 if (mac_reg & E1000_RCTL_BAM) 5124 phy_reg |= BM_RCTL_BAM; 5125 if (mac_reg & E1000_RCTL_PMCF) 5126 phy_reg |= BM_RCTL_PMCF; 5127 mac_reg = er32(CTRL); 5128 if (mac_reg & E1000_CTRL_RFCE) 5129 phy_reg |= BM_RCTL_RFCE; 5130 e1e_wphy(&adapter->hw, BM_RCTL, phy_reg); 5131 5132 /* enable PHY wakeup in MAC register */ 5133 ew32(WUFC, wufc); 5134 ew32(WUC, E1000_WUC_PHY_WAKE | E1000_WUC_PME_EN); 5135 5136 /* configure and enable PHY wakeup in PHY registers */ 5137 e1e_wphy(&adapter->hw, BM_WUFC, wufc); 5138 e1e_wphy(&adapter->hw, BM_WUC, E1000_WUC_PME_EN); 5139 5140 /* activate PHY wakeup */ 5141 retval = hw->phy.ops.acquire(hw); 5142 if (retval) { 5143 e_err("Could not acquire PHY\n"); 5144 return retval; 5145 } 5146 e1000e_write_phy_reg_mdic(hw, IGP01E1000_PHY_PAGE_SELECT, 5147 (BM_WUC_ENABLE_PAGE << IGP_PAGE_SHIFT)); 5148 retval = e1000e_read_phy_reg_mdic(hw, BM_WUC_ENABLE_REG, &phy_reg); 5149 if (retval) { 5150 e_err("Could not read PHY page 769\n"); 5151 goto out; 5152 } 5153 phy_reg |= BM_WUC_ENABLE_BIT | BM_WUC_HOST_WU_BIT; 5154 retval = e1000e_write_phy_reg_mdic(hw, BM_WUC_ENABLE_REG, phy_reg); 5155 if (retval) 5156 e_err("Could not set PHY Host Wakeup bit\n"); 5157out: 5158 hw->phy.ops.release(hw); 5159 5160 return retval; 5161} 5162 5163static int __e1000_shutdown(struct pci_dev *pdev, bool *enable_wake, 5164 bool runtime) 5165{ 5166 struct net_device *netdev = pci_get_drvdata(pdev); 5167 struct e1000_adapter *adapter = netdev_priv(netdev); 5168 struct e1000_hw *hw = &adapter->hw; 5169 u32 ctrl, ctrl_ext, rctl, status; 5170 /* Runtime suspend should only enable wakeup for link changes */ 5171 u32 wufc = runtime ? E1000_WUFC_LNKC : adapter->wol; 5172 int retval = 0; 5173 5174 netif_device_detach(netdev); 5175 5176 if (netif_running(netdev)) { 5177 WARN_ON(test_bit(__E1000_RESETTING, &adapter->state)); 5178 e1000e_down(adapter); 5179 e1000_free_irq(adapter); 5180 } 5181 e1000e_reset_interrupt_capability(adapter); 5182 5183 retval = pci_save_state(pdev); 5184 if (retval) 5185 return retval; 5186 5187 status = er32(STATUS); 5188 if (status & E1000_STATUS_LU) 5189 wufc &= ~E1000_WUFC_LNKC; 5190 5191 if (wufc) { 5192 e1000_setup_rctl(adapter); 5193 e1000_set_multi(netdev); 5194 5195 /* turn on all-multi mode if wake on multicast is enabled */ 5196 if (wufc & E1000_WUFC_MC) { 5197 rctl = er32(RCTL); 5198 rctl |= E1000_RCTL_MPE; 5199 ew32(RCTL, rctl); 5200 } 5201 5202 ctrl = er32(CTRL); 5203 /* advertise wake from D3Cold */ 5204 #define E1000_CTRL_ADVD3WUC 0x00100000 5205 /* phy power management enable */ 5206 #define E1000_CTRL_EN_PHY_PWR_MGMT 0x00200000 5207 ctrl |= E1000_CTRL_ADVD3WUC; 5208 if (!(adapter->flags2 & FLAG2_HAS_PHY_WAKEUP)) 5209 ctrl |= E1000_CTRL_EN_PHY_PWR_MGMT; 5210 ew32(CTRL, ctrl); 5211 5212 if (adapter->hw.phy.media_type == e1000_media_type_fiber || 5213 adapter->hw.phy.media_type == 5214 e1000_media_type_internal_serdes) { 5215 /* keep the laser running in D3 */ 5216 ctrl_ext = er32(CTRL_EXT); 5217 ctrl_ext |= E1000_CTRL_EXT_SDP3_DATA; 5218 ew32(CTRL_EXT, ctrl_ext); 5219 } 5220 5221 if (adapter->flags & FLAG_IS_ICH) 5222 e1000e_disable_gig_wol_ich8lan(&adapter->hw); 5223 5224 /* Allow time for pending master requests to run */ 5225 e1000e_disable_pcie_master(&adapter->hw); 5226 5227 if (adapter->flags2 & FLAG2_HAS_PHY_WAKEUP) { 5228 /* enable wakeup by the PHY */ 5229 retval = e1000_init_phy_wakeup(adapter, wufc); 5230 if (retval) 5231 return retval; 5232 } else { 5233 /* enable wakeup by the MAC */ 5234 ew32(WUFC, wufc); 5235 ew32(WUC, E1000_WUC_PME_EN); 5236 } 5237 } else { 5238 ew32(WUC, 0); 5239 ew32(WUFC, 0); 5240 } 5241 5242 *enable_wake = !!wufc; 5243 5244 /* make sure adapter isn't asleep if manageability is enabled */ 5245 if ((adapter->flags & FLAG_MNG_PT_ENABLED) || 5246 (hw->mac.ops.check_mng_mode(hw))) 5247 *enable_wake = true; 5248 5249 if (adapter->hw.phy.type == e1000_phy_igp_3) 5250 e1000e_igp3_phy_powerdown_workaround_ich8lan(&adapter->hw); 5251 5252 /* 5253 * Release control of h/w to f/w. If f/w is AMT enabled, this 5254 * would have already happened in close and is redundant. 5255 */ 5256 e1000e_release_hw_control(adapter); 5257 5258 pci_disable_device(pdev); 5259 5260 return 0; 5261} 5262 5263static void e1000_power_off(struct pci_dev *pdev, bool sleep, bool wake) 5264{ 5265 if (sleep && wake) { 5266 pci_prepare_to_sleep(pdev); 5267 return; 5268 } 5269 5270 pci_wake_from_d3(pdev, wake); 5271 pci_set_power_state(pdev, PCI_D3hot); 5272} 5273 5274static void e1000_complete_shutdown(struct pci_dev *pdev, bool sleep, 5275 bool wake) 5276{ 5277 struct net_device *netdev = pci_get_drvdata(pdev); 5278 struct e1000_adapter *adapter = netdev_priv(netdev); 5279 5280 /* 5281 * The pci-e switch on some quad port adapters will report a 5282 * correctable error when the MAC transitions from D0 to D3. To 5283 * prevent this we need to mask off the correctable errors on the 5284 * downstream port of the pci-e switch. 5285 */ 5286 if (adapter->flags & FLAG_IS_QUAD_PORT) { 5287 struct pci_dev *us_dev = pdev->bus->self; 5288 int pos = pci_find_capability(us_dev, PCI_CAP_ID_EXP); 5289 u16 devctl; 5290 5291 pci_read_config_word(us_dev, pos + PCI_EXP_DEVCTL, &devctl); 5292 pci_write_config_word(us_dev, pos + PCI_EXP_DEVCTL, 5293 (devctl & ~PCI_EXP_DEVCTL_CERE)); 5294 5295 e1000_power_off(pdev, sleep, wake); 5296 5297 pci_write_config_word(us_dev, pos + PCI_EXP_DEVCTL, devctl); 5298 } else { 5299 e1000_power_off(pdev, sleep, wake); 5300 } 5301} 5302 5303#ifdef CONFIG_PCIEASPM 5304static void __e1000e_disable_aspm(struct pci_dev *pdev, u16 state) 5305{ 5306 pci_disable_link_state(pdev, state); 5307} 5308#else 5309static void __e1000e_disable_aspm(struct pci_dev *pdev, u16 state) 5310{ 5311 int pos; 5312 u16 reg16; 5313 5314 /* 5315 * Both device and parent should have the same ASPM setting. 5316 * Disable ASPM in downstream component first and then upstream. 5317 */ 5318 pos = pci_pcie_cap(pdev); 5319 pci_read_config_word(pdev, pos + PCI_EXP_LNKCTL, &reg16); 5320 reg16 &= ~state; 5321 pci_write_config_word(pdev, pos + PCI_EXP_LNKCTL, reg16); 5322 5323 if (!pdev->bus->self) 5324 return; 5325 5326 pos = pci_pcie_cap(pdev->bus->self); 5327 pci_read_config_word(pdev->bus->self, pos + PCI_EXP_LNKCTL, &reg16); 5328 reg16 &= ~state; 5329 pci_write_config_word(pdev->bus->self, pos + PCI_EXP_LNKCTL, reg16); 5330} 5331#endif 5332void e1000e_disable_aspm(struct pci_dev *pdev, u16 state) 5333{ 5334 dev_info(&pdev->dev, "Disabling ASPM %s %s\n", 5335 (state & PCIE_LINK_STATE_L0S) ? "L0s" : "", 5336 (state & PCIE_LINK_STATE_L1) ? "L1" : ""); 5337 5338 __e1000e_disable_aspm(pdev, state); 5339} 5340 5341#ifdef CONFIG_PM_OPS 5342static bool e1000e_pm_ready(struct e1000_adapter *adapter) 5343{ 5344 return !!adapter->tx_ring->buffer_info; 5345} 5346 5347static int __e1000_resume(struct pci_dev *pdev) 5348{ 5349 struct net_device *netdev = pci_get_drvdata(pdev); 5350 struct e1000_adapter *adapter = netdev_priv(netdev); 5351 struct e1000_hw *hw = &adapter->hw; 5352 u32 err; 5353 5354 pci_set_power_state(pdev, PCI_D0); 5355 pci_restore_state(pdev); 5356 pci_save_state(pdev); 5357 if (adapter->flags2 & FLAG2_DISABLE_ASPM_L1) 5358 e1000e_disable_aspm(pdev, PCIE_LINK_STATE_L1); 5359 5360 e1000e_set_interrupt_capability(adapter); 5361 if (netif_running(netdev)) { 5362 err = e1000_request_irq(adapter); 5363 if (err) 5364 return err; 5365 } 5366 5367 e1000e_power_up_phy(adapter); 5368 5369 /* report the system wakeup cause from S3/S4 */ 5370 if (adapter->flags2 & FLAG2_HAS_PHY_WAKEUP) { 5371 u16 phy_data; 5372 5373 e1e_rphy(&adapter->hw, BM_WUS, &phy_data); 5374 if (phy_data) { 5375 e_info("PHY Wakeup cause - %s\n", 5376 phy_data & E1000_WUS_EX ? "Unicast Packet" : 5377 phy_data & E1000_WUS_MC ? "Multicast Packet" : 5378 phy_data & E1000_WUS_BC ? "Broadcast Packet" : 5379 phy_data & E1000_WUS_MAG ? "Magic Packet" : 5380 phy_data & E1000_WUS_LNKC ? "Link Status " 5381 " Change" : "other"); 5382 } 5383 e1e_wphy(&adapter->hw, BM_WUS, ~0); 5384 } else { 5385 u32 wus = er32(WUS); 5386 if (wus) { 5387 e_info("MAC Wakeup cause - %s\n", 5388 wus & E1000_WUS_EX ? "Unicast Packet" : 5389 wus & E1000_WUS_MC ? "Multicast Packet" : 5390 wus & E1000_WUS_BC ? "Broadcast Packet" : 5391 wus & E1000_WUS_MAG ? "Magic Packet" : 5392 wus & E1000_WUS_LNKC ? "Link Status Change" : 5393 "other"); 5394 } 5395 ew32(WUS, ~0); 5396 } 5397 5398 e1000e_reset(adapter); 5399 5400 e1000_init_manageability_pt(adapter); 5401 5402 if (netif_running(netdev)) 5403 e1000e_up(adapter); 5404 5405 netif_device_attach(netdev); 5406 5407 /* 5408 * If the controller has AMT, do not set DRV_LOAD until the interface 5409 * is up. For all other cases, let the f/w know that the h/w is now 5410 * under the control of the driver. 5411 */ 5412 if (!(adapter->flags & FLAG_HAS_AMT)) 5413 e1000e_get_hw_control(adapter); 5414 5415 return 0; 5416} 5417 5418#ifdef CONFIG_PM_SLEEP 5419static int e1000_suspend(struct device *dev) 5420{ 5421 struct pci_dev *pdev = to_pci_dev(dev); 5422 int retval; 5423 bool wake; 5424 5425 retval = __e1000_shutdown(pdev, &wake, false); 5426 if (!retval) 5427 e1000_complete_shutdown(pdev, true, wake); 5428 5429 return retval; 5430} 5431 5432static int e1000_resume(struct device *dev) 5433{ 5434 struct pci_dev *pdev = to_pci_dev(dev); 5435 struct net_device *netdev = pci_get_drvdata(pdev); 5436 struct e1000_adapter *adapter = netdev_priv(netdev); 5437 5438 if (e1000e_pm_ready(adapter)) 5439 adapter->idle_check = true; 5440 5441 return __e1000_resume(pdev); 5442} 5443#endif /* CONFIG_PM_SLEEP */ 5444 5445#ifdef CONFIG_PM_RUNTIME 5446static int e1000_runtime_suspend(struct device *dev) 5447{ 5448 struct pci_dev *pdev = to_pci_dev(dev); 5449 struct net_device *netdev = pci_get_drvdata(pdev); 5450 struct e1000_adapter *adapter = netdev_priv(netdev); 5451 5452 if (e1000e_pm_ready(adapter)) { 5453 bool wake; 5454 5455 __e1000_shutdown(pdev, &wake, true); 5456 } 5457 5458 return 0; 5459} 5460 5461static int e1000_idle(struct device *dev) 5462{ 5463 struct pci_dev *pdev = to_pci_dev(dev); 5464 struct net_device *netdev = pci_get_drvdata(pdev); 5465 struct e1000_adapter *adapter = netdev_priv(netdev); 5466 5467 if (!e1000e_pm_ready(adapter)) 5468 return 0; 5469 5470 if (adapter->idle_check) { 5471 adapter->idle_check = false; 5472 if (!e1000e_has_link(adapter)) 5473 pm_schedule_suspend(dev, MSEC_PER_SEC); 5474 } 5475 5476 return -EBUSY; 5477} 5478 5479static int e1000_runtime_resume(struct device *dev) 5480{ 5481 struct pci_dev *pdev = to_pci_dev(dev); 5482 struct net_device *netdev = pci_get_drvdata(pdev); 5483 struct e1000_adapter *adapter = netdev_priv(netdev); 5484 5485 if (!e1000e_pm_ready(adapter)) 5486 return 0; 5487 5488 adapter->idle_check = !dev->power.runtime_auto; 5489 return __e1000_resume(pdev); 5490} 5491#endif /* CONFIG_PM_RUNTIME */ 5492#endif /* CONFIG_PM_OPS */ 5493 5494static void e1000_shutdown(struct pci_dev *pdev) 5495{ 5496 bool wake = false; 5497 5498 __e1000_shutdown(pdev, &wake, false); 5499 5500 if (system_state == SYSTEM_POWER_OFF) 5501 e1000_complete_shutdown(pdev, false, wake); 5502} 5503 5504#ifdef CONFIG_NET_POLL_CONTROLLER 5505 5506static irqreturn_t e1000_intr_msix(int irq, void *data) 5507{ 5508 struct net_device *netdev = data; 5509 struct e1000_adapter *adapter = netdev_priv(netdev); 5510 int vector, msix_irq; 5511 5512 if (adapter->msix_entries) { 5513 vector = 0; 5514 msix_irq = adapter->msix_entries[vector].vector; 5515 disable_irq(msix_irq); 5516 e1000_intr_msix_rx(msix_irq, netdev); 5517 enable_irq(msix_irq); 5518 5519 vector++; 5520 msix_irq = adapter->msix_entries[vector].vector; 5521 disable_irq(msix_irq); 5522 e1000_intr_msix_tx(msix_irq, netdev); 5523 enable_irq(msix_irq); 5524 5525 vector++; 5526 msix_irq = adapter->msix_entries[vector].vector; 5527 disable_irq(msix_irq); 5528 e1000_msix_other(msix_irq, netdev); 5529 enable_irq(msix_irq); 5530 } 5531 5532 return IRQ_HANDLED; 5533} 5534 5535/* 5536 * Polling 'interrupt' - used by things like netconsole to send skbs 5537 * without having to re-enable interrupts. It's not called while 5538 * the interrupt routine is executing. 5539 */ 5540static void e1000_netpoll(struct net_device *netdev) 5541{ 5542 struct e1000_adapter *adapter = netdev_priv(netdev); 5543 5544 switch (adapter->int_mode) { 5545 case E1000E_INT_MODE_MSIX: 5546 e1000_intr_msix(adapter->pdev->irq, netdev); 5547 break; 5548 case E1000E_INT_MODE_MSI: 5549 disable_irq(adapter->pdev->irq); 5550 e1000_intr_msi(adapter->pdev->irq, netdev); 5551 enable_irq(adapter->pdev->irq); 5552 break; 5553 default: /* E1000E_INT_MODE_LEGACY */ 5554 disable_irq(adapter->pdev->irq); 5555 e1000_intr(adapter->pdev->irq, netdev); 5556 enable_irq(adapter->pdev->irq); 5557 break; 5558 } 5559} 5560#endif 5561 5562/** 5563 * e1000_io_error_detected - called when PCI error is detected 5564 * @pdev: Pointer to PCI device 5565 * @state: The current pci connection state 5566 * 5567 * This function is called after a PCI bus error affecting 5568 * this device has been detected. 5569 */ 5570static pci_ers_result_t e1000_io_error_detected(struct pci_dev *pdev, 5571 pci_channel_state_t state) 5572{ 5573 struct net_device *netdev = pci_get_drvdata(pdev); 5574 struct e1000_adapter *adapter = netdev_priv(netdev); 5575 5576 netif_device_detach(netdev); 5577 5578 if (state == pci_channel_io_perm_failure) 5579 return PCI_ERS_RESULT_DISCONNECT; 5580 5581 if (netif_running(netdev)) 5582 e1000e_down(adapter); 5583 pci_disable_device(pdev); 5584 5585 /* Request a slot slot reset. */ 5586 return PCI_ERS_RESULT_NEED_RESET; 5587} 5588 5589/** 5590 * e1000_io_slot_reset - called after the pci bus has been reset. 5591 * @pdev: Pointer to PCI device 5592 * 5593 * Restart the card from scratch, as if from a cold-boot. Implementation 5594 * resembles the first-half of the e1000_resume routine. 5595 */ 5596static pci_ers_result_t e1000_io_slot_reset(struct pci_dev *pdev) 5597{ 5598 struct net_device *netdev = pci_get_drvdata(pdev); 5599 struct e1000_adapter *adapter = netdev_priv(netdev); 5600 struct e1000_hw *hw = &adapter->hw; 5601 int err; 5602 pci_ers_result_t result; 5603 5604 if (adapter->flags2 & FLAG2_DISABLE_ASPM_L1) 5605 e1000e_disable_aspm(pdev, PCIE_LINK_STATE_L1); 5606 err = pci_enable_device_mem(pdev); 5607 if (err) { 5608 dev_err(&pdev->dev, 5609 "Cannot re-enable PCI device after reset.\n"); 5610 result = PCI_ERS_RESULT_DISCONNECT; 5611 } else { 5612 pci_set_master(pdev); 5613 pdev->state_saved = true; 5614 pci_restore_state(pdev); 5615 5616 pci_enable_wake(pdev, PCI_D3hot, 0); 5617 pci_enable_wake(pdev, PCI_D3cold, 0); 5618 5619 e1000e_reset(adapter); 5620 ew32(WUS, ~0); 5621 result = PCI_ERS_RESULT_RECOVERED; 5622 } 5623 5624 pci_cleanup_aer_uncorrect_error_status(pdev); 5625 5626 return result; 5627} 5628 5629/** 5630 * e1000_io_resume - called when traffic can start flowing again. 5631 * @pdev: Pointer to PCI device 5632 * 5633 * This callback is called when the error recovery driver tells us that 5634 * its OK to resume normal operation. Implementation resembles the 5635 * second-half of the e1000_resume routine. 5636 */ 5637static void e1000_io_resume(struct pci_dev *pdev) 5638{ 5639 struct net_device *netdev = pci_get_drvdata(pdev); 5640 struct e1000_adapter *adapter = netdev_priv(netdev); 5641 5642 e1000_init_manageability_pt(adapter); 5643 5644 if (netif_running(netdev)) { 5645 if (e1000e_up(adapter)) { 5646 dev_err(&pdev->dev, 5647 "can't bring device back up after reset\n"); 5648 return; 5649 } 5650 } 5651 5652 netif_device_attach(netdev); 5653 5654 /* 5655 * If the controller has AMT, do not set DRV_LOAD until the interface 5656 * is up. For all other cases, let the f/w know that the h/w is now 5657 * under the control of the driver. 5658 */ 5659 if (!(adapter->flags & FLAG_HAS_AMT)) 5660 e1000e_get_hw_control(adapter); 5661 5662} 5663 5664static void e1000_print_device_info(struct e1000_adapter *adapter) 5665{ 5666 struct e1000_hw *hw = &adapter->hw; 5667 struct net_device *netdev = adapter->netdev; 5668 u32 ret_val; 5669 u8 pba_str[E1000_PBANUM_LENGTH]; 5670 5671 /* print bus type/speed/width info */ 5672 e_info("(PCI Express:2.5GB/s:%s) %pM\n", 5673 /* bus width */ 5674 ((hw->bus.width == e1000_bus_width_pcie_x4) ? "Width x4" : 5675 "Width x1"), 5676 /* MAC address */ 5677 netdev->dev_addr); 5678 e_info("Intel(R) PRO/%s Network Connection\n", 5679 (hw->phy.type == e1000_phy_ife) ? "10/100" : "1000"); 5680 ret_val = e1000_read_pba_string_generic(hw, pba_str, 5681 E1000_PBANUM_LENGTH); 5682 if (ret_val) 5683 strncpy((char *)pba_str, "Unknown", sizeof(pba_str) - 1); 5684 e_info("MAC: %d, PHY: %d, PBA No: %s\n", 5685 hw->mac.type, hw->phy.type, pba_str); 5686} 5687 5688static void e1000_eeprom_checks(struct e1000_adapter *adapter) 5689{ 5690 struct e1000_hw *hw = &adapter->hw; 5691 int ret_val; 5692 u16 buf = 0; 5693 5694 if (hw->mac.type != e1000_82573) 5695 return; 5696 5697 ret_val = e1000_read_nvm(hw, NVM_INIT_CONTROL2_REG, 1, &buf); 5698 if (!ret_val && (!(le16_to_cpu(buf) & (1 << 0)))) { 5699 /* Deep Smart Power Down (DSPD) */ 5700 dev_warn(&adapter->pdev->dev, 5701 "Warning: detected DSPD enabled in EEPROM\n"); 5702 } 5703} 5704 5705static const struct net_device_ops e1000e_netdev_ops = { 5706 .ndo_open = e1000_open, 5707 .ndo_stop = e1000_close, 5708 .ndo_start_xmit = e1000_xmit_frame, 5709 .ndo_get_stats = e1000_get_stats, 5710 .ndo_set_multicast_list = e1000_set_multi, 5711 .ndo_set_mac_address = e1000_set_mac, 5712 .ndo_change_mtu = e1000_change_mtu, 5713 .ndo_do_ioctl = e1000_ioctl, 5714 .ndo_tx_timeout = e1000_tx_timeout, 5715 .ndo_validate_addr = eth_validate_addr, 5716 5717 .ndo_vlan_rx_register = e1000_vlan_rx_register, 5718 .ndo_vlan_rx_add_vid = e1000_vlan_rx_add_vid, 5719 .ndo_vlan_rx_kill_vid = e1000_vlan_rx_kill_vid, 5720#ifdef CONFIG_NET_POLL_CONTROLLER 5721 .ndo_poll_controller = e1000_netpoll, 5722#endif 5723}; 5724 5725/** 5726 * e1000_probe - Device Initialization Routine 5727 * @pdev: PCI device information struct 5728 * @ent: entry in e1000_pci_tbl 5729 * 5730 * Returns 0 on success, negative on failure 5731 * 5732 * e1000_probe initializes an adapter identified by a pci_dev structure. 5733 * The OS initialization, configuring of the adapter private structure, 5734 * and a hardware reset occur. 5735 **/ 5736static int __devinit e1000_probe(struct pci_dev *pdev, 5737 const struct pci_device_id *ent) 5738{ 5739 struct net_device *netdev; 5740 struct e1000_adapter *adapter; 5741 struct e1000_hw *hw; 5742 const struct e1000_info *ei = e1000_info_tbl[ent->driver_data]; 5743 resource_size_t mmio_start, mmio_len; 5744 resource_size_t flash_start, flash_len; 5745 5746 static int cards_found; 5747 int i, err, pci_using_dac; 5748 u16 eeprom_data = 0; 5749 u16 eeprom_apme_mask = E1000_EEPROM_APME; 5750 5751 if (ei->flags2 & FLAG2_DISABLE_ASPM_L1) 5752 e1000e_disable_aspm(pdev, PCIE_LINK_STATE_L1); 5753 5754 err = pci_enable_device_mem(pdev); 5755 if (err) 5756 return err; 5757 5758 pci_using_dac = 0; 5759 err = dma_set_mask(&pdev->dev, DMA_BIT_MASK(64)); 5760 if (!err) { 5761 err = dma_set_coherent_mask(&pdev->dev, DMA_BIT_MASK(64)); 5762 if (!err) 5763 pci_using_dac = 1; 5764 } else { 5765 err = dma_set_mask(&pdev->dev, DMA_BIT_MASK(32)); 5766 if (err) { 5767 err = dma_set_coherent_mask(&pdev->dev, 5768 DMA_BIT_MASK(32)); 5769 if (err) { 5770 dev_err(&pdev->dev, "No usable DMA " 5771 "configuration, aborting\n"); 5772 goto err_dma; 5773 } 5774 } 5775 } 5776 5777 err = pci_request_selected_regions_exclusive(pdev, 5778 pci_select_bars(pdev, IORESOURCE_MEM), 5779 e1000e_driver_name); 5780 if (err) 5781 goto err_pci_reg; 5782 5783 /* AER (Advanced Error Reporting) hooks */ 5784 pci_enable_pcie_error_reporting(pdev); 5785 5786 pci_set_master(pdev); 5787 /* PCI config space info */ 5788 err = pci_save_state(pdev); 5789 if (err) 5790 goto err_alloc_etherdev; 5791 5792 err = -ENOMEM; 5793 netdev = alloc_etherdev(sizeof(struct e1000_adapter)); 5794 if (!netdev) 5795 goto err_alloc_etherdev; 5796 5797 SET_NETDEV_DEV(netdev, &pdev->dev); 5798 5799 netdev->irq = pdev->irq; 5800 5801 pci_set_drvdata(pdev, netdev); 5802 adapter = netdev_priv(netdev); 5803 hw = &adapter->hw; 5804 adapter->netdev = netdev; 5805 adapter->pdev = pdev; 5806 adapter->ei = ei; 5807 adapter->pba = ei->pba; 5808 adapter->flags = ei->flags; 5809 adapter->flags2 = ei->flags2; 5810 adapter->hw.adapter = adapter; 5811 adapter->hw.mac.type = ei->mac; 5812 adapter->max_hw_frame_size = ei->max_hw_frame_size; 5813 adapter->msg_enable = (1 << NETIF_MSG_DRV | NETIF_MSG_PROBE) - 1; 5814 5815 mmio_start = pci_resource_start(pdev, 0); 5816 mmio_len = pci_resource_len(pdev, 0); 5817 5818 err = -EIO; 5819 adapter->hw.hw_addr = ioremap(mmio_start, mmio_len); 5820 if (!adapter->hw.hw_addr) 5821 goto err_ioremap; 5822 5823 if ((adapter->flags & FLAG_HAS_FLASH) && 5824 (pci_resource_flags(pdev, 1) & IORESOURCE_MEM)) { 5825 flash_start = pci_resource_start(pdev, 1); 5826 flash_len = pci_resource_len(pdev, 1); 5827 adapter->hw.flash_address = ioremap(flash_start, flash_len); 5828 if (!adapter->hw.flash_address) 5829 goto err_flashmap; 5830 } 5831 5832 /* construct the net_device struct */ 5833 netdev->netdev_ops = &e1000e_netdev_ops; 5834 e1000e_set_ethtool_ops(netdev); 5835 netdev->watchdog_timeo = 5 * HZ; 5836 netif_napi_add(netdev, &adapter->napi, e1000_clean, 64); 5837 strncpy(netdev->name, pci_name(pdev), sizeof(netdev->name) - 1); 5838 5839 netdev->mem_start = mmio_start; 5840 netdev->mem_end = mmio_start + mmio_len; 5841 5842 adapter->bd_number = cards_found++; 5843 5844 e1000e_check_options(adapter); 5845 5846 /* setup adapter struct */ 5847 err = e1000_sw_init(adapter); 5848 if (err) 5849 goto err_sw_init; 5850 5851 memcpy(&hw->mac.ops, ei->mac_ops, sizeof(hw->mac.ops)); 5852 memcpy(&hw->nvm.ops, ei->nvm_ops, sizeof(hw->nvm.ops)); 5853 memcpy(&hw->phy.ops, ei->phy_ops, sizeof(hw->phy.ops)); 5854 5855 err = ei->get_variants(adapter); 5856 if (err) 5857 goto err_hw_init; 5858 5859 if ((adapter->flags & FLAG_IS_ICH) && 5860 (adapter->flags & FLAG_READ_ONLY_NVM)) 5861 e1000e_write_protect_nvm_ich8lan(&adapter->hw); 5862 5863 hw->mac.ops.get_bus_info(&adapter->hw); 5864 5865 adapter->hw.phy.autoneg_wait_to_complete = 0; 5866 5867 /* Copper options */ 5868 if (adapter->hw.phy.media_type == e1000_media_type_copper) { 5869 adapter->hw.phy.mdix = AUTO_ALL_MODES; 5870 adapter->hw.phy.disable_polarity_correction = 0; 5871 adapter->hw.phy.ms_type = e1000_ms_hw_default; 5872 } 5873 5874 if (e1000_check_reset_block(&adapter->hw)) 5875 e_info("PHY reset is blocked due to SOL/IDER session.\n"); 5876 5877 netdev->features = NETIF_F_SG | 5878 NETIF_F_HW_CSUM | 5879 NETIF_F_HW_VLAN_TX | 5880 NETIF_F_HW_VLAN_RX; 5881 5882 if (adapter->flags & FLAG_HAS_HW_VLAN_FILTER) 5883 netdev->features |= NETIF_F_HW_VLAN_FILTER; 5884 5885 netdev->features |= NETIF_F_TSO; 5886 netdev->features |= NETIF_F_TSO6; 5887 5888 netdev->vlan_features |= NETIF_F_TSO; 5889 netdev->vlan_features |= NETIF_F_TSO6; 5890 netdev->vlan_features |= NETIF_F_HW_CSUM; 5891 netdev->vlan_features |= NETIF_F_SG; 5892 5893 if (pci_using_dac) { 5894 netdev->features |= NETIF_F_HIGHDMA; 5895 netdev->vlan_features |= NETIF_F_HIGHDMA; 5896 } 5897 5898 if (e1000e_enable_mng_pass_thru(&adapter->hw)) 5899 adapter->flags |= FLAG_MNG_PT_ENABLED; 5900 5901 /* 5902 * before reading the NVM, reset the controller to 5903 * put the device in a known good starting state 5904 */ 5905 adapter->hw.mac.ops.reset_hw(&adapter->hw); 5906 5907 /* 5908 * systems with ASPM and others may see the checksum fail on the first 5909 * attempt. Let's give it a few tries 5910 */ 5911 for (i = 0;; i++) { 5912 if (e1000_validate_nvm_checksum(&adapter->hw) >= 0) 5913 break; 5914 if (i == 2) { 5915 e_err("The NVM Checksum Is Not Valid\n"); 5916 err = -EIO; 5917 goto err_eeprom; 5918 } 5919 } 5920 5921 e1000_eeprom_checks(adapter); 5922 5923 /* copy the MAC address */ 5924 if (e1000e_read_mac_addr(&adapter->hw)) 5925 e_err("NVM Read Error while reading MAC address\n"); 5926 5927 memcpy(netdev->dev_addr, adapter->hw.mac.addr, netdev->addr_len); 5928 memcpy(netdev->perm_addr, adapter->hw.mac.addr, netdev->addr_len); 5929 5930 if (!is_valid_ether_addr(netdev->perm_addr)) { 5931 e_err("Invalid MAC Address: %pM\n", netdev->perm_addr); 5932 err = -EIO; 5933 goto err_eeprom; 5934 } 5935 5936 init_timer(&adapter->watchdog_timer); 5937 adapter->watchdog_timer.function = e1000_watchdog; 5938 adapter->watchdog_timer.data = (unsigned long) adapter; 5939 5940 init_timer(&adapter->phy_info_timer); 5941 adapter->phy_info_timer.function = e1000_update_phy_info; 5942 adapter->phy_info_timer.data = (unsigned long) adapter; 5943 5944 INIT_WORK(&adapter->reset_task, e1000_reset_task); 5945 INIT_WORK(&adapter->watchdog_task, e1000_watchdog_task); 5946 INIT_WORK(&adapter->downshift_task, e1000e_downshift_workaround); 5947 INIT_WORK(&adapter->update_phy_task, e1000e_update_phy_task); 5948 INIT_WORK(&adapter->print_hang_task, e1000_print_hw_hang); 5949 INIT_WORK(&adapter->led_blink_task, e1000e_led_blink_task); 5950 5951 /* Initialize link parameters. User can change them with ethtool */ 5952 adapter->hw.mac.autoneg = 1; 5953 adapter->fc_autoneg = 1; 5954 adapter->hw.fc.requested_mode = e1000_fc_default; 5955 adapter->hw.fc.current_mode = e1000_fc_default; 5956 adapter->hw.phy.autoneg_advertised = 0x2f; 5957 5958 /* ring size defaults */ 5959 adapter->rx_ring->count = 256; 5960 adapter->tx_ring->count = 256; 5961 5962 /* 5963 * Initial Wake on LAN setting - If APM wake is enabled in 5964 * the EEPROM, enable the ACPI Magic Packet filter 5965 */ 5966 if (adapter->flags & FLAG_APME_IN_WUC) { 5967 /* APME bit in EEPROM is mapped to WUC.APME */ 5968 eeprom_data = er32(WUC); 5969 eeprom_apme_mask = E1000_WUC_APME; 5970 if ((hw->mac.type > e1000_ich10lan) && 5971 (eeprom_data & E1000_WUC_PHY_WAKE)) 5972 adapter->flags2 |= FLAG2_HAS_PHY_WAKEUP; 5973 } else if (adapter->flags & FLAG_APME_IN_CTRL3) { 5974 if (adapter->flags & FLAG_APME_CHECK_PORT_B && 5975 (adapter->hw.bus.func == 1)) 5976 e1000_read_nvm(&adapter->hw, 5977 NVM_INIT_CONTROL3_PORT_B, 1, &eeprom_data); 5978 else 5979 e1000_read_nvm(&adapter->hw, 5980 NVM_INIT_CONTROL3_PORT_A, 1, &eeprom_data); 5981 } 5982 5983 /* fetch WoL from EEPROM */ 5984 if (eeprom_data & eeprom_apme_mask) 5985 adapter->eeprom_wol |= E1000_WUFC_MAG; 5986 5987 /* 5988 * now that we have the eeprom settings, apply the special cases 5989 * where the eeprom may be wrong or the board simply won't support 5990 * wake on lan on a particular port 5991 */ 5992 if (!(adapter->flags & FLAG_HAS_WOL)) 5993 adapter->eeprom_wol = 0; 5994 5995 /* initialize the wol settings based on the eeprom settings */ 5996 adapter->wol = adapter->eeprom_wol; 5997 device_set_wakeup_enable(&adapter->pdev->dev, adapter->wol); 5998 5999 /* save off EEPROM version number */ 6000 e1000_read_nvm(&adapter->hw, 5, 1, &adapter->eeprom_vers); 6001 6002 /* reset the hardware with the new settings */ 6003 e1000e_reset(adapter); 6004 6005 /* 6006 * If the controller has AMT, do not set DRV_LOAD until the interface 6007 * is up. For all other cases, let the f/w know that the h/w is now 6008 * under the control of the driver. 6009 */ 6010 if (!(adapter->flags & FLAG_HAS_AMT)) 6011 e1000e_get_hw_control(adapter); 6012 6013 strncpy(netdev->name, "eth%d", sizeof(netdev->name) - 1); 6014 err = register_netdev(netdev); 6015 if (err) 6016 goto err_register; 6017 6018 /* carrier off reporting is important to ethtool even BEFORE open */ 6019 netif_carrier_off(netdev); 6020 6021 e1000_print_device_info(adapter); 6022 6023 if (pci_dev_run_wake(pdev)) 6024 pm_runtime_put_noidle(&pdev->dev); 6025 6026 return 0; 6027 6028err_register: 6029 if (!(adapter->flags & FLAG_HAS_AMT)) 6030 e1000e_release_hw_control(adapter); 6031err_eeprom: 6032 if (!e1000_check_reset_block(&adapter->hw)) 6033 e1000_phy_hw_reset(&adapter->hw); 6034err_hw_init: 6035 kfree(adapter->tx_ring); 6036 kfree(adapter->rx_ring); 6037err_sw_init: 6038 if (adapter->hw.flash_address) 6039 iounmap(adapter->hw.flash_address); 6040 e1000e_reset_interrupt_capability(adapter); 6041err_flashmap: 6042 iounmap(adapter->hw.hw_addr); 6043err_ioremap: 6044 free_netdev(netdev); 6045err_alloc_etherdev: 6046 pci_release_selected_regions(pdev, 6047 pci_select_bars(pdev, IORESOURCE_MEM)); 6048err_pci_reg: 6049err_dma: 6050 pci_disable_device(pdev); 6051 return err; 6052} 6053 6054/** 6055 * e1000_remove - Device Removal Routine 6056 * @pdev: PCI device information struct 6057 * 6058 * e1000_remove is called by the PCI subsystem to alert the driver 6059 * that it should release a PCI device. The could be caused by a 6060 * Hot-Plug event, or because the driver is going to be removed from 6061 * memory. 6062 **/ 6063static void __devexit e1000_remove(struct pci_dev *pdev) 6064{ 6065 struct net_device *netdev = pci_get_drvdata(pdev); 6066 struct e1000_adapter *adapter = netdev_priv(netdev); 6067 bool down = test_bit(__E1000_DOWN, &adapter->state); 6068 6069 /* 6070 * The timers may be rescheduled, so explicitly disable them 6071 * from being rescheduled. 6072 */ 6073 if (!down) 6074 set_bit(__E1000_DOWN, &adapter->state); 6075 del_timer_sync(&adapter->watchdog_timer); 6076 del_timer_sync(&adapter->phy_info_timer); 6077 6078 cancel_work_sync(&adapter->reset_task); 6079 cancel_work_sync(&adapter->watchdog_task); 6080 cancel_work_sync(&adapter->downshift_task); 6081 cancel_work_sync(&adapter->update_phy_task); 6082 cancel_work_sync(&adapter->led_blink_task); 6083 cancel_work_sync(&adapter->print_hang_task); 6084 6085 if (!(netdev->flags & IFF_UP)) 6086 e1000_power_down_phy(adapter); 6087 6088 /* Don't lie to e1000_close() down the road. */ 6089 if (!down) 6090 clear_bit(__E1000_DOWN, &adapter->state); 6091 unregister_netdev(netdev); 6092 6093 if (pci_dev_run_wake(pdev)) 6094 pm_runtime_get_noresume(&pdev->dev); 6095 6096 /* 6097 * Release control of h/w to f/w. If f/w is AMT enabled, this 6098 * would have already happened in close and is redundant. 6099 */ 6100 e1000e_release_hw_control(adapter); 6101 6102 e1000e_reset_interrupt_capability(adapter); 6103 kfree(adapter->tx_ring); 6104 kfree(adapter->rx_ring); 6105 6106 iounmap(adapter->hw.hw_addr); 6107 if (adapter->hw.flash_address) 6108 iounmap(adapter->hw.flash_address); 6109 pci_release_selected_regions(pdev, 6110 pci_select_bars(pdev, IORESOURCE_MEM)); 6111 6112 free_netdev(netdev); 6113 6114 /* AER disable */ 6115 pci_disable_pcie_error_reporting(pdev); 6116 6117 pci_disable_device(pdev); 6118} 6119 6120/* PCI Error Recovery (ERS) */ 6121static struct pci_error_handlers e1000_err_handler = { 6122 .error_detected = e1000_io_error_detected, 6123 .slot_reset = e1000_io_slot_reset, 6124 .resume = e1000_io_resume, 6125}; 6126 6127static DEFINE_PCI_DEVICE_TABLE(e1000_pci_tbl) = { 6128 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82571EB_COPPER), board_82571 }, 6129 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82571EB_FIBER), board_82571 }, 6130 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82571EB_QUAD_COPPER), board_82571 }, 6131 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82571EB_QUAD_COPPER_LP), board_82571 }, 6132 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82571EB_QUAD_FIBER), board_82571 }, 6133 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82571EB_SERDES), board_82571 }, 6134 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82571EB_SERDES_DUAL), board_82571 }, 6135 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82571EB_SERDES_QUAD), board_82571 }, 6136 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82571PT_QUAD_COPPER), board_82571 }, 6137 6138 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82572EI), board_82572 }, 6139 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82572EI_COPPER), board_82572 }, 6140 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82572EI_FIBER), board_82572 }, 6141 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82572EI_SERDES), board_82572 }, 6142 6143 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82573E), board_82573 }, 6144 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82573E_IAMT), board_82573 }, 6145 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82573L), board_82573 }, 6146 6147 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82574L), board_82574 }, 6148 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82574LA), board_82574 }, 6149 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82583V), board_82583 }, 6150 6151 { PCI_VDEVICE(INTEL, E1000_DEV_ID_80003ES2LAN_COPPER_DPT), 6152 board_80003es2lan }, 6153 { PCI_VDEVICE(INTEL, E1000_DEV_ID_80003ES2LAN_COPPER_SPT), 6154 board_80003es2lan }, 6155 { PCI_VDEVICE(INTEL, E1000_DEV_ID_80003ES2LAN_SERDES_DPT), 6156 board_80003es2lan }, 6157 { PCI_VDEVICE(INTEL, E1000_DEV_ID_80003ES2LAN_SERDES_SPT), 6158 board_80003es2lan }, 6159 6160 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH8_IFE), board_ich8lan }, 6161 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH8_IFE_G), board_ich8lan }, 6162 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH8_IFE_GT), board_ich8lan }, 6163 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH8_IGP_AMT), board_ich8lan }, 6164 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH8_IGP_C), board_ich8lan }, 6165 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH8_IGP_M), board_ich8lan }, 6166 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH8_IGP_M_AMT), board_ich8lan }, 6167 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH8_82567V_3), board_ich8lan }, 6168 6169 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH9_IFE), board_ich9lan }, 6170 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH9_IFE_G), board_ich9lan }, 6171 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH9_IFE_GT), board_ich9lan }, 6172 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH9_IGP_AMT), board_ich9lan }, 6173 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH9_IGP_C), board_ich9lan }, 6174 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH9_BM), board_ich9lan }, 6175 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH9_IGP_M), board_ich9lan }, 6176 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH9_IGP_M_AMT), board_ich9lan }, 6177 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH9_IGP_M_V), board_ich9lan }, 6178 6179 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH10_R_BM_LM), board_ich9lan }, 6180 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH10_R_BM_LF), board_ich9lan }, 6181 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH10_R_BM_V), board_ich9lan }, 6182 6183 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH10_D_BM_LM), board_ich10lan }, 6184 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH10_D_BM_LF), board_ich10lan }, 6185 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH10_D_BM_V), board_ich10lan }, 6186 6187 { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_M_HV_LM), board_pchlan }, 6188 { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_M_HV_LC), board_pchlan }, 6189 { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_D_HV_DM), board_pchlan }, 6190 { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_D_HV_DC), board_pchlan }, 6191 6192 { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH2_LV_LM), board_pch2lan }, 6193 { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH2_LV_V), board_pch2lan }, 6194 6195 { } /* terminate list */ 6196}; 6197MODULE_DEVICE_TABLE(pci, e1000_pci_tbl); 6198 6199#ifdef CONFIG_PM_OPS 6200static const struct dev_pm_ops e1000_pm_ops = { 6201 SET_SYSTEM_SLEEP_PM_OPS(e1000_suspend, e1000_resume) 6202 SET_RUNTIME_PM_OPS(e1000_runtime_suspend, 6203 e1000_runtime_resume, e1000_idle) 6204}; 6205#endif 6206 6207/* PCI Device API Driver */ 6208static struct pci_driver e1000_driver = { 6209 .name = e1000e_driver_name, 6210 .id_table = e1000_pci_tbl, 6211 .probe = e1000_probe, 6212 .remove = __devexit_p(e1000_remove), 6213#ifdef CONFIG_PM_OPS 6214 .driver.pm = &e1000_pm_ops, 6215#endif 6216 .shutdown = e1000_shutdown, 6217 .err_handler = &e1000_err_handler 6218}; 6219 6220/** 6221 * e1000_init_module - Driver Registration Routine 6222 * 6223 * e1000_init_module is the first routine called when the driver is 6224 * loaded. All it does is register with the PCI subsystem. 6225 **/ 6226static int __init e1000_init_module(void) 6227{ 6228 int ret; 6229 pr_info("Intel(R) PRO/1000 Network Driver - %s\n", 6230 e1000e_driver_version); 6231 pr_info("Copyright(c) 1999 - 2011 Intel Corporation.\n"); 6232 ret = pci_register_driver(&e1000_driver); 6233 6234 return ret; 6235} 6236module_init(e1000_init_module); 6237 6238/** 6239 * e1000_exit_module - Driver Exit Cleanup Routine 6240 * 6241 * e1000_exit_module is called just before the driver is removed 6242 * from memory. 6243 **/ 6244static void __exit e1000_exit_module(void) 6245{ 6246 pci_unregister_driver(&e1000_driver); 6247} 6248module_exit(e1000_exit_module); 6249 6250 6251MODULE_AUTHOR("Intel Corporation, <linux.nics@intel.com>"); 6252MODULE_DESCRIPTION("Intel(R) PRO/1000 Network Driver"); 6253MODULE_LICENSE("GPL"); 6254MODULE_VERSION(DRV_VERSION); 6255 6256/* e1000_main.c */