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at v2.6.38-rc4 444 lines 11 kB view raw
1/* 2 * Support for the GPIO/IRQ expander chips present on several HTC phones. 3 * These are implemented in CPLD chips present on the board. 4 * 5 * Copyright (c) 2007 Kevin O'Connor <kevin@koconnor.net> 6 * Copyright (c) 2007 Philipp Zabel <philipp.zabel@gmail.com> 7 * 8 * This file may be distributed under the terms of the GNU GPL license. 9 */ 10 11#include <linux/kernel.h> 12#include <linux/errno.h> 13#include <linux/interrupt.h> 14#include <linux/irq.h> 15#include <linux/io.h> 16#include <linux/spinlock.h> 17#include <linux/platform_device.h> 18#include <linux/slab.h> 19#include <linux/module.h> 20#include <linux/mfd/htc-egpio.h> 21 22struct egpio_chip { 23 int reg_start; 24 int cached_values; 25 unsigned long is_out; 26 struct device *dev; 27 struct gpio_chip chip; 28}; 29 30struct egpio_info { 31 spinlock_t lock; 32 33 /* iomem info */ 34 void __iomem *base_addr; 35 int bus_shift; /* byte shift */ 36 int reg_shift; /* bit shift */ 37 int reg_mask; 38 39 /* irq info */ 40 int ack_register; 41 int ack_write; 42 u16 irqs_enabled; 43 uint irq_start; 44 int nirqs; 45 uint chained_irq; 46 47 /* egpio info */ 48 struct egpio_chip *chip; 49 int nchips; 50}; 51 52static inline void egpio_writew(u16 value, struct egpio_info *ei, int reg) 53{ 54 writew(value, ei->base_addr + (reg << ei->bus_shift)); 55} 56 57static inline u16 egpio_readw(struct egpio_info *ei, int reg) 58{ 59 return readw(ei->base_addr + (reg << ei->bus_shift)); 60} 61 62/* 63 * IRQs 64 */ 65 66static inline void ack_irqs(struct egpio_info *ei) 67{ 68 egpio_writew(ei->ack_write, ei, ei->ack_register); 69 pr_debug("EGPIO ack - write %x to base+%x\n", 70 ei->ack_write, ei->ack_register << ei->bus_shift); 71} 72 73static void egpio_ack(struct irq_data *data) 74{ 75} 76 77/* There does not appear to be a way to proactively mask interrupts 78 * on the egpio chip itself. So, we simply ignore interrupts that 79 * aren't desired. */ 80static void egpio_mask(struct irq_data *data) 81{ 82 struct egpio_info *ei = irq_data_get_irq_chip_data(data); 83 ei->irqs_enabled &= ~(1 << (data->irq - ei->irq_start)); 84 pr_debug("EGPIO mask %d %04x\n", data->irq, ei->irqs_enabled); 85} 86 87static void egpio_unmask(struct irq_data *data) 88{ 89 struct egpio_info *ei = irq_data_get_irq_chip_data(data); 90 ei->irqs_enabled |= 1 << (data->irq - ei->irq_start); 91 pr_debug("EGPIO unmask %d %04x\n", data->irq, ei->irqs_enabled); 92} 93 94static struct irq_chip egpio_muxed_chip = { 95 .name = "htc-egpio", 96 .irq_ack = egpio_ack, 97 .irq_mask = egpio_mask, 98 .irq_unmask = egpio_unmask, 99}; 100 101static void egpio_handler(unsigned int irq, struct irq_desc *desc) 102{ 103 struct egpio_info *ei = get_irq_data(irq); 104 int irqpin; 105 106 /* Read current pins. */ 107 unsigned long readval = egpio_readw(ei, ei->ack_register); 108 pr_debug("IRQ reg: %x\n", (unsigned int)readval); 109 /* Ack/unmask interrupts. */ 110 ack_irqs(ei); 111 /* Process all set pins. */ 112 readval &= ei->irqs_enabled; 113 for_each_set_bit(irqpin, &readval, ei->nirqs) { 114 /* Run irq handler */ 115 pr_debug("got IRQ %d\n", irqpin); 116 irq = ei->irq_start + irqpin; 117 desc = irq_to_desc(irq); 118 desc->handle_irq(irq, desc); 119 } 120} 121 122int htc_egpio_get_wakeup_irq(struct device *dev) 123{ 124 struct egpio_info *ei = dev_get_drvdata(dev); 125 126 /* Read current pins. */ 127 u16 readval = egpio_readw(ei, ei->ack_register); 128 /* Ack/unmask interrupts. */ 129 ack_irqs(ei); 130 /* Return first set pin. */ 131 readval &= ei->irqs_enabled; 132 return ei->irq_start + ffs(readval) - 1; 133} 134EXPORT_SYMBOL(htc_egpio_get_wakeup_irq); 135 136static inline int egpio_pos(struct egpio_info *ei, int bit) 137{ 138 return bit >> ei->reg_shift; 139} 140 141static inline int egpio_bit(struct egpio_info *ei, int bit) 142{ 143 return 1 << (bit & ((1 << ei->reg_shift)-1)); 144} 145 146/* 147 * Input pins 148 */ 149 150static int egpio_get(struct gpio_chip *chip, unsigned offset) 151{ 152 struct egpio_chip *egpio; 153 struct egpio_info *ei; 154 unsigned bit; 155 int reg; 156 int value; 157 158 pr_debug("egpio_get_value(%d)\n", chip->base + offset); 159 160 egpio = container_of(chip, struct egpio_chip, chip); 161 ei = dev_get_drvdata(egpio->dev); 162 bit = egpio_bit(ei, offset); 163 reg = egpio->reg_start + egpio_pos(ei, offset); 164 165 value = egpio_readw(ei, reg); 166 pr_debug("readw(%p + %x) = %x\n", 167 ei->base_addr, reg << ei->bus_shift, value); 168 return value & bit; 169} 170 171static int egpio_direction_input(struct gpio_chip *chip, unsigned offset) 172{ 173 struct egpio_chip *egpio; 174 175 egpio = container_of(chip, struct egpio_chip, chip); 176 return test_bit(offset, &egpio->is_out) ? -EINVAL : 0; 177} 178 179 180/* 181 * Output pins 182 */ 183 184static void egpio_set(struct gpio_chip *chip, unsigned offset, int value) 185{ 186 unsigned long flag; 187 struct egpio_chip *egpio; 188 struct egpio_info *ei; 189 unsigned bit; 190 int pos; 191 int reg; 192 int shift; 193 194 pr_debug("egpio_set(%s, %d(%d), %d)\n", 195 chip->label, offset, offset+chip->base, value); 196 197 egpio = container_of(chip, struct egpio_chip, chip); 198 ei = dev_get_drvdata(egpio->dev); 199 bit = egpio_bit(ei, offset); 200 pos = egpio_pos(ei, offset); 201 reg = egpio->reg_start + pos; 202 shift = pos << ei->reg_shift; 203 204 pr_debug("egpio %s: reg %d = 0x%04x\n", value ? "set" : "clear", 205 reg, (egpio->cached_values >> shift) & ei->reg_mask); 206 207 spin_lock_irqsave(&ei->lock, flag); 208 if (value) 209 egpio->cached_values |= (1 << offset); 210 else 211 egpio->cached_values &= ~(1 << offset); 212 egpio_writew((egpio->cached_values >> shift) & ei->reg_mask, ei, reg); 213 spin_unlock_irqrestore(&ei->lock, flag); 214} 215 216static int egpio_direction_output(struct gpio_chip *chip, 217 unsigned offset, int value) 218{ 219 struct egpio_chip *egpio; 220 221 egpio = container_of(chip, struct egpio_chip, chip); 222 if (test_bit(offset, &egpio->is_out)) { 223 egpio_set(chip, offset, value); 224 return 0; 225 } else { 226 return -EINVAL; 227 } 228} 229 230static void egpio_write_cache(struct egpio_info *ei) 231{ 232 int i; 233 struct egpio_chip *egpio; 234 int shift; 235 236 for (i = 0; i < ei->nchips; i++) { 237 egpio = &(ei->chip[i]); 238 if (!egpio->is_out) 239 continue; 240 241 for (shift = 0; shift < egpio->chip.ngpio; 242 shift += (1<<ei->reg_shift)) { 243 244 int reg = egpio->reg_start + egpio_pos(ei, shift); 245 246 if (!((egpio->is_out >> shift) & ei->reg_mask)) 247 continue; 248 249 pr_debug("EGPIO: setting %x to %x, was %x\n", reg, 250 (egpio->cached_values >> shift) & ei->reg_mask, 251 egpio_readw(ei, reg)); 252 253 egpio_writew((egpio->cached_values >> shift) 254 & ei->reg_mask, ei, reg); 255 } 256 } 257} 258 259 260/* 261 * Setup 262 */ 263 264static int __init egpio_probe(struct platform_device *pdev) 265{ 266 struct htc_egpio_platform_data *pdata = pdev->dev.platform_data; 267 struct resource *res; 268 struct egpio_info *ei; 269 struct gpio_chip *chip; 270 unsigned int irq, irq_end; 271 int i; 272 int ret; 273 274 /* Initialize ei data structure. */ 275 ei = kzalloc(sizeof(*ei), GFP_KERNEL); 276 if (!ei) 277 return -ENOMEM; 278 279 spin_lock_init(&ei->lock); 280 281 /* Find chained irq */ 282 ret = -EINVAL; 283 res = platform_get_resource(pdev, IORESOURCE_IRQ, 0); 284 if (res) 285 ei->chained_irq = res->start; 286 287 /* Map egpio chip into virtual address space. */ 288 res = platform_get_resource(pdev, IORESOURCE_MEM, 0); 289 if (!res) 290 goto fail; 291 ei->base_addr = ioremap_nocache(res->start, resource_size(res)); 292 if (!ei->base_addr) 293 goto fail; 294 pr_debug("EGPIO phys=%08x virt=%p\n", (u32)res->start, ei->base_addr); 295 296 if ((pdata->bus_width != 16) && (pdata->bus_width != 32)) 297 goto fail; 298 ei->bus_shift = fls(pdata->bus_width - 1) - 3; 299 pr_debug("bus_shift = %d\n", ei->bus_shift); 300 301 if ((pdata->reg_width != 8) && (pdata->reg_width != 16)) 302 goto fail; 303 ei->reg_shift = fls(pdata->reg_width - 1); 304 pr_debug("reg_shift = %d\n", ei->reg_shift); 305 306 ei->reg_mask = (1 << pdata->reg_width) - 1; 307 308 platform_set_drvdata(pdev, ei); 309 310 ei->nchips = pdata->num_chips; 311 ei->chip = kzalloc(sizeof(struct egpio_chip) * ei->nchips, GFP_KERNEL); 312 if (!ei->chip) { 313 ret = -ENOMEM; 314 goto fail; 315 } 316 for (i = 0; i < ei->nchips; i++) { 317 ei->chip[i].reg_start = pdata->chip[i].reg_start; 318 ei->chip[i].cached_values = pdata->chip[i].initial_values; 319 ei->chip[i].is_out = pdata->chip[i].direction; 320 ei->chip[i].dev = &(pdev->dev); 321 chip = &(ei->chip[i].chip); 322 chip->label = "htc-egpio"; 323 chip->dev = &pdev->dev; 324 chip->owner = THIS_MODULE; 325 chip->get = egpio_get; 326 chip->set = egpio_set; 327 chip->direction_input = egpio_direction_input; 328 chip->direction_output = egpio_direction_output; 329 chip->base = pdata->chip[i].gpio_base; 330 chip->ngpio = pdata->chip[i].num_gpios; 331 332 gpiochip_add(chip); 333 } 334 335 /* Set initial pin values */ 336 egpio_write_cache(ei); 337 338 ei->irq_start = pdata->irq_base; 339 ei->nirqs = pdata->num_irqs; 340 ei->ack_register = pdata->ack_register; 341 342 if (ei->chained_irq) { 343 /* Setup irq handlers */ 344 ei->ack_write = 0xFFFF; 345 if (pdata->invert_acks) 346 ei->ack_write = 0; 347 irq_end = ei->irq_start + ei->nirqs; 348 for (irq = ei->irq_start; irq < irq_end; irq++) { 349 set_irq_chip(irq, &egpio_muxed_chip); 350 set_irq_chip_data(irq, ei); 351 set_irq_handler(irq, handle_simple_irq); 352 set_irq_flags(irq, IRQF_VALID | IRQF_PROBE); 353 } 354 set_irq_type(ei->chained_irq, IRQ_TYPE_EDGE_RISING); 355 set_irq_data(ei->chained_irq, ei); 356 set_irq_chained_handler(ei->chained_irq, egpio_handler); 357 ack_irqs(ei); 358 359 device_init_wakeup(&pdev->dev, 1); 360 } 361 362 return 0; 363 364fail: 365 printk(KERN_ERR "EGPIO failed to setup\n"); 366 kfree(ei); 367 return ret; 368} 369 370static int __exit egpio_remove(struct platform_device *pdev) 371{ 372 struct egpio_info *ei = platform_get_drvdata(pdev); 373 unsigned int irq, irq_end; 374 375 if (ei->chained_irq) { 376 irq_end = ei->irq_start + ei->nirqs; 377 for (irq = ei->irq_start; irq < irq_end; irq++) { 378 set_irq_chip(irq, NULL); 379 set_irq_handler(irq, NULL); 380 set_irq_flags(irq, 0); 381 } 382 set_irq_chained_handler(ei->chained_irq, NULL); 383 device_init_wakeup(&pdev->dev, 0); 384 } 385 iounmap(ei->base_addr); 386 kfree(ei->chip); 387 kfree(ei); 388 389 return 0; 390} 391 392#ifdef CONFIG_PM 393static int egpio_suspend(struct platform_device *pdev, pm_message_t state) 394{ 395 struct egpio_info *ei = platform_get_drvdata(pdev); 396 397 if (ei->chained_irq && device_may_wakeup(&pdev->dev)) 398 enable_irq_wake(ei->chained_irq); 399 return 0; 400} 401 402static int egpio_resume(struct platform_device *pdev) 403{ 404 struct egpio_info *ei = platform_get_drvdata(pdev); 405 406 if (ei->chained_irq && device_may_wakeup(&pdev->dev)) 407 disable_irq_wake(ei->chained_irq); 408 409 /* Update registers from the cache, in case 410 the CPLD was powered off during suspend */ 411 egpio_write_cache(ei); 412 return 0; 413} 414#else 415#define egpio_suspend NULL 416#define egpio_resume NULL 417#endif 418 419 420static struct platform_driver egpio_driver = { 421 .driver = { 422 .name = "htc-egpio", 423 }, 424 .remove = __exit_p(egpio_remove), 425 .suspend = egpio_suspend, 426 .resume = egpio_resume, 427}; 428 429static int __init egpio_init(void) 430{ 431 return platform_driver_probe(&egpio_driver, egpio_probe); 432} 433 434static void __exit egpio_exit(void) 435{ 436 platform_driver_unregister(&egpio_driver); 437} 438 439/* start early for dependencies */ 440subsys_initcall(egpio_init); 441module_exit(egpio_exit) 442 443MODULE_LICENSE("GPL"); 444MODULE_AUTHOR("Kevin O'Connor <kevin@koconnor.net>");