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kernel / arch / arm / Kconfig
at v2.6.38-rc4 1916 lines 54 kB view raw
1config ARM 2 bool 3 default y 4 select HAVE_AOUT 5 select HAVE_DMA_API_DEBUG 6 select HAVE_IDE 7 select HAVE_MEMBLOCK 8 select RTC_LIB 9 select SYS_SUPPORTS_APM_EMULATION 10 select GENERIC_ATOMIC64 if (!CPU_32v6K || !AEABI) 11 select HAVE_OPROFILE if (HAVE_PERF_EVENTS) 12 select HAVE_ARCH_KGDB 13 select HAVE_KPROBES if (!XIP_KERNEL && !THUMB2_KERNEL) 14 select HAVE_KRETPROBES if (HAVE_KPROBES) 15 select HAVE_FUNCTION_TRACER if (!XIP_KERNEL) 16 select HAVE_FTRACE_MCOUNT_RECORD if (!XIP_KERNEL) 17 select HAVE_DYNAMIC_FTRACE if (!XIP_KERNEL) 18 select HAVE_FUNCTION_GRAPH_TRACER if (!THUMB2_KERNEL) 19 select HAVE_GENERIC_DMA_COHERENT 20 select HAVE_KERNEL_GZIP 21 select HAVE_KERNEL_LZO 22 select HAVE_KERNEL_LZMA 23 select HAVE_IRQ_WORK 24 select HAVE_PERF_EVENTS 25 select PERF_USE_VMALLOC 26 select HAVE_REGS_AND_STACK_ACCESS_API 27 select HAVE_HW_BREAKPOINT if (PERF_EVENTS && (CPU_V6 || CPU_V7)) 28 select HAVE_C_RECORDMCOUNT 29 select HAVE_GENERIC_HARDIRQS 30 select HAVE_SPARSE_IRQ 31 help 32 The ARM series is a line of low-power-consumption RISC chip designs 33 licensed by ARM Ltd and targeted at embedded applications and 34 handhelds such as the Compaq IPAQ. ARM-based PCs are no longer 35 manufactured, but legacy ARM-based PC hardware remains popular in 36 Europe. There is an ARM Linux project with a web page at 37 <http://www.arm.linux.org.uk/>. 38 39config HAVE_PWM 40 bool 41 42config MIGHT_HAVE_PCI 43 bool 44 45config SYS_SUPPORTS_APM_EMULATION 46 bool 47 48config HAVE_SCHED_CLOCK 49 bool 50 51config GENERIC_GPIO 52 bool 53 54config ARCH_USES_GETTIMEOFFSET 55 bool 56 default n 57 58config GENERIC_CLOCKEVENTS 59 bool 60 61config GENERIC_CLOCKEVENTS_BROADCAST 62 bool 63 depends on GENERIC_CLOCKEVENTS 64 default y if SMP 65 66config HAVE_TCM 67 bool 68 select GENERIC_ALLOCATOR 69 70config HAVE_PROC_CPU 71 bool 72 73config NO_IOPORT 74 bool 75 76config EISA 77 bool 78 ---help--- 79 The Extended Industry Standard Architecture (EISA) bus was 80 developed as an open alternative to the IBM MicroChannel bus. 81 82 The EISA bus provided some of the features of the IBM MicroChannel 83 bus while maintaining backward compatibility with cards made for 84 the older ISA bus. The EISA bus saw limited use between 1988 and 85 1995 when it was made obsolete by the PCI bus. 86 87 Say Y here if you are building a kernel for an EISA-based machine. 88 89 Otherwise, say N. 90 91config SBUS 92 bool 93 94config MCA 95 bool 96 help 97 MicroChannel Architecture is found in some IBM PS/2 machines and 98 laptops. It is a bus system similar to PCI or ISA. See 99 <file:Documentation/mca.txt> (and especially the web page given 100 there) before attempting to build an MCA bus kernel. 101 102config STACKTRACE_SUPPORT 103 bool 104 default y 105 106config HAVE_LATENCYTOP_SUPPORT 107 bool 108 depends on !SMP 109 default y 110 111config LOCKDEP_SUPPORT 112 bool 113 default y 114 115config TRACE_IRQFLAGS_SUPPORT 116 bool 117 default y 118 119config HARDIRQS_SW_RESEND 120 bool 121 default y 122 123config GENERIC_IRQ_PROBE 124 bool 125 default y 126 127config GENERIC_LOCKBREAK 128 bool 129 default y 130 depends on SMP && PREEMPT 131 132config RWSEM_GENERIC_SPINLOCK 133 bool 134 default y 135 136config RWSEM_XCHGADD_ALGORITHM 137 bool 138 139config ARCH_HAS_ILOG2_U32 140 bool 141 142config ARCH_HAS_ILOG2_U64 143 bool 144 145config ARCH_HAS_CPUFREQ 146 bool 147 help 148 Internal node to signify that the ARCH has CPUFREQ support 149 and that the relevant menu configurations are displayed for 150 it. 151 152config ARCH_HAS_CPU_IDLE_WAIT 153 def_bool y 154 155config GENERIC_HWEIGHT 156 bool 157 default y 158 159config GENERIC_CALIBRATE_DELAY 160 bool 161 default y 162 163config ARCH_MAY_HAVE_PC_FDC 164 bool 165 166config ZONE_DMA 167 bool 168 169config NEED_DMA_MAP_STATE 170 def_bool y 171 172config GENERIC_ISA_DMA 173 bool 174 175config FIQ 176 bool 177 178config ARCH_MTD_XIP 179 bool 180 181config ARM_L1_CACHE_SHIFT_6 182 bool 183 help 184 Setting ARM L1 cache line size to 64 Bytes. 185 186config VECTORS_BASE 187 hex 188 default 0xffff0000 if MMU || CPU_HIGH_VECTOR 189 default DRAM_BASE if REMAP_VECTORS_TO_RAM 190 default 0x00000000 191 help 192 The base address of exception vectors. 193 194source "init/Kconfig" 195 196source "kernel/Kconfig.freezer" 197 198menu "System Type" 199 200config MMU 201 bool "MMU-based Paged Memory Management Support" 202 default y 203 help 204 Select if you want MMU-based virtualised addressing space 205 support by paged memory management. If unsure, say 'Y'. 206 207# 208# The "ARM system type" choice list is ordered alphabetically by option 209# text. Please add new entries in the option alphabetic order. 210# 211choice 212 prompt "ARM system type" 213 default ARCH_VERSATILE 214 215config ARCH_AAEC2000 216 bool "Agilent AAEC-2000 based" 217 select CPU_ARM920T 218 select ARM_AMBA 219 select HAVE_CLK 220 select ARCH_USES_GETTIMEOFFSET 221 help 222 This enables support for systems based on the Agilent AAEC-2000 223 224config ARCH_INTEGRATOR 225 bool "ARM Ltd. Integrator family" 226 select ARM_AMBA 227 select ARCH_HAS_CPUFREQ 228 select CLKDEV_LOOKUP 229 select ICST 230 select GENERIC_CLOCKEVENTS 231 select PLAT_VERSATILE 232 help 233 Support for ARM's Integrator platform. 234 235config ARCH_REALVIEW 236 bool "ARM Ltd. RealView family" 237 select ARM_AMBA 238 select CLKDEV_LOOKUP 239 select HAVE_SCHED_CLOCK 240 select ICST 241 select GENERIC_CLOCKEVENTS 242 select ARCH_WANT_OPTIONAL_GPIOLIB 243 select PLAT_VERSATILE 244 select ARM_TIMER_SP804 245 select GPIO_PL061 if GPIOLIB 246 help 247 This enables support for ARM Ltd RealView boards. 248 249config ARCH_VERSATILE 250 bool "ARM Ltd. Versatile family" 251 select ARM_AMBA 252 select ARM_VIC 253 select CLKDEV_LOOKUP 254 select HAVE_SCHED_CLOCK 255 select ICST 256 select GENERIC_CLOCKEVENTS 257 select ARCH_WANT_OPTIONAL_GPIOLIB 258 select PLAT_VERSATILE 259 select ARM_TIMER_SP804 260 help 261 This enables support for ARM Ltd Versatile board. 262 263config ARCH_VEXPRESS 264 bool "ARM Ltd. Versatile Express family" 265 select ARCH_WANT_OPTIONAL_GPIOLIB 266 select ARM_AMBA 267 select ARM_TIMER_SP804 268 select CLKDEV_LOOKUP 269 select GENERIC_CLOCKEVENTS 270 select HAVE_CLK 271 select HAVE_SCHED_CLOCK 272 select ICST 273 select PLAT_VERSATILE 274 help 275 This enables support for the ARM Ltd Versatile Express boards. 276 277config ARCH_AT91 278 bool "Atmel AT91" 279 select ARCH_REQUIRE_GPIOLIB 280 select HAVE_CLK 281 help 282 This enables support for systems based on the Atmel AT91RM9200, 283 AT91SAM9 and AT91CAP9 processors. 284 285config ARCH_BCMRING 286 bool "Broadcom BCMRING" 287 depends on MMU 288 select CPU_V6 289 select ARM_AMBA 290 select CLKDEV_LOOKUP 291 select GENERIC_CLOCKEVENTS 292 select ARCH_WANT_OPTIONAL_GPIOLIB 293 help 294 Support for Broadcom's BCMRing platform. 295 296config ARCH_CLPS711X 297 bool "Cirrus Logic CLPS711x/EP721x-based" 298 select CPU_ARM720T 299 select ARCH_USES_GETTIMEOFFSET 300 help 301 Support for Cirrus Logic 711x/721x based boards. 302 303config ARCH_CNS3XXX 304 bool "Cavium Networks CNS3XXX family" 305 select CPU_V6 306 select GENERIC_CLOCKEVENTS 307 select ARM_GIC 308 select MIGHT_HAVE_PCI 309 select PCI_DOMAINS if PCI 310 help 311 Support for Cavium Networks CNS3XXX platform. 312 313config ARCH_GEMINI 314 bool "Cortina Systems Gemini" 315 select CPU_FA526 316 select ARCH_REQUIRE_GPIOLIB 317 select ARCH_USES_GETTIMEOFFSET 318 help 319 Support for the Cortina Systems Gemini family SoCs 320 321config ARCH_EBSA110 322 bool "EBSA-110" 323 select CPU_SA110 324 select ISA 325 select NO_IOPORT 326 select ARCH_USES_GETTIMEOFFSET 327 help 328 This is an evaluation board for the StrongARM processor available 329 from Digital. It has limited hardware on-board, including an 330 Ethernet interface, two PCMCIA sockets, two serial ports and a 331 parallel port. 332 333config ARCH_EP93XX 334 bool "EP93xx-based" 335 select CPU_ARM920T 336 select ARM_AMBA 337 select ARM_VIC 338 select CLKDEV_LOOKUP 339 select ARCH_REQUIRE_GPIOLIB 340 select ARCH_HAS_HOLES_MEMORYMODEL 341 select ARCH_USES_GETTIMEOFFSET 342 help 343 This enables support for the Cirrus EP93xx series of CPUs. 344 345config ARCH_FOOTBRIDGE 346 bool "FootBridge" 347 select CPU_SA110 348 select FOOTBRIDGE 349 select ARCH_USES_GETTIMEOFFSET 350 help 351 Support for systems based on the DC21285 companion chip 352 ("FootBridge"), such as the Simtec CATS and the Rebel NetWinder. 353 354config ARCH_MXC 355 bool "Freescale MXC/iMX-based" 356 select GENERIC_CLOCKEVENTS 357 select ARCH_REQUIRE_GPIOLIB 358 select CLKDEV_LOOKUP 359 help 360 Support for Freescale MXC/iMX-based family of processors 361 362config ARCH_MXS 363 bool "Freescale MXS-based" 364 select GENERIC_CLOCKEVENTS 365 select ARCH_REQUIRE_GPIOLIB 366 select CLKDEV_LOOKUP 367 help 368 Support for Freescale MXS-based family of processors 369 370config ARCH_STMP3XXX 371 bool "Freescale STMP3xxx" 372 select CPU_ARM926T 373 select CLKDEV_LOOKUP 374 select ARCH_REQUIRE_GPIOLIB 375 select GENERIC_CLOCKEVENTS 376 select USB_ARCH_HAS_EHCI 377 help 378 Support for systems based on the Freescale 3xxx CPUs. 379 380config ARCH_NETX 381 bool "Hilscher NetX based" 382 select CPU_ARM926T 383 select ARM_VIC 384 select GENERIC_CLOCKEVENTS 385 help 386 This enables support for systems based on the Hilscher NetX Soc 387 388config ARCH_H720X 389 bool "Hynix HMS720x-based" 390 select CPU_ARM720T 391 select ISA_DMA_API 392 select ARCH_USES_GETTIMEOFFSET 393 help 394 This enables support for systems based on the Hynix HMS720x 395 396config ARCH_IOP13XX 397 bool "IOP13xx-based" 398 depends on MMU 399 select CPU_XSC3 400 select PLAT_IOP 401 select PCI 402 select ARCH_SUPPORTS_MSI 403 select VMSPLIT_1G 404 help 405 Support for Intel's IOP13XX (XScale) family of processors. 406 407config ARCH_IOP32X 408 bool "IOP32x-based" 409 depends on MMU 410 select CPU_XSCALE 411 select PLAT_IOP 412 select PCI 413 select ARCH_REQUIRE_GPIOLIB 414 help 415 Support for Intel's 80219 and IOP32X (XScale) family of 416 processors. 417 418config ARCH_IOP33X 419 bool "IOP33x-based" 420 depends on MMU 421 select CPU_XSCALE 422 select PLAT_IOP 423 select PCI 424 select ARCH_REQUIRE_GPIOLIB 425 help 426 Support for Intel's IOP33X (XScale) family of processors. 427 428config ARCH_IXP23XX 429 bool "IXP23XX-based" 430 depends on MMU 431 select CPU_XSC3 432 select PCI 433 select ARCH_USES_GETTIMEOFFSET 434 help 435 Support for Intel's IXP23xx (XScale) family of processors. 436 437config ARCH_IXP2000 438 bool "IXP2400/2800-based" 439 depends on MMU 440 select CPU_XSCALE 441 select PCI 442 select ARCH_USES_GETTIMEOFFSET 443 help 444 Support for Intel's IXP2400/2800 (XScale) family of processors. 445 446config ARCH_IXP4XX 447 bool "IXP4xx-based" 448 depends on MMU 449 select CPU_XSCALE 450 select GENERIC_GPIO 451 select GENERIC_CLOCKEVENTS 452 select HAVE_SCHED_CLOCK 453 select MIGHT_HAVE_PCI 454 select DMABOUNCE if PCI 455 help 456 Support for Intel's IXP4XX (XScale) family of processors. 457 458config ARCH_DOVE 459 bool "Marvell Dove" 460 select PCI 461 select ARCH_REQUIRE_GPIOLIB 462 select GENERIC_CLOCKEVENTS 463 select PLAT_ORION 464 help 465 Support for the Marvell Dove SoC 88AP510 466 467config ARCH_KIRKWOOD 468 bool "Marvell Kirkwood" 469 select CPU_FEROCEON 470 select PCI 471 select ARCH_REQUIRE_GPIOLIB 472 select GENERIC_CLOCKEVENTS 473 select PLAT_ORION 474 help 475 Support for the following Marvell Kirkwood series SoCs: 476 88F6180, 88F6192 and 88F6281. 477 478config ARCH_LOKI 479 bool "Marvell Loki (88RC8480)" 480 select CPU_FEROCEON 481 select GENERIC_CLOCKEVENTS 482 select PLAT_ORION 483 help 484 Support for the Marvell Loki (88RC8480) SoC. 485 486config ARCH_LPC32XX 487 bool "NXP LPC32XX" 488 select CPU_ARM926T 489 select ARCH_REQUIRE_GPIOLIB 490 select HAVE_IDE 491 select ARM_AMBA 492 select USB_ARCH_HAS_OHCI 493 select CLKDEV_LOOKUP 494 select GENERIC_TIME 495 select GENERIC_CLOCKEVENTS 496 help 497 Support for the NXP LPC32XX family of processors 498 499config ARCH_MV78XX0 500 bool "Marvell MV78xx0" 501 select CPU_FEROCEON 502 select PCI 503 select ARCH_REQUIRE_GPIOLIB 504 select GENERIC_CLOCKEVENTS 505 select PLAT_ORION 506 help 507 Support for the following Marvell MV78xx0 series SoCs: 508 MV781x0, MV782x0. 509 510config ARCH_ORION5X 511 bool "Marvell Orion" 512 depends on MMU 513 select CPU_FEROCEON 514 select PCI 515 select ARCH_REQUIRE_GPIOLIB 516 select GENERIC_CLOCKEVENTS 517 select PLAT_ORION 518 help 519 Support for the following Marvell Orion 5x series SoCs: 520 Orion-1 (5181), Orion-VoIP (5181L), Orion-NAS (5182), 521 Orion-2 (5281), Orion-1-90 (6183). 522 523config ARCH_MMP 524 bool "Marvell PXA168/910/MMP2" 525 depends on MMU 526 select ARCH_REQUIRE_GPIOLIB 527 select CLKDEV_LOOKUP 528 select GENERIC_CLOCKEVENTS 529 select HAVE_SCHED_CLOCK 530 select TICK_ONESHOT 531 select PLAT_PXA 532 select SPARSE_IRQ 533 help 534 Support for Marvell's PXA168/PXA910(MMP) and MMP2 processor line. 535 536config ARCH_KS8695 537 bool "Micrel/Kendin KS8695" 538 select CPU_ARM922T 539 select ARCH_REQUIRE_GPIOLIB 540 select ARCH_USES_GETTIMEOFFSET 541 help 542 Support for Micrel/Kendin KS8695 "Centaur" (ARM922T) based 543 System-on-Chip devices. 544 545config ARCH_NS9XXX 546 bool "NetSilicon NS9xxx" 547 select CPU_ARM926T 548 select GENERIC_GPIO 549 select GENERIC_CLOCKEVENTS 550 select HAVE_CLK 551 help 552 Say Y here if you intend to run this kernel on a NetSilicon NS9xxx 553 System. 554 555 <http://www.digi.com/products/microprocessors/index.jsp> 556 557config ARCH_W90X900 558 bool "Nuvoton W90X900 CPU" 559 select CPU_ARM926T 560 select ARCH_REQUIRE_GPIOLIB 561 select CLKDEV_LOOKUP 562 select GENERIC_CLOCKEVENTS 563 help 564 Support for Nuvoton (Winbond logic dept.) ARM9 processor, 565 At present, the w90x900 has been renamed nuc900, regarding 566 the ARM series product line, you can login the following 567 link address to know more. 568 569 <http://www.nuvoton.com/hq/enu/ProductAndSales/ProductLines/ 570 ConsumerElectronicsIC/ARMMicrocontroller/ARMMicrocontroller> 571 572config ARCH_NUC93X 573 bool "Nuvoton NUC93X CPU" 574 select CPU_ARM926T 575 select CLKDEV_LOOKUP 576 help 577 Support for Nuvoton (Winbond logic dept.) NUC93X MCU,The NUC93X is a 578 low-power and high performance MPEG-4/JPEG multimedia controller chip. 579 580config ARCH_TEGRA 581 bool "NVIDIA Tegra" 582 select CLKDEV_LOOKUP 583 select GENERIC_TIME 584 select GENERIC_CLOCKEVENTS 585 select GENERIC_GPIO 586 select HAVE_CLK 587 select HAVE_SCHED_CLOCK 588 select ARCH_HAS_BARRIERS if CACHE_L2X0 589 select ARCH_HAS_CPUFREQ 590 help 591 This enables support for NVIDIA Tegra based systems (Tegra APX, 592 Tegra 6xx and Tegra 2 series). 593 594config ARCH_PNX4008 595 bool "Philips Nexperia PNX4008 Mobile" 596 select CPU_ARM926T 597 select CLKDEV_LOOKUP 598 select ARCH_USES_GETTIMEOFFSET 599 help 600 This enables support for Philips PNX4008 mobile platform. 601 602config ARCH_PXA 603 bool "PXA2xx/PXA3xx-based" 604 depends on MMU 605 select ARCH_MTD_XIP 606 select ARCH_HAS_CPUFREQ 607 select CLKDEV_LOOKUP 608 select ARCH_REQUIRE_GPIOLIB 609 select GENERIC_CLOCKEVENTS 610 select HAVE_SCHED_CLOCK 611 select TICK_ONESHOT 612 select PLAT_PXA 613 select SPARSE_IRQ 614 help 615 Support for Intel/Marvell's PXA2xx/PXA3xx processor line. 616 617config ARCH_MSM 618 bool "Qualcomm MSM" 619 select HAVE_CLK 620 select GENERIC_CLOCKEVENTS 621 select ARCH_REQUIRE_GPIOLIB 622 help 623 Support for Qualcomm MSM/QSD based systems. This runs on the 624 apps processor of the MSM/QSD and depends on a shared memory 625 interface to the modem processor which runs the baseband 626 stack and controls some vital subsystems 627 (clock and power control, etc). 628 629config ARCH_SHMOBILE 630 bool "Renesas SH-Mobile / R-Mobile" 631 select HAVE_CLK 632 select CLKDEV_LOOKUP 633 select GENERIC_CLOCKEVENTS 634 select NO_IOPORT 635 select SPARSE_IRQ 636 select MULTI_IRQ_HANDLER 637 help 638 Support for Renesas's SH-Mobile and R-Mobile ARM platforms. 639 640config ARCH_RPC 641 bool "RiscPC" 642 select ARCH_ACORN 643 select FIQ 644 select TIMER_ACORN 645 select ARCH_MAY_HAVE_PC_FDC 646 select HAVE_PATA_PLATFORM 647 select ISA_DMA_API 648 select NO_IOPORT 649 select ARCH_SPARSEMEM_ENABLE 650 select ARCH_USES_GETTIMEOFFSET 651 help 652 On the Acorn Risc-PC, Linux can support the internal IDE disk and 653 CD-ROM interface, serial and parallel port, and the floppy drive. 654 655config ARCH_SA1100 656 bool "SA1100-based" 657 select CPU_SA1100 658 select ISA 659 select ARCH_SPARSEMEM_ENABLE 660 select ARCH_MTD_XIP 661 select ARCH_HAS_CPUFREQ 662 select CPU_FREQ 663 select GENERIC_CLOCKEVENTS 664 select HAVE_CLK 665 select HAVE_SCHED_CLOCK 666 select TICK_ONESHOT 667 select ARCH_REQUIRE_GPIOLIB 668 help 669 Support for StrongARM 11x0 based boards. 670 671config ARCH_S3C2410 672 bool "Samsung S3C2410, S3C2412, S3C2413, S3C2416, S3C2440, S3C2442, S3C2443, S3C2450" 673 select GENERIC_GPIO 674 select ARCH_HAS_CPUFREQ 675 select HAVE_CLK 676 select ARCH_USES_GETTIMEOFFSET 677 select HAVE_S3C2410_I2C if I2C 678 help 679 Samsung S3C2410X CPU based systems, such as the Simtec Electronics 680 BAST (<http://www.simtec.co.uk/products/EB110ITX/>), the IPAQ 1940 or 681 the Samsung SMDK2410 development board (and derivatives). 682 683 Note, the S3C2416 and the S3C2450 are so close that they even share 684 the same SoC ID code. This means that there is no seperate machine 685 directory (no arch/arm/mach-s3c2450) as the S3C2416 was first. 686 687config ARCH_S3C64XX 688 bool "Samsung S3C64XX" 689 select PLAT_SAMSUNG 690 select CPU_V6 691 select ARM_VIC 692 select HAVE_CLK 693 select NO_IOPORT 694 select ARCH_USES_GETTIMEOFFSET 695 select ARCH_HAS_CPUFREQ 696 select ARCH_REQUIRE_GPIOLIB 697 select SAMSUNG_CLKSRC 698 select SAMSUNG_IRQ_VIC_TIMER 699 select SAMSUNG_IRQ_UART 700 select S3C_GPIO_TRACK 701 select S3C_GPIO_PULL_UPDOWN 702 select S3C_GPIO_CFG_S3C24XX 703 select S3C_GPIO_CFG_S3C64XX 704 select S3C_DEV_NAND 705 select USB_ARCH_HAS_OHCI 706 select SAMSUNG_GPIOLIB_4BIT 707 select HAVE_S3C2410_I2C if I2C 708 select HAVE_S3C2410_WATCHDOG if WATCHDOG 709 help 710 Samsung S3C64XX series based systems 711 712config ARCH_S5P64X0 713 bool "Samsung S5P6440 S5P6450" 714 select CPU_V6 715 select GENERIC_GPIO 716 select HAVE_CLK 717 select HAVE_S3C2410_WATCHDOG if WATCHDOG 718 select ARCH_USES_GETTIMEOFFSET 719 select HAVE_S3C2410_I2C if I2C 720 select HAVE_S3C_RTC if RTC_CLASS 721 help 722 Samsung S5P64X0 CPU based systems, such as the Samsung SMDK6440, 723 SMDK6450. 724 725config ARCH_S5P6442 726 bool "Samsung S5P6442" 727 select CPU_V6 728 select GENERIC_GPIO 729 select HAVE_CLK 730 select ARCH_USES_GETTIMEOFFSET 731 select HAVE_S3C2410_WATCHDOG if WATCHDOG 732 help 733 Samsung S5P6442 CPU based systems 734 735config ARCH_S5PC100 736 bool "Samsung S5PC100" 737 select GENERIC_GPIO 738 select HAVE_CLK 739 select CPU_V7 740 select ARM_L1_CACHE_SHIFT_6 741 select ARCH_USES_GETTIMEOFFSET 742 select HAVE_S3C2410_I2C if I2C 743 select HAVE_S3C_RTC if RTC_CLASS 744 select HAVE_S3C2410_WATCHDOG if WATCHDOG 745 help 746 Samsung S5PC100 series based systems 747 748config ARCH_S5PV210 749 bool "Samsung S5PV210/S5PC110" 750 select CPU_V7 751 select ARCH_SPARSEMEM_ENABLE 752 select GENERIC_GPIO 753 select HAVE_CLK 754 select ARM_L1_CACHE_SHIFT_6 755 select ARCH_HAS_CPUFREQ 756 select ARCH_USES_GETTIMEOFFSET 757 select HAVE_S3C2410_I2C if I2C 758 select HAVE_S3C_RTC if RTC_CLASS 759 select HAVE_S3C2410_WATCHDOG if WATCHDOG 760 help 761 Samsung S5PV210/S5PC110 series based systems 762 763config ARCH_S5PV310 764 bool "Samsung S5PV310/S5PC210" 765 select CPU_V7 766 select ARCH_SPARSEMEM_ENABLE 767 select GENERIC_GPIO 768 select HAVE_CLK 769 select ARCH_HAS_CPUFREQ 770 select GENERIC_CLOCKEVENTS 771 select HAVE_S3C_RTC if RTC_CLASS 772 select HAVE_S3C2410_I2C if I2C 773 select HAVE_S3C2410_WATCHDOG if WATCHDOG 774 help 775 Samsung S5PV310 series based systems 776 777config ARCH_SHARK 778 bool "Shark" 779 select CPU_SA110 780 select ISA 781 select ISA_DMA 782 select ZONE_DMA 783 select PCI 784 select ARCH_USES_GETTIMEOFFSET 785 help 786 Support for the StrongARM based Digital DNARD machine, also known 787 as "Shark" (<http://www.shark-linux.de/shark.html>). 788 789config ARCH_TCC_926 790 bool "Telechips TCC ARM926-based systems" 791 select CPU_ARM926T 792 select HAVE_CLK 793 select CLKDEV_LOOKUP 794 select GENERIC_CLOCKEVENTS 795 help 796 Support for Telechips TCC ARM926-based systems. 797 798config ARCH_LH7A40X 799 bool "Sharp LH7A40X" 800 select CPU_ARM922T 801 select ARCH_SPARSEMEM_ENABLE if !LH7A40X_CONTIGMEM 802 select ARCH_USES_GETTIMEOFFSET 803 help 804 Say Y here for systems based on one of the Sharp LH7A40X 805 System on a Chip processors. These CPUs include an ARM922T 806 core with a wide array of integrated devices for 807 hand-held and low-power applications. 808 809config ARCH_U300 810 bool "ST-Ericsson U300 Series" 811 depends on MMU 812 select CPU_ARM926T 813 select HAVE_SCHED_CLOCK 814 select HAVE_TCM 815 select ARM_AMBA 816 select ARM_VIC 817 select GENERIC_CLOCKEVENTS 818 select CLKDEV_LOOKUP 819 select GENERIC_GPIO 820 help 821 Support for ST-Ericsson U300 series mobile platforms. 822 823config ARCH_U8500 824 bool "ST-Ericsson U8500 Series" 825 select CPU_V7 826 select ARM_AMBA 827 select GENERIC_CLOCKEVENTS 828 select CLKDEV_LOOKUP 829 select ARCH_REQUIRE_GPIOLIB 830 select ARCH_HAS_CPUFREQ 831 help 832 Support for ST-Ericsson's Ux500 architecture 833 834config ARCH_NOMADIK 835 bool "STMicroelectronics Nomadik" 836 select ARM_AMBA 837 select ARM_VIC 838 select CPU_ARM926T 839 select CLKDEV_LOOKUP 840 select GENERIC_CLOCKEVENTS 841 select ARCH_REQUIRE_GPIOLIB 842 help 843 Support for the Nomadik platform by ST-Ericsson 844 845config ARCH_DAVINCI 846 bool "TI DaVinci" 847 select GENERIC_CLOCKEVENTS 848 select ARCH_REQUIRE_GPIOLIB 849 select ZONE_DMA 850 select HAVE_IDE 851 select CLKDEV_LOOKUP 852 select GENERIC_ALLOCATOR 853 select ARCH_HAS_HOLES_MEMORYMODEL 854 help 855 Support for TI's DaVinci platform. 856 857config ARCH_OMAP 858 bool "TI OMAP" 859 select HAVE_CLK 860 select ARCH_REQUIRE_GPIOLIB 861 select ARCH_HAS_CPUFREQ 862 select GENERIC_CLOCKEVENTS 863 select HAVE_SCHED_CLOCK 864 select ARCH_HAS_HOLES_MEMORYMODEL 865 help 866 Support for TI's OMAP platform (OMAP1/2/3/4). 867 868config PLAT_SPEAR 869 bool "ST SPEAr" 870 select ARM_AMBA 871 select ARCH_REQUIRE_GPIOLIB 872 select CLKDEV_LOOKUP 873 select GENERIC_CLOCKEVENTS 874 select HAVE_CLK 875 help 876 Support for ST's SPEAr platform (SPEAr3xx, SPEAr6xx and SPEAr13xx). 877 878endchoice 879 880# 881# This is sorted alphabetically by mach-* pathname. However, plat-* 882# Kconfigs may be included either alphabetically (according to the 883# plat- suffix) or along side the corresponding mach-* source. 884# 885source "arch/arm/mach-aaec2000/Kconfig" 886 887source "arch/arm/mach-at91/Kconfig" 888 889source "arch/arm/mach-bcmring/Kconfig" 890 891source "arch/arm/mach-clps711x/Kconfig" 892 893source "arch/arm/mach-cns3xxx/Kconfig" 894 895source "arch/arm/mach-davinci/Kconfig" 896 897source "arch/arm/mach-dove/Kconfig" 898 899source "arch/arm/mach-ep93xx/Kconfig" 900 901source "arch/arm/mach-footbridge/Kconfig" 902 903source "arch/arm/mach-gemini/Kconfig" 904 905source "arch/arm/mach-h720x/Kconfig" 906 907source "arch/arm/mach-integrator/Kconfig" 908 909source "arch/arm/mach-iop32x/Kconfig" 910 911source "arch/arm/mach-iop33x/Kconfig" 912 913source "arch/arm/mach-iop13xx/Kconfig" 914 915source "arch/arm/mach-ixp4xx/Kconfig" 916 917source "arch/arm/mach-ixp2000/Kconfig" 918 919source "arch/arm/mach-ixp23xx/Kconfig" 920 921source "arch/arm/mach-kirkwood/Kconfig" 922 923source "arch/arm/mach-ks8695/Kconfig" 924 925source "arch/arm/mach-lh7a40x/Kconfig" 926 927source "arch/arm/mach-loki/Kconfig" 928 929source "arch/arm/mach-lpc32xx/Kconfig" 930 931source "arch/arm/mach-msm/Kconfig" 932 933source "arch/arm/mach-mv78xx0/Kconfig" 934 935source "arch/arm/plat-mxc/Kconfig" 936 937source "arch/arm/mach-mxs/Kconfig" 938 939source "arch/arm/mach-netx/Kconfig" 940 941source "arch/arm/mach-nomadik/Kconfig" 942source "arch/arm/plat-nomadik/Kconfig" 943 944source "arch/arm/mach-ns9xxx/Kconfig" 945 946source "arch/arm/mach-nuc93x/Kconfig" 947 948source "arch/arm/plat-omap/Kconfig" 949 950source "arch/arm/mach-omap1/Kconfig" 951 952source "arch/arm/mach-omap2/Kconfig" 953 954source "arch/arm/mach-orion5x/Kconfig" 955 956source "arch/arm/mach-pxa/Kconfig" 957source "arch/arm/plat-pxa/Kconfig" 958 959source "arch/arm/mach-mmp/Kconfig" 960 961source "arch/arm/mach-realview/Kconfig" 962 963source "arch/arm/mach-sa1100/Kconfig" 964 965source "arch/arm/plat-samsung/Kconfig" 966source "arch/arm/plat-s3c24xx/Kconfig" 967source "arch/arm/plat-s5p/Kconfig" 968 969source "arch/arm/plat-spear/Kconfig" 970 971source "arch/arm/plat-tcc/Kconfig" 972 973if ARCH_S3C2410 974source "arch/arm/mach-s3c2400/Kconfig" 975source "arch/arm/mach-s3c2410/Kconfig" 976source "arch/arm/mach-s3c2412/Kconfig" 977source "arch/arm/mach-s3c2416/Kconfig" 978source "arch/arm/mach-s3c2440/Kconfig" 979source "arch/arm/mach-s3c2443/Kconfig" 980endif 981 982if ARCH_S3C64XX 983source "arch/arm/mach-s3c64xx/Kconfig" 984endif 985 986source "arch/arm/mach-s5p64x0/Kconfig" 987 988source "arch/arm/mach-s5p6442/Kconfig" 989 990source "arch/arm/mach-s5pc100/Kconfig" 991 992source "arch/arm/mach-s5pv210/Kconfig" 993 994source "arch/arm/mach-s5pv310/Kconfig" 995 996source "arch/arm/mach-shmobile/Kconfig" 997 998source "arch/arm/plat-stmp3xxx/Kconfig" 999 1000source "arch/arm/mach-tegra/Kconfig" 1001 1002source "arch/arm/mach-u300/Kconfig" 1003 1004source "arch/arm/mach-ux500/Kconfig" 1005 1006source "arch/arm/mach-versatile/Kconfig" 1007 1008source "arch/arm/mach-vexpress/Kconfig" 1009 1010source "arch/arm/mach-w90x900/Kconfig" 1011 1012# Definitions to make life easier 1013config ARCH_ACORN 1014 bool 1015 1016config PLAT_IOP 1017 bool 1018 select GENERIC_CLOCKEVENTS 1019 select HAVE_SCHED_CLOCK 1020 1021config PLAT_ORION 1022 bool 1023 select HAVE_SCHED_CLOCK 1024 1025config PLAT_PXA 1026 bool 1027 1028config PLAT_VERSATILE 1029 bool 1030 1031config ARM_TIMER_SP804 1032 bool 1033 1034source arch/arm/mm/Kconfig 1035 1036config IWMMXT 1037 bool "Enable iWMMXt support" 1038 depends on CPU_XSCALE || CPU_XSC3 || CPU_MOHAWK || CPU_PJ4 1039 default y if PXA27x || PXA3xx || PXA95x || ARCH_MMP 1040 help 1041 Enable support for iWMMXt context switching at run time if 1042 running on a CPU that supports it. 1043 1044# bool 'Use XScale PMU as timer source' CONFIG_XSCALE_PMU_TIMER 1045config XSCALE_PMU 1046 bool 1047 depends on CPU_XSCALE && !XSCALE_PMU_TIMER 1048 default y 1049 1050config CPU_HAS_PMU 1051 depends on (CPU_V6 || CPU_V7 || XSCALE_PMU) && \ 1052 (!ARCH_OMAP3 || OMAP3_EMU) 1053 default y 1054 bool 1055 1056config MULTI_IRQ_HANDLER 1057 bool 1058 help 1059 Allow each machine to specify it's own IRQ handler at run time. 1060 1061if !MMU 1062source "arch/arm/Kconfig-nommu" 1063endif 1064 1065config ARM_ERRATA_411920 1066 bool "ARM errata: Invalidation of the Instruction Cache operation can fail" 1067 depends on CPU_V6 1068 help 1069 Invalidation of the Instruction Cache operation can 1070 fail. This erratum is present in 1136 (before r1p4), 1156 and 1176. 1071 It does not affect the MPCore. This option enables the ARM Ltd. 1072 recommended workaround. 1073 1074config ARM_ERRATA_430973 1075 bool "ARM errata: Stale prediction on replaced interworking branch" 1076 depends on CPU_V7 1077 help 1078 This option enables the workaround for the 430973 Cortex-A8 1079 (r1p0..r1p2) erratum. If a code sequence containing an ARM/Thumb 1080 interworking branch is replaced with another code sequence at the 1081 same virtual address, whether due to self-modifying code or virtual 1082 to physical address re-mapping, Cortex-A8 does not recover from the 1083 stale interworking branch prediction. This results in Cortex-A8 1084 executing the new code sequence in the incorrect ARM or Thumb state. 1085 The workaround enables the BTB/BTAC operations by setting ACTLR.IBE 1086 and also flushes the branch target cache at every context switch. 1087 Note that setting specific bits in the ACTLR register may not be 1088 available in non-secure mode. 1089 1090config ARM_ERRATA_458693 1091 bool "ARM errata: Processor deadlock when a false hazard is created" 1092 depends on CPU_V7 1093 help 1094 This option enables the workaround for the 458693 Cortex-A8 (r2p0) 1095 erratum. For very specific sequences of memory operations, it is 1096 possible for a hazard condition intended for a cache line to instead 1097 be incorrectly associated with a different cache line. This false 1098 hazard might then cause a processor deadlock. The workaround enables 1099 the L1 caching of the NEON accesses and disables the PLD instruction 1100 in the ACTLR register. Note that setting specific bits in the ACTLR 1101 register may not be available in non-secure mode. 1102 1103config ARM_ERRATA_460075 1104 bool "ARM errata: Data written to the L2 cache can be overwritten with stale data" 1105 depends on CPU_V7 1106 help 1107 This option enables the workaround for the 460075 Cortex-A8 (r2p0) 1108 erratum. Any asynchronous access to the L2 cache may encounter a 1109 situation in which recent store transactions to the L2 cache are lost 1110 and overwritten with stale memory contents from external memory. The 1111 workaround disables the write-allocate mode for the L2 cache via the 1112 ACTLR register. Note that setting specific bits in the ACTLR register 1113 may not be available in non-secure mode. 1114 1115config ARM_ERRATA_742230 1116 bool "ARM errata: DMB operation may be faulty" 1117 depends on CPU_V7 && SMP 1118 help 1119 This option enables the workaround for the 742230 Cortex-A9 1120 (r1p0..r2p2) erratum. Under rare circumstances, a DMB instruction 1121 between two write operations may not ensure the correct visibility 1122 ordering of the two writes. This workaround sets a specific bit in 1123 the diagnostic register of the Cortex-A9 which causes the DMB 1124 instruction to behave as a DSB, ensuring the correct behaviour of 1125 the two writes. 1126 1127config ARM_ERRATA_742231 1128 bool "ARM errata: Incorrect hazard handling in the SCU may lead to data corruption" 1129 depends on CPU_V7 && SMP 1130 help 1131 This option enables the workaround for the 742231 Cortex-A9 1132 (r2p0..r2p2) erratum. Under certain conditions, specific to the 1133 Cortex-A9 MPCore micro-architecture, two CPUs working in SMP mode, 1134 accessing some data located in the same cache line, may get corrupted 1135 data due to bad handling of the address hazard when the line gets 1136 replaced from one of the CPUs at the same time as another CPU is 1137 accessing it. This workaround sets specific bits in the diagnostic 1138 register of the Cortex-A9 which reduces the linefill issuing 1139 capabilities of the processor. 1140 1141config PL310_ERRATA_588369 1142 bool "Clean & Invalidate maintenance operations do not invalidate clean lines" 1143 depends on CACHE_L2X0 && ARCH_OMAP4 1144 help 1145 The PL310 L2 cache controller implements three types of Clean & 1146 Invalidate maintenance operations: by Physical Address 1147 (offset 0x7F0), by Index/Way (0x7F8) and by Way (0x7FC). 1148 They are architecturally defined to behave as the execution of a 1149 clean operation followed immediately by an invalidate operation, 1150 both performing to the same memory location. This functionality 1151 is not correctly implemented in PL310 as clean lines are not 1152 invalidated as a result of these operations. Note that this errata 1153 uses Texas Instrument's secure monitor api. 1154 1155config ARM_ERRATA_720789 1156 bool "ARM errata: TLBIASIDIS and TLBIMVAIS operations can broadcast a faulty ASID" 1157 depends on CPU_V7 && SMP 1158 help 1159 This option enables the workaround for the 720789 Cortex-A9 (prior to 1160 r2p0) erratum. A faulty ASID can be sent to the other CPUs for the 1161 broadcasted CP15 TLB maintenance operations TLBIASIDIS and TLBIMVAIS. 1162 As a consequence of this erratum, some TLB entries which should be 1163 invalidated are not, resulting in an incoherency in the system page 1164 tables. The workaround changes the TLB flushing routines to invalidate 1165 entries regardless of the ASID. 1166 1167config ARM_ERRATA_743622 1168 bool "ARM errata: Faulty hazard checking in the Store Buffer may lead to data corruption" 1169 depends on CPU_V7 1170 help 1171 This option enables the workaround for the 743622 Cortex-A9 1172 (r2p0..r2p2) erratum. Under very rare conditions, a faulty 1173 optimisation in the Cortex-A9 Store Buffer may lead to data 1174 corruption. This workaround sets a specific bit in the diagnostic 1175 register of the Cortex-A9 which disables the Store Buffer 1176 optimisation, preventing the defect from occurring. This has no 1177 visible impact on the overall performance or power consumption of the 1178 processor. 1179 1180endmenu 1181 1182source "arch/arm/common/Kconfig" 1183 1184menu "Bus support" 1185 1186config ARM_AMBA 1187 bool 1188 1189config ISA 1190 bool 1191 help 1192 Find out whether you have ISA slots on your motherboard. ISA is the 1193 name of a bus system, i.e. the way the CPU talks to the other stuff 1194 inside your box. Other bus systems are PCI, EISA, MicroChannel 1195 (MCA) or VESA. ISA is an older system, now being displaced by PCI; 1196 newer boards don't support it. If you have ISA, say Y, otherwise N. 1197 1198# Select ISA DMA controller support 1199config ISA_DMA 1200 bool 1201 select ISA_DMA_API 1202 1203# Select ISA DMA interface 1204config ISA_DMA_API 1205 bool 1206 1207config PCI 1208 bool "PCI support" if MIGHT_HAVE_PCI 1209 help 1210 Find out whether you have a PCI motherboard. PCI is the name of a 1211 bus system, i.e. the way the CPU talks to the other stuff inside 1212 your box. Other bus systems are ISA, EISA, MicroChannel (MCA) or 1213 VESA. If you have PCI, say Y, otherwise N. 1214 1215config PCI_DOMAINS 1216 bool 1217 depends on PCI 1218 1219config PCI_NANOENGINE 1220 bool "BSE nanoEngine PCI support" 1221 depends on SA1100_NANOENGINE 1222 help 1223 Enable PCI on the BSE nanoEngine board. 1224 1225config PCI_SYSCALL 1226 def_bool PCI 1227 1228# Select the host bridge type 1229config PCI_HOST_VIA82C505 1230 bool 1231 depends on PCI && ARCH_SHARK 1232 default y 1233 1234config PCI_HOST_ITE8152 1235 bool 1236 depends on PCI && MACH_ARMCORE 1237 default y 1238 select DMABOUNCE 1239 1240source "drivers/pci/Kconfig" 1241 1242source "drivers/pcmcia/Kconfig" 1243 1244endmenu 1245 1246menu "Kernel Features" 1247 1248source "kernel/time/Kconfig" 1249 1250config SMP 1251 bool "Symmetric Multi-Processing (EXPERIMENTAL)" 1252 depends on EXPERIMENTAL 1253 depends on GENERIC_CLOCKEVENTS 1254 depends on REALVIEW_EB_ARM11MP || REALVIEW_EB_A9MP || \ 1255 MACH_REALVIEW_PB11MP || MACH_REALVIEW_PBX || ARCH_OMAP4 || \ 1256 ARCH_S5PV310 || ARCH_TEGRA || ARCH_U8500 || ARCH_VEXPRESS_CA9X4 || \ 1257 ARCH_MSM_SCORPIONMP || ARCH_SHMOBILE 1258 select USE_GENERIC_SMP_HELPERS 1259 select HAVE_ARM_SCU if !ARCH_MSM_SCORPIONMP 1260 help 1261 This enables support for systems with more than one CPU. If you have 1262 a system with only one CPU, like most personal computers, say N. If 1263 you have a system with more than one CPU, say Y. 1264 1265 If you say N here, the kernel will run on single and multiprocessor 1266 machines, but will use only one CPU of a multiprocessor machine. If 1267 you say Y here, the kernel will run on many, but not all, single 1268 processor machines. On a single processor machine, the kernel will 1269 run faster if you say N here. 1270 1271 See also <file:Documentation/i386/IO-APIC.txt>, 1272 <file:Documentation/nmi_watchdog.txt> and the SMP-HOWTO available at 1273 <http://tldp.org/HOWTO/SMP-HOWTO.html>. 1274 1275 If you don't know what to do here, say N. 1276 1277config SMP_ON_UP 1278 bool "Allow booting SMP kernel on uniprocessor systems (EXPERIMENTAL)" 1279 depends on EXPERIMENTAL 1280 depends on SMP && !XIP_KERNEL 1281 default y 1282 help 1283 SMP kernels contain instructions which fail on non-SMP processors. 1284 Enabling this option allows the kernel to modify itself to make 1285 these instructions safe. Disabling it allows about 1K of space 1286 savings. 1287 1288 If you don't know what to do here, say Y. 1289 1290config HAVE_ARM_SCU 1291 bool 1292 depends on SMP 1293 help 1294 This option enables support for the ARM system coherency unit 1295 1296config HAVE_ARM_TWD 1297 bool 1298 depends on SMP 1299 select TICK_ONESHOT 1300 help 1301 This options enables support for the ARM timer and watchdog unit 1302 1303choice 1304 prompt "Memory split" 1305 default VMSPLIT_3G 1306 help 1307 Select the desired split between kernel and user memory. 1308 1309 If you are not absolutely sure what you are doing, leave this 1310 option alone! 1311 1312 config VMSPLIT_3G 1313 bool "3G/1G user/kernel split" 1314 config VMSPLIT_2G 1315 bool "2G/2G user/kernel split" 1316 config VMSPLIT_1G 1317 bool "1G/3G user/kernel split" 1318endchoice 1319 1320config PAGE_OFFSET 1321 hex 1322 default 0x40000000 if VMSPLIT_1G 1323 default 0x80000000 if VMSPLIT_2G 1324 default 0xC0000000 1325 1326config NR_CPUS 1327 int "Maximum number of CPUs (2-32)" 1328 range 2 32 1329 depends on SMP 1330 default "4" 1331 1332config HOTPLUG_CPU 1333 bool "Support for hot-pluggable CPUs (EXPERIMENTAL)" 1334 depends on SMP && HOTPLUG && EXPERIMENTAL 1335 depends on !ARCH_MSM 1336 help 1337 Say Y here to experiment with turning CPUs off and on. CPUs 1338 can be controlled through /sys/devices/system/cpu. 1339 1340config LOCAL_TIMERS 1341 bool "Use local timer interrupts" 1342 depends on SMP 1343 default y 1344 select HAVE_ARM_TWD if !ARCH_MSM_SCORPIONMP 1345 help 1346 Enable support for local timers on SMP platforms, rather then the 1347 legacy IPI broadcast method. Local timers allows the system 1348 accounting to be spread across the timer interval, preventing a 1349 "thundering herd" at every timer tick. 1350 1351source kernel/Kconfig.preempt 1352 1353config HZ 1354 int 1355 default 200 if ARCH_EBSA110 || ARCH_S3C2410 || ARCH_S5P64X0 || \ 1356 ARCH_S5P6442 || ARCH_S5PV210 || ARCH_S5PV310 1357 default OMAP_32K_TIMER_HZ if ARCH_OMAP && OMAP_32K_TIMER 1358 default AT91_TIMER_HZ if ARCH_AT91 1359 default SHMOBILE_TIMER_HZ if ARCH_SHMOBILE 1360 default 100 1361 1362config THUMB2_KERNEL 1363 bool "Compile the kernel in Thumb-2 mode (EXPERIMENTAL)" 1364 depends on CPU_V7 && !CPU_V6 && EXPERIMENTAL 1365 select AEABI 1366 select ARM_ASM_UNIFIED 1367 help 1368 By enabling this option, the kernel will be compiled in 1369 Thumb-2 mode. A compiler/assembler that understand the unified 1370 ARM-Thumb syntax is needed. 1371 1372 If unsure, say N. 1373 1374config ARM_ASM_UNIFIED 1375 bool 1376 1377config AEABI 1378 bool "Use the ARM EABI to compile the kernel" 1379 help 1380 This option allows for the kernel to be compiled using the latest 1381 ARM ABI (aka EABI). This is only useful if you are using a user 1382 space environment that is also compiled with EABI. 1383 1384 Since there are major incompatibilities between the legacy ABI and 1385 EABI, especially with regard to structure member alignment, this 1386 option also changes the kernel syscall calling convention to 1387 disambiguate both ABIs and allow for backward compatibility support 1388 (selected with CONFIG_OABI_COMPAT). 1389 1390 To use this you need GCC version 4.0.0 or later. 1391 1392config OABI_COMPAT 1393 bool "Allow old ABI binaries to run with this kernel (EXPERIMENTAL)" 1394 depends on AEABI && EXPERIMENTAL 1395 default y 1396 help 1397 This option preserves the old syscall interface along with the 1398 new (ARM EABI) one. It also provides a compatibility layer to 1399 intercept syscalls that have structure arguments which layout 1400 in memory differs between the legacy ABI and the new ARM EABI 1401 (only for non "thumb" binaries). This option adds a tiny 1402 overhead to all syscalls and produces a slightly larger kernel. 1403 If you know you'll be using only pure EABI user space then you 1404 can say N here. If this option is not selected and you attempt 1405 to execute a legacy ABI binary then the result will be 1406 UNPREDICTABLE (in fact it can be predicted that it won't work 1407 at all). If in doubt say Y. 1408 1409config ARCH_HAS_HOLES_MEMORYMODEL 1410 bool 1411 1412config ARCH_SPARSEMEM_ENABLE 1413 bool 1414 1415config ARCH_SPARSEMEM_DEFAULT 1416 def_bool ARCH_SPARSEMEM_ENABLE 1417 1418config ARCH_SELECT_MEMORY_MODEL 1419 def_bool ARCH_SPARSEMEM_ENABLE 1420 1421config HIGHMEM 1422 bool "High Memory Support (EXPERIMENTAL)" 1423 depends on MMU && EXPERIMENTAL 1424 help 1425 The address space of ARM processors is only 4 Gigabytes large 1426 and it has to accommodate user address space, kernel address 1427 space as well as some memory mapped IO. That means that, if you 1428 have a large amount of physical memory and/or IO, not all of the 1429 memory can be "permanently mapped" by the kernel. The physical 1430 memory that is not permanently mapped is called "high memory". 1431 1432 Depending on the selected kernel/user memory split, minimum 1433 vmalloc space and actual amount of RAM, you may not need this 1434 option which should result in a slightly faster kernel. 1435 1436 If unsure, say n. 1437 1438config HIGHPTE 1439 bool "Allocate 2nd-level pagetables from highmem" 1440 depends on HIGHMEM 1441 depends on !OUTER_CACHE 1442 1443config HW_PERF_EVENTS 1444 bool "Enable hardware performance counter support for perf events" 1445 depends on PERF_EVENTS && CPU_HAS_PMU 1446 default y 1447 help 1448 Enable hardware performance counter support for perf events. If 1449 disabled, perf events will use software events only. 1450 1451source "mm/Kconfig" 1452 1453config FORCE_MAX_ZONEORDER 1454 int "Maximum zone order" if ARCH_SHMOBILE 1455 range 11 64 if ARCH_SHMOBILE 1456 default "9" if SA1111 1457 default "11" 1458 help 1459 The kernel memory allocator divides physically contiguous memory 1460 blocks into "zones", where each zone is a power of two number of 1461 pages. This option selects the largest power of two that the kernel 1462 keeps in the memory allocator. If you need to allocate very large 1463 blocks of physically contiguous memory, then you may need to 1464 increase this value. 1465 1466 This config option is actually maximum order plus one. For example, 1467 a value of 11 means that the largest free memory block is 2^10 pages. 1468 1469config LEDS 1470 bool "Timer and CPU usage LEDs" 1471 depends on ARCH_CDB89712 || ARCH_EBSA110 || \ 1472 ARCH_EBSA285 || ARCH_INTEGRATOR || \ 1473 ARCH_LUBBOCK || MACH_MAINSTONE || ARCH_NETWINDER || \ 1474 ARCH_OMAP || ARCH_P720T || ARCH_PXA_IDP || \ 1475 ARCH_SA1100 || ARCH_SHARK || ARCH_VERSATILE || \ 1476 ARCH_AT91 || ARCH_DAVINCI || \ 1477 ARCH_KS8695 || MACH_RD88F5182 || ARCH_REALVIEW 1478 help 1479 If you say Y here, the LEDs on your machine will be used 1480 to provide useful information about your current system status. 1481 1482 If you are compiling a kernel for a NetWinder or EBSA-285, you will 1483 be able to select which LEDs are active using the options below. If 1484 you are compiling a kernel for the EBSA-110 or the LART however, the 1485 red LED will simply flash regularly to indicate that the system is 1486 still functional. It is safe to say Y here if you have a CATS 1487 system, but the driver will do nothing. 1488 1489config LEDS_TIMER 1490 bool "Timer LED" if (!ARCH_CDB89712 && !ARCH_OMAP) || \ 1491 OMAP_OSK_MISTRAL || MACH_OMAP_H2 \ 1492 || MACH_OMAP_PERSEUS2 1493 depends on LEDS 1494 depends on !GENERIC_CLOCKEVENTS 1495 default y if ARCH_EBSA110 1496 help 1497 If you say Y here, one of the system LEDs (the green one on the 1498 NetWinder, the amber one on the EBSA285, or the red one on the LART) 1499 will flash regularly to indicate that the system is still 1500 operational. This is mainly useful to kernel hackers who are 1501 debugging unstable kernels. 1502 1503 The LART uses the same LED for both Timer LED and CPU usage LED 1504 functions. You may choose to use both, but the Timer LED function 1505 will overrule the CPU usage LED. 1506 1507config LEDS_CPU 1508 bool "CPU usage LED" if (!ARCH_CDB89712 && !ARCH_EBSA110 && \ 1509 !ARCH_OMAP) \ 1510 || OMAP_OSK_MISTRAL || MACH_OMAP_H2 \ 1511 || MACH_OMAP_PERSEUS2 1512 depends on LEDS 1513 help 1514 If you say Y here, the red LED will be used to give a good real 1515 time indication of CPU usage, by lighting whenever the idle task 1516 is not currently executing. 1517 1518 The LART uses the same LED for both Timer LED and CPU usage LED 1519 functions. You may choose to use both, but the Timer LED function 1520 will overrule the CPU usage LED. 1521 1522config ALIGNMENT_TRAP 1523 bool 1524 depends on CPU_CP15_MMU 1525 default y if !ARCH_EBSA110 1526 select HAVE_PROC_CPU if PROC_FS 1527 help 1528 ARM processors cannot fetch/store information which is not 1529 naturally aligned on the bus, i.e., a 4 byte fetch must start at an 1530 address divisible by 4. On 32-bit ARM processors, these non-aligned 1531 fetch/store instructions will be emulated in software if you say 1532 here, which has a severe performance impact. This is necessary for 1533 correct operation of some network protocols. With an IP-only 1534 configuration it is safe to say N, otherwise say Y. 1535 1536config UACCESS_WITH_MEMCPY 1537 bool "Use kernel mem{cpy,set}() for {copy_to,clear}_user() (EXPERIMENTAL)" 1538 depends on MMU && EXPERIMENTAL 1539 default y if CPU_FEROCEON 1540 help 1541 Implement faster copy_to_user and clear_user methods for CPU 1542 cores where a 8-word STM instruction give significantly higher 1543 memory write throughput than a sequence of individual 32bit stores. 1544 1545 A possible side effect is a slight increase in scheduling latency 1546 between threads sharing the same address space if they invoke 1547 such copy operations with large buffers. 1548 1549 However, if the CPU data cache is using a write-allocate mode, 1550 this option is unlikely to provide any performance gain. 1551 1552config SECCOMP 1553 bool 1554 prompt "Enable seccomp to safely compute untrusted bytecode" 1555 ---help--- 1556 This kernel feature is useful for number crunching applications 1557 that may need to compute untrusted bytecode during their 1558 execution. By using pipes or other transports made available to 1559 the process as file descriptors supporting the read/write 1560 syscalls, it's possible to isolate those applications in 1561 their own address space using seccomp. Once seccomp is 1562 enabled via prctl(PR_SET_SECCOMP), it cannot be disabled 1563 and the task is only allowed to execute a few safe syscalls 1564 defined by each seccomp mode. 1565 1566config CC_STACKPROTECTOR 1567 bool "Enable -fstack-protector buffer overflow detection (EXPERIMENTAL)" 1568 depends on EXPERIMENTAL 1569 help 1570 This option turns on the -fstack-protector GCC feature. This 1571 feature puts, at the beginning of functions, a canary value on 1572 the stack just before the return address, and validates 1573 the value just before actually returning. Stack based buffer 1574 overflows (that need to overwrite this return address) now also 1575 overwrite the canary, which gets detected and the attack is then 1576 neutralized via a kernel panic. 1577 This feature requires gcc version 4.2 or above. 1578 1579config DEPRECATED_PARAM_STRUCT 1580 bool "Provide old way to pass kernel parameters" 1581 help 1582 This was deprecated in 2001 and announced to live on for 5 years. 1583 Some old boot loaders still use this way. 1584 1585endmenu 1586 1587menu "Boot options" 1588 1589# Compressed boot loader in ROM. Yes, we really want to ask about 1590# TEXT and BSS so we preserve their values in the config files. 1591config ZBOOT_ROM_TEXT 1592 hex "Compressed ROM boot loader base address" 1593 default "0" 1594 help 1595 The physical address at which the ROM-able zImage is to be 1596 placed in the target. Platforms which normally make use of 1597 ROM-able zImage formats normally set this to a suitable 1598 value in their defconfig file. 1599 1600 If ZBOOT_ROM is not enabled, this has no effect. 1601 1602config ZBOOT_ROM_BSS 1603 hex "Compressed ROM boot loader BSS address" 1604 default "0" 1605 help 1606 The base address of an area of read/write memory in the target 1607 for the ROM-able zImage which must be available while the 1608 decompressor is running. It must be large enough to hold the 1609 entire decompressed kernel plus an additional 128 KiB. 1610 Platforms which normally make use of ROM-able zImage formats 1611 normally set this to a suitable value in their defconfig file. 1612 1613 If ZBOOT_ROM is not enabled, this has no effect. 1614 1615config ZBOOT_ROM 1616 bool "Compressed boot loader in ROM/flash" 1617 depends on ZBOOT_ROM_TEXT != ZBOOT_ROM_BSS 1618 help 1619 Say Y here if you intend to execute your compressed kernel image 1620 (zImage) directly from ROM or flash. If unsure, say N. 1621 1622config CMDLINE 1623 string "Default kernel command string" 1624 default "" 1625 help 1626 On some architectures (EBSA110 and CATS), there is currently no way 1627 for the boot loader to pass arguments to the kernel. For these 1628 architectures, you should supply some command-line options at build 1629 time by entering them here. As a minimum, you should specify the 1630 memory size and the root device (e.g., mem=64M root=/dev/nfs). 1631 1632config CMDLINE_FORCE 1633 bool "Always use the default kernel command string" 1634 depends on CMDLINE != "" 1635 help 1636 Always use the default kernel command string, even if the boot 1637 loader passes other arguments to the kernel. 1638 This is useful if you cannot or don't want to change the 1639 command-line options your boot loader passes to the kernel. 1640 1641 If unsure, say N. 1642 1643config XIP_KERNEL 1644 bool "Kernel Execute-In-Place from ROM" 1645 depends on !ZBOOT_ROM 1646 help 1647 Execute-In-Place allows the kernel to run from non-volatile storage 1648 directly addressable by the CPU, such as NOR flash. This saves RAM 1649 space since the text section of the kernel is not loaded from flash 1650 to RAM. Read-write sections, such as the data section and stack, 1651 are still copied to RAM. The XIP kernel is not compressed since 1652 it has to run directly from flash, so it will take more space to 1653 store it. The flash address used to link the kernel object files, 1654 and for storing it, is configuration dependent. Therefore, if you 1655 say Y here, you must know the proper physical address where to 1656 store the kernel image depending on your own flash memory usage. 1657 1658 Also note that the make target becomes "make xipImage" rather than 1659 "make zImage" or "make Image". The final kernel binary to put in 1660 ROM memory will be arch/arm/boot/xipImage. 1661 1662 If unsure, say N. 1663 1664config XIP_PHYS_ADDR 1665 hex "XIP Kernel Physical Location" 1666 depends on XIP_KERNEL 1667 default "0x00080000" 1668 help 1669 This is the physical address in your flash memory the kernel will 1670 be linked for and stored to. This address is dependent on your 1671 own flash usage. 1672 1673config KEXEC 1674 bool "Kexec system call (EXPERIMENTAL)" 1675 depends on EXPERIMENTAL 1676 help 1677 kexec is a system call that implements the ability to shutdown your 1678 current kernel, and to start another kernel. It is like a reboot 1679 but it is independent of the system firmware. And like a reboot 1680 you can start any kernel with it, not just Linux. 1681 1682 It is an ongoing process to be certain the hardware in a machine 1683 is properly shutdown, so do not be surprised if this code does not 1684 initially work for you. It may help to enable device hotplugging 1685 support. 1686 1687config ATAGS_PROC 1688 bool "Export atags in procfs" 1689 depends on KEXEC 1690 default y 1691 help 1692 Should the atags used to boot the kernel be exported in an "atags" 1693 file in procfs. Useful with kexec. 1694 1695config CRASH_DUMP 1696 bool "Build kdump crash kernel (EXPERIMENTAL)" 1697 depends on EXPERIMENTAL 1698 help 1699 Generate crash dump after being started by kexec. This should 1700 be normally only set in special crash dump kernels which are 1701 loaded in the main kernel with kexec-tools into a specially 1702 reserved region and then later executed after a crash by 1703 kdump/kexec. The crash dump kernel must be compiled to a 1704 memory address not used by the main kernel 1705 1706 For more details see Documentation/kdump/kdump.txt 1707 1708config AUTO_ZRELADDR 1709 bool "Auto calculation of the decompressed kernel image address" 1710 depends on !ZBOOT_ROM && !ARCH_U300 1711 help 1712 ZRELADDR is the physical address where the decompressed kernel 1713 image will be placed. If AUTO_ZRELADDR is selected, the address 1714 will be determined at run-time by masking the current IP with 1715 0xf8000000. This assumes the zImage being placed in the first 128MB 1716 from start of memory. 1717 1718endmenu 1719 1720menu "CPU Power Management" 1721 1722if ARCH_HAS_CPUFREQ 1723 1724source "drivers/cpufreq/Kconfig" 1725 1726config CPU_FREQ_IMX 1727 tristate "CPUfreq driver for i.MX CPUs" 1728 depends on ARCH_MXC && CPU_FREQ 1729 help 1730 This enables the CPUfreq driver for i.MX CPUs. 1731 1732config CPU_FREQ_SA1100 1733 bool 1734 1735config CPU_FREQ_SA1110 1736 bool 1737 1738config CPU_FREQ_INTEGRATOR 1739 tristate "CPUfreq driver for ARM Integrator CPUs" 1740 depends on ARCH_INTEGRATOR && CPU_FREQ 1741 default y 1742 help 1743 This enables the CPUfreq driver for ARM Integrator CPUs. 1744 1745 For details, take a look at <file:Documentation/cpu-freq>. 1746 1747 If in doubt, say Y. 1748 1749config CPU_FREQ_PXA 1750 bool 1751 depends on CPU_FREQ && ARCH_PXA && PXA25x 1752 default y 1753 select CPU_FREQ_DEFAULT_GOV_USERSPACE 1754 1755config CPU_FREQ_S3C64XX 1756 bool "CPUfreq support for Samsung S3C64XX CPUs" 1757 depends on CPU_FREQ && CPU_S3C6410 1758 1759config CPU_FREQ_S3C 1760 bool 1761 help 1762 Internal configuration node for common cpufreq on Samsung SoC 1763 1764config CPU_FREQ_S3C24XX 1765 bool "CPUfreq driver for Samsung S3C24XX series CPUs (EXPERIMENTAL)" 1766 depends on ARCH_S3C2410 && CPU_FREQ && EXPERIMENTAL 1767 select CPU_FREQ_S3C 1768 help 1769 This enables the CPUfreq driver for the Samsung S3C24XX family 1770 of CPUs. 1771 1772 For details, take a look at <file:Documentation/cpu-freq>. 1773 1774 If in doubt, say N. 1775 1776config CPU_FREQ_S3C24XX_PLL 1777 bool "Support CPUfreq changing of PLL frequency (EXPERIMENTAL)" 1778 depends on CPU_FREQ_S3C24XX && EXPERIMENTAL 1779 help 1780 Compile in support for changing the PLL frequency from the 1781 S3C24XX series CPUfreq driver. The PLL takes time to settle 1782 after a frequency change, so by default it is not enabled. 1783 1784 This also means that the PLL tables for the selected CPU(s) will 1785 be built which may increase the size of the kernel image. 1786 1787config CPU_FREQ_S3C24XX_DEBUG 1788 bool "Debug CPUfreq Samsung driver core" 1789 depends on CPU_FREQ_S3C24XX 1790 help 1791 Enable s3c_freq_dbg for the Samsung S3C CPUfreq core 1792 1793config CPU_FREQ_S3C24XX_IODEBUG 1794 bool "Debug CPUfreq Samsung driver IO timing" 1795 depends on CPU_FREQ_S3C24XX 1796 help 1797 Enable s3c_freq_iodbg for the Samsung S3C CPUfreq core 1798 1799config CPU_FREQ_S3C24XX_DEBUGFS 1800 bool "Export debugfs for CPUFreq" 1801 depends on CPU_FREQ_S3C24XX && DEBUG_FS 1802 help 1803 Export status information via debugfs. 1804 1805endif 1806 1807source "drivers/cpuidle/Kconfig" 1808 1809endmenu 1810 1811menu "Floating point emulation" 1812 1813comment "At least one emulation must be selected" 1814 1815config FPE_NWFPE 1816 bool "NWFPE math emulation" 1817 depends on (!AEABI || OABI_COMPAT) && !THUMB2_KERNEL 1818 ---help--- 1819 Say Y to include the NWFPE floating point emulator in the kernel. 1820 This is necessary to run most binaries. Linux does not currently 1821 support floating point hardware so you need to say Y here even if 1822 your machine has an FPA or floating point co-processor podule. 1823 1824 You may say N here if you are going to load the Acorn FPEmulator 1825 early in the bootup. 1826 1827config FPE_NWFPE_XP 1828 bool "Support extended precision" 1829 depends on FPE_NWFPE 1830 help 1831 Say Y to include 80-bit support in the kernel floating-point 1832 emulator. Otherwise, only 32 and 64-bit support is compiled in. 1833 Note that gcc does not generate 80-bit operations by default, 1834 so in most cases this option only enlarges the size of the 1835 floating point emulator without any good reason. 1836 1837 You almost surely want to say N here. 1838 1839config FPE_FASTFPE 1840 bool "FastFPE math emulation (EXPERIMENTAL)" 1841 depends on (!AEABI || OABI_COMPAT) && !CPU_32v3 && EXPERIMENTAL 1842 ---help--- 1843 Say Y here to include the FAST floating point emulator in the kernel. 1844 This is an experimental much faster emulator which now also has full 1845 precision for the mantissa. It does not support any exceptions. 1846 It is very simple, and approximately 3-6 times faster than NWFPE. 1847 1848 It should be sufficient for most programs. It may be not suitable 1849 for scientific calculations, but you have to check this for yourself. 1850 If you do not feel you need a faster FP emulation you should better 1851 choose NWFPE. 1852 1853config VFP 1854 bool "VFP-format floating point maths" 1855 depends on CPU_V6 || CPU_ARM926T || CPU_V7 || CPU_FEROCEON 1856 help 1857 Say Y to include VFP support code in the kernel. This is needed 1858 if your hardware includes a VFP unit. 1859 1860 Please see <file:Documentation/arm/VFP/release-notes.txt> for 1861 release notes and additional status information. 1862 1863 Say N if your target does not have VFP hardware. 1864 1865config VFPv3 1866 bool 1867 depends on VFP 1868 default y if CPU_V7 1869 1870config NEON 1871 bool "Advanced SIMD (NEON) Extension support" 1872 depends on VFPv3 && CPU_V7 1873 help 1874 Say Y to include support code for NEON, the ARMv7 Advanced SIMD 1875 Extension. 1876 1877endmenu 1878 1879menu "Userspace binary formats" 1880 1881source "fs/Kconfig.binfmt" 1882 1883config ARTHUR 1884 tristate "RISC OS personality" 1885 depends on !AEABI 1886 help 1887 Say Y here to include the kernel code necessary if you want to run 1888 Acorn RISC OS/Arthur binaries under Linux. This code is still very 1889 experimental; if this sounds frightening, say N and sleep in peace. 1890 You can also say M here to compile this support as a module (which 1891 will be called arthur). 1892 1893endmenu 1894 1895menu "Power management options" 1896 1897source "kernel/power/Kconfig" 1898 1899config ARCH_SUSPEND_POSSIBLE 1900 def_bool y 1901 1902endmenu 1903 1904source "net/Kconfig" 1905 1906source "drivers/Kconfig" 1907 1908source "fs/Kconfig" 1909 1910source "arch/arm/Kconfig.debug" 1911 1912source "security/Kconfig" 1913 1914source "crypto/Kconfig" 1915 1916source "lib/Kconfig"