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1/******************************************************************************* 2 3 Intel PRO/1000 Linux driver 4 Copyright(c) 1999 - 2010 Intel Corporation. 5 6 This program is free software; you can redistribute it and/or modify it 7 under the terms and conditions of the GNU General Public License, 8 version 2, as published by the Free Software Foundation. 9 10 This program is distributed in the hope it will be useful, but WITHOUT 11 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or 12 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for 13 more details. 14 15 You should have received a copy of the GNU General Public License along with 16 this program; if not, write to the Free Software Foundation, Inc., 17 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA. 18 19 The full GNU General Public License is included in this distribution in 20 the file called "COPYING". 21 22 Contact Information: 23 Linux NICS <linux.nics@intel.com> 24 e1000-devel Mailing List <e1000-devel@lists.sourceforge.net> 25 Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497 26 27*******************************************************************************/ 28 29#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt 30 31#include <linux/module.h> 32#include <linux/types.h> 33#include <linux/init.h> 34#include <linux/pci.h> 35#include <linux/vmalloc.h> 36#include <linux/pagemap.h> 37#include <linux/delay.h> 38#include <linux/netdevice.h> 39#include <linux/tcp.h> 40#include <linux/ipv6.h> 41#include <linux/slab.h> 42#include <net/checksum.h> 43#include <net/ip6_checksum.h> 44#include <linux/mii.h> 45#include <linux/ethtool.h> 46#include <linux/if_vlan.h> 47#include <linux/cpu.h> 48#include <linux/smp.h> 49#include <linux/pm_qos_params.h> 50#include <linux/pm_runtime.h> 51#include <linux/aer.h> 52 53#include "e1000.h" 54 55#define DRV_EXTRAVERSION "-k2" 56 57#define DRV_VERSION "1.2.7" DRV_EXTRAVERSION 58char e1000e_driver_name[] = "e1000e"; 59const char e1000e_driver_version[] = DRV_VERSION; 60 61static const struct e1000_info *e1000_info_tbl[] = { 62 [board_82571] = &e1000_82571_info, 63 [board_82572] = &e1000_82572_info, 64 [board_82573] = &e1000_82573_info, 65 [board_82574] = &e1000_82574_info, 66 [board_82583] = &e1000_82583_info, 67 [board_80003es2lan] = &e1000_es2_info, 68 [board_ich8lan] = &e1000_ich8_info, 69 [board_ich9lan] = &e1000_ich9_info, 70 [board_ich10lan] = &e1000_ich10_info, 71 [board_pchlan] = &e1000_pch_info, 72 [board_pch2lan] = &e1000_pch2_info, 73}; 74 75struct e1000_reg_info { 76 u32 ofs; 77 char *name; 78}; 79 80#define E1000_RDFH 0x02410 /* Rx Data FIFO Head - RW */ 81#define E1000_RDFT 0x02418 /* Rx Data FIFO Tail - RW */ 82#define E1000_RDFHS 0x02420 /* Rx Data FIFO Head Saved - RW */ 83#define E1000_RDFTS 0x02428 /* Rx Data FIFO Tail Saved - RW */ 84#define E1000_RDFPC 0x02430 /* Rx Data FIFO Packet Count - RW */ 85 86#define E1000_TDFH 0x03410 /* Tx Data FIFO Head - RW */ 87#define E1000_TDFT 0x03418 /* Tx Data FIFO Tail - RW */ 88#define E1000_TDFHS 0x03420 /* Tx Data FIFO Head Saved - RW */ 89#define E1000_TDFTS 0x03428 /* Tx Data FIFO Tail Saved - RW */ 90#define E1000_TDFPC 0x03430 /* Tx Data FIFO Packet Count - RW */ 91 92static const struct e1000_reg_info e1000_reg_info_tbl[] = { 93 94 /* General Registers */ 95 {E1000_CTRL, "CTRL"}, 96 {E1000_STATUS, "STATUS"}, 97 {E1000_CTRL_EXT, "CTRL_EXT"}, 98 99 /* Interrupt Registers */ 100 {E1000_ICR, "ICR"}, 101 102 /* RX Registers */ 103 {E1000_RCTL, "RCTL"}, 104 {E1000_RDLEN, "RDLEN"}, 105 {E1000_RDH, "RDH"}, 106 {E1000_RDT, "RDT"}, 107 {E1000_RDTR, "RDTR"}, 108 {E1000_RXDCTL(0), "RXDCTL"}, 109 {E1000_ERT, "ERT"}, 110 {E1000_RDBAL, "RDBAL"}, 111 {E1000_RDBAH, "RDBAH"}, 112 {E1000_RDFH, "RDFH"}, 113 {E1000_RDFT, "RDFT"}, 114 {E1000_RDFHS, "RDFHS"}, 115 {E1000_RDFTS, "RDFTS"}, 116 {E1000_RDFPC, "RDFPC"}, 117 118 /* TX Registers */ 119 {E1000_TCTL, "TCTL"}, 120 {E1000_TDBAL, "TDBAL"}, 121 {E1000_TDBAH, "TDBAH"}, 122 {E1000_TDLEN, "TDLEN"}, 123 {E1000_TDH, "TDH"}, 124 {E1000_TDT, "TDT"}, 125 {E1000_TIDV, "TIDV"}, 126 {E1000_TXDCTL(0), "TXDCTL"}, 127 {E1000_TADV, "TADV"}, 128 {E1000_TARC(0), "TARC"}, 129 {E1000_TDFH, "TDFH"}, 130 {E1000_TDFT, "TDFT"}, 131 {E1000_TDFHS, "TDFHS"}, 132 {E1000_TDFTS, "TDFTS"}, 133 {E1000_TDFPC, "TDFPC"}, 134 135 /* List Terminator */ 136 {} 137}; 138 139/* 140 * e1000_regdump - register printout routine 141 */ 142static void e1000_regdump(struct e1000_hw *hw, struct e1000_reg_info *reginfo) 143{ 144 int n = 0; 145 char rname[16]; 146 u32 regs[8]; 147 148 switch (reginfo->ofs) { 149 case E1000_RXDCTL(0): 150 for (n = 0; n < 2; n++) 151 regs[n] = __er32(hw, E1000_RXDCTL(n)); 152 break; 153 case E1000_TXDCTL(0): 154 for (n = 0; n < 2; n++) 155 regs[n] = __er32(hw, E1000_TXDCTL(n)); 156 break; 157 case E1000_TARC(0): 158 for (n = 0; n < 2; n++) 159 regs[n] = __er32(hw, E1000_TARC(n)); 160 break; 161 default: 162 printk(KERN_INFO "%-15s %08x\n", 163 reginfo->name, __er32(hw, reginfo->ofs)); 164 return; 165 } 166 167 snprintf(rname, 16, "%s%s", reginfo->name, "[0-1]"); 168 printk(KERN_INFO "%-15s ", rname); 169 for (n = 0; n < 2; n++) 170 printk(KERN_CONT "%08x ", regs[n]); 171 printk(KERN_CONT "\n"); 172} 173 174 175/* 176 * e1000e_dump - Print registers, tx-ring and rx-ring 177 */ 178static void e1000e_dump(struct e1000_adapter *adapter) 179{ 180 struct net_device *netdev = adapter->netdev; 181 struct e1000_hw *hw = &adapter->hw; 182 struct e1000_reg_info *reginfo; 183 struct e1000_ring *tx_ring = adapter->tx_ring; 184 struct e1000_tx_desc *tx_desc; 185 struct my_u0 { u64 a; u64 b; } *u0; 186 struct e1000_buffer *buffer_info; 187 struct e1000_ring *rx_ring = adapter->rx_ring; 188 union e1000_rx_desc_packet_split *rx_desc_ps; 189 struct e1000_rx_desc *rx_desc; 190 struct my_u1 { u64 a; u64 b; u64 c; u64 d; } *u1; 191 u32 staterr; 192 int i = 0; 193 194 if (!netif_msg_hw(adapter)) 195 return; 196 197 /* Print netdevice Info */ 198 if (netdev) { 199 dev_info(&adapter->pdev->dev, "Net device Info\n"); 200 printk(KERN_INFO "Device Name state " 201 "trans_start last_rx\n"); 202 printk(KERN_INFO "%-15s %016lX %016lX %016lX\n", 203 netdev->name, 204 netdev->state, 205 netdev->trans_start, 206 netdev->last_rx); 207 } 208 209 /* Print Registers */ 210 dev_info(&adapter->pdev->dev, "Register Dump\n"); 211 printk(KERN_INFO " Register Name Value\n"); 212 for (reginfo = (struct e1000_reg_info *)e1000_reg_info_tbl; 213 reginfo->name; reginfo++) { 214 e1000_regdump(hw, reginfo); 215 } 216 217 /* Print TX Ring Summary */ 218 if (!netdev || !netif_running(netdev)) 219 goto exit; 220 221 dev_info(&adapter->pdev->dev, "TX Rings Summary\n"); 222 printk(KERN_INFO "Queue [NTU] [NTC] [bi(ntc)->dma ]" 223 " leng ntw timestamp\n"); 224 buffer_info = &tx_ring->buffer_info[tx_ring->next_to_clean]; 225 printk(KERN_INFO " %5d %5X %5X %016llX %04X %3X %016llX\n", 226 0, tx_ring->next_to_use, tx_ring->next_to_clean, 227 (unsigned long long)buffer_info->dma, 228 buffer_info->length, 229 buffer_info->next_to_watch, 230 (unsigned long long)buffer_info->time_stamp); 231 232 /* Print TX Rings */ 233 if (!netif_msg_tx_done(adapter)) 234 goto rx_ring_summary; 235 236 dev_info(&adapter->pdev->dev, "TX Rings Dump\n"); 237 238 /* Transmit Descriptor Formats - DEXT[29] is 0 (Legacy) or 1 (Extended) 239 * 240 * Legacy Transmit Descriptor 241 * +--------------------------------------------------------------+ 242 * 0 | Buffer Address [63:0] (Reserved on Write Back) | 243 * +--------------------------------------------------------------+ 244 * 8 | Special | CSS | Status | CMD | CSO | Length | 245 * +--------------------------------------------------------------+ 246 * 63 48 47 36 35 32 31 24 23 16 15 0 247 * 248 * Extended Context Descriptor (DTYP=0x0) for TSO or checksum offload 249 * 63 48 47 40 39 32 31 16 15 8 7 0 250 * +----------------------------------------------------------------+ 251 * 0 | TUCSE | TUCS0 | TUCSS | IPCSE | IPCS0 | IPCSS | 252 * +----------------------------------------------------------------+ 253 * 8 | MSS | HDRLEN | RSV | STA | TUCMD | DTYP | PAYLEN | 254 * +----------------------------------------------------------------+ 255 * 63 48 47 40 39 36 35 32 31 24 23 20 19 0 256 * 257 * Extended Data Descriptor (DTYP=0x1) 258 * +----------------------------------------------------------------+ 259 * 0 | Buffer Address [63:0] | 260 * +----------------------------------------------------------------+ 261 * 8 | VLAN tag | POPTS | Rsvd | Status | Command | DTYP | DTALEN | 262 * +----------------------------------------------------------------+ 263 * 63 48 47 40 39 36 35 32 31 24 23 20 19 0 264 */ 265 printk(KERN_INFO "Tl[desc] [address 63:0 ] [SpeCssSCmCsLen]" 266 " [bi->dma ] leng ntw timestamp bi->skb " 267 "<-- Legacy format\n"); 268 printk(KERN_INFO "Tc[desc] [Ce CoCsIpceCoS] [MssHlRSCm0Plen]" 269 " [bi->dma ] leng ntw timestamp bi->skb " 270 "<-- Ext Context format\n"); 271 printk(KERN_INFO "Td[desc] [address 63:0 ] [VlaPoRSCm1Dlen]" 272 " [bi->dma ] leng ntw timestamp bi->skb " 273 "<-- Ext Data format\n"); 274 for (i = 0; tx_ring->desc && (i < tx_ring->count); i++) { 275 tx_desc = E1000_TX_DESC(*tx_ring, i); 276 buffer_info = &tx_ring->buffer_info[i]; 277 u0 = (struct my_u0 *)tx_desc; 278 printk(KERN_INFO "T%c[0x%03X] %016llX %016llX %016llX " 279 "%04X %3X %016llX %p", 280 (!(le64_to_cpu(u0->b) & (1<<29)) ? 'l' : 281 ((le64_to_cpu(u0->b) & (1<<20)) ? 'd' : 'c')), i, 282 (unsigned long long)le64_to_cpu(u0->a), 283 (unsigned long long)le64_to_cpu(u0->b), 284 (unsigned long long)buffer_info->dma, 285 buffer_info->length, buffer_info->next_to_watch, 286 (unsigned long long)buffer_info->time_stamp, 287 buffer_info->skb); 288 if (i == tx_ring->next_to_use && i == tx_ring->next_to_clean) 289 printk(KERN_CONT " NTC/U\n"); 290 else if (i == tx_ring->next_to_use) 291 printk(KERN_CONT " NTU\n"); 292 else if (i == tx_ring->next_to_clean) 293 printk(KERN_CONT " NTC\n"); 294 else 295 printk(KERN_CONT "\n"); 296 297 if (netif_msg_pktdata(adapter) && buffer_info->dma != 0) 298 print_hex_dump(KERN_INFO, "", DUMP_PREFIX_ADDRESS, 299 16, 1, phys_to_virt(buffer_info->dma), 300 buffer_info->length, true); 301 } 302 303 /* Print RX Rings Summary */ 304rx_ring_summary: 305 dev_info(&adapter->pdev->dev, "RX Rings Summary\n"); 306 printk(KERN_INFO "Queue [NTU] [NTC]\n"); 307 printk(KERN_INFO " %5d %5X %5X\n", 0, 308 rx_ring->next_to_use, rx_ring->next_to_clean); 309 310 /* Print RX Rings */ 311 if (!netif_msg_rx_status(adapter)) 312 goto exit; 313 314 dev_info(&adapter->pdev->dev, "RX Rings Dump\n"); 315 switch (adapter->rx_ps_pages) { 316 case 1: 317 case 2: 318 case 3: 319 /* [Extended] Packet Split Receive Descriptor Format 320 * 321 * +-----------------------------------------------------+ 322 * 0 | Buffer Address 0 [63:0] | 323 * +-----------------------------------------------------+ 324 * 8 | Buffer Address 1 [63:0] | 325 * +-----------------------------------------------------+ 326 * 16 | Buffer Address 2 [63:0] | 327 * +-----------------------------------------------------+ 328 * 24 | Buffer Address 3 [63:0] | 329 * +-----------------------------------------------------+ 330 */ 331 printk(KERN_INFO "R [desc] [buffer 0 63:0 ] " 332 "[buffer 1 63:0 ] " 333 "[buffer 2 63:0 ] [buffer 3 63:0 ] [bi->dma ] " 334 "[bi->skb] <-- Ext Pkt Split format\n"); 335 /* [Extended] Receive Descriptor (Write-Back) Format 336 * 337 * 63 48 47 32 31 13 12 8 7 4 3 0 338 * +------------------------------------------------------+ 339 * 0 | Packet | IP | Rsvd | MRQ | Rsvd | MRQ RSS | 340 * | Checksum | Ident | | Queue | | Type | 341 * +------------------------------------------------------+ 342 * 8 | VLAN Tag | Length | Extended Error | Extended Status | 343 * +------------------------------------------------------+ 344 * 63 48 47 32 31 20 19 0 345 */ 346 printk(KERN_INFO "RWB[desc] [ck ipid mrqhsh] " 347 "[vl l0 ee es] " 348 "[ l3 l2 l1 hs] [reserved ] ---------------- " 349 "[bi->skb] <-- Ext Rx Write-Back format\n"); 350 for (i = 0; i < rx_ring->count; i++) { 351 buffer_info = &rx_ring->buffer_info[i]; 352 rx_desc_ps = E1000_RX_DESC_PS(*rx_ring, i); 353 u1 = (struct my_u1 *)rx_desc_ps; 354 staterr = 355 le32_to_cpu(rx_desc_ps->wb.middle.status_error); 356 if (staterr & E1000_RXD_STAT_DD) { 357 /* Descriptor Done */ 358 printk(KERN_INFO "RWB[0x%03X] %016llX " 359 "%016llX %016llX %016llX " 360 "---------------- %p", i, 361 (unsigned long long)le64_to_cpu(u1->a), 362 (unsigned long long)le64_to_cpu(u1->b), 363 (unsigned long long)le64_to_cpu(u1->c), 364 (unsigned long long)le64_to_cpu(u1->d), 365 buffer_info->skb); 366 } else { 367 printk(KERN_INFO "R [0x%03X] %016llX " 368 "%016llX %016llX %016llX %016llX %p", i, 369 (unsigned long long)le64_to_cpu(u1->a), 370 (unsigned long long)le64_to_cpu(u1->b), 371 (unsigned long long)le64_to_cpu(u1->c), 372 (unsigned long long)le64_to_cpu(u1->d), 373 (unsigned long long)buffer_info->dma, 374 buffer_info->skb); 375 376 if (netif_msg_pktdata(adapter)) 377 print_hex_dump(KERN_INFO, "", 378 DUMP_PREFIX_ADDRESS, 16, 1, 379 phys_to_virt(buffer_info->dma), 380 adapter->rx_ps_bsize0, true); 381 } 382 383 if (i == rx_ring->next_to_use) 384 printk(KERN_CONT " NTU\n"); 385 else if (i == rx_ring->next_to_clean) 386 printk(KERN_CONT " NTC\n"); 387 else 388 printk(KERN_CONT "\n"); 389 } 390 break; 391 default: 392 case 0: 393 /* Legacy Receive Descriptor Format 394 * 395 * +-----------------------------------------------------+ 396 * | Buffer Address [63:0] | 397 * +-----------------------------------------------------+ 398 * | VLAN Tag | Errors | Status 0 | Packet csum | Length | 399 * +-----------------------------------------------------+ 400 * 63 48 47 40 39 32 31 16 15 0 401 */ 402 printk(KERN_INFO "Rl[desc] [address 63:0 ] " 403 "[vl er S cks ln] [bi->dma ] [bi->skb] " 404 "<-- Legacy format\n"); 405 for (i = 0; rx_ring->desc && (i < rx_ring->count); i++) { 406 rx_desc = E1000_RX_DESC(*rx_ring, i); 407 buffer_info = &rx_ring->buffer_info[i]; 408 u0 = (struct my_u0 *)rx_desc; 409 printk(KERN_INFO "Rl[0x%03X] %016llX %016llX " 410 "%016llX %p", i, 411 (unsigned long long)le64_to_cpu(u0->a), 412 (unsigned long long)le64_to_cpu(u0->b), 413 (unsigned long long)buffer_info->dma, 414 buffer_info->skb); 415 if (i == rx_ring->next_to_use) 416 printk(KERN_CONT " NTU\n"); 417 else if (i == rx_ring->next_to_clean) 418 printk(KERN_CONT " NTC\n"); 419 else 420 printk(KERN_CONT "\n"); 421 422 if (netif_msg_pktdata(adapter)) 423 print_hex_dump(KERN_INFO, "", 424 DUMP_PREFIX_ADDRESS, 425 16, 1, phys_to_virt(buffer_info->dma), 426 adapter->rx_buffer_len, true); 427 } 428 } 429 430exit: 431 return; 432} 433 434/** 435 * e1000_desc_unused - calculate if we have unused descriptors 436 **/ 437static int e1000_desc_unused(struct e1000_ring *ring) 438{ 439 if (ring->next_to_clean > ring->next_to_use) 440 return ring->next_to_clean - ring->next_to_use - 1; 441 442 return ring->count + ring->next_to_clean - ring->next_to_use - 1; 443} 444 445/** 446 * e1000_receive_skb - helper function to handle Rx indications 447 * @adapter: board private structure 448 * @status: descriptor status field as written by hardware 449 * @vlan: descriptor vlan field as written by hardware (no le/be conversion) 450 * @skb: pointer to sk_buff to be indicated to stack 451 **/ 452static void e1000_receive_skb(struct e1000_adapter *adapter, 453 struct net_device *netdev, 454 struct sk_buff *skb, 455 u8 status, __le16 vlan) 456{ 457 skb->protocol = eth_type_trans(skb, netdev); 458 459 if (adapter->vlgrp && (status & E1000_RXD_STAT_VP)) 460 vlan_gro_receive(&adapter->napi, adapter->vlgrp, 461 le16_to_cpu(vlan), skb); 462 else 463 napi_gro_receive(&adapter->napi, skb); 464} 465 466/** 467 * e1000_rx_checksum - Receive Checksum Offload for 82543 468 * @adapter: board private structure 469 * @status_err: receive descriptor status and error fields 470 * @csum: receive descriptor csum field 471 * @sk_buff: socket buffer with received data 472 **/ 473static void e1000_rx_checksum(struct e1000_adapter *adapter, u32 status_err, 474 u32 csum, struct sk_buff *skb) 475{ 476 u16 status = (u16)status_err; 477 u8 errors = (u8)(status_err >> 24); 478 479 skb_checksum_none_assert(skb); 480 481 /* Ignore Checksum bit is set */ 482 if (status & E1000_RXD_STAT_IXSM) 483 return; 484 /* TCP/UDP checksum error bit is set */ 485 if (errors & E1000_RXD_ERR_TCPE) { 486 /* let the stack verify checksum errors */ 487 adapter->hw_csum_err++; 488 return; 489 } 490 491 /* TCP/UDP Checksum has not been calculated */ 492 if (!(status & (E1000_RXD_STAT_TCPCS | E1000_RXD_STAT_UDPCS))) 493 return; 494 495 /* It must be a TCP or UDP packet with a valid checksum */ 496 if (status & E1000_RXD_STAT_TCPCS) { 497 /* TCP checksum is good */ 498 skb->ip_summed = CHECKSUM_UNNECESSARY; 499 } else { 500 /* 501 * IP fragment with UDP payload 502 * Hardware complements the payload checksum, so we undo it 503 * and then put the value in host order for further stack use. 504 */ 505 __sum16 sum = (__force __sum16)htons(csum); 506 skb->csum = csum_unfold(~sum); 507 skb->ip_summed = CHECKSUM_COMPLETE; 508 } 509 adapter->hw_csum_good++; 510} 511 512/** 513 * e1000_alloc_rx_buffers - Replace used receive buffers; legacy & extended 514 * @adapter: address of board private structure 515 **/ 516static void e1000_alloc_rx_buffers(struct e1000_adapter *adapter, 517 int cleaned_count) 518{ 519 struct net_device *netdev = adapter->netdev; 520 struct pci_dev *pdev = adapter->pdev; 521 struct e1000_ring *rx_ring = adapter->rx_ring; 522 struct e1000_rx_desc *rx_desc; 523 struct e1000_buffer *buffer_info; 524 struct sk_buff *skb; 525 unsigned int i; 526 unsigned int bufsz = adapter->rx_buffer_len; 527 528 i = rx_ring->next_to_use; 529 buffer_info = &rx_ring->buffer_info[i]; 530 531 while (cleaned_count--) { 532 skb = buffer_info->skb; 533 if (skb) { 534 skb_trim(skb, 0); 535 goto map_skb; 536 } 537 538 skb = netdev_alloc_skb_ip_align(netdev, bufsz); 539 if (!skb) { 540 /* Better luck next round */ 541 adapter->alloc_rx_buff_failed++; 542 break; 543 } 544 545 buffer_info->skb = skb; 546map_skb: 547 buffer_info->dma = dma_map_single(&pdev->dev, skb->data, 548 adapter->rx_buffer_len, 549 DMA_FROM_DEVICE); 550 if (dma_mapping_error(&pdev->dev, buffer_info->dma)) { 551 dev_err(&pdev->dev, "RX DMA map failed\n"); 552 adapter->rx_dma_failed++; 553 break; 554 } 555 556 rx_desc = E1000_RX_DESC(*rx_ring, i); 557 rx_desc->buffer_addr = cpu_to_le64(buffer_info->dma); 558 559 if (unlikely(!(i & (E1000_RX_BUFFER_WRITE - 1)))) { 560 /* 561 * Force memory writes to complete before letting h/w 562 * know there are new descriptors to fetch. (Only 563 * applicable for weak-ordered memory model archs, 564 * such as IA-64). 565 */ 566 wmb(); 567 writel(i, adapter->hw.hw_addr + rx_ring->tail); 568 } 569 i++; 570 if (i == rx_ring->count) 571 i = 0; 572 buffer_info = &rx_ring->buffer_info[i]; 573 } 574 575 rx_ring->next_to_use = i; 576} 577 578/** 579 * e1000_alloc_rx_buffers_ps - Replace used receive buffers; packet split 580 * @adapter: address of board private structure 581 **/ 582static void e1000_alloc_rx_buffers_ps(struct e1000_adapter *adapter, 583 int cleaned_count) 584{ 585 struct net_device *netdev = adapter->netdev; 586 struct pci_dev *pdev = adapter->pdev; 587 union e1000_rx_desc_packet_split *rx_desc; 588 struct e1000_ring *rx_ring = adapter->rx_ring; 589 struct e1000_buffer *buffer_info; 590 struct e1000_ps_page *ps_page; 591 struct sk_buff *skb; 592 unsigned int i, j; 593 594 i = rx_ring->next_to_use; 595 buffer_info = &rx_ring->buffer_info[i]; 596 597 while (cleaned_count--) { 598 rx_desc = E1000_RX_DESC_PS(*rx_ring, i); 599 600 for (j = 0; j < PS_PAGE_BUFFERS; j++) { 601 ps_page = &buffer_info->ps_pages[j]; 602 if (j >= adapter->rx_ps_pages) { 603 /* all unused desc entries get hw null ptr */ 604 rx_desc->read.buffer_addr[j+1] = ~cpu_to_le64(0); 605 continue; 606 } 607 if (!ps_page->page) { 608 ps_page->page = alloc_page(GFP_ATOMIC); 609 if (!ps_page->page) { 610 adapter->alloc_rx_buff_failed++; 611 goto no_buffers; 612 } 613 ps_page->dma = dma_map_page(&pdev->dev, 614 ps_page->page, 615 0, PAGE_SIZE, 616 DMA_FROM_DEVICE); 617 if (dma_mapping_error(&pdev->dev, 618 ps_page->dma)) { 619 dev_err(&adapter->pdev->dev, 620 "RX DMA page map failed\n"); 621 adapter->rx_dma_failed++; 622 goto no_buffers; 623 } 624 } 625 /* 626 * Refresh the desc even if buffer_addrs 627 * didn't change because each write-back 628 * erases this info. 629 */ 630 rx_desc->read.buffer_addr[j+1] = 631 cpu_to_le64(ps_page->dma); 632 } 633 634 skb = netdev_alloc_skb_ip_align(netdev, 635 adapter->rx_ps_bsize0); 636 637 if (!skb) { 638 adapter->alloc_rx_buff_failed++; 639 break; 640 } 641 642 buffer_info->skb = skb; 643 buffer_info->dma = dma_map_single(&pdev->dev, skb->data, 644 adapter->rx_ps_bsize0, 645 DMA_FROM_DEVICE); 646 if (dma_mapping_error(&pdev->dev, buffer_info->dma)) { 647 dev_err(&pdev->dev, "RX DMA map failed\n"); 648 adapter->rx_dma_failed++; 649 /* cleanup skb */ 650 dev_kfree_skb_any(skb); 651 buffer_info->skb = NULL; 652 break; 653 } 654 655 rx_desc->read.buffer_addr[0] = cpu_to_le64(buffer_info->dma); 656 657 if (unlikely(!(i & (E1000_RX_BUFFER_WRITE - 1)))) { 658 /* 659 * Force memory writes to complete before letting h/w 660 * know there are new descriptors to fetch. (Only 661 * applicable for weak-ordered memory model archs, 662 * such as IA-64). 663 */ 664 wmb(); 665 writel(i<<1, adapter->hw.hw_addr + rx_ring->tail); 666 } 667 668 i++; 669 if (i == rx_ring->count) 670 i = 0; 671 buffer_info = &rx_ring->buffer_info[i]; 672 } 673 674no_buffers: 675 rx_ring->next_to_use = i; 676} 677 678/** 679 * e1000_alloc_jumbo_rx_buffers - Replace used jumbo receive buffers 680 * @adapter: address of board private structure 681 * @cleaned_count: number of buffers to allocate this pass 682 **/ 683 684static void e1000_alloc_jumbo_rx_buffers(struct e1000_adapter *adapter, 685 int cleaned_count) 686{ 687 struct net_device *netdev = adapter->netdev; 688 struct pci_dev *pdev = adapter->pdev; 689 struct e1000_rx_desc *rx_desc; 690 struct e1000_ring *rx_ring = adapter->rx_ring; 691 struct e1000_buffer *buffer_info; 692 struct sk_buff *skb; 693 unsigned int i; 694 unsigned int bufsz = 256 - 16 /* for skb_reserve */; 695 696 i = rx_ring->next_to_use; 697 buffer_info = &rx_ring->buffer_info[i]; 698 699 while (cleaned_count--) { 700 skb = buffer_info->skb; 701 if (skb) { 702 skb_trim(skb, 0); 703 goto check_page; 704 } 705 706 skb = netdev_alloc_skb_ip_align(netdev, bufsz); 707 if (unlikely(!skb)) { 708 /* Better luck next round */ 709 adapter->alloc_rx_buff_failed++; 710 break; 711 } 712 713 buffer_info->skb = skb; 714check_page: 715 /* allocate a new page if necessary */ 716 if (!buffer_info->page) { 717 buffer_info->page = alloc_page(GFP_ATOMIC); 718 if (unlikely(!buffer_info->page)) { 719 adapter->alloc_rx_buff_failed++; 720 break; 721 } 722 } 723 724 if (!buffer_info->dma) 725 buffer_info->dma = dma_map_page(&pdev->dev, 726 buffer_info->page, 0, 727 PAGE_SIZE, 728 DMA_FROM_DEVICE); 729 730 rx_desc = E1000_RX_DESC(*rx_ring, i); 731 rx_desc->buffer_addr = cpu_to_le64(buffer_info->dma); 732 733 if (unlikely(++i == rx_ring->count)) 734 i = 0; 735 buffer_info = &rx_ring->buffer_info[i]; 736 } 737 738 if (likely(rx_ring->next_to_use != i)) { 739 rx_ring->next_to_use = i; 740 if (unlikely(i-- == 0)) 741 i = (rx_ring->count - 1); 742 743 /* Force memory writes to complete before letting h/w 744 * know there are new descriptors to fetch. (Only 745 * applicable for weak-ordered memory model archs, 746 * such as IA-64). */ 747 wmb(); 748 writel(i, adapter->hw.hw_addr + rx_ring->tail); 749 } 750} 751 752/** 753 * e1000_clean_rx_irq - Send received data up the network stack; legacy 754 * @adapter: board private structure 755 * 756 * the return value indicates whether actual cleaning was done, there 757 * is no guarantee that everything was cleaned 758 **/ 759static bool e1000_clean_rx_irq(struct e1000_adapter *adapter, 760 int *work_done, int work_to_do) 761{ 762 struct net_device *netdev = adapter->netdev; 763 struct pci_dev *pdev = adapter->pdev; 764 struct e1000_hw *hw = &adapter->hw; 765 struct e1000_ring *rx_ring = adapter->rx_ring; 766 struct e1000_rx_desc *rx_desc, *next_rxd; 767 struct e1000_buffer *buffer_info, *next_buffer; 768 u32 length; 769 unsigned int i; 770 int cleaned_count = 0; 771 bool cleaned = 0; 772 unsigned int total_rx_bytes = 0, total_rx_packets = 0; 773 774 i = rx_ring->next_to_clean; 775 rx_desc = E1000_RX_DESC(*rx_ring, i); 776 buffer_info = &rx_ring->buffer_info[i]; 777 778 while (rx_desc->status & E1000_RXD_STAT_DD) { 779 struct sk_buff *skb; 780 u8 status; 781 782 if (*work_done >= work_to_do) 783 break; 784 (*work_done)++; 785 rmb(); /* read descriptor and rx_buffer_info after status DD */ 786 787 status = rx_desc->status; 788 skb = buffer_info->skb; 789 buffer_info->skb = NULL; 790 791 prefetch(skb->data - NET_IP_ALIGN); 792 793 i++; 794 if (i == rx_ring->count) 795 i = 0; 796 next_rxd = E1000_RX_DESC(*rx_ring, i); 797 prefetch(next_rxd); 798 799 next_buffer = &rx_ring->buffer_info[i]; 800 801 cleaned = 1; 802 cleaned_count++; 803 dma_unmap_single(&pdev->dev, 804 buffer_info->dma, 805 adapter->rx_buffer_len, 806 DMA_FROM_DEVICE); 807 buffer_info->dma = 0; 808 809 length = le16_to_cpu(rx_desc->length); 810 811 /* 812 * !EOP means multiple descriptors were used to store a single 813 * packet, if that's the case we need to toss it. In fact, we 814 * need to toss every packet with the EOP bit clear and the 815 * next frame that _does_ have the EOP bit set, as it is by 816 * definition only a frame fragment 817 */ 818 if (unlikely(!(status & E1000_RXD_STAT_EOP))) 819 adapter->flags2 |= FLAG2_IS_DISCARDING; 820 821 if (adapter->flags2 & FLAG2_IS_DISCARDING) { 822 /* All receives must fit into a single buffer */ 823 e_dbg("Receive packet consumed multiple buffers\n"); 824 /* recycle */ 825 buffer_info->skb = skb; 826 if (status & E1000_RXD_STAT_EOP) 827 adapter->flags2 &= ~FLAG2_IS_DISCARDING; 828 goto next_desc; 829 } 830 831 if (rx_desc->errors & E1000_RXD_ERR_FRAME_ERR_MASK) { 832 /* recycle */ 833 buffer_info->skb = skb; 834 goto next_desc; 835 } 836 837 /* adjust length to remove Ethernet CRC */ 838 if (!(adapter->flags2 & FLAG2_CRC_STRIPPING)) 839 length -= 4; 840 841 total_rx_bytes += length; 842 total_rx_packets++; 843 844 /* 845 * code added for copybreak, this should improve 846 * performance for small packets with large amounts 847 * of reassembly being done in the stack 848 */ 849 if (length < copybreak) { 850 struct sk_buff *new_skb = 851 netdev_alloc_skb_ip_align(netdev, length); 852 if (new_skb) { 853 skb_copy_to_linear_data_offset(new_skb, 854 -NET_IP_ALIGN, 855 (skb->data - 856 NET_IP_ALIGN), 857 (length + 858 NET_IP_ALIGN)); 859 /* save the skb in buffer_info as good */ 860 buffer_info->skb = skb; 861 skb = new_skb; 862 } 863 /* else just continue with the old one */ 864 } 865 /* end copybreak code */ 866 skb_put(skb, length); 867 868 /* Receive Checksum Offload */ 869 e1000_rx_checksum(adapter, 870 (u32)(status) | 871 ((u32)(rx_desc->errors) << 24), 872 le16_to_cpu(rx_desc->csum), skb); 873 874 e1000_receive_skb(adapter, netdev, skb,status,rx_desc->special); 875 876next_desc: 877 rx_desc->status = 0; 878 879 /* return some buffers to hardware, one at a time is too slow */ 880 if (cleaned_count >= E1000_RX_BUFFER_WRITE) { 881 adapter->alloc_rx_buf(adapter, cleaned_count); 882 cleaned_count = 0; 883 } 884 885 /* use prefetched values */ 886 rx_desc = next_rxd; 887 buffer_info = next_buffer; 888 } 889 rx_ring->next_to_clean = i; 890 891 cleaned_count = e1000_desc_unused(rx_ring); 892 if (cleaned_count) 893 adapter->alloc_rx_buf(adapter, cleaned_count); 894 895 adapter->total_rx_bytes += total_rx_bytes; 896 adapter->total_rx_packets += total_rx_packets; 897 netdev->stats.rx_bytes += total_rx_bytes; 898 netdev->stats.rx_packets += total_rx_packets; 899 return cleaned; 900} 901 902static void e1000_put_txbuf(struct e1000_adapter *adapter, 903 struct e1000_buffer *buffer_info) 904{ 905 if (buffer_info->dma) { 906 if (buffer_info->mapped_as_page) 907 dma_unmap_page(&adapter->pdev->dev, buffer_info->dma, 908 buffer_info->length, DMA_TO_DEVICE); 909 else 910 dma_unmap_single(&adapter->pdev->dev, buffer_info->dma, 911 buffer_info->length, DMA_TO_DEVICE); 912 buffer_info->dma = 0; 913 } 914 if (buffer_info->skb) { 915 dev_kfree_skb_any(buffer_info->skb); 916 buffer_info->skb = NULL; 917 } 918 buffer_info->time_stamp = 0; 919} 920 921static void e1000_print_hw_hang(struct work_struct *work) 922{ 923 struct e1000_adapter *adapter = container_of(work, 924 struct e1000_adapter, 925 print_hang_task); 926 struct e1000_ring *tx_ring = adapter->tx_ring; 927 unsigned int i = tx_ring->next_to_clean; 928 unsigned int eop = tx_ring->buffer_info[i].next_to_watch; 929 struct e1000_tx_desc *eop_desc = E1000_TX_DESC(*tx_ring, eop); 930 struct e1000_hw *hw = &adapter->hw; 931 u16 phy_status, phy_1000t_status, phy_ext_status; 932 u16 pci_status; 933 934 e1e_rphy(hw, PHY_STATUS, &phy_status); 935 e1e_rphy(hw, PHY_1000T_STATUS, &phy_1000t_status); 936 e1e_rphy(hw, PHY_EXT_STATUS, &phy_ext_status); 937 938 pci_read_config_word(adapter->pdev, PCI_STATUS, &pci_status); 939 940 /* detected Hardware unit hang */ 941 e_err("Detected Hardware Unit Hang:\n" 942 " TDH <%x>\n" 943 " TDT <%x>\n" 944 " next_to_use <%x>\n" 945 " next_to_clean <%x>\n" 946 "buffer_info[next_to_clean]:\n" 947 " time_stamp <%lx>\n" 948 " next_to_watch <%x>\n" 949 " jiffies <%lx>\n" 950 " next_to_watch.status <%x>\n" 951 "MAC Status <%x>\n" 952 "PHY Status <%x>\n" 953 "PHY 1000BASE-T Status <%x>\n" 954 "PHY Extended Status <%x>\n" 955 "PCI Status <%x>\n", 956 readl(adapter->hw.hw_addr + tx_ring->head), 957 readl(adapter->hw.hw_addr + tx_ring->tail), 958 tx_ring->next_to_use, 959 tx_ring->next_to_clean, 960 tx_ring->buffer_info[eop].time_stamp, 961 eop, 962 jiffies, 963 eop_desc->upper.fields.status, 964 er32(STATUS), 965 phy_status, 966 phy_1000t_status, 967 phy_ext_status, 968 pci_status); 969} 970 971/** 972 * e1000_clean_tx_irq - Reclaim resources after transmit completes 973 * @adapter: board private structure 974 * 975 * the return value indicates whether actual cleaning was done, there 976 * is no guarantee that everything was cleaned 977 **/ 978static bool e1000_clean_tx_irq(struct e1000_adapter *adapter) 979{ 980 struct net_device *netdev = adapter->netdev; 981 struct e1000_hw *hw = &adapter->hw; 982 struct e1000_ring *tx_ring = adapter->tx_ring; 983 struct e1000_tx_desc *tx_desc, *eop_desc; 984 struct e1000_buffer *buffer_info; 985 unsigned int i, eop; 986 unsigned int count = 0; 987 unsigned int total_tx_bytes = 0, total_tx_packets = 0; 988 989 i = tx_ring->next_to_clean; 990 eop = tx_ring->buffer_info[i].next_to_watch; 991 eop_desc = E1000_TX_DESC(*tx_ring, eop); 992 993 while ((eop_desc->upper.data & cpu_to_le32(E1000_TXD_STAT_DD)) && 994 (count < tx_ring->count)) { 995 bool cleaned = false; 996 rmb(); /* read buffer_info after eop_desc */ 997 for (; !cleaned; count++) { 998 tx_desc = E1000_TX_DESC(*tx_ring, i); 999 buffer_info = &tx_ring->buffer_info[i]; 1000 cleaned = (i == eop); 1001 1002 if (cleaned) { 1003 total_tx_packets += buffer_info->segs; 1004 total_tx_bytes += buffer_info->bytecount; 1005 } 1006 1007 e1000_put_txbuf(adapter, buffer_info); 1008 tx_desc->upper.data = 0; 1009 1010 i++; 1011 if (i == tx_ring->count) 1012 i = 0; 1013 } 1014 1015 if (i == tx_ring->next_to_use) 1016 break; 1017 eop = tx_ring->buffer_info[i].next_to_watch; 1018 eop_desc = E1000_TX_DESC(*tx_ring, eop); 1019 } 1020 1021 tx_ring->next_to_clean = i; 1022 1023#define TX_WAKE_THRESHOLD 32 1024 if (count && netif_carrier_ok(netdev) && 1025 e1000_desc_unused(tx_ring) >= TX_WAKE_THRESHOLD) { 1026 /* Make sure that anybody stopping the queue after this 1027 * sees the new next_to_clean. 1028 */ 1029 smp_mb(); 1030 1031 if (netif_queue_stopped(netdev) && 1032 !(test_bit(__E1000_DOWN, &adapter->state))) { 1033 netif_wake_queue(netdev); 1034 ++adapter->restart_queue; 1035 } 1036 } 1037 1038 if (adapter->detect_tx_hung) { 1039 /* 1040 * Detect a transmit hang in hardware, this serializes the 1041 * check with the clearing of time_stamp and movement of i 1042 */ 1043 adapter->detect_tx_hung = 0; 1044 if (tx_ring->buffer_info[i].time_stamp && 1045 time_after(jiffies, tx_ring->buffer_info[i].time_stamp 1046 + (adapter->tx_timeout_factor * HZ)) && 1047 !(er32(STATUS) & E1000_STATUS_TXOFF)) { 1048 schedule_work(&adapter->print_hang_task); 1049 netif_stop_queue(netdev); 1050 } 1051 } 1052 adapter->total_tx_bytes += total_tx_bytes; 1053 adapter->total_tx_packets += total_tx_packets; 1054 netdev->stats.tx_bytes += total_tx_bytes; 1055 netdev->stats.tx_packets += total_tx_packets; 1056 return count < tx_ring->count; 1057} 1058 1059/** 1060 * e1000_clean_rx_irq_ps - Send received data up the network stack; packet split 1061 * @adapter: board private structure 1062 * 1063 * the return value indicates whether actual cleaning was done, there 1064 * is no guarantee that everything was cleaned 1065 **/ 1066static bool e1000_clean_rx_irq_ps(struct e1000_adapter *adapter, 1067 int *work_done, int work_to_do) 1068{ 1069 struct e1000_hw *hw = &adapter->hw; 1070 union e1000_rx_desc_packet_split *rx_desc, *next_rxd; 1071 struct net_device *netdev = adapter->netdev; 1072 struct pci_dev *pdev = adapter->pdev; 1073 struct e1000_ring *rx_ring = adapter->rx_ring; 1074 struct e1000_buffer *buffer_info, *next_buffer; 1075 struct e1000_ps_page *ps_page; 1076 struct sk_buff *skb; 1077 unsigned int i, j; 1078 u32 length, staterr; 1079 int cleaned_count = 0; 1080 bool cleaned = 0; 1081 unsigned int total_rx_bytes = 0, total_rx_packets = 0; 1082 1083 i = rx_ring->next_to_clean; 1084 rx_desc = E1000_RX_DESC_PS(*rx_ring, i); 1085 staterr = le32_to_cpu(rx_desc->wb.middle.status_error); 1086 buffer_info = &rx_ring->buffer_info[i]; 1087 1088 while (staterr & E1000_RXD_STAT_DD) { 1089 if (*work_done >= work_to_do) 1090 break; 1091 (*work_done)++; 1092 skb = buffer_info->skb; 1093 rmb(); /* read descriptor and rx_buffer_info after status DD */ 1094 1095 /* in the packet split case this is header only */ 1096 prefetch(skb->data - NET_IP_ALIGN); 1097 1098 i++; 1099 if (i == rx_ring->count) 1100 i = 0; 1101 next_rxd = E1000_RX_DESC_PS(*rx_ring, i); 1102 prefetch(next_rxd); 1103 1104 next_buffer = &rx_ring->buffer_info[i]; 1105 1106 cleaned = 1; 1107 cleaned_count++; 1108 dma_unmap_single(&pdev->dev, buffer_info->dma, 1109 adapter->rx_ps_bsize0, 1110 DMA_FROM_DEVICE); 1111 buffer_info->dma = 0; 1112 1113 /* see !EOP comment in other rx routine */ 1114 if (!(staterr & E1000_RXD_STAT_EOP)) 1115 adapter->flags2 |= FLAG2_IS_DISCARDING; 1116 1117 if (adapter->flags2 & FLAG2_IS_DISCARDING) { 1118 e_dbg("Packet Split buffers didn't pick up the full " 1119 "packet\n"); 1120 dev_kfree_skb_irq(skb); 1121 if (staterr & E1000_RXD_STAT_EOP) 1122 adapter->flags2 &= ~FLAG2_IS_DISCARDING; 1123 goto next_desc; 1124 } 1125 1126 if (staterr & E1000_RXDEXT_ERR_FRAME_ERR_MASK) { 1127 dev_kfree_skb_irq(skb); 1128 goto next_desc; 1129 } 1130 1131 length = le16_to_cpu(rx_desc->wb.middle.length0); 1132 1133 if (!length) { 1134 e_dbg("Last part of the packet spanning multiple " 1135 "descriptors\n"); 1136 dev_kfree_skb_irq(skb); 1137 goto next_desc; 1138 } 1139 1140 /* Good Receive */ 1141 skb_put(skb, length); 1142 1143 { 1144 /* 1145 * this looks ugly, but it seems compiler issues make it 1146 * more efficient than reusing j 1147 */ 1148 int l1 = le16_to_cpu(rx_desc->wb.upper.length[0]); 1149 1150 /* 1151 * page alloc/put takes too long and effects small packet 1152 * throughput, so unsplit small packets and save the alloc/put 1153 * only valid in softirq (napi) context to call kmap_* 1154 */ 1155 if (l1 && (l1 <= copybreak) && 1156 ((length + l1) <= adapter->rx_ps_bsize0)) { 1157 u8 *vaddr; 1158 1159 ps_page = &buffer_info->ps_pages[0]; 1160 1161 /* 1162 * there is no documentation about how to call 1163 * kmap_atomic, so we can't hold the mapping 1164 * very long 1165 */ 1166 dma_sync_single_for_cpu(&pdev->dev, ps_page->dma, 1167 PAGE_SIZE, DMA_FROM_DEVICE); 1168 vaddr = kmap_atomic(ps_page->page, KM_SKB_DATA_SOFTIRQ); 1169 memcpy(skb_tail_pointer(skb), vaddr, l1); 1170 kunmap_atomic(vaddr, KM_SKB_DATA_SOFTIRQ); 1171 dma_sync_single_for_device(&pdev->dev, ps_page->dma, 1172 PAGE_SIZE, DMA_FROM_DEVICE); 1173 1174 /* remove the CRC */ 1175 if (!(adapter->flags2 & FLAG2_CRC_STRIPPING)) 1176 l1 -= 4; 1177 1178 skb_put(skb, l1); 1179 goto copydone; 1180 } /* if */ 1181 } 1182 1183 for (j = 0; j < PS_PAGE_BUFFERS; j++) { 1184 length = le16_to_cpu(rx_desc->wb.upper.length[j]); 1185 if (!length) 1186 break; 1187 1188 ps_page = &buffer_info->ps_pages[j]; 1189 dma_unmap_page(&pdev->dev, ps_page->dma, PAGE_SIZE, 1190 DMA_FROM_DEVICE); 1191 ps_page->dma = 0; 1192 skb_fill_page_desc(skb, j, ps_page->page, 0, length); 1193 ps_page->page = NULL; 1194 skb->len += length; 1195 skb->data_len += length; 1196 skb->truesize += length; 1197 } 1198 1199 /* strip the ethernet crc, problem is we're using pages now so 1200 * this whole operation can get a little cpu intensive 1201 */ 1202 if (!(adapter->flags2 & FLAG2_CRC_STRIPPING)) 1203 pskb_trim(skb, skb->len - 4); 1204 1205copydone: 1206 total_rx_bytes += skb->len; 1207 total_rx_packets++; 1208 1209 e1000_rx_checksum(adapter, staterr, le16_to_cpu( 1210 rx_desc->wb.lower.hi_dword.csum_ip.csum), skb); 1211 1212 if (rx_desc->wb.upper.header_status & 1213 cpu_to_le16(E1000_RXDPS_HDRSTAT_HDRSP)) 1214 adapter->rx_hdr_split++; 1215 1216 e1000_receive_skb(adapter, netdev, skb, 1217 staterr, rx_desc->wb.middle.vlan); 1218 1219next_desc: 1220 rx_desc->wb.middle.status_error &= cpu_to_le32(~0xFF); 1221 buffer_info->skb = NULL; 1222 1223 /* return some buffers to hardware, one at a time is too slow */ 1224 if (cleaned_count >= E1000_RX_BUFFER_WRITE) { 1225 adapter->alloc_rx_buf(adapter, cleaned_count); 1226 cleaned_count = 0; 1227 } 1228 1229 /* use prefetched values */ 1230 rx_desc = next_rxd; 1231 buffer_info = next_buffer; 1232 1233 staterr = le32_to_cpu(rx_desc->wb.middle.status_error); 1234 } 1235 rx_ring->next_to_clean = i; 1236 1237 cleaned_count = e1000_desc_unused(rx_ring); 1238 if (cleaned_count) 1239 adapter->alloc_rx_buf(adapter, cleaned_count); 1240 1241 adapter->total_rx_bytes += total_rx_bytes; 1242 adapter->total_rx_packets += total_rx_packets; 1243 netdev->stats.rx_bytes += total_rx_bytes; 1244 netdev->stats.rx_packets += total_rx_packets; 1245 return cleaned; 1246} 1247 1248/** 1249 * e1000_consume_page - helper function 1250 **/ 1251static void e1000_consume_page(struct e1000_buffer *bi, struct sk_buff *skb, 1252 u16 length) 1253{ 1254 bi->page = NULL; 1255 skb->len += length; 1256 skb->data_len += length; 1257 skb->truesize += length; 1258} 1259 1260/** 1261 * e1000_clean_jumbo_rx_irq - Send received data up the network stack; legacy 1262 * @adapter: board private structure 1263 * 1264 * the return value indicates whether actual cleaning was done, there 1265 * is no guarantee that everything was cleaned 1266 **/ 1267 1268static bool e1000_clean_jumbo_rx_irq(struct e1000_adapter *adapter, 1269 int *work_done, int work_to_do) 1270{ 1271 struct net_device *netdev = adapter->netdev; 1272 struct pci_dev *pdev = adapter->pdev; 1273 struct e1000_ring *rx_ring = adapter->rx_ring; 1274 struct e1000_rx_desc *rx_desc, *next_rxd; 1275 struct e1000_buffer *buffer_info, *next_buffer; 1276 u32 length; 1277 unsigned int i; 1278 int cleaned_count = 0; 1279 bool cleaned = false; 1280 unsigned int total_rx_bytes=0, total_rx_packets=0; 1281 1282 i = rx_ring->next_to_clean; 1283 rx_desc = E1000_RX_DESC(*rx_ring, i); 1284 buffer_info = &rx_ring->buffer_info[i]; 1285 1286 while (rx_desc->status & E1000_RXD_STAT_DD) { 1287 struct sk_buff *skb; 1288 u8 status; 1289 1290 if (*work_done >= work_to_do) 1291 break; 1292 (*work_done)++; 1293 rmb(); /* read descriptor and rx_buffer_info after status DD */ 1294 1295 status = rx_desc->status; 1296 skb = buffer_info->skb; 1297 buffer_info->skb = NULL; 1298 1299 ++i; 1300 if (i == rx_ring->count) 1301 i = 0; 1302 next_rxd = E1000_RX_DESC(*rx_ring, i); 1303 prefetch(next_rxd); 1304 1305 next_buffer = &rx_ring->buffer_info[i]; 1306 1307 cleaned = true; 1308 cleaned_count++; 1309 dma_unmap_page(&pdev->dev, buffer_info->dma, PAGE_SIZE, 1310 DMA_FROM_DEVICE); 1311 buffer_info->dma = 0; 1312 1313 length = le16_to_cpu(rx_desc->length); 1314 1315 /* errors is only valid for DD + EOP descriptors */ 1316 if (unlikely((status & E1000_RXD_STAT_EOP) && 1317 (rx_desc->errors & E1000_RXD_ERR_FRAME_ERR_MASK))) { 1318 /* recycle both page and skb */ 1319 buffer_info->skb = skb; 1320 /* an error means any chain goes out the window 1321 * too */ 1322 if (rx_ring->rx_skb_top) 1323 dev_kfree_skb(rx_ring->rx_skb_top); 1324 rx_ring->rx_skb_top = NULL; 1325 goto next_desc; 1326 } 1327 1328#define rxtop rx_ring->rx_skb_top 1329 if (!(status & E1000_RXD_STAT_EOP)) { 1330 /* this descriptor is only the beginning (or middle) */ 1331 if (!rxtop) { 1332 /* this is the beginning of a chain */ 1333 rxtop = skb; 1334 skb_fill_page_desc(rxtop, 0, buffer_info->page, 1335 0, length); 1336 } else { 1337 /* this is the middle of a chain */ 1338 skb_fill_page_desc(rxtop, 1339 skb_shinfo(rxtop)->nr_frags, 1340 buffer_info->page, 0, length); 1341 /* re-use the skb, only consumed the page */ 1342 buffer_info->skb = skb; 1343 } 1344 e1000_consume_page(buffer_info, rxtop, length); 1345 goto next_desc; 1346 } else { 1347 if (rxtop) { 1348 /* end of the chain */ 1349 skb_fill_page_desc(rxtop, 1350 skb_shinfo(rxtop)->nr_frags, 1351 buffer_info->page, 0, length); 1352 /* re-use the current skb, we only consumed the 1353 * page */ 1354 buffer_info->skb = skb; 1355 skb = rxtop; 1356 rxtop = NULL; 1357 e1000_consume_page(buffer_info, skb, length); 1358 } else { 1359 /* no chain, got EOP, this buf is the packet 1360 * copybreak to save the put_page/alloc_page */ 1361 if (length <= copybreak && 1362 skb_tailroom(skb) >= length) { 1363 u8 *vaddr; 1364 vaddr = kmap_atomic(buffer_info->page, 1365 KM_SKB_DATA_SOFTIRQ); 1366 memcpy(skb_tail_pointer(skb), vaddr, 1367 length); 1368 kunmap_atomic(vaddr, 1369 KM_SKB_DATA_SOFTIRQ); 1370 /* re-use the page, so don't erase 1371 * buffer_info->page */ 1372 skb_put(skb, length); 1373 } else { 1374 skb_fill_page_desc(skb, 0, 1375 buffer_info->page, 0, 1376 length); 1377 e1000_consume_page(buffer_info, skb, 1378 length); 1379 } 1380 } 1381 } 1382 1383 /* Receive Checksum Offload XXX recompute due to CRC strip? */ 1384 e1000_rx_checksum(adapter, 1385 (u32)(status) | 1386 ((u32)(rx_desc->errors) << 24), 1387 le16_to_cpu(rx_desc->csum), skb); 1388 1389 /* probably a little skewed due to removing CRC */ 1390 total_rx_bytes += skb->len; 1391 total_rx_packets++; 1392 1393 /* eth type trans needs skb->data to point to something */ 1394 if (!pskb_may_pull(skb, ETH_HLEN)) { 1395 e_err("pskb_may_pull failed.\n"); 1396 dev_kfree_skb(skb); 1397 goto next_desc; 1398 } 1399 1400 e1000_receive_skb(adapter, netdev, skb, status, 1401 rx_desc->special); 1402 1403next_desc: 1404 rx_desc->status = 0; 1405 1406 /* return some buffers to hardware, one at a time is too slow */ 1407 if (unlikely(cleaned_count >= E1000_RX_BUFFER_WRITE)) { 1408 adapter->alloc_rx_buf(adapter, cleaned_count); 1409 cleaned_count = 0; 1410 } 1411 1412 /* use prefetched values */ 1413 rx_desc = next_rxd; 1414 buffer_info = next_buffer; 1415 } 1416 rx_ring->next_to_clean = i; 1417 1418 cleaned_count = e1000_desc_unused(rx_ring); 1419 if (cleaned_count) 1420 adapter->alloc_rx_buf(adapter, cleaned_count); 1421 1422 adapter->total_rx_bytes += total_rx_bytes; 1423 adapter->total_rx_packets += total_rx_packets; 1424 netdev->stats.rx_bytes += total_rx_bytes; 1425 netdev->stats.rx_packets += total_rx_packets; 1426 return cleaned; 1427} 1428 1429/** 1430 * e1000_clean_rx_ring - Free Rx Buffers per Queue 1431 * @adapter: board private structure 1432 **/ 1433static void e1000_clean_rx_ring(struct e1000_adapter *adapter) 1434{ 1435 struct e1000_ring *rx_ring = adapter->rx_ring; 1436 struct e1000_buffer *buffer_info; 1437 struct e1000_ps_page *ps_page; 1438 struct pci_dev *pdev = adapter->pdev; 1439 unsigned int i, j; 1440 1441 /* Free all the Rx ring sk_buffs */ 1442 for (i = 0; i < rx_ring->count; i++) { 1443 buffer_info = &rx_ring->buffer_info[i]; 1444 if (buffer_info->dma) { 1445 if (adapter->clean_rx == e1000_clean_rx_irq) 1446 dma_unmap_single(&pdev->dev, buffer_info->dma, 1447 adapter->rx_buffer_len, 1448 DMA_FROM_DEVICE); 1449 else if (adapter->clean_rx == e1000_clean_jumbo_rx_irq) 1450 dma_unmap_page(&pdev->dev, buffer_info->dma, 1451 PAGE_SIZE, 1452 DMA_FROM_DEVICE); 1453 else if (adapter->clean_rx == e1000_clean_rx_irq_ps) 1454 dma_unmap_single(&pdev->dev, buffer_info->dma, 1455 adapter->rx_ps_bsize0, 1456 DMA_FROM_DEVICE); 1457 buffer_info->dma = 0; 1458 } 1459 1460 if (buffer_info->page) { 1461 put_page(buffer_info->page); 1462 buffer_info->page = NULL; 1463 } 1464 1465 if (buffer_info->skb) { 1466 dev_kfree_skb(buffer_info->skb); 1467 buffer_info->skb = NULL; 1468 } 1469 1470 for (j = 0; j < PS_PAGE_BUFFERS; j++) { 1471 ps_page = &buffer_info->ps_pages[j]; 1472 if (!ps_page->page) 1473 break; 1474 dma_unmap_page(&pdev->dev, ps_page->dma, PAGE_SIZE, 1475 DMA_FROM_DEVICE); 1476 ps_page->dma = 0; 1477 put_page(ps_page->page); 1478 ps_page->page = NULL; 1479 } 1480 } 1481 1482 /* there also may be some cached data from a chained receive */ 1483 if (rx_ring->rx_skb_top) { 1484 dev_kfree_skb(rx_ring->rx_skb_top); 1485 rx_ring->rx_skb_top = NULL; 1486 } 1487 1488 /* Zero out the descriptor ring */ 1489 memset(rx_ring->desc, 0, rx_ring->size); 1490 1491 rx_ring->next_to_clean = 0; 1492 rx_ring->next_to_use = 0; 1493 adapter->flags2 &= ~FLAG2_IS_DISCARDING; 1494 1495 writel(0, adapter->hw.hw_addr + rx_ring->head); 1496 writel(0, adapter->hw.hw_addr + rx_ring->tail); 1497} 1498 1499static void e1000e_downshift_workaround(struct work_struct *work) 1500{ 1501 struct e1000_adapter *adapter = container_of(work, 1502 struct e1000_adapter, downshift_task); 1503 1504 e1000e_gig_downshift_workaround_ich8lan(&adapter->hw); 1505} 1506 1507/** 1508 * e1000_intr_msi - Interrupt Handler 1509 * @irq: interrupt number 1510 * @data: pointer to a network interface device structure 1511 **/ 1512static irqreturn_t e1000_intr_msi(int irq, void *data) 1513{ 1514 struct net_device *netdev = data; 1515 struct e1000_adapter *adapter = netdev_priv(netdev); 1516 struct e1000_hw *hw = &adapter->hw; 1517 u32 icr = er32(ICR); 1518 1519 /* 1520 * read ICR disables interrupts using IAM 1521 */ 1522 1523 if (icr & E1000_ICR_LSC) { 1524 hw->mac.get_link_status = 1; 1525 /* 1526 * ICH8 workaround-- Call gig speed drop workaround on cable 1527 * disconnect (LSC) before accessing any PHY registers 1528 */ 1529 if ((adapter->flags & FLAG_LSC_GIG_SPEED_DROP) && 1530 (!(er32(STATUS) & E1000_STATUS_LU))) 1531 schedule_work(&adapter->downshift_task); 1532 1533 /* 1534 * 80003ES2LAN workaround-- For packet buffer work-around on 1535 * link down event; disable receives here in the ISR and reset 1536 * adapter in watchdog 1537 */ 1538 if (netif_carrier_ok(netdev) && 1539 adapter->flags & FLAG_RX_NEEDS_RESTART) { 1540 /* disable receives */ 1541 u32 rctl = er32(RCTL); 1542 ew32(RCTL, rctl & ~E1000_RCTL_EN); 1543 adapter->flags |= FLAG_RX_RESTART_NOW; 1544 } 1545 /* guard against interrupt when we're going down */ 1546 if (!test_bit(__E1000_DOWN, &adapter->state)) 1547 mod_timer(&adapter->watchdog_timer, jiffies + 1); 1548 } 1549 1550 if (napi_schedule_prep(&adapter->napi)) { 1551 adapter->total_tx_bytes = 0; 1552 adapter->total_tx_packets = 0; 1553 adapter->total_rx_bytes = 0; 1554 adapter->total_rx_packets = 0; 1555 __napi_schedule(&adapter->napi); 1556 } 1557 1558 return IRQ_HANDLED; 1559} 1560 1561/** 1562 * e1000_intr - Interrupt Handler 1563 * @irq: interrupt number 1564 * @data: pointer to a network interface device structure 1565 **/ 1566static irqreturn_t e1000_intr(int irq, void *data) 1567{ 1568 struct net_device *netdev = data; 1569 struct e1000_adapter *adapter = netdev_priv(netdev); 1570 struct e1000_hw *hw = &adapter->hw; 1571 u32 rctl, icr = er32(ICR); 1572 1573 if (!icr || test_bit(__E1000_DOWN, &adapter->state)) 1574 return IRQ_NONE; /* Not our interrupt */ 1575 1576 /* 1577 * IMS will not auto-mask if INT_ASSERTED is not set, and if it is 1578 * not set, then the adapter didn't send an interrupt 1579 */ 1580 if (!(icr & E1000_ICR_INT_ASSERTED)) 1581 return IRQ_NONE; 1582 1583 /* 1584 * Interrupt Auto-Mask...upon reading ICR, 1585 * interrupts are masked. No need for the 1586 * IMC write 1587 */ 1588 1589 if (icr & E1000_ICR_LSC) { 1590 hw->mac.get_link_status = 1; 1591 /* 1592 * ICH8 workaround-- Call gig speed drop workaround on cable 1593 * disconnect (LSC) before accessing any PHY registers 1594 */ 1595 if ((adapter->flags & FLAG_LSC_GIG_SPEED_DROP) && 1596 (!(er32(STATUS) & E1000_STATUS_LU))) 1597 schedule_work(&adapter->downshift_task); 1598 1599 /* 1600 * 80003ES2LAN workaround-- 1601 * For packet buffer work-around on link down event; 1602 * disable receives here in the ISR and 1603 * reset adapter in watchdog 1604 */ 1605 if (netif_carrier_ok(netdev) && 1606 (adapter->flags & FLAG_RX_NEEDS_RESTART)) { 1607 /* disable receives */ 1608 rctl = er32(RCTL); 1609 ew32(RCTL, rctl & ~E1000_RCTL_EN); 1610 adapter->flags |= FLAG_RX_RESTART_NOW; 1611 } 1612 /* guard against interrupt when we're going down */ 1613 if (!test_bit(__E1000_DOWN, &adapter->state)) 1614 mod_timer(&adapter->watchdog_timer, jiffies + 1); 1615 } 1616 1617 if (napi_schedule_prep(&adapter->napi)) { 1618 adapter->total_tx_bytes = 0; 1619 adapter->total_tx_packets = 0; 1620 adapter->total_rx_bytes = 0; 1621 adapter->total_rx_packets = 0; 1622 __napi_schedule(&adapter->napi); 1623 } 1624 1625 return IRQ_HANDLED; 1626} 1627 1628static irqreturn_t e1000_msix_other(int irq, void *data) 1629{ 1630 struct net_device *netdev = data; 1631 struct e1000_adapter *adapter = netdev_priv(netdev); 1632 struct e1000_hw *hw = &adapter->hw; 1633 u32 icr = er32(ICR); 1634 1635 if (!(icr & E1000_ICR_INT_ASSERTED)) { 1636 if (!test_bit(__E1000_DOWN, &adapter->state)) 1637 ew32(IMS, E1000_IMS_OTHER); 1638 return IRQ_NONE; 1639 } 1640 1641 if (icr & adapter->eiac_mask) 1642 ew32(ICS, (icr & adapter->eiac_mask)); 1643 1644 if (icr & E1000_ICR_OTHER) { 1645 if (!(icr & E1000_ICR_LSC)) 1646 goto no_link_interrupt; 1647 hw->mac.get_link_status = 1; 1648 /* guard against interrupt when we're going down */ 1649 if (!test_bit(__E1000_DOWN, &adapter->state)) 1650 mod_timer(&adapter->watchdog_timer, jiffies + 1); 1651 } 1652 1653no_link_interrupt: 1654 if (!test_bit(__E1000_DOWN, &adapter->state)) 1655 ew32(IMS, E1000_IMS_LSC | E1000_IMS_OTHER); 1656 1657 return IRQ_HANDLED; 1658} 1659 1660 1661static irqreturn_t e1000_intr_msix_tx(int irq, void *data) 1662{ 1663 struct net_device *netdev = data; 1664 struct e1000_adapter *adapter = netdev_priv(netdev); 1665 struct e1000_hw *hw = &adapter->hw; 1666 struct e1000_ring *tx_ring = adapter->tx_ring; 1667 1668 1669 adapter->total_tx_bytes = 0; 1670 adapter->total_tx_packets = 0; 1671 1672 if (!e1000_clean_tx_irq(adapter)) 1673 /* Ring was not completely cleaned, so fire another interrupt */ 1674 ew32(ICS, tx_ring->ims_val); 1675 1676 return IRQ_HANDLED; 1677} 1678 1679static irqreturn_t e1000_intr_msix_rx(int irq, void *data) 1680{ 1681 struct net_device *netdev = data; 1682 struct e1000_adapter *adapter = netdev_priv(netdev); 1683 1684 /* Write the ITR value calculated at the end of the 1685 * previous interrupt. 1686 */ 1687 if (adapter->rx_ring->set_itr) { 1688 writel(1000000000 / (adapter->rx_ring->itr_val * 256), 1689 adapter->hw.hw_addr + adapter->rx_ring->itr_register); 1690 adapter->rx_ring->set_itr = 0; 1691 } 1692 1693 if (napi_schedule_prep(&adapter->napi)) { 1694 adapter->total_rx_bytes = 0; 1695 adapter->total_rx_packets = 0; 1696 __napi_schedule(&adapter->napi); 1697 } 1698 return IRQ_HANDLED; 1699} 1700 1701/** 1702 * e1000_configure_msix - Configure MSI-X hardware 1703 * 1704 * e1000_configure_msix sets up the hardware to properly 1705 * generate MSI-X interrupts. 1706 **/ 1707static void e1000_configure_msix(struct e1000_adapter *adapter) 1708{ 1709 struct e1000_hw *hw = &adapter->hw; 1710 struct e1000_ring *rx_ring = adapter->rx_ring; 1711 struct e1000_ring *tx_ring = adapter->tx_ring; 1712 int vector = 0; 1713 u32 ctrl_ext, ivar = 0; 1714 1715 adapter->eiac_mask = 0; 1716 1717 /* Workaround issue with spurious interrupts on 82574 in MSI-X mode */ 1718 if (hw->mac.type == e1000_82574) { 1719 u32 rfctl = er32(RFCTL); 1720 rfctl |= E1000_RFCTL_ACK_DIS; 1721 ew32(RFCTL, rfctl); 1722 } 1723 1724#define E1000_IVAR_INT_ALLOC_VALID 0x8 1725 /* Configure Rx vector */ 1726 rx_ring->ims_val = E1000_IMS_RXQ0; 1727 adapter->eiac_mask |= rx_ring->ims_val; 1728 if (rx_ring->itr_val) 1729 writel(1000000000 / (rx_ring->itr_val * 256), 1730 hw->hw_addr + rx_ring->itr_register); 1731 else 1732 writel(1, hw->hw_addr + rx_ring->itr_register); 1733 ivar = E1000_IVAR_INT_ALLOC_VALID | vector; 1734 1735 /* Configure Tx vector */ 1736 tx_ring->ims_val = E1000_IMS_TXQ0; 1737 vector++; 1738 if (tx_ring->itr_val) 1739 writel(1000000000 / (tx_ring->itr_val * 256), 1740 hw->hw_addr + tx_ring->itr_register); 1741 else 1742 writel(1, hw->hw_addr + tx_ring->itr_register); 1743 adapter->eiac_mask |= tx_ring->ims_val; 1744 ivar |= ((E1000_IVAR_INT_ALLOC_VALID | vector) << 8); 1745 1746 /* set vector for Other Causes, e.g. link changes */ 1747 vector++; 1748 ivar |= ((E1000_IVAR_INT_ALLOC_VALID | vector) << 16); 1749 if (rx_ring->itr_val) 1750 writel(1000000000 / (rx_ring->itr_val * 256), 1751 hw->hw_addr + E1000_EITR_82574(vector)); 1752 else 1753 writel(1, hw->hw_addr + E1000_EITR_82574(vector)); 1754 1755 /* Cause Tx interrupts on every write back */ 1756 ivar |= (1 << 31); 1757 1758 ew32(IVAR, ivar); 1759 1760 /* enable MSI-X PBA support */ 1761 ctrl_ext = er32(CTRL_EXT); 1762 ctrl_ext |= E1000_CTRL_EXT_PBA_CLR; 1763 1764 /* Auto-Mask Other interrupts upon ICR read */ 1765#define E1000_EIAC_MASK_82574 0x01F00000 1766 ew32(IAM, ~E1000_EIAC_MASK_82574 | E1000_IMS_OTHER); 1767 ctrl_ext |= E1000_CTRL_EXT_EIAME; 1768 ew32(CTRL_EXT, ctrl_ext); 1769 e1e_flush(); 1770} 1771 1772void e1000e_reset_interrupt_capability(struct e1000_adapter *adapter) 1773{ 1774 if (adapter->msix_entries) { 1775 pci_disable_msix(adapter->pdev); 1776 kfree(adapter->msix_entries); 1777 adapter->msix_entries = NULL; 1778 } else if (adapter->flags & FLAG_MSI_ENABLED) { 1779 pci_disable_msi(adapter->pdev); 1780 adapter->flags &= ~FLAG_MSI_ENABLED; 1781 } 1782} 1783 1784/** 1785 * e1000e_set_interrupt_capability - set MSI or MSI-X if supported 1786 * 1787 * Attempt to configure interrupts using the best available 1788 * capabilities of the hardware and kernel. 1789 **/ 1790void e1000e_set_interrupt_capability(struct e1000_adapter *adapter) 1791{ 1792 int err; 1793 int i; 1794 1795 switch (adapter->int_mode) { 1796 case E1000E_INT_MODE_MSIX: 1797 if (adapter->flags & FLAG_HAS_MSIX) { 1798 adapter->num_vectors = 3; /* RxQ0, TxQ0 and other */ 1799 adapter->msix_entries = kcalloc(adapter->num_vectors, 1800 sizeof(struct msix_entry), 1801 GFP_KERNEL); 1802 if (adapter->msix_entries) { 1803 for (i = 0; i < adapter->num_vectors; i++) 1804 adapter->msix_entries[i].entry = i; 1805 1806 err = pci_enable_msix(adapter->pdev, 1807 adapter->msix_entries, 1808 adapter->num_vectors); 1809 if (err == 0) { 1810 return; 1811 } 1812 } 1813 /* MSI-X failed, so fall through and try MSI */ 1814 e_err("Failed to initialize MSI-X interrupts. " 1815 "Falling back to MSI interrupts.\n"); 1816 e1000e_reset_interrupt_capability(adapter); 1817 } 1818 adapter->int_mode = E1000E_INT_MODE_MSI; 1819 /* Fall through */ 1820 case E1000E_INT_MODE_MSI: 1821 if (!pci_enable_msi(adapter->pdev)) { 1822 adapter->flags |= FLAG_MSI_ENABLED; 1823 } else { 1824 adapter->int_mode = E1000E_INT_MODE_LEGACY; 1825 e_err("Failed to initialize MSI interrupts. Falling " 1826 "back to legacy interrupts.\n"); 1827 } 1828 /* Fall through */ 1829 case E1000E_INT_MODE_LEGACY: 1830 /* Don't do anything; this is the system default */ 1831 break; 1832 } 1833 1834 /* store the number of vectors being used */ 1835 adapter->num_vectors = 1; 1836} 1837 1838/** 1839 * e1000_request_msix - Initialize MSI-X interrupts 1840 * 1841 * e1000_request_msix allocates MSI-X vectors and requests interrupts from the 1842 * kernel. 1843 **/ 1844static int e1000_request_msix(struct e1000_adapter *adapter) 1845{ 1846 struct net_device *netdev = adapter->netdev; 1847 int err = 0, vector = 0; 1848 1849 if (strlen(netdev->name) < (IFNAMSIZ - 5)) 1850 sprintf(adapter->rx_ring->name, "%s-rx-0", netdev->name); 1851 else 1852 memcpy(adapter->rx_ring->name, netdev->name, IFNAMSIZ); 1853 err = request_irq(adapter->msix_entries[vector].vector, 1854 e1000_intr_msix_rx, 0, adapter->rx_ring->name, 1855 netdev); 1856 if (err) 1857 goto out; 1858 adapter->rx_ring->itr_register = E1000_EITR_82574(vector); 1859 adapter->rx_ring->itr_val = adapter->itr; 1860 vector++; 1861 1862 if (strlen(netdev->name) < (IFNAMSIZ - 5)) 1863 sprintf(adapter->tx_ring->name, "%s-tx-0", netdev->name); 1864 else 1865 memcpy(adapter->tx_ring->name, netdev->name, IFNAMSIZ); 1866 err = request_irq(adapter->msix_entries[vector].vector, 1867 e1000_intr_msix_tx, 0, adapter->tx_ring->name, 1868 netdev); 1869 if (err) 1870 goto out; 1871 adapter->tx_ring->itr_register = E1000_EITR_82574(vector); 1872 adapter->tx_ring->itr_val = adapter->itr; 1873 vector++; 1874 1875 err = request_irq(adapter->msix_entries[vector].vector, 1876 e1000_msix_other, 0, netdev->name, netdev); 1877 if (err) 1878 goto out; 1879 1880 e1000_configure_msix(adapter); 1881 return 0; 1882out: 1883 return err; 1884} 1885 1886/** 1887 * e1000_request_irq - initialize interrupts 1888 * 1889 * Attempts to configure interrupts using the best available 1890 * capabilities of the hardware and kernel. 1891 **/ 1892static int e1000_request_irq(struct e1000_adapter *adapter) 1893{ 1894 struct net_device *netdev = adapter->netdev; 1895 int err; 1896 1897 if (adapter->msix_entries) { 1898 err = e1000_request_msix(adapter); 1899 if (!err) 1900 return err; 1901 /* fall back to MSI */ 1902 e1000e_reset_interrupt_capability(adapter); 1903 adapter->int_mode = E1000E_INT_MODE_MSI; 1904 e1000e_set_interrupt_capability(adapter); 1905 } 1906 if (adapter->flags & FLAG_MSI_ENABLED) { 1907 err = request_irq(adapter->pdev->irq, e1000_intr_msi, 0, 1908 netdev->name, netdev); 1909 if (!err) 1910 return err; 1911 1912 /* fall back to legacy interrupt */ 1913 e1000e_reset_interrupt_capability(adapter); 1914 adapter->int_mode = E1000E_INT_MODE_LEGACY; 1915 } 1916 1917 err = request_irq(adapter->pdev->irq, e1000_intr, IRQF_SHARED, 1918 netdev->name, netdev); 1919 if (err) 1920 e_err("Unable to allocate interrupt, Error: %d\n", err); 1921 1922 return err; 1923} 1924 1925static void e1000_free_irq(struct e1000_adapter *adapter) 1926{ 1927 struct net_device *netdev = adapter->netdev; 1928 1929 if (adapter->msix_entries) { 1930 int vector = 0; 1931 1932 free_irq(adapter->msix_entries[vector].vector, netdev); 1933 vector++; 1934 1935 free_irq(adapter->msix_entries[vector].vector, netdev); 1936 vector++; 1937 1938 /* Other Causes interrupt vector */ 1939 free_irq(adapter->msix_entries[vector].vector, netdev); 1940 return; 1941 } 1942 1943 free_irq(adapter->pdev->irq, netdev); 1944} 1945 1946/** 1947 * e1000_irq_disable - Mask off interrupt generation on the NIC 1948 **/ 1949static void e1000_irq_disable(struct e1000_adapter *adapter) 1950{ 1951 struct e1000_hw *hw = &adapter->hw; 1952 1953 ew32(IMC, ~0); 1954 if (adapter->msix_entries) 1955 ew32(EIAC_82574, 0); 1956 e1e_flush(); 1957 1958 if (adapter->msix_entries) { 1959 int i; 1960 for (i = 0; i < adapter->num_vectors; i++) 1961 synchronize_irq(adapter->msix_entries[i].vector); 1962 } else { 1963 synchronize_irq(adapter->pdev->irq); 1964 } 1965} 1966 1967/** 1968 * e1000_irq_enable - Enable default interrupt generation settings 1969 **/ 1970static void e1000_irq_enable(struct e1000_adapter *adapter) 1971{ 1972 struct e1000_hw *hw = &adapter->hw; 1973 1974 if (adapter->msix_entries) { 1975 ew32(EIAC_82574, adapter->eiac_mask & E1000_EIAC_MASK_82574); 1976 ew32(IMS, adapter->eiac_mask | E1000_IMS_OTHER | E1000_IMS_LSC); 1977 } else { 1978 ew32(IMS, IMS_ENABLE_MASK); 1979 } 1980 e1e_flush(); 1981} 1982 1983/** 1984 * e1000_get_hw_control - get control of the h/w from f/w 1985 * @adapter: address of board private structure 1986 * 1987 * e1000_get_hw_control sets {CTRL_EXT|SWSM}:DRV_LOAD bit. 1988 * For ASF and Pass Through versions of f/w this means that 1989 * the driver is loaded. For AMT version (only with 82573) 1990 * of the f/w this means that the network i/f is open. 1991 **/ 1992static void e1000_get_hw_control(struct e1000_adapter *adapter) 1993{ 1994 struct e1000_hw *hw = &adapter->hw; 1995 u32 ctrl_ext; 1996 u32 swsm; 1997 1998 /* Let firmware know the driver has taken over */ 1999 if (adapter->flags & FLAG_HAS_SWSM_ON_LOAD) { 2000 swsm = er32(SWSM); 2001 ew32(SWSM, swsm | E1000_SWSM_DRV_LOAD); 2002 } else if (adapter->flags & FLAG_HAS_CTRLEXT_ON_LOAD) { 2003 ctrl_ext = er32(CTRL_EXT); 2004 ew32(CTRL_EXT, ctrl_ext | E1000_CTRL_EXT_DRV_LOAD); 2005 } 2006} 2007 2008/** 2009 * e1000_release_hw_control - release control of the h/w to f/w 2010 * @adapter: address of board private structure 2011 * 2012 * e1000_release_hw_control resets {CTRL_EXT|SWSM}:DRV_LOAD bit. 2013 * For ASF and Pass Through versions of f/w this means that the 2014 * driver is no longer loaded. For AMT version (only with 82573) i 2015 * of the f/w this means that the network i/f is closed. 2016 * 2017 **/ 2018static void e1000_release_hw_control(struct e1000_adapter *adapter) 2019{ 2020 struct e1000_hw *hw = &adapter->hw; 2021 u32 ctrl_ext; 2022 u32 swsm; 2023 2024 /* Let firmware taken over control of h/w */ 2025 if (adapter->flags & FLAG_HAS_SWSM_ON_LOAD) { 2026 swsm = er32(SWSM); 2027 ew32(SWSM, swsm & ~E1000_SWSM_DRV_LOAD); 2028 } else if (adapter->flags & FLAG_HAS_CTRLEXT_ON_LOAD) { 2029 ctrl_ext = er32(CTRL_EXT); 2030 ew32(CTRL_EXT, ctrl_ext & ~E1000_CTRL_EXT_DRV_LOAD); 2031 } 2032} 2033 2034/** 2035 * @e1000_alloc_ring - allocate memory for a ring structure 2036 **/ 2037static int e1000_alloc_ring_dma(struct e1000_adapter *adapter, 2038 struct e1000_ring *ring) 2039{ 2040 struct pci_dev *pdev = adapter->pdev; 2041 2042 ring->desc = dma_alloc_coherent(&pdev->dev, ring->size, &ring->dma, 2043 GFP_KERNEL); 2044 if (!ring->desc) 2045 return -ENOMEM; 2046 2047 return 0; 2048} 2049 2050/** 2051 * e1000e_setup_tx_resources - allocate Tx resources (Descriptors) 2052 * @adapter: board private structure 2053 * 2054 * Return 0 on success, negative on failure 2055 **/ 2056int e1000e_setup_tx_resources(struct e1000_adapter *adapter) 2057{ 2058 struct e1000_ring *tx_ring = adapter->tx_ring; 2059 int err = -ENOMEM, size; 2060 2061 size = sizeof(struct e1000_buffer) * tx_ring->count; 2062 tx_ring->buffer_info = vmalloc(size); 2063 if (!tx_ring->buffer_info) 2064 goto err; 2065 memset(tx_ring->buffer_info, 0, size); 2066 2067 /* round up to nearest 4K */ 2068 tx_ring->size = tx_ring->count * sizeof(struct e1000_tx_desc); 2069 tx_ring->size = ALIGN(tx_ring->size, 4096); 2070 2071 err = e1000_alloc_ring_dma(adapter, tx_ring); 2072 if (err) 2073 goto err; 2074 2075 tx_ring->next_to_use = 0; 2076 tx_ring->next_to_clean = 0; 2077 2078 return 0; 2079err: 2080 vfree(tx_ring->buffer_info); 2081 e_err("Unable to allocate memory for the transmit descriptor ring\n"); 2082 return err; 2083} 2084 2085/** 2086 * e1000e_setup_rx_resources - allocate Rx resources (Descriptors) 2087 * @adapter: board private structure 2088 * 2089 * Returns 0 on success, negative on failure 2090 **/ 2091int e1000e_setup_rx_resources(struct e1000_adapter *adapter) 2092{ 2093 struct e1000_ring *rx_ring = adapter->rx_ring; 2094 struct e1000_buffer *buffer_info; 2095 int i, size, desc_len, err = -ENOMEM; 2096 2097 size = sizeof(struct e1000_buffer) * rx_ring->count; 2098 rx_ring->buffer_info = vmalloc(size); 2099 if (!rx_ring->buffer_info) 2100 goto err; 2101 memset(rx_ring->buffer_info, 0, size); 2102 2103 for (i = 0; i < rx_ring->count; i++) { 2104 buffer_info = &rx_ring->buffer_info[i]; 2105 buffer_info->ps_pages = kcalloc(PS_PAGE_BUFFERS, 2106 sizeof(struct e1000_ps_page), 2107 GFP_KERNEL); 2108 if (!buffer_info->ps_pages) 2109 goto err_pages; 2110 } 2111 2112 desc_len = sizeof(union e1000_rx_desc_packet_split); 2113 2114 /* Round up to nearest 4K */ 2115 rx_ring->size = rx_ring->count * desc_len; 2116 rx_ring->size = ALIGN(rx_ring->size, 4096); 2117 2118 err = e1000_alloc_ring_dma(adapter, rx_ring); 2119 if (err) 2120 goto err_pages; 2121 2122 rx_ring->next_to_clean = 0; 2123 rx_ring->next_to_use = 0; 2124 rx_ring->rx_skb_top = NULL; 2125 2126 return 0; 2127 2128err_pages: 2129 for (i = 0; i < rx_ring->count; i++) { 2130 buffer_info = &rx_ring->buffer_info[i]; 2131 kfree(buffer_info->ps_pages); 2132 } 2133err: 2134 vfree(rx_ring->buffer_info); 2135 e_err("Unable to allocate memory for the transmit descriptor ring\n"); 2136 return err; 2137} 2138 2139/** 2140 * e1000_clean_tx_ring - Free Tx Buffers 2141 * @adapter: board private structure 2142 **/ 2143static void e1000_clean_tx_ring(struct e1000_adapter *adapter) 2144{ 2145 struct e1000_ring *tx_ring = adapter->tx_ring; 2146 struct e1000_buffer *buffer_info; 2147 unsigned long size; 2148 unsigned int i; 2149 2150 for (i = 0; i < tx_ring->count; i++) { 2151 buffer_info = &tx_ring->buffer_info[i]; 2152 e1000_put_txbuf(adapter, buffer_info); 2153 } 2154 2155 size = sizeof(struct e1000_buffer) * tx_ring->count; 2156 memset(tx_ring->buffer_info, 0, size); 2157 2158 memset(tx_ring->desc, 0, tx_ring->size); 2159 2160 tx_ring->next_to_use = 0; 2161 tx_ring->next_to_clean = 0; 2162 2163 writel(0, adapter->hw.hw_addr + tx_ring->head); 2164 writel(0, adapter->hw.hw_addr + tx_ring->tail); 2165} 2166 2167/** 2168 * e1000e_free_tx_resources - Free Tx Resources per Queue 2169 * @adapter: board private structure 2170 * 2171 * Free all transmit software resources 2172 **/ 2173void e1000e_free_tx_resources(struct e1000_adapter *adapter) 2174{ 2175 struct pci_dev *pdev = adapter->pdev; 2176 struct e1000_ring *tx_ring = adapter->tx_ring; 2177 2178 e1000_clean_tx_ring(adapter); 2179 2180 vfree(tx_ring->buffer_info); 2181 tx_ring->buffer_info = NULL; 2182 2183 dma_free_coherent(&pdev->dev, tx_ring->size, tx_ring->desc, 2184 tx_ring->dma); 2185 tx_ring->desc = NULL; 2186} 2187 2188/** 2189 * e1000e_free_rx_resources - Free Rx Resources 2190 * @adapter: board private structure 2191 * 2192 * Free all receive software resources 2193 **/ 2194 2195void e1000e_free_rx_resources(struct e1000_adapter *adapter) 2196{ 2197 struct pci_dev *pdev = adapter->pdev; 2198 struct e1000_ring *rx_ring = adapter->rx_ring; 2199 int i; 2200 2201 e1000_clean_rx_ring(adapter); 2202 2203 for (i = 0; i < rx_ring->count; i++) { 2204 kfree(rx_ring->buffer_info[i].ps_pages); 2205 } 2206 2207 vfree(rx_ring->buffer_info); 2208 rx_ring->buffer_info = NULL; 2209 2210 dma_free_coherent(&pdev->dev, rx_ring->size, rx_ring->desc, 2211 rx_ring->dma); 2212 rx_ring->desc = NULL; 2213} 2214 2215/** 2216 * e1000_update_itr - update the dynamic ITR value based on statistics 2217 * @adapter: pointer to adapter 2218 * @itr_setting: current adapter->itr 2219 * @packets: the number of packets during this measurement interval 2220 * @bytes: the number of bytes during this measurement interval 2221 * 2222 * Stores a new ITR value based on packets and byte 2223 * counts during the last interrupt. The advantage of per interrupt 2224 * computation is faster updates and more accurate ITR for the current 2225 * traffic pattern. Constants in this function were computed 2226 * based on theoretical maximum wire speed and thresholds were set based 2227 * on testing data as well as attempting to minimize response time 2228 * while increasing bulk throughput. This functionality is controlled 2229 * by the InterruptThrottleRate module parameter. 2230 **/ 2231static unsigned int e1000_update_itr(struct e1000_adapter *adapter, 2232 u16 itr_setting, int packets, 2233 int bytes) 2234{ 2235 unsigned int retval = itr_setting; 2236 2237 if (packets == 0) 2238 goto update_itr_done; 2239 2240 switch (itr_setting) { 2241 case lowest_latency: 2242 /* handle TSO and jumbo frames */ 2243 if (bytes/packets > 8000) 2244 retval = bulk_latency; 2245 else if ((packets < 5) && (bytes > 512)) { 2246 retval = low_latency; 2247 } 2248 break; 2249 case low_latency: /* 50 usec aka 20000 ints/s */ 2250 if (bytes > 10000) { 2251 /* this if handles the TSO accounting */ 2252 if (bytes/packets > 8000) { 2253 retval = bulk_latency; 2254 } else if ((packets < 10) || ((bytes/packets) > 1200)) { 2255 retval = bulk_latency; 2256 } else if ((packets > 35)) { 2257 retval = lowest_latency; 2258 } 2259 } else if (bytes/packets > 2000) { 2260 retval = bulk_latency; 2261 } else if (packets <= 2 && bytes < 512) { 2262 retval = lowest_latency; 2263 } 2264 break; 2265 case bulk_latency: /* 250 usec aka 4000 ints/s */ 2266 if (bytes > 25000) { 2267 if (packets > 35) { 2268 retval = low_latency; 2269 } 2270 } else if (bytes < 6000) { 2271 retval = low_latency; 2272 } 2273 break; 2274 } 2275 2276update_itr_done: 2277 return retval; 2278} 2279 2280static void e1000_set_itr(struct e1000_adapter *adapter) 2281{ 2282 struct e1000_hw *hw = &adapter->hw; 2283 u16 current_itr; 2284 u32 new_itr = adapter->itr; 2285 2286 /* for non-gigabit speeds, just fix the interrupt rate at 4000 */ 2287 if (adapter->link_speed != SPEED_1000) { 2288 current_itr = 0; 2289 new_itr = 4000; 2290 goto set_itr_now; 2291 } 2292 2293 if (adapter->flags2 & FLAG2_DISABLE_AIM) { 2294 new_itr = 0; 2295 goto set_itr_now; 2296 } 2297 2298 adapter->tx_itr = e1000_update_itr(adapter, 2299 adapter->tx_itr, 2300 adapter->total_tx_packets, 2301 adapter->total_tx_bytes); 2302 /* conservative mode (itr 3) eliminates the lowest_latency setting */ 2303 if (adapter->itr_setting == 3 && adapter->tx_itr == lowest_latency) 2304 adapter->tx_itr = low_latency; 2305 2306 adapter->rx_itr = e1000_update_itr(adapter, 2307 adapter->rx_itr, 2308 adapter->total_rx_packets, 2309 adapter->total_rx_bytes); 2310 /* conservative mode (itr 3) eliminates the lowest_latency setting */ 2311 if (adapter->itr_setting == 3 && adapter->rx_itr == lowest_latency) 2312 adapter->rx_itr = low_latency; 2313 2314 current_itr = max(adapter->rx_itr, adapter->tx_itr); 2315 2316 switch (current_itr) { 2317 /* counts and packets in update_itr are dependent on these numbers */ 2318 case lowest_latency: 2319 new_itr = 70000; 2320 break; 2321 case low_latency: 2322 new_itr = 20000; /* aka hwitr = ~200 */ 2323 break; 2324 case bulk_latency: 2325 new_itr = 4000; 2326 break; 2327 default: 2328 break; 2329 } 2330 2331set_itr_now: 2332 if (new_itr != adapter->itr) { 2333 /* 2334 * this attempts to bias the interrupt rate towards Bulk 2335 * by adding intermediate steps when interrupt rate is 2336 * increasing 2337 */ 2338 new_itr = new_itr > adapter->itr ? 2339 min(adapter->itr + (new_itr >> 2), new_itr) : 2340 new_itr; 2341 adapter->itr = new_itr; 2342 adapter->rx_ring->itr_val = new_itr; 2343 if (adapter->msix_entries) 2344 adapter->rx_ring->set_itr = 1; 2345 else 2346 if (new_itr) 2347 ew32(ITR, 1000000000 / (new_itr * 256)); 2348 else 2349 ew32(ITR, 0); 2350 } 2351} 2352 2353/** 2354 * e1000_alloc_queues - Allocate memory for all rings 2355 * @adapter: board private structure to initialize 2356 **/ 2357static int __devinit e1000_alloc_queues(struct e1000_adapter *adapter) 2358{ 2359 adapter->tx_ring = kzalloc(sizeof(struct e1000_ring), GFP_KERNEL); 2360 if (!adapter->tx_ring) 2361 goto err; 2362 2363 adapter->rx_ring = kzalloc(sizeof(struct e1000_ring), GFP_KERNEL); 2364 if (!adapter->rx_ring) 2365 goto err; 2366 2367 return 0; 2368err: 2369 e_err("Unable to allocate memory for queues\n"); 2370 kfree(adapter->rx_ring); 2371 kfree(adapter->tx_ring); 2372 return -ENOMEM; 2373} 2374 2375/** 2376 * e1000_clean - NAPI Rx polling callback 2377 * @napi: struct associated with this polling callback 2378 * @budget: amount of packets driver is allowed to process this poll 2379 **/ 2380static int e1000_clean(struct napi_struct *napi, int budget) 2381{ 2382 struct e1000_adapter *adapter = container_of(napi, struct e1000_adapter, napi); 2383 struct e1000_hw *hw = &adapter->hw; 2384 struct net_device *poll_dev = adapter->netdev; 2385 int tx_cleaned = 1, work_done = 0; 2386 2387 adapter = netdev_priv(poll_dev); 2388 2389 if (adapter->msix_entries && 2390 !(adapter->rx_ring->ims_val & adapter->tx_ring->ims_val)) 2391 goto clean_rx; 2392 2393 tx_cleaned = e1000_clean_tx_irq(adapter); 2394 2395clean_rx: 2396 adapter->clean_rx(adapter, &work_done, budget); 2397 2398 if (!tx_cleaned) 2399 work_done = budget; 2400 2401 /* If budget not fully consumed, exit the polling mode */ 2402 if (work_done < budget) { 2403 if (adapter->itr_setting & 3) 2404 e1000_set_itr(adapter); 2405 napi_complete(napi); 2406 if (!test_bit(__E1000_DOWN, &adapter->state)) { 2407 if (adapter->msix_entries) 2408 ew32(IMS, adapter->rx_ring->ims_val); 2409 else 2410 e1000_irq_enable(adapter); 2411 } 2412 } 2413 2414 return work_done; 2415} 2416 2417static void e1000_vlan_rx_add_vid(struct net_device *netdev, u16 vid) 2418{ 2419 struct e1000_adapter *adapter = netdev_priv(netdev); 2420 struct e1000_hw *hw = &adapter->hw; 2421 u32 vfta, index; 2422 2423 /* don't update vlan cookie if already programmed */ 2424 if ((adapter->hw.mng_cookie.status & 2425 E1000_MNG_DHCP_COOKIE_STATUS_VLAN) && 2426 (vid == adapter->mng_vlan_id)) 2427 return; 2428 2429 /* add VID to filter table */ 2430 if (adapter->flags & FLAG_HAS_HW_VLAN_FILTER) { 2431 index = (vid >> 5) & 0x7F; 2432 vfta = E1000_READ_REG_ARRAY(hw, E1000_VFTA, index); 2433 vfta |= (1 << (vid & 0x1F)); 2434 hw->mac.ops.write_vfta(hw, index, vfta); 2435 } 2436} 2437 2438static void e1000_vlan_rx_kill_vid(struct net_device *netdev, u16 vid) 2439{ 2440 struct e1000_adapter *adapter = netdev_priv(netdev); 2441 struct e1000_hw *hw = &adapter->hw; 2442 u32 vfta, index; 2443 2444 if (!test_bit(__E1000_DOWN, &adapter->state)) 2445 e1000_irq_disable(adapter); 2446 vlan_group_set_device(adapter->vlgrp, vid, NULL); 2447 2448 if (!test_bit(__E1000_DOWN, &adapter->state)) 2449 e1000_irq_enable(adapter); 2450 2451 if ((adapter->hw.mng_cookie.status & 2452 E1000_MNG_DHCP_COOKIE_STATUS_VLAN) && 2453 (vid == adapter->mng_vlan_id)) { 2454 /* release control to f/w */ 2455 e1000_release_hw_control(adapter); 2456 return; 2457 } 2458 2459 /* remove VID from filter table */ 2460 if (adapter->flags & FLAG_HAS_HW_VLAN_FILTER) { 2461 index = (vid >> 5) & 0x7F; 2462 vfta = E1000_READ_REG_ARRAY(hw, E1000_VFTA, index); 2463 vfta &= ~(1 << (vid & 0x1F)); 2464 hw->mac.ops.write_vfta(hw, index, vfta); 2465 } 2466} 2467 2468static void e1000_update_mng_vlan(struct e1000_adapter *adapter) 2469{ 2470 struct net_device *netdev = adapter->netdev; 2471 u16 vid = adapter->hw.mng_cookie.vlan_id; 2472 u16 old_vid = adapter->mng_vlan_id; 2473 2474 if (!adapter->vlgrp) 2475 return; 2476 2477 if (!vlan_group_get_device(adapter->vlgrp, vid)) { 2478 adapter->mng_vlan_id = E1000_MNG_VLAN_NONE; 2479 if (adapter->hw.mng_cookie.status & 2480 E1000_MNG_DHCP_COOKIE_STATUS_VLAN) { 2481 e1000_vlan_rx_add_vid(netdev, vid); 2482 adapter->mng_vlan_id = vid; 2483 } 2484 2485 if ((old_vid != (u16)E1000_MNG_VLAN_NONE) && 2486 (vid != old_vid) && 2487 !vlan_group_get_device(adapter->vlgrp, old_vid)) 2488 e1000_vlan_rx_kill_vid(netdev, old_vid); 2489 } else { 2490 adapter->mng_vlan_id = vid; 2491 } 2492} 2493 2494 2495static void e1000_vlan_rx_register(struct net_device *netdev, 2496 struct vlan_group *grp) 2497{ 2498 struct e1000_adapter *adapter = netdev_priv(netdev); 2499 struct e1000_hw *hw = &adapter->hw; 2500 u32 ctrl, rctl; 2501 2502 if (!test_bit(__E1000_DOWN, &adapter->state)) 2503 e1000_irq_disable(adapter); 2504 adapter->vlgrp = grp; 2505 2506 if (grp) { 2507 /* enable VLAN tag insert/strip */ 2508 ctrl = er32(CTRL); 2509 ctrl |= E1000_CTRL_VME; 2510 ew32(CTRL, ctrl); 2511 2512 if (adapter->flags & FLAG_HAS_HW_VLAN_FILTER) { 2513 /* enable VLAN receive filtering */ 2514 rctl = er32(RCTL); 2515 rctl &= ~E1000_RCTL_CFIEN; 2516 ew32(RCTL, rctl); 2517 e1000_update_mng_vlan(adapter); 2518 } 2519 } else { 2520 /* disable VLAN tag insert/strip */ 2521 ctrl = er32(CTRL); 2522 ctrl &= ~E1000_CTRL_VME; 2523 ew32(CTRL, ctrl); 2524 2525 if (adapter->flags & FLAG_HAS_HW_VLAN_FILTER) { 2526 if (adapter->mng_vlan_id != 2527 (u16)E1000_MNG_VLAN_NONE) { 2528 e1000_vlan_rx_kill_vid(netdev, 2529 adapter->mng_vlan_id); 2530 adapter->mng_vlan_id = E1000_MNG_VLAN_NONE; 2531 } 2532 } 2533 } 2534 2535 if (!test_bit(__E1000_DOWN, &adapter->state)) 2536 e1000_irq_enable(adapter); 2537} 2538 2539static void e1000_restore_vlan(struct e1000_adapter *adapter) 2540{ 2541 u16 vid; 2542 2543 e1000_vlan_rx_register(adapter->netdev, adapter->vlgrp); 2544 2545 if (!adapter->vlgrp) 2546 return; 2547 2548 for (vid = 0; vid < VLAN_N_VID; vid++) { 2549 if (!vlan_group_get_device(adapter->vlgrp, vid)) 2550 continue; 2551 e1000_vlan_rx_add_vid(adapter->netdev, vid); 2552 } 2553} 2554 2555static void e1000_init_manageability_pt(struct e1000_adapter *adapter) 2556{ 2557 struct e1000_hw *hw = &adapter->hw; 2558 u32 manc, manc2h, mdef, i, j; 2559 2560 if (!(adapter->flags & FLAG_MNG_PT_ENABLED)) 2561 return; 2562 2563 manc = er32(MANC); 2564 2565 /* 2566 * enable receiving management packets to the host. this will probably 2567 * generate destination unreachable messages from the host OS, but 2568 * the packets will be handled on SMBUS 2569 */ 2570 manc |= E1000_MANC_EN_MNG2HOST; 2571 manc2h = er32(MANC2H); 2572 2573 switch (hw->mac.type) { 2574 default: 2575 manc2h |= (E1000_MANC2H_PORT_623 | E1000_MANC2H_PORT_664); 2576 break; 2577 case e1000_82574: 2578 case e1000_82583: 2579 /* 2580 * Check if IPMI pass-through decision filter already exists; 2581 * if so, enable it. 2582 */ 2583 for (i = 0, j = 0; i < 8; i++) { 2584 mdef = er32(MDEF(i)); 2585 2586 /* Ignore filters with anything other than IPMI ports */ 2587 if (mdef & ~(E1000_MDEF_PORT_623 | E1000_MDEF_PORT_664)) 2588 continue; 2589 2590 /* Enable this decision filter in MANC2H */ 2591 if (mdef) 2592 manc2h |= (1 << i); 2593 2594 j |= mdef; 2595 } 2596 2597 if (j == (E1000_MDEF_PORT_623 | E1000_MDEF_PORT_664)) 2598 break; 2599 2600 /* Create new decision filter in an empty filter */ 2601 for (i = 0, j = 0; i < 8; i++) 2602 if (er32(MDEF(i)) == 0) { 2603 ew32(MDEF(i), (E1000_MDEF_PORT_623 | 2604 E1000_MDEF_PORT_664)); 2605 manc2h |= (1 << 1); 2606 j++; 2607 break; 2608 } 2609 2610 if (!j) 2611 e_warn("Unable to create IPMI pass-through filter\n"); 2612 break; 2613 } 2614 2615 ew32(MANC2H, manc2h); 2616 ew32(MANC, manc); 2617} 2618 2619/** 2620 * e1000_configure_tx - Configure 8254x Transmit Unit after Reset 2621 * @adapter: board private structure 2622 * 2623 * Configure the Tx unit of the MAC after a reset. 2624 **/ 2625static void e1000_configure_tx(struct e1000_adapter *adapter) 2626{ 2627 struct e1000_hw *hw = &adapter->hw; 2628 struct e1000_ring *tx_ring = adapter->tx_ring; 2629 u64 tdba; 2630 u32 tdlen, tctl, tipg, tarc; 2631 u32 ipgr1, ipgr2; 2632 2633 /* Setup the HW Tx Head and Tail descriptor pointers */ 2634 tdba = tx_ring->dma; 2635 tdlen = tx_ring->count * sizeof(struct e1000_tx_desc); 2636 ew32(TDBAL, (tdba & DMA_BIT_MASK(32))); 2637 ew32(TDBAH, (tdba >> 32)); 2638 ew32(TDLEN, tdlen); 2639 ew32(TDH, 0); 2640 ew32(TDT, 0); 2641 tx_ring->head = E1000_TDH; 2642 tx_ring->tail = E1000_TDT; 2643 2644 /* Set the default values for the Tx Inter Packet Gap timer */ 2645 tipg = DEFAULT_82543_TIPG_IPGT_COPPER; /* 8 */ 2646 ipgr1 = DEFAULT_82543_TIPG_IPGR1; /* 8 */ 2647 ipgr2 = DEFAULT_82543_TIPG_IPGR2; /* 6 */ 2648 2649 if (adapter->flags & FLAG_TIPG_MEDIUM_FOR_80003ESLAN) 2650 ipgr2 = DEFAULT_80003ES2LAN_TIPG_IPGR2; /* 7 */ 2651 2652 tipg |= ipgr1 << E1000_TIPG_IPGR1_SHIFT; 2653 tipg |= ipgr2 << E1000_TIPG_IPGR2_SHIFT; 2654 ew32(TIPG, tipg); 2655 2656 /* Set the Tx Interrupt Delay register */ 2657 ew32(TIDV, adapter->tx_int_delay); 2658 /* Tx irq moderation */ 2659 ew32(TADV, adapter->tx_abs_int_delay); 2660 2661 if (adapter->flags2 & FLAG2_DMA_BURST) { 2662 u32 txdctl = er32(TXDCTL(0)); 2663 txdctl &= ~(E1000_TXDCTL_PTHRESH | E1000_TXDCTL_HTHRESH | 2664 E1000_TXDCTL_WTHRESH); 2665 /* 2666 * set up some performance related parameters to encourage the 2667 * hardware to use the bus more efficiently in bursts, depends 2668 * on the tx_int_delay to be enabled, 2669 * wthresh = 5 ==> burst write a cacheline (64 bytes) at a time 2670 * hthresh = 1 ==> prefetch when one or more available 2671 * pthresh = 0x1f ==> prefetch if internal cache 31 or less 2672 * BEWARE: this seems to work but should be considered first if 2673 * there are tx hangs or other tx related bugs 2674 */ 2675 txdctl |= E1000_TXDCTL_DMA_BURST_ENABLE; 2676 ew32(TXDCTL(0), txdctl); 2677 /* erratum work around: set txdctl the same for both queues */ 2678 ew32(TXDCTL(1), txdctl); 2679 } 2680 2681 /* Program the Transmit Control Register */ 2682 tctl = er32(TCTL); 2683 tctl &= ~E1000_TCTL_CT; 2684 tctl |= E1000_TCTL_PSP | E1000_TCTL_RTLC | 2685 (E1000_COLLISION_THRESHOLD << E1000_CT_SHIFT); 2686 2687 if (adapter->flags & FLAG_TARC_SPEED_MODE_BIT) { 2688 tarc = er32(TARC(0)); 2689 /* 2690 * set the speed mode bit, we'll clear it if we're not at 2691 * gigabit link later 2692 */ 2693#define SPEED_MODE_BIT (1 << 21) 2694 tarc |= SPEED_MODE_BIT; 2695 ew32(TARC(0), tarc); 2696 } 2697 2698 /* errata: program both queues to unweighted RR */ 2699 if (adapter->flags & FLAG_TARC_SET_BIT_ZERO) { 2700 tarc = er32(TARC(0)); 2701 tarc |= 1; 2702 ew32(TARC(0), tarc); 2703 tarc = er32(TARC(1)); 2704 tarc |= 1; 2705 ew32(TARC(1), tarc); 2706 } 2707 2708 /* Setup Transmit Descriptor Settings for eop descriptor */ 2709 adapter->txd_cmd = E1000_TXD_CMD_EOP | E1000_TXD_CMD_IFCS; 2710 2711 /* only set IDE if we are delaying interrupts using the timers */ 2712 if (adapter->tx_int_delay) 2713 adapter->txd_cmd |= E1000_TXD_CMD_IDE; 2714 2715 /* enable Report Status bit */ 2716 adapter->txd_cmd |= E1000_TXD_CMD_RS; 2717 2718 ew32(TCTL, tctl); 2719 2720 e1000e_config_collision_dist(hw); 2721} 2722 2723/** 2724 * e1000_setup_rctl - configure the receive control registers 2725 * @adapter: Board private structure 2726 **/ 2727#define PAGE_USE_COUNT(S) (((S) >> PAGE_SHIFT) + \ 2728 (((S) & (PAGE_SIZE - 1)) ? 1 : 0)) 2729static void e1000_setup_rctl(struct e1000_adapter *adapter) 2730{ 2731 struct e1000_hw *hw = &adapter->hw; 2732 u32 rctl, rfctl; 2733 u32 psrctl = 0; 2734 u32 pages = 0; 2735 2736 /* Workaround Si errata on 82579 - configure jumbo frame flow */ 2737 if (hw->mac.type == e1000_pch2lan) { 2738 s32 ret_val; 2739 2740 if (adapter->netdev->mtu > ETH_DATA_LEN) 2741 ret_val = e1000_lv_jumbo_workaround_ich8lan(hw, true); 2742 else 2743 ret_val = e1000_lv_jumbo_workaround_ich8lan(hw, false); 2744 } 2745 2746 /* Program MC offset vector base */ 2747 rctl = er32(RCTL); 2748 rctl &= ~(3 << E1000_RCTL_MO_SHIFT); 2749 rctl |= E1000_RCTL_EN | E1000_RCTL_BAM | 2750 E1000_RCTL_LBM_NO | E1000_RCTL_RDMTS_HALF | 2751 (adapter->hw.mac.mc_filter_type << E1000_RCTL_MO_SHIFT); 2752 2753 /* Do not Store bad packets */ 2754 rctl &= ~E1000_RCTL_SBP; 2755 2756 /* Enable Long Packet receive */ 2757 if (adapter->netdev->mtu <= ETH_DATA_LEN) 2758 rctl &= ~E1000_RCTL_LPE; 2759 else 2760 rctl |= E1000_RCTL_LPE; 2761 2762 /* Some systems expect that the CRC is included in SMBUS traffic. The 2763 * hardware strips the CRC before sending to both SMBUS (BMC) and to 2764 * host memory when this is enabled 2765 */ 2766 if (adapter->flags2 & FLAG2_CRC_STRIPPING) 2767 rctl |= E1000_RCTL_SECRC; 2768 2769 /* Workaround Si errata on 82577 PHY - configure IPG for jumbos */ 2770 if ((hw->phy.type == e1000_phy_82577) && (rctl & E1000_RCTL_LPE)) { 2771 u16 phy_data; 2772 2773 e1e_rphy(hw, PHY_REG(770, 26), &phy_data); 2774 phy_data &= 0xfff8; 2775 phy_data |= (1 << 2); 2776 e1e_wphy(hw, PHY_REG(770, 26), phy_data); 2777 2778 e1e_rphy(hw, 22, &phy_data); 2779 phy_data &= 0x0fff; 2780 phy_data |= (1 << 14); 2781 e1e_wphy(hw, 0x10, 0x2823); 2782 e1e_wphy(hw, 0x11, 0x0003); 2783 e1e_wphy(hw, 22, phy_data); 2784 } 2785 2786 /* Setup buffer sizes */ 2787 rctl &= ~E1000_RCTL_SZ_4096; 2788 rctl |= E1000_RCTL_BSEX; 2789 switch (adapter->rx_buffer_len) { 2790 case 2048: 2791 default: 2792 rctl |= E1000_RCTL_SZ_2048; 2793 rctl &= ~E1000_RCTL_BSEX; 2794 break; 2795 case 4096: 2796 rctl |= E1000_RCTL_SZ_4096; 2797 break; 2798 case 8192: 2799 rctl |= E1000_RCTL_SZ_8192; 2800 break; 2801 case 16384: 2802 rctl |= E1000_RCTL_SZ_16384; 2803 break; 2804 } 2805 2806 /* 2807 * 82571 and greater support packet-split where the protocol 2808 * header is placed in skb->data and the packet data is 2809 * placed in pages hanging off of skb_shinfo(skb)->nr_frags. 2810 * In the case of a non-split, skb->data is linearly filled, 2811 * followed by the page buffers. Therefore, skb->data is 2812 * sized to hold the largest protocol header. 2813 * 2814 * allocations using alloc_page take too long for regular MTU 2815 * so only enable packet split for jumbo frames 2816 * 2817 * Using pages when the page size is greater than 16k wastes 2818 * a lot of memory, since we allocate 3 pages at all times 2819 * per packet. 2820 */ 2821 pages = PAGE_USE_COUNT(adapter->netdev->mtu); 2822 if (!(adapter->flags & FLAG_HAS_ERT) && (pages <= 3) && 2823 (PAGE_SIZE <= 16384) && (rctl & E1000_RCTL_LPE)) 2824 adapter->rx_ps_pages = pages; 2825 else 2826 adapter->rx_ps_pages = 0; 2827 2828 if (adapter->rx_ps_pages) { 2829 /* Configure extra packet-split registers */ 2830 rfctl = er32(RFCTL); 2831 rfctl |= E1000_RFCTL_EXTEN; 2832 /* 2833 * disable packet split support for IPv6 extension headers, 2834 * because some malformed IPv6 headers can hang the Rx 2835 */ 2836 rfctl |= (E1000_RFCTL_IPV6_EX_DIS | 2837 E1000_RFCTL_NEW_IPV6_EXT_DIS); 2838 2839 ew32(RFCTL, rfctl); 2840 2841 /* Enable Packet split descriptors */ 2842 rctl |= E1000_RCTL_DTYP_PS; 2843 2844 psrctl |= adapter->rx_ps_bsize0 >> 2845 E1000_PSRCTL_BSIZE0_SHIFT; 2846 2847 switch (adapter->rx_ps_pages) { 2848 case 3: 2849 psrctl |= PAGE_SIZE << 2850 E1000_PSRCTL_BSIZE3_SHIFT; 2851 case 2: 2852 psrctl |= PAGE_SIZE << 2853 E1000_PSRCTL_BSIZE2_SHIFT; 2854 case 1: 2855 psrctl |= PAGE_SIZE >> 2856 E1000_PSRCTL_BSIZE1_SHIFT; 2857 break; 2858 } 2859 2860 ew32(PSRCTL, psrctl); 2861 } 2862 2863 ew32(RCTL, rctl); 2864 /* just started the receive unit, no need to restart */ 2865 adapter->flags &= ~FLAG_RX_RESTART_NOW; 2866} 2867 2868/** 2869 * e1000_configure_rx - Configure Receive Unit after Reset 2870 * @adapter: board private structure 2871 * 2872 * Configure the Rx unit of the MAC after a reset. 2873 **/ 2874static void e1000_configure_rx(struct e1000_adapter *adapter) 2875{ 2876 struct e1000_hw *hw = &adapter->hw; 2877 struct e1000_ring *rx_ring = adapter->rx_ring; 2878 u64 rdba; 2879 u32 rdlen, rctl, rxcsum, ctrl_ext; 2880 2881 if (adapter->rx_ps_pages) { 2882 /* this is a 32 byte descriptor */ 2883 rdlen = rx_ring->count * 2884 sizeof(union e1000_rx_desc_packet_split); 2885 adapter->clean_rx = e1000_clean_rx_irq_ps; 2886 adapter->alloc_rx_buf = e1000_alloc_rx_buffers_ps; 2887 } else if (adapter->netdev->mtu > ETH_FRAME_LEN + ETH_FCS_LEN) { 2888 rdlen = rx_ring->count * sizeof(struct e1000_rx_desc); 2889 adapter->clean_rx = e1000_clean_jumbo_rx_irq; 2890 adapter->alloc_rx_buf = e1000_alloc_jumbo_rx_buffers; 2891 } else { 2892 rdlen = rx_ring->count * sizeof(struct e1000_rx_desc); 2893 adapter->clean_rx = e1000_clean_rx_irq; 2894 adapter->alloc_rx_buf = e1000_alloc_rx_buffers; 2895 } 2896 2897 /* disable receives while setting up the descriptors */ 2898 rctl = er32(RCTL); 2899 ew32(RCTL, rctl & ~E1000_RCTL_EN); 2900 e1e_flush(); 2901 msleep(10); 2902 2903 if (adapter->flags2 & FLAG2_DMA_BURST) { 2904 /* 2905 * set the writeback threshold (only takes effect if the RDTR 2906 * is set). set GRAN=1 and write back up to 0x4 worth, and 2907 * enable prefetching of 0x20 rx descriptors 2908 * granularity = 01 2909 * wthresh = 04, 2910 * hthresh = 04, 2911 * pthresh = 0x20 2912 */ 2913 ew32(RXDCTL(0), E1000_RXDCTL_DMA_BURST_ENABLE); 2914 ew32(RXDCTL(1), E1000_RXDCTL_DMA_BURST_ENABLE); 2915 2916 /* 2917 * override the delay timers for enabling bursting, only if 2918 * the value was not set by the user via module options 2919 */ 2920 if (adapter->rx_int_delay == DEFAULT_RDTR) 2921 adapter->rx_int_delay = BURST_RDTR; 2922 if (adapter->rx_abs_int_delay == DEFAULT_RADV) 2923 adapter->rx_abs_int_delay = BURST_RADV; 2924 } 2925 2926 /* set the Receive Delay Timer Register */ 2927 ew32(RDTR, adapter->rx_int_delay); 2928 2929 /* irq moderation */ 2930 ew32(RADV, adapter->rx_abs_int_delay); 2931 if ((adapter->itr_setting != 0) && (adapter->itr != 0)) 2932 ew32(ITR, 1000000000 / (adapter->itr * 256)); 2933 2934 ctrl_ext = er32(CTRL_EXT); 2935 /* Auto-Mask interrupts upon ICR access */ 2936 ctrl_ext |= E1000_CTRL_EXT_IAME; 2937 ew32(IAM, 0xffffffff); 2938 ew32(CTRL_EXT, ctrl_ext); 2939 e1e_flush(); 2940 2941 /* 2942 * Setup the HW Rx Head and Tail Descriptor Pointers and 2943 * the Base and Length of the Rx Descriptor Ring 2944 */ 2945 rdba = rx_ring->dma; 2946 ew32(RDBAL, (rdba & DMA_BIT_MASK(32))); 2947 ew32(RDBAH, (rdba >> 32)); 2948 ew32(RDLEN, rdlen); 2949 ew32(RDH, 0); 2950 ew32(RDT, 0); 2951 rx_ring->head = E1000_RDH; 2952 rx_ring->tail = E1000_RDT; 2953 2954 /* Enable Receive Checksum Offload for TCP and UDP */ 2955 rxcsum = er32(RXCSUM); 2956 if (adapter->flags & FLAG_RX_CSUM_ENABLED) { 2957 rxcsum |= E1000_RXCSUM_TUOFL; 2958 2959 /* 2960 * IPv4 payload checksum for UDP fragments must be 2961 * used in conjunction with packet-split. 2962 */ 2963 if (adapter->rx_ps_pages) 2964 rxcsum |= E1000_RXCSUM_IPPCSE; 2965 } else { 2966 rxcsum &= ~E1000_RXCSUM_TUOFL; 2967 /* no need to clear IPPCSE as it defaults to 0 */ 2968 } 2969 ew32(RXCSUM, rxcsum); 2970 2971 /* 2972 * Enable early receives on supported devices, only takes effect when 2973 * packet size is equal or larger than the specified value (in 8 byte 2974 * units), e.g. using jumbo frames when setting to E1000_ERT_2048 2975 */ 2976 if ((adapter->flags & FLAG_HAS_ERT) || 2977 (adapter->hw.mac.type == e1000_pch2lan)) { 2978 if (adapter->netdev->mtu > ETH_DATA_LEN) { 2979 u32 rxdctl = er32(RXDCTL(0)); 2980 ew32(RXDCTL(0), rxdctl | 0x3); 2981 if (adapter->flags & FLAG_HAS_ERT) 2982 ew32(ERT, E1000_ERT_2048 | (1 << 13)); 2983 /* 2984 * With jumbo frames and early-receive enabled, 2985 * excessive C-state transition latencies result in 2986 * dropped transactions. 2987 */ 2988 pm_qos_update_request( 2989 &adapter->netdev->pm_qos_req, 55); 2990 } else { 2991 pm_qos_update_request( 2992 &adapter->netdev->pm_qos_req, 2993 PM_QOS_DEFAULT_VALUE); 2994 } 2995 } 2996 2997 /* Enable Receives */ 2998 ew32(RCTL, rctl); 2999} 3000 3001/** 3002 * e1000_update_mc_addr_list - Update Multicast addresses 3003 * @hw: pointer to the HW structure 3004 * @mc_addr_list: array of multicast addresses to program 3005 * @mc_addr_count: number of multicast addresses to program 3006 * 3007 * Updates the Multicast Table Array. 3008 * The caller must have a packed mc_addr_list of multicast addresses. 3009 **/ 3010static void e1000_update_mc_addr_list(struct e1000_hw *hw, u8 *mc_addr_list, 3011 u32 mc_addr_count) 3012{ 3013 hw->mac.ops.update_mc_addr_list(hw, mc_addr_list, mc_addr_count); 3014} 3015 3016/** 3017 * e1000_set_multi - Multicast and Promiscuous mode set 3018 * @netdev: network interface device structure 3019 * 3020 * The set_multi entry point is called whenever the multicast address 3021 * list or the network interface flags are updated. This routine is 3022 * responsible for configuring the hardware for proper multicast, 3023 * promiscuous mode, and all-multi behavior. 3024 **/ 3025static void e1000_set_multi(struct net_device *netdev) 3026{ 3027 struct e1000_adapter *adapter = netdev_priv(netdev); 3028 struct e1000_hw *hw = &adapter->hw; 3029 struct netdev_hw_addr *ha; 3030 u8 *mta_list; 3031 u32 rctl; 3032 int i; 3033 3034 /* Check for Promiscuous and All Multicast modes */ 3035 3036 rctl = er32(RCTL); 3037 3038 if (netdev->flags & IFF_PROMISC) { 3039 rctl |= (E1000_RCTL_UPE | E1000_RCTL_MPE); 3040 rctl &= ~E1000_RCTL_VFE; 3041 } else { 3042 if (netdev->flags & IFF_ALLMULTI) { 3043 rctl |= E1000_RCTL_MPE; 3044 rctl &= ~E1000_RCTL_UPE; 3045 } else { 3046 rctl &= ~(E1000_RCTL_UPE | E1000_RCTL_MPE); 3047 } 3048 if (adapter->flags & FLAG_HAS_HW_VLAN_FILTER) 3049 rctl |= E1000_RCTL_VFE; 3050 } 3051 3052 ew32(RCTL, rctl); 3053 3054 if (!netdev_mc_empty(netdev)) { 3055 mta_list = kmalloc(netdev_mc_count(netdev) * 6, GFP_ATOMIC); 3056 if (!mta_list) 3057 return; 3058 3059 /* prepare a packed array of only addresses. */ 3060 i = 0; 3061 netdev_for_each_mc_addr(ha, netdev) 3062 memcpy(mta_list + (i++ * ETH_ALEN), ha->addr, ETH_ALEN); 3063 3064 e1000_update_mc_addr_list(hw, mta_list, i); 3065 kfree(mta_list); 3066 } else { 3067 /* 3068 * if we're called from probe, we might not have 3069 * anything to do here, so clear out the list 3070 */ 3071 e1000_update_mc_addr_list(hw, NULL, 0); 3072 } 3073} 3074 3075/** 3076 * e1000_configure - configure the hardware for Rx and Tx 3077 * @adapter: private board structure 3078 **/ 3079static void e1000_configure(struct e1000_adapter *adapter) 3080{ 3081 e1000_set_multi(adapter->netdev); 3082 3083 e1000_restore_vlan(adapter); 3084 e1000_init_manageability_pt(adapter); 3085 3086 e1000_configure_tx(adapter); 3087 e1000_setup_rctl(adapter); 3088 e1000_configure_rx(adapter); 3089 adapter->alloc_rx_buf(adapter, e1000_desc_unused(adapter->rx_ring)); 3090} 3091 3092/** 3093 * e1000e_power_up_phy - restore link in case the phy was powered down 3094 * @adapter: address of board private structure 3095 * 3096 * The phy may be powered down to save power and turn off link when the 3097 * driver is unloaded and wake on lan is not enabled (among others) 3098 * *** this routine MUST be followed by a call to e1000e_reset *** 3099 **/ 3100void e1000e_power_up_phy(struct e1000_adapter *adapter) 3101{ 3102 if (adapter->hw.phy.ops.power_up) 3103 adapter->hw.phy.ops.power_up(&adapter->hw); 3104 3105 adapter->hw.mac.ops.setup_link(&adapter->hw); 3106} 3107 3108/** 3109 * e1000_power_down_phy - Power down the PHY 3110 * 3111 * Power down the PHY so no link is implied when interface is down. 3112 * The PHY cannot be powered down if management or WoL is active. 3113 */ 3114static void e1000_power_down_phy(struct e1000_adapter *adapter) 3115{ 3116 /* WoL is enabled */ 3117 if (adapter->wol) 3118 return; 3119 3120 if (adapter->hw.phy.ops.power_down) 3121 adapter->hw.phy.ops.power_down(&adapter->hw); 3122} 3123 3124/** 3125 * e1000e_reset - bring the hardware into a known good state 3126 * 3127 * This function boots the hardware and enables some settings that 3128 * require a configuration cycle of the hardware - those cannot be 3129 * set/changed during runtime. After reset the device needs to be 3130 * properly configured for Rx, Tx etc. 3131 */ 3132void e1000e_reset(struct e1000_adapter *adapter) 3133{ 3134 struct e1000_mac_info *mac = &adapter->hw.mac; 3135 struct e1000_fc_info *fc = &adapter->hw.fc; 3136 struct e1000_hw *hw = &adapter->hw; 3137 u32 tx_space, min_tx_space, min_rx_space; 3138 u32 pba = adapter->pba; 3139 u16 hwm; 3140 3141 /* reset Packet Buffer Allocation to default */ 3142 ew32(PBA, pba); 3143 3144 if (adapter->max_frame_size > ETH_FRAME_LEN + ETH_FCS_LEN) { 3145 /* 3146 * To maintain wire speed transmits, the Tx FIFO should be 3147 * large enough to accommodate two full transmit packets, 3148 * rounded up to the next 1KB and expressed in KB. Likewise, 3149 * the Rx FIFO should be large enough to accommodate at least 3150 * one full receive packet and is similarly rounded up and 3151 * expressed in KB. 3152 */ 3153 pba = er32(PBA); 3154 /* upper 16 bits has Tx packet buffer allocation size in KB */ 3155 tx_space = pba >> 16; 3156 /* lower 16 bits has Rx packet buffer allocation size in KB */ 3157 pba &= 0xffff; 3158 /* 3159 * the Tx fifo also stores 16 bytes of information about the tx 3160 * but don't include ethernet FCS because hardware appends it 3161 */ 3162 min_tx_space = (adapter->max_frame_size + 3163 sizeof(struct e1000_tx_desc) - 3164 ETH_FCS_LEN) * 2; 3165 min_tx_space = ALIGN(min_tx_space, 1024); 3166 min_tx_space >>= 10; 3167 /* software strips receive CRC, so leave room for it */ 3168 min_rx_space = adapter->max_frame_size; 3169 min_rx_space = ALIGN(min_rx_space, 1024); 3170 min_rx_space >>= 10; 3171 3172 /* 3173 * If current Tx allocation is less than the min Tx FIFO size, 3174 * and the min Tx FIFO size is less than the current Rx FIFO 3175 * allocation, take space away from current Rx allocation 3176 */ 3177 if ((tx_space < min_tx_space) && 3178 ((min_tx_space - tx_space) < pba)) { 3179 pba -= min_tx_space - tx_space; 3180 3181 /* 3182 * if short on Rx space, Rx wins and must trump tx 3183 * adjustment or use Early Receive if available 3184 */ 3185 if ((pba < min_rx_space) && 3186 (!(adapter->flags & FLAG_HAS_ERT))) 3187 /* ERT enabled in e1000_configure_rx */ 3188 pba = min_rx_space; 3189 } 3190 3191 ew32(PBA, pba); 3192 } 3193 3194 3195 /* 3196 * flow control settings 3197 * 3198 * The high water mark must be low enough to fit one full frame 3199 * (or the size used for early receive) above it in the Rx FIFO. 3200 * Set it to the lower of: 3201 * - 90% of the Rx FIFO size, and 3202 * - the full Rx FIFO size minus the early receive size (for parts 3203 * with ERT support assuming ERT set to E1000_ERT_2048), or 3204 * - the full Rx FIFO size minus one full frame 3205 */ 3206 if (adapter->flags & FLAG_DISABLE_FC_PAUSE_TIME) 3207 fc->pause_time = 0xFFFF; 3208 else 3209 fc->pause_time = E1000_FC_PAUSE_TIME; 3210 fc->send_xon = 1; 3211 fc->current_mode = fc->requested_mode; 3212 3213 switch (hw->mac.type) { 3214 default: 3215 if ((adapter->flags & FLAG_HAS_ERT) && 3216 (adapter->netdev->mtu > ETH_DATA_LEN)) 3217 hwm = min(((pba << 10) * 9 / 10), 3218 ((pba << 10) - (E1000_ERT_2048 << 3))); 3219 else 3220 hwm = min(((pba << 10) * 9 / 10), 3221 ((pba << 10) - adapter->max_frame_size)); 3222 3223 fc->high_water = hwm & E1000_FCRTH_RTH; /* 8-byte granularity */ 3224 fc->low_water = fc->high_water - 8; 3225 break; 3226 case e1000_pchlan: 3227 /* 3228 * Workaround PCH LOM adapter hangs with certain network 3229 * loads. If hangs persist, try disabling Tx flow control. 3230 */ 3231 if (adapter->netdev->mtu > ETH_DATA_LEN) { 3232 fc->high_water = 0x3500; 3233 fc->low_water = 0x1500; 3234 } else { 3235 fc->high_water = 0x5000; 3236 fc->low_water = 0x3000; 3237 } 3238 fc->refresh_time = 0x1000; 3239 break; 3240 case e1000_pch2lan: 3241 fc->high_water = 0x05C20; 3242 fc->low_water = 0x05048; 3243 fc->pause_time = 0x0650; 3244 fc->refresh_time = 0x0400; 3245 if (adapter->netdev->mtu > ETH_DATA_LEN) { 3246 pba = 14; 3247 ew32(PBA, pba); 3248 } 3249 break; 3250 } 3251 3252 /* 3253 * Disable Adaptive Interrupt Moderation if 2 full packets cannot 3254 * fit in receive buffer and early-receive not supported. 3255 */ 3256 if (adapter->itr_setting & 0x3) { 3257 if (((adapter->max_frame_size * 2) > (pba << 10)) && 3258 !(adapter->flags & FLAG_HAS_ERT)) { 3259 if (!(adapter->flags2 & FLAG2_DISABLE_AIM)) { 3260 dev_info(&adapter->pdev->dev, 3261 "Interrupt Throttle Rate turned off\n"); 3262 adapter->flags2 |= FLAG2_DISABLE_AIM; 3263 ew32(ITR, 0); 3264 } 3265 } else if (adapter->flags2 & FLAG2_DISABLE_AIM) { 3266 dev_info(&adapter->pdev->dev, 3267 "Interrupt Throttle Rate turned on\n"); 3268 adapter->flags2 &= ~FLAG2_DISABLE_AIM; 3269 adapter->itr = 20000; 3270 ew32(ITR, 1000000000 / (adapter->itr * 256)); 3271 } 3272 } 3273 3274 /* Allow time for pending master requests to run */ 3275 mac->ops.reset_hw(hw); 3276 3277 /* 3278 * For parts with AMT enabled, let the firmware know 3279 * that the network interface is in control 3280 */ 3281 if (adapter->flags & FLAG_HAS_AMT) 3282 e1000_get_hw_control(adapter); 3283 3284 ew32(WUC, 0); 3285 3286 if (mac->ops.init_hw(hw)) 3287 e_err("Hardware Error\n"); 3288 3289 e1000_update_mng_vlan(adapter); 3290 3291 /* Enable h/w to recognize an 802.1Q VLAN Ethernet packet */ 3292 ew32(VET, ETH_P_8021Q); 3293 3294 e1000e_reset_adaptive(hw); 3295 e1000_get_phy_info(hw); 3296 3297 if ((adapter->flags & FLAG_HAS_SMART_POWER_DOWN) && 3298 !(adapter->flags & FLAG_SMART_POWER_DOWN)) { 3299 u16 phy_data = 0; 3300 /* 3301 * speed up time to link by disabling smart power down, ignore 3302 * the return value of this function because there is nothing 3303 * different we would do if it failed 3304 */ 3305 e1e_rphy(hw, IGP02E1000_PHY_POWER_MGMT, &phy_data); 3306 phy_data &= ~IGP02E1000_PM_SPD; 3307 e1e_wphy(hw, IGP02E1000_PHY_POWER_MGMT, phy_data); 3308 } 3309} 3310 3311int e1000e_up(struct e1000_adapter *adapter) 3312{ 3313 struct e1000_hw *hw = &adapter->hw; 3314 3315 /* hardware has been reset, we need to reload some things */ 3316 e1000_configure(adapter); 3317 3318 clear_bit(__E1000_DOWN, &adapter->state); 3319 3320 napi_enable(&adapter->napi); 3321 if (adapter->msix_entries) 3322 e1000_configure_msix(adapter); 3323 e1000_irq_enable(adapter); 3324 3325 netif_wake_queue(adapter->netdev); 3326 3327 /* fire a link change interrupt to start the watchdog */ 3328 if (adapter->msix_entries) 3329 ew32(ICS, E1000_ICS_LSC | E1000_ICR_OTHER); 3330 else 3331 ew32(ICS, E1000_ICS_LSC); 3332 3333 return 0; 3334} 3335 3336void e1000e_down(struct e1000_adapter *adapter) 3337{ 3338 struct net_device *netdev = adapter->netdev; 3339 struct e1000_hw *hw = &adapter->hw; 3340 u32 tctl, rctl; 3341 3342 /* 3343 * signal that we're down so the interrupt handler does not 3344 * reschedule our watchdog timer 3345 */ 3346 set_bit(__E1000_DOWN, &adapter->state); 3347 3348 /* disable receives in the hardware */ 3349 rctl = er32(RCTL); 3350 ew32(RCTL, rctl & ~E1000_RCTL_EN); 3351 /* flush and sleep below */ 3352 3353 netif_stop_queue(netdev); 3354 3355 /* disable transmits in the hardware */ 3356 tctl = er32(TCTL); 3357 tctl &= ~E1000_TCTL_EN; 3358 ew32(TCTL, tctl); 3359 /* flush both disables and wait for them to finish */ 3360 e1e_flush(); 3361 msleep(10); 3362 3363 napi_disable(&adapter->napi); 3364 e1000_irq_disable(adapter); 3365 3366 del_timer_sync(&adapter->watchdog_timer); 3367 del_timer_sync(&adapter->phy_info_timer); 3368 3369 netif_carrier_off(netdev); 3370 adapter->link_speed = 0; 3371 adapter->link_duplex = 0; 3372 3373 if (!pci_channel_offline(adapter->pdev)) 3374 e1000e_reset(adapter); 3375 e1000_clean_tx_ring(adapter); 3376 e1000_clean_rx_ring(adapter); 3377 3378 /* 3379 * TODO: for power management, we could drop the link and 3380 * pci_disable_device here. 3381 */ 3382} 3383 3384void e1000e_reinit_locked(struct e1000_adapter *adapter) 3385{ 3386 might_sleep(); 3387 while (test_and_set_bit(__E1000_RESETTING, &adapter->state)) 3388 msleep(1); 3389 e1000e_down(adapter); 3390 e1000e_up(adapter); 3391 clear_bit(__E1000_RESETTING, &adapter->state); 3392} 3393 3394/** 3395 * e1000_sw_init - Initialize general software structures (struct e1000_adapter) 3396 * @adapter: board private structure to initialize 3397 * 3398 * e1000_sw_init initializes the Adapter private data structure. 3399 * Fields are initialized based on PCI device information and 3400 * OS network device settings (MTU size). 3401 **/ 3402static int __devinit e1000_sw_init(struct e1000_adapter *adapter) 3403{ 3404 struct net_device *netdev = adapter->netdev; 3405 3406 adapter->rx_buffer_len = ETH_FRAME_LEN + VLAN_HLEN + ETH_FCS_LEN; 3407 adapter->rx_ps_bsize0 = 128; 3408 adapter->max_frame_size = netdev->mtu + ETH_HLEN + ETH_FCS_LEN; 3409 adapter->min_frame_size = ETH_ZLEN + ETH_FCS_LEN; 3410 3411 e1000e_set_interrupt_capability(adapter); 3412 3413 if (e1000_alloc_queues(adapter)) 3414 return -ENOMEM; 3415 3416 /* Explicitly disable IRQ since the NIC can be in any state. */ 3417 e1000_irq_disable(adapter); 3418 3419 set_bit(__E1000_DOWN, &adapter->state); 3420 return 0; 3421} 3422 3423/** 3424 * e1000_intr_msi_test - Interrupt Handler 3425 * @irq: interrupt number 3426 * @data: pointer to a network interface device structure 3427 **/ 3428static irqreturn_t e1000_intr_msi_test(int irq, void *data) 3429{ 3430 struct net_device *netdev = data; 3431 struct e1000_adapter *adapter = netdev_priv(netdev); 3432 struct e1000_hw *hw = &adapter->hw; 3433 u32 icr = er32(ICR); 3434 3435 e_dbg("icr is %08X\n", icr); 3436 if (icr & E1000_ICR_RXSEQ) { 3437 adapter->flags &= ~FLAG_MSI_TEST_FAILED; 3438 wmb(); 3439 } 3440 3441 return IRQ_HANDLED; 3442} 3443 3444/** 3445 * e1000_test_msi_interrupt - Returns 0 for successful test 3446 * @adapter: board private struct 3447 * 3448 * code flow taken from tg3.c 3449 **/ 3450static int e1000_test_msi_interrupt(struct e1000_adapter *adapter) 3451{ 3452 struct net_device *netdev = adapter->netdev; 3453 struct e1000_hw *hw = &adapter->hw; 3454 int err; 3455 3456 /* poll_enable hasn't been called yet, so don't need disable */ 3457 /* clear any pending events */ 3458 er32(ICR); 3459 3460 /* free the real vector and request a test handler */ 3461 e1000_free_irq(adapter); 3462 e1000e_reset_interrupt_capability(adapter); 3463 3464 /* Assume that the test fails, if it succeeds then the test 3465 * MSI irq handler will unset this flag */ 3466 adapter->flags |= FLAG_MSI_TEST_FAILED; 3467 3468 err = pci_enable_msi(adapter->pdev); 3469 if (err) 3470 goto msi_test_failed; 3471 3472 err = request_irq(adapter->pdev->irq, e1000_intr_msi_test, 0, 3473 netdev->name, netdev); 3474 if (err) { 3475 pci_disable_msi(adapter->pdev); 3476 goto msi_test_failed; 3477 } 3478 3479 wmb(); 3480 3481 e1000_irq_enable(adapter); 3482 3483 /* fire an unusual interrupt on the test handler */ 3484 ew32(ICS, E1000_ICS_RXSEQ); 3485 e1e_flush(); 3486 msleep(50); 3487 3488 e1000_irq_disable(adapter); 3489 3490 rmb(); 3491 3492 if (adapter->flags & FLAG_MSI_TEST_FAILED) { 3493 adapter->int_mode = E1000E_INT_MODE_LEGACY; 3494 e_info("MSI interrupt test failed, using legacy interrupt.\n"); 3495 } else 3496 e_dbg("MSI interrupt test succeeded!\n"); 3497 3498 free_irq(adapter->pdev->irq, netdev); 3499 pci_disable_msi(adapter->pdev); 3500 3501msi_test_failed: 3502 e1000e_set_interrupt_capability(adapter); 3503 return e1000_request_irq(adapter); 3504} 3505 3506/** 3507 * e1000_test_msi - Returns 0 if MSI test succeeds or INTx mode is restored 3508 * @adapter: board private struct 3509 * 3510 * code flow taken from tg3.c, called with e1000 interrupts disabled. 3511 **/ 3512static int e1000_test_msi(struct e1000_adapter *adapter) 3513{ 3514 int err; 3515 u16 pci_cmd; 3516 3517 if (!(adapter->flags & FLAG_MSI_ENABLED)) 3518 return 0; 3519 3520 /* disable SERR in case the MSI write causes a master abort */ 3521 pci_read_config_word(adapter->pdev, PCI_COMMAND, &pci_cmd); 3522 if (pci_cmd & PCI_COMMAND_SERR) 3523 pci_write_config_word(adapter->pdev, PCI_COMMAND, 3524 pci_cmd & ~PCI_COMMAND_SERR); 3525 3526 err = e1000_test_msi_interrupt(adapter); 3527 3528 /* re-enable SERR */ 3529 if (pci_cmd & PCI_COMMAND_SERR) { 3530 pci_read_config_word(adapter->pdev, PCI_COMMAND, &pci_cmd); 3531 pci_cmd |= PCI_COMMAND_SERR; 3532 pci_write_config_word(adapter->pdev, PCI_COMMAND, pci_cmd); 3533 } 3534 3535 return err; 3536} 3537 3538/** 3539 * e1000_open - Called when a network interface is made active 3540 * @netdev: network interface device structure 3541 * 3542 * Returns 0 on success, negative value on failure 3543 * 3544 * The open entry point is called when a network interface is made 3545 * active by the system (IFF_UP). At this point all resources needed 3546 * for transmit and receive operations are allocated, the interrupt 3547 * handler is registered with the OS, the watchdog timer is started, 3548 * and the stack is notified that the interface is ready. 3549 **/ 3550static int e1000_open(struct net_device *netdev) 3551{ 3552 struct e1000_adapter *adapter = netdev_priv(netdev); 3553 struct e1000_hw *hw = &adapter->hw; 3554 struct pci_dev *pdev = adapter->pdev; 3555 int err; 3556 3557 /* disallow open during test */ 3558 if (test_bit(__E1000_TESTING, &adapter->state)) 3559 return -EBUSY; 3560 3561 pm_runtime_get_sync(&pdev->dev); 3562 3563 netif_carrier_off(netdev); 3564 3565 /* allocate transmit descriptors */ 3566 err = e1000e_setup_tx_resources(adapter); 3567 if (err) 3568 goto err_setup_tx; 3569 3570 /* allocate receive descriptors */ 3571 err = e1000e_setup_rx_resources(adapter); 3572 if (err) 3573 goto err_setup_rx; 3574 3575 /* 3576 * If AMT is enabled, let the firmware know that the network 3577 * interface is now open and reset the part to a known state. 3578 */ 3579 if (adapter->flags & FLAG_HAS_AMT) { 3580 e1000_get_hw_control(adapter); 3581 e1000e_reset(adapter); 3582 } 3583 3584 e1000e_power_up_phy(adapter); 3585 3586 adapter->mng_vlan_id = E1000_MNG_VLAN_NONE; 3587 if ((adapter->hw.mng_cookie.status & 3588 E1000_MNG_DHCP_COOKIE_STATUS_VLAN)) 3589 e1000_update_mng_vlan(adapter); 3590 3591 /* DMA latency requirement to workaround early-receive/jumbo issue */ 3592 if ((adapter->flags & FLAG_HAS_ERT) || 3593 (adapter->hw.mac.type == e1000_pch2lan)) 3594 pm_qos_add_request(&adapter->netdev->pm_qos_req, 3595 PM_QOS_CPU_DMA_LATENCY, 3596 PM_QOS_DEFAULT_VALUE); 3597 3598 /* 3599 * before we allocate an interrupt, we must be ready to handle it. 3600 * Setting DEBUG_SHIRQ in the kernel makes it fire an interrupt 3601 * as soon as we call pci_request_irq, so we have to setup our 3602 * clean_rx handler before we do so. 3603 */ 3604 e1000_configure(adapter); 3605 3606 err = e1000_request_irq(adapter); 3607 if (err) 3608 goto err_req_irq; 3609 3610 /* 3611 * Work around PCIe errata with MSI interrupts causing some chipsets to 3612 * ignore e1000e MSI messages, which means we need to test our MSI 3613 * interrupt now 3614 */ 3615 if (adapter->int_mode != E1000E_INT_MODE_LEGACY) { 3616 err = e1000_test_msi(adapter); 3617 if (err) { 3618 e_err("Interrupt allocation failed\n"); 3619 goto err_req_irq; 3620 } 3621 } 3622 3623 /* From here on the code is the same as e1000e_up() */ 3624 clear_bit(__E1000_DOWN, &adapter->state); 3625 3626 napi_enable(&adapter->napi); 3627 3628 e1000_irq_enable(adapter); 3629 3630 netif_start_queue(netdev); 3631 3632 adapter->idle_check = true; 3633 pm_runtime_put(&pdev->dev); 3634 3635 /* fire a link status change interrupt to start the watchdog */ 3636 if (adapter->msix_entries) 3637 ew32(ICS, E1000_ICS_LSC | E1000_ICR_OTHER); 3638 else 3639 ew32(ICS, E1000_ICS_LSC); 3640 3641 return 0; 3642 3643err_req_irq: 3644 e1000_release_hw_control(adapter); 3645 e1000_power_down_phy(adapter); 3646 e1000e_free_rx_resources(adapter); 3647err_setup_rx: 3648 e1000e_free_tx_resources(adapter); 3649err_setup_tx: 3650 e1000e_reset(adapter); 3651 pm_runtime_put_sync(&pdev->dev); 3652 3653 return err; 3654} 3655 3656/** 3657 * e1000_close - Disables a network interface 3658 * @netdev: network interface device structure 3659 * 3660 * Returns 0, this is not allowed to fail 3661 * 3662 * The close entry point is called when an interface is de-activated 3663 * by the OS. The hardware is still under the drivers control, but 3664 * needs to be disabled. A global MAC reset is issued to stop the 3665 * hardware, and all transmit and receive resources are freed. 3666 **/ 3667static int e1000_close(struct net_device *netdev) 3668{ 3669 struct e1000_adapter *adapter = netdev_priv(netdev); 3670 struct pci_dev *pdev = adapter->pdev; 3671 3672 WARN_ON(test_bit(__E1000_RESETTING, &adapter->state)); 3673 3674 pm_runtime_get_sync(&pdev->dev); 3675 3676 if (!test_bit(__E1000_DOWN, &adapter->state)) { 3677 e1000e_down(adapter); 3678 e1000_free_irq(adapter); 3679 } 3680 e1000_power_down_phy(adapter); 3681 3682 e1000e_free_tx_resources(adapter); 3683 e1000e_free_rx_resources(adapter); 3684 3685 /* 3686 * kill manageability vlan ID if supported, but not if a vlan with 3687 * the same ID is registered on the host OS (let 8021q kill it) 3688 */ 3689 if ((adapter->hw.mng_cookie.status & 3690 E1000_MNG_DHCP_COOKIE_STATUS_VLAN) && 3691 !(adapter->vlgrp && 3692 vlan_group_get_device(adapter->vlgrp, adapter->mng_vlan_id))) 3693 e1000_vlan_rx_kill_vid(netdev, adapter->mng_vlan_id); 3694 3695 /* 3696 * If AMT is enabled, let the firmware know that the network 3697 * interface is now closed 3698 */ 3699 if (adapter->flags & FLAG_HAS_AMT) 3700 e1000_release_hw_control(adapter); 3701 3702 if ((adapter->flags & FLAG_HAS_ERT) || 3703 (adapter->hw.mac.type == e1000_pch2lan)) 3704 pm_qos_remove_request(&adapter->netdev->pm_qos_req); 3705 3706 pm_runtime_put_sync(&pdev->dev); 3707 3708 return 0; 3709} 3710/** 3711 * e1000_set_mac - Change the Ethernet Address of the NIC 3712 * @netdev: network interface device structure 3713 * @p: pointer to an address structure 3714 * 3715 * Returns 0 on success, negative on failure 3716 **/ 3717static int e1000_set_mac(struct net_device *netdev, void *p) 3718{ 3719 struct e1000_adapter *adapter = netdev_priv(netdev); 3720 struct sockaddr *addr = p; 3721 3722 if (!is_valid_ether_addr(addr->sa_data)) 3723 return -EADDRNOTAVAIL; 3724 3725 memcpy(netdev->dev_addr, addr->sa_data, netdev->addr_len); 3726 memcpy(adapter->hw.mac.addr, addr->sa_data, netdev->addr_len); 3727 3728 e1000e_rar_set(&adapter->hw, adapter->hw.mac.addr, 0); 3729 3730 if (adapter->flags & FLAG_RESET_OVERWRITES_LAA) { 3731 /* activate the work around */ 3732 e1000e_set_laa_state_82571(&adapter->hw, 1); 3733 3734 /* 3735 * Hold a copy of the LAA in RAR[14] This is done so that 3736 * between the time RAR[0] gets clobbered and the time it 3737 * gets fixed (in e1000_watchdog), the actual LAA is in one 3738 * of the RARs and no incoming packets directed to this port 3739 * are dropped. Eventually the LAA will be in RAR[0] and 3740 * RAR[14] 3741 */ 3742 e1000e_rar_set(&adapter->hw, 3743 adapter->hw.mac.addr, 3744 adapter->hw.mac.rar_entry_count - 1); 3745 } 3746 3747 return 0; 3748} 3749 3750/** 3751 * e1000e_update_phy_task - work thread to update phy 3752 * @work: pointer to our work struct 3753 * 3754 * this worker thread exists because we must acquire a 3755 * semaphore to read the phy, which we could msleep while 3756 * waiting for it, and we can't msleep in a timer. 3757 **/ 3758static void e1000e_update_phy_task(struct work_struct *work) 3759{ 3760 struct e1000_adapter *adapter = container_of(work, 3761 struct e1000_adapter, update_phy_task); 3762 e1000_get_phy_info(&adapter->hw); 3763} 3764 3765/* 3766 * Need to wait a few seconds after link up to get diagnostic information from 3767 * the phy 3768 */ 3769static void e1000_update_phy_info(unsigned long data) 3770{ 3771 struct e1000_adapter *adapter = (struct e1000_adapter *) data; 3772 schedule_work(&adapter->update_phy_task); 3773} 3774 3775/** 3776 * e1000e_update_phy_stats - Update the PHY statistics counters 3777 * @adapter: board private structure 3778 **/ 3779static void e1000e_update_phy_stats(struct e1000_adapter *adapter) 3780{ 3781 struct e1000_hw *hw = &adapter->hw; 3782 s32 ret_val; 3783 u16 phy_data; 3784 3785 ret_val = hw->phy.ops.acquire(hw); 3786 if (ret_val) 3787 return; 3788 3789 hw->phy.addr = 1; 3790 3791#define HV_PHY_STATS_PAGE 778 3792 /* 3793 * A page set is expensive so check if already on desired page. 3794 * If not, set to the page with the PHY status registers. 3795 */ 3796 ret_val = e1000e_read_phy_reg_mdic(hw, IGP01E1000_PHY_PAGE_SELECT, 3797 &phy_data); 3798 if (ret_val) 3799 goto release; 3800 if (phy_data != (HV_PHY_STATS_PAGE << IGP_PAGE_SHIFT)) { 3801 ret_val = e1000e_write_phy_reg_mdic(hw, 3802 IGP01E1000_PHY_PAGE_SELECT, 3803 (HV_PHY_STATS_PAGE << 3804 IGP_PAGE_SHIFT)); 3805 if (ret_val) 3806 goto release; 3807 } 3808 3809 /* Read/clear the upper 16-bit registers and read/accumulate lower */ 3810 3811 /* Single Collision Count */ 3812 e1000e_read_phy_reg_mdic(hw, HV_SCC_UPPER & MAX_PHY_REG_ADDRESS, 3813 &phy_data); 3814 ret_val = e1000e_read_phy_reg_mdic(hw, 3815 HV_SCC_LOWER & MAX_PHY_REG_ADDRESS, 3816 &phy_data); 3817 if (!ret_val) 3818 adapter->stats.scc += phy_data; 3819 3820 /* Excessive Collision Count */ 3821 e1000e_read_phy_reg_mdic(hw, HV_ECOL_UPPER & MAX_PHY_REG_ADDRESS, 3822 &phy_data); 3823 ret_val = e1000e_read_phy_reg_mdic(hw, 3824 HV_ECOL_LOWER & MAX_PHY_REG_ADDRESS, 3825 &phy_data); 3826 if (!ret_val) 3827 adapter->stats.ecol += phy_data; 3828 3829 /* Multiple Collision Count */ 3830 e1000e_read_phy_reg_mdic(hw, HV_MCC_UPPER & MAX_PHY_REG_ADDRESS, 3831 &phy_data); 3832 ret_val = e1000e_read_phy_reg_mdic(hw, 3833 HV_MCC_LOWER & MAX_PHY_REG_ADDRESS, 3834 &phy_data); 3835 if (!ret_val) 3836 adapter->stats.mcc += phy_data; 3837 3838 /* Late Collision Count */ 3839 e1000e_read_phy_reg_mdic(hw, HV_LATECOL_UPPER & MAX_PHY_REG_ADDRESS, 3840 &phy_data); 3841 ret_val = e1000e_read_phy_reg_mdic(hw, 3842 HV_LATECOL_LOWER & 3843 MAX_PHY_REG_ADDRESS, 3844 &phy_data); 3845 if (!ret_val) 3846 adapter->stats.latecol += phy_data; 3847 3848 /* Collision Count - also used for adaptive IFS */ 3849 e1000e_read_phy_reg_mdic(hw, HV_COLC_UPPER & MAX_PHY_REG_ADDRESS, 3850 &phy_data); 3851 ret_val = e1000e_read_phy_reg_mdic(hw, 3852 HV_COLC_LOWER & MAX_PHY_REG_ADDRESS, 3853 &phy_data); 3854 if (!ret_val) 3855 hw->mac.collision_delta = phy_data; 3856 3857 /* Defer Count */ 3858 e1000e_read_phy_reg_mdic(hw, HV_DC_UPPER & MAX_PHY_REG_ADDRESS, 3859 &phy_data); 3860 ret_val = e1000e_read_phy_reg_mdic(hw, 3861 HV_DC_LOWER & MAX_PHY_REG_ADDRESS, 3862 &phy_data); 3863 if (!ret_val) 3864 adapter->stats.dc += phy_data; 3865 3866 /* Transmit with no CRS */ 3867 e1000e_read_phy_reg_mdic(hw, HV_TNCRS_UPPER & MAX_PHY_REG_ADDRESS, 3868 &phy_data); 3869 ret_val = e1000e_read_phy_reg_mdic(hw, 3870 HV_TNCRS_LOWER & MAX_PHY_REG_ADDRESS, 3871 &phy_data); 3872 if (!ret_val) 3873 adapter->stats.tncrs += phy_data; 3874 3875release: 3876 hw->phy.ops.release(hw); 3877} 3878 3879/** 3880 * e1000e_update_stats - Update the board statistics counters 3881 * @adapter: board private structure 3882 **/ 3883void e1000e_update_stats(struct e1000_adapter *adapter) 3884{ 3885 struct net_device *netdev = adapter->netdev; 3886 struct e1000_hw *hw = &adapter->hw; 3887 struct pci_dev *pdev = adapter->pdev; 3888 3889 /* 3890 * Prevent stats update while adapter is being reset, or if the pci 3891 * connection is down. 3892 */ 3893 if (adapter->link_speed == 0) 3894 return; 3895 if (pci_channel_offline(pdev)) 3896 return; 3897 3898 adapter->stats.crcerrs += er32(CRCERRS); 3899 adapter->stats.gprc += er32(GPRC); 3900 adapter->stats.gorc += er32(GORCL); 3901 er32(GORCH); /* Clear gorc */ 3902 adapter->stats.bprc += er32(BPRC); 3903 adapter->stats.mprc += er32(MPRC); 3904 adapter->stats.roc += er32(ROC); 3905 3906 adapter->stats.mpc += er32(MPC); 3907 3908 /* Half-duplex statistics */ 3909 if (adapter->link_duplex == HALF_DUPLEX) { 3910 if (adapter->flags2 & FLAG2_HAS_PHY_STATS) { 3911 e1000e_update_phy_stats(adapter); 3912 } else { 3913 adapter->stats.scc += er32(SCC); 3914 adapter->stats.ecol += er32(ECOL); 3915 adapter->stats.mcc += er32(MCC); 3916 adapter->stats.latecol += er32(LATECOL); 3917 adapter->stats.dc += er32(DC); 3918 3919 hw->mac.collision_delta = er32(COLC); 3920 3921 if ((hw->mac.type != e1000_82574) && 3922 (hw->mac.type != e1000_82583)) 3923 adapter->stats.tncrs += er32(TNCRS); 3924 } 3925 adapter->stats.colc += hw->mac.collision_delta; 3926 } 3927 3928 adapter->stats.xonrxc += er32(XONRXC); 3929 adapter->stats.xontxc += er32(XONTXC); 3930 adapter->stats.xoffrxc += er32(XOFFRXC); 3931 adapter->stats.xofftxc += er32(XOFFTXC); 3932 adapter->stats.gptc += er32(GPTC); 3933 adapter->stats.gotc += er32(GOTCL); 3934 er32(GOTCH); /* Clear gotc */ 3935 adapter->stats.rnbc += er32(RNBC); 3936 adapter->stats.ruc += er32(RUC); 3937 3938 adapter->stats.mptc += er32(MPTC); 3939 adapter->stats.bptc += er32(BPTC); 3940 3941 /* used for adaptive IFS */ 3942 3943 hw->mac.tx_packet_delta = er32(TPT); 3944 adapter->stats.tpt += hw->mac.tx_packet_delta; 3945 3946 adapter->stats.algnerrc += er32(ALGNERRC); 3947 adapter->stats.rxerrc += er32(RXERRC); 3948 adapter->stats.cexterr += er32(CEXTERR); 3949 adapter->stats.tsctc += er32(TSCTC); 3950 adapter->stats.tsctfc += er32(TSCTFC); 3951 3952 /* Fill out the OS statistics structure */ 3953 netdev->stats.multicast = adapter->stats.mprc; 3954 netdev->stats.collisions = adapter->stats.colc; 3955 3956 /* Rx Errors */ 3957 3958 /* 3959 * RLEC on some newer hardware can be incorrect so build 3960 * our own version based on RUC and ROC 3961 */ 3962 netdev->stats.rx_errors = adapter->stats.rxerrc + 3963 adapter->stats.crcerrs + adapter->stats.algnerrc + 3964 adapter->stats.ruc + adapter->stats.roc + 3965 adapter->stats.cexterr; 3966 netdev->stats.rx_length_errors = adapter->stats.ruc + 3967 adapter->stats.roc; 3968 netdev->stats.rx_crc_errors = adapter->stats.crcerrs; 3969 netdev->stats.rx_frame_errors = adapter->stats.algnerrc; 3970 netdev->stats.rx_missed_errors = adapter->stats.mpc; 3971 3972 /* Tx Errors */ 3973 netdev->stats.tx_errors = adapter->stats.ecol + 3974 adapter->stats.latecol; 3975 netdev->stats.tx_aborted_errors = adapter->stats.ecol; 3976 netdev->stats.tx_window_errors = adapter->stats.latecol; 3977 netdev->stats.tx_carrier_errors = adapter->stats.tncrs; 3978 3979 /* Tx Dropped needs to be maintained elsewhere */ 3980 3981 /* Management Stats */ 3982 adapter->stats.mgptc += er32(MGTPTC); 3983 adapter->stats.mgprc += er32(MGTPRC); 3984 adapter->stats.mgpdc += er32(MGTPDC); 3985} 3986 3987/** 3988 * e1000_phy_read_status - Update the PHY register status snapshot 3989 * @adapter: board private structure 3990 **/ 3991static void e1000_phy_read_status(struct e1000_adapter *adapter) 3992{ 3993 struct e1000_hw *hw = &adapter->hw; 3994 struct e1000_phy_regs *phy = &adapter->phy_regs; 3995 int ret_val; 3996 3997 if ((er32(STATUS) & E1000_STATUS_LU) && 3998 (adapter->hw.phy.media_type == e1000_media_type_copper)) { 3999 ret_val = e1e_rphy(hw, PHY_CONTROL, &phy->bmcr); 4000 ret_val |= e1e_rphy(hw, PHY_STATUS, &phy->bmsr); 4001 ret_val |= e1e_rphy(hw, PHY_AUTONEG_ADV, &phy->advertise); 4002 ret_val |= e1e_rphy(hw, PHY_LP_ABILITY, &phy->lpa); 4003 ret_val |= e1e_rphy(hw, PHY_AUTONEG_EXP, &phy->expansion); 4004 ret_val |= e1e_rphy(hw, PHY_1000T_CTRL, &phy->ctrl1000); 4005 ret_val |= e1e_rphy(hw, PHY_1000T_STATUS, &phy->stat1000); 4006 ret_val |= e1e_rphy(hw, PHY_EXT_STATUS, &phy->estatus); 4007 if (ret_val) 4008 e_warn("Error reading PHY register\n"); 4009 } else { 4010 /* 4011 * Do not read PHY registers if link is not up 4012 * Set values to typical power-on defaults 4013 */ 4014 phy->bmcr = (BMCR_SPEED1000 | BMCR_ANENABLE | BMCR_FULLDPLX); 4015 phy->bmsr = (BMSR_100FULL | BMSR_100HALF | BMSR_10FULL | 4016 BMSR_10HALF | BMSR_ESTATEN | BMSR_ANEGCAPABLE | 4017 BMSR_ERCAP); 4018 phy->advertise = (ADVERTISE_PAUSE_ASYM | ADVERTISE_PAUSE_CAP | 4019 ADVERTISE_ALL | ADVERTISE_CSMA); 4020 phy->lpa = 0; 4021 phy->expansion = EXPANSION_ENABLENPAGE; 4022 phy->ctrl1000 = ADVERTISE_1000FULL; 4023 phy->stat1000 = 0; 4024 phy->estatus = (ESTATUS_1000_TFULL | ESTATUS_1000_THALF); 4025 } 4026} 4027 4028static void e1000_print_link_info(struct e1000_adapter *adapter) 4029{ 4030 struct e1000_hw *hw = &adapter->hw; 4031 u32 ctrl = er32(CTRL); 4032 4033 /* Link status message must follow this format for user tools */ 4034 printk(KERN_INFO "e1000e: %s NIC Link is Up %d Mbps %s, " 4035 "Flow Control: %s\n", 4036 adapter->netdev->name, 4037 adapter->link_speed, 4038 (adapter->link_duplex == FULL_DUPLEX) ? 4039 "Full Duplex" : "Half Duplex", 4040 ((ctrl & E1000_CTRL_TFCE) && (ctrl & E1000_CTRL_RFCE)) ? 4041 "RX/TX" : 4042 ((ctrl & E1000_CTRL_RFCE) ? "RX" : 4043 ((ctrl & E1000_CTRL_TFCE) ? "TX" : "None" ))); 4044} 4045 4046static bool e1000e_has_link(struct e1000_adapter *adapter) 4047{ 4048 struct e1000_hw *hw = &adapter->hw; 4049 bool link_active = 0; 4050 s32 ret_val = 0; 4051 4052 /* 4053 * get_link_status is set on LSC (link status) interrupt or 4054 * Rx sequence error interrupt. get_link_status will stay 4055 * false until the check_for_link establishes link 4056 * for copper adapters ONLY 4057 */ 4058 switch (hw->phy.media_type) { 4059 case e1000_media_type_copper: 4060 if (hw->mac.get_link_status) { 4061 ret_val = hw->mac.ops.check_for_link(hw); 4062 link_active = !hw->mac.get_link_status; 4063 } else { 4064 link_active = 1; 4065 } 4066 break; 4067 case e1000_media_type_fiber: 4068 ret_val = hw->mac.ops.check_for_link(hw); 4069 link_active = !!(er32(STATUS) & E1000_STATUS_LU); 4070 break; 4071 case e1000_media_type_internal_serdes: 4072 ret_val = hw->mac.ops.check_for_link(hw); 4073 link_active = adapter->hw.mac.serdes_has_link; 4074 break; 4075 default: 4076 case e1000_media_type_unknown: 4077 break; 4078 } 4079 4080 if ((ret_val == E1000_ERR_PHY) && (hw->phy.type == e1000_phy_igp_3) && 4081 (er32(CTRL) & E1000_PHY_CTRL_GBE_DISABLE)) { 4082 /* See e1000_kmrn_lock_loss_workaround_ich8lan() */ 4083 e_info("Gigabit has been disabled, downgrading speed\n"); 4084 } 4085 4086 return link_active; 4087} 4088 4089static void e1000e_enable_receives(struct e1000_adapter *adapter) 4090{ 4091 /* make sure the receive unit is started */ 4092 if ((adapter->flags & FLAG_RX_NEEDS_RESTART) && 4093 (adapter->flags & FLAG_RX_RESTART_NOW)) { 4094 struct e1000_hw *hw = &adapter->hw; 4095 u32 rctl = er32(RCTL); 4096 ew32(RCTL, rctl | E1000_RCTL_EN); 4097 adapter->flags &= ~FLAG_RX_RESTART_NOW; 4098 } 4099} 4100 4101static void e1000e_check_82574_phy_workaround(struct e1000_adapter *adapter) 4102{ 4103 struct e1000_hw *hw = &adapter->hw; 4104 4105 /* 4106 * With 82574 controllers, PHY needs to be checked periodically 4107 * for hung state and reset, if two calls return true 4108 */ 4109 if (e1000_check_phy_82574(hw)) 4110 adapter->phy_hang_count++; 4111 else 4112 adapter->phy_hang_count = 0; 4113 4114 if (adapter->phy_hang_count > 1) { 4115 adapter->phy_hang_count = 0; 4116 schedule_work(&adapter->reset_task); 4117 } 4118} 4119 4120/** 4121 * e1000_watchdog - Timer Call-back 4122 * @data: pointer to adapter cast into an unsigned long 4123 **/ 4124static void e1000_watchdog(unsigned long data) 4125{ 4126 struct e1000_adapter *adapter = (struct e1000_adapter *) data; 4127 4128 /* Do the rest outside of interrupt context */ 4129 schedule_work(&adapter->watchdog_task); 4130 4131 /* TODO: make this use queue_delayed_work() */ 4132} 4133 4134static void e1000_watchdog_task(struct work_struct *work) 4135{ 4136 struct e1000_adapter *adapter = container_of(work, 4137 struct e1000_adapter, watchdog_task); 4138 struct net_device *netdev = adapter->netdev; 4139 struct e1000_mac_info *mac = &adapter->hw.mac; 4140 struct e1000_phy_info *phy = &adapter->hw.phy; 4141 struct e1000_ring *tx_ring = adapter->tx_ring; 4142 struct e1000_hw *hw = &adapter->hw; 4143 u32 link, tctl; 4144 int tx_pending = 0; 4145 4146 link = e1000e_has_link(adapter); 4147 if ((netif_carrier_ok(netdev)) && link) { 4148 /* Cancel scheduled suspend requests. */ 4149 pm_runtime_resume(netdev->dev.parent); 4150 4151 e1000e_enable_receives(adapter); 4152 goto link_up; 4153 } 4154 4155 if ((e1000e_enable_tx_pkt_filtering(hw)) && 4156 (adapter->mng_vlan_id != adapter->hw.mng_cookie.vlan_id)) 4157 e1000_update_mng_vlan(adapter); 4158 4159 if (link) { 4160 if (!netif_carrier_ok(netdev)) { 4161 bool txb2b = 1; 4162 4163 /* Cancel scheduled suspend requests. */ 4164 pm_runtime_resume(netdev->dev.parent); 4165 4166 /* update snapshot of PHY registers on LSC */ 4167 e1000_phy_read_status(adapter); 4168 mac->ops.get_link_up_info(&adapter->hw, 4169 &adapter->link_speed, 4170 &adapter->link_duplex); 4171 e1000_print_link_info(adapter); 4172 /* 4173 * On supported PHYs, check for duplex mismatch only 4174 * if link has autonegotiated at 10/100 half 4175 */ 4176 if ((hw->phy.type == e1000_phy_igp_3 || 4177 hw->phy.type == e1000_phy_bm) && 4178 (hw->mac.autoneg == true) && 4179 (adapter->link_speed == SPEED_10 || 4180 adapter->link_speed == SPEED_100) && 4181 (adapter->link_duplex == HALF_DUPLEX)) { 4182 u16 autoneg_exp; 4183 4184 e1e_rphy(hw, PHY_AUTONEG_EXP, &autoneg_exp); 4185 4186 if (!(autoneg_exp & NWAY_ER_LP_NWAY_CAPS)) 4187 e_info("Autonegotiated half duplex but" 4188 " link partner cannot autoneg. " 4189 " Try forcing full duplex if " 4190 "link gets many collisions.\n"); 4191 } 4192 4193 /* adjust timeout factor according to speed/duplex */ 4194 adapter->tx_timeout_factor = 1; 4195 switch (adapter->link_speed) { 4196 case SPEED_10: 4197 txb2b = 0; 4198 adapter->tx_timeout_factor = 16; 4199 break; 4200 case SPEED_100: 4201 txb2b = 0; 4202 adapter->tx_timeout_factor = 10; 4203 break; 4204 } 4205 4206 /* 4207 * workaround: re-program speed mode bit after 4208 * link-up event 4209 */ 4210 if ((adapter->flags & FLAG_TARC_SPEED_MODE_BIT) && 4211 !txb2b) { 4212 u32 tarc0; 4213 tarc0 = er32(TARC(0)); 4214 tarc0 &= ~SPEED_MODE_BIT; 4215 ew32(TARC(0), tarc0); 4216 } 4217 4218 /* 4219 * disable TSO for pcie and 10/100 speeds, to avoid 4220 * some hardware issues 4221 */ 4222 if (!(adapter->flags & FLAG_TSO_FORCE)) { 4223 switch (adapter->link_speed) { 4224 case SPEED_10: 4225 case SPEED_100: 4226 e_info("10/100 speed: disabling TSO\n"); 4227 netdev->features &= ~NETIF_F_TSO; 4228 netdev->features &= ~NETIF_F_TSO6; 4229 break; 4230 case SPEED_1000: 4231 netdev->features |= NETIF_F_TSO; 4232 netdev->features |= NETIF_F_TSO6; 4233 break; 4234 default: 4235 /* oops */ 4236 break; 4237 } 4238 } 4239 4240 /* 4241 * enable transmits in the hardware, need to do this 4242 * after setting TARC(0) 4243 */ 4244 tctl = er32(TCTL); 4245 tctl |= E1000_TCTL_EN; 4246 ew32(TCTL, tctl); 4247 4248 /* 4249 * Perform any post-link-up configuration before 4250 * reporting link up. 4251 */ 4252 if (phy->ops.cfg_on_link_up) 4253 phy->ops.cfg_on_link_up(hw); 4254 4255 netif_carrier_on(netdev); 4256 4257 if (!test_bit(__E1000_DOWN, &adapter->state)) 4258 mod_timer(&adapter->phy_info_timer, 4259 round_jiffies(jiffies + 2 * HZ)); 4260 } 4261 } else { 4262 if (netif_carrier_ok(netdev)) { 4263 adapter->link_speed = 0; 4264 adapter->link_duplex = 0; 4265 /* Link status message must follow this format */ 4266 printk(KERN_INFO "e1000e: %s NIC Link is Down\n", 4267 adapter->netdev->name); 4268 netif_carrier_off(netdev); 4269 if (!test_bit(__E1000_DOWN, &adapter->state)) 4270 mod_timer(&adapter->phy_info_timer, 4271 round_jiffies(jiffies + 2 * HZ)); 4272 4273 if (adapter->flags & FLAG_RX_NEEDS_RESTART) 4274 schedule_work(&adapter->reset_task); 4275 else 4276 pm_schedule_suspend(netdev->dev.parent, 4277 LINK_TIMEOUT); 4278 } 4279 } 4280 4281link_up: 4282 e1000e_update_stats(adapter); 4283 4284 mac->tx_packet_delta = adapter->stats.tpt - adapter->tpt_old; 4285 adapter->tpt_old = adapter->stats.tpt; 4286 mac->collision_delta = adapter->stats.colc - adapter->colc_old; 4287 adapter->colc_old = adapter->stats.colc; 4288 4289 adapter->gorc = adapter->stats.gorc - adapter->gorc_old; 4290 adapter->gorc_old = adapter->stats.gorc; 4291 adapter->gotc = adapter->stats.gotc - adapter->gotc_old; 4292 adapter->gotc_old = adapter->stats.gotc; 4293 4294 e1000e_update_adaptive(&adapter->hw); 4295 4296 if (!netif_carrier_ok(netdev)) { 4297 tx_pending = (e1000_desc_unused(tx_ring) + 1 < 4298 tx_ring->count); 4299 if (tx_pending) { 4300 /* 4301 * We've lost link, so the controller stops DMA, 4302 * but we've got queued Tx work that's never going 4303 * to get done, so reset controller to flush Tx. 4304 * (Do the reset outside of interrupt context). 4305 */ 4306 adapter->tx_timeout_count++; 4307 schedule_work(&adapter->reset_task); 4308 /* return immediately since reset is imminent */ 4309 return; 4310 } 4311 } 4312 4313 /* Simple mode for Interrupt Throttle Rate (ITR) */ 4314 if (adapter->itr_setting == 4) { 4315 /* 4316 * Symmetric Tx/Rx gets a reduced ITR=2000; 4317 * Total asymmetrical Tx or Rx gets ITR=8000; 4318 * everyone else is between 2000-8000. 4319 */ 4320 u32 goc = (adapter->gotc + adapter->gorc) / 10000; 4321 u32 dif = (adapter->gotc > adapter->gorc ? 4322 adapter->gotc - adapter->gorc : 4323 adapter->gorc - adapter->gotc) / 10000; 4324 u32 itr = goc > 0 ? (dif * 6000 / goc + 2000) : 8000; 4325 4326 ew32(ITR, 1000000000 / (itr * 256)); 4327 } 4328 4329 /* Cause software interrupt to ensure Rx ring is cleaned */ 4330 if (adapter->msix_entries) 4331 ew32(ICS, adapter->rx_ring->ims_val); 4332 else 4333 ew32(ICS, E1000_ICS_RXDMT0); 4334 4335 /* Force detection of hung controller every watchdog period */ 4336 adapter->detect_tx_hung = 1; 4337 4338 /* flush partial descriptors to memory before detecting tx hang */ 4339 if (adapter->flags2 & FLAG2_DMA_BURST) { 4340 ew32(TIDV, adapter->tx_int_delay | E1000_TIDV_FPD); 4341 ew32(RDTR, adapter->rx_int_delay | E1000_RDTR_FPD); 4342 /* 4343 * no need to flush the writes because the timeout code does 4344 * an er32 first thing 4345 */ 4346 } 4347 4348 /* 4349 * With 82571 controllers, LAA may be overwritten due to controller 4350 * reset from the other port. Set the appropriate LAA in RAR[0] 4351 */ 4352 if (e1000e_get_laa_state_82571(hw)) 4353 e1000e_rar_set(hw, adapter->hw.mac.addr, 0); 4354 4355 if (adapter->flags2 & FLAG2_CHECK_PHY_HANG) 4356 e1000e_check_82574_phy_workaround(adapter); 4357 4358 /* Reset the timer */ 4359 if (!test_bit(__E1000_DOWN, &adapter->state)) 4360 mod_timer(&adapter->watchdog_timer, 4361 round_jiffies(jiffies + 2 * HZ)); 4362} 4363 4364#define E1000_TX_FLAGS_CSUM 0x00000001 4365#define E1000_TX_FLAGS_VLAN 0x00000002 4366#define E1000_TX_FLAGS_TSO 0x00000004 4367#define E1000_TX_FLAGS_IPV4 0x00000008 4368#define E1000_TX_FLAGS_VLAN_MASK 0xffff0000 4369#define E1000_TX_FLAGS_VLAN_SHIFT 16 4370 4371static int e1000_tso(struct e1000_adapter *adapter, 4372 struct sk_buff *skb) 4373{ 4374 struct e1000_ring *tx_ring = adapter->tx_ring; 4375 struct e1000_context_desc *context_desc; 4376 struct e1000_buffer *buffer_info; 4377 unsigned int i; 4378 u32 cmd_length = 0; 4379 u16 ipcse = 0, tucse, mss; 4380 u8 ipcss, ipcso, tucss, tucso, hdr_len; 4381 int err; 4382 4383 if (!skb_is_gso(skb)) 4384 return 0; 4385 4386 if (skb_header_cloned(skb)) { 4387 err = pskb_expand_head(skb, 0, 0, GFP_ATOMIC); 4388 if (err) 4389 return err; 4390 } 4391 4392 hdr_len = skb_transport_offset(skb) + tcp_hdrlen(skb); 4393 mss = skb_shinfo(skb)->gso_size; 4394 if (skb->protocol == htons(ETH_P_IP)) { 4395 struct iphdr *iph = ip_hdr(skb); 4396 iph->tot_len = 0; 4397 iph->check = 0; 4398 tcp_hdr(skb)->check = ~csum_tcpudp_magic(iph->saddr, iph->daddr, 4399 0, IPPROTO_TCP, 0); 4400 cmd_length = E1000_TXD_CMD_IP; 4401 ipcse = skb_transport_offset(skb) - 1; 4402 } else if (skb_is_gso_v6(skb)) { 4403 ipv6_hdr(skb)->payload_len = 0; 4404 tcp_hdr(skb)->check = ~csum_ipv6_magic(&ipv6_hdr(skb)->saddr, 4405 &ipv6_hdr(skb)->daddr, 4406 0, IPPROTO_TCP, 0); 4407 ipcse = 0; 4408 } 4409 ipcss = skb_network_offset(skb); 4410 ipcso = (void *)&(ip_hdr(skb)->check) - (void *)skb->data; 4411 tucss = skb_transport_offset(skb); 4412 tucso = (void *)&(tcp_hdr(skb)->check) - (void *)skb->data; 4413 tucse = 0; 4414 4415 cmd_length |= (E1000_TXD_CMD_DEXT | E1000_TXD_CMD_TSE | 4416 E1000_TXD_CMD_TCP | (skb->len - (hdr_len))); 4417 4418 i = tx_ring->next_to_use; 4419 context_desc = E1000_CONTEXT_DESC(*tx_ring, i); 4420 buffer_info = &tx_ring->buffer_info[i]; 4421 4422 context_desc->lower_setup.ip_fields.ipcss = ipcss; 4423 context_desc->lower_setup.ip_fields.ipcso = ipcso; 4424 context_desc->lower_setup.ip_fields.ipcse = cpu_to_le16(ipcse); 4425 context_desc->upper_setup.tcp_fields.tucss = tucss; 4426 context_desc->upper_setup.tcp_fields.tucso = tucso; 4427 context_desc->upper_setup.tcp_fields.tucse = cpu_to_le16(tucse); 4428 context_desc->tcp_seg_setup.fields.mss = cpu_to_le16(mss); 4429 context_desc->tcp_seg_setup.fields.hdr_len = hdr_len; 4430 context_desc->cmd_and_length = cpu_to_le32(cmd_length); 4431 4432 buffer_info->time_stamp = jiffies; 4433 buffer_info->next_to_watch = i; 4434 4435 i++; 4436 if (i == tx_ring->count) 4437 i = 0; 4438 tx_ring->next_to_use = i; 4439 4440 return 1; 4441} 4442 4443static bool e1000_tx_csum(struct e1000_adapter *adapter, struct sk_buff *skb) 4444{ 4445 struct e1000_ring *tx_ring = adapter->tx_ring; 4446 struct e1000_context_desc *context_desc; 4447 struct e1000_buffer *buffer_info; 4448 unsigned int i; 4449 u8 css; 4450 u32 cmd_len = E1000_TXD_CMD_DEXT; 4451 __be16 protocol; 4452 4453 if (skb->ip_summed != CHECKSUM_PARTIAL) 4454 return 0; 4455 4456 if (skb->protocol == cpu_to_be16(ETH_P_8021Q)) 4457 protocol = vlan_eth_hdr(skb)->h_vlan_encapsulated_proto; 4458 else 4459 protocol = skb->protocol; 4460 4461 switch (protocol) { 4462 case cpu_to_be16(ETH_P_IP): 4463 if (ip_hdr(skb)->protocol == IPPROTO_TCP) 4464 cmd_len |= E1000_TXD_CMD_TCP; 4465 break; 4466 case cpu_to_be16(ETH_P_IPV6): 4467 /* XXX not handling all IPV6 headers */ 4468 if (ipv6_hdr(skb)->nexthdr == IPPROTO_TCP) 4469 cmd_len |= E1000_TXD_CMD_TCP; 4470 break; 4471 default: 4472 if (unlikely(net_ratelimit())) 4473 e_warn("checksum_partial proto=%x!\n", 4474 be16_to_cpu(protocol)); 4475 break; 4476 } 4477 4478 css = skb_transport_offset(skb); 4479 4480 i = tx_ring->next_to_use; 4481 buffer_info = &tx_ring->buffer_info[i]; 4482 context_desc = E1000_CONTEXT_DESC(*tx_ring, i); 4483 4484 context_desc->lower_setup.ip_config = 0; 4485 context_desc->upper_setup.tcp_fields.tucss = css; 4486 context_desc->upper_setup.tcp_fields.tucso = 4487 css + skb->csum_offset; 4488 context_desc->upper_setup.tcp_fields.tucse = 0; 4489 context_desc->tcp_seg_setup.data = 0; 4490 context_desc->cmd_and_length = cpu_to_le32(cmd_len); 4491 4492 buffer_info->time_stamp = jiffies; 4493 buffer_info->next_to_watch = i; 4494 4495 i++; 4496 if (i == tx_ring->count) 4497 i = 0; 4498 tx_ring->next_to_use = i; 4499 4500 return 1; 4501} 4502 4503#define E1000_MAX_PER_TXD 8192 4504#define E1000_MAX_TXD_PWR 12 4505 4506static int e1000_tx_map(struct e1000_adapter *adapter, 4507 struct sk_buff *skb, unsigned int first, 4508 unsigned int max_per_txd, unsigned int nr_frags, 4509 unsigned int mss) 4510{ 4511 struct e1000_ring *tx_ring = adapter->tx_ring; 4512 struct pci_dev *pdev = adapter->pdev; 4513 struct e1000_buffer *buffer_info; 4514 unsigned int len = skb_headlen(skb); 4515 unsigned int offset = 0, size, count = 0, i; 4516 unsigned int f, bytecount, segs; 4517 4518 i = tx_ring->next_to_use; 4519 4520 while (len) { 4521 buffer_info = &tx_ring->buffer_info[i]; 4522 size = min(len, max_per_txd); 4523 4524 buffer_info->length = size; 4525 buffer_info->time_stamp = jiffies; 4526 buffer_info->next_to_watch = i; 4527 buffer_info->dma = dma_map_single(&pdev->dev, 4528 skb->data + offset, 4529 size, DMA_TO_DEVICE); 4530 buffer_info->mapped_as_page = false; 4531 if (dma_mapping_error(&pdev->dev, buffer_info->dma)) 4532 goto dma_error; 4533 4534 len -= size; 4535 offset += size; 4536 count++; 4537 4538 if (len) { 4539 i++; 4540 if (i == tx_ring->count) 4541 i = 0; 4542 } 4543 } 4544 4545 for (f = 0; f < nr_frags; f++) { 4546 struct skb_frag_struct *frag; 4547 4548 frag = &skb_shinfo(skb)->frags[f]; 4549 len = frag->size; 4550 offset = frag->page_offset; 4551 4552 while (len) { 4553 i++; 4554 if (i == tx_ring->count) 4555 i = 0; 4556 4557 buffer_info = &tx_ring->buffer_info[i]; 4558 size = min(len, max_per_txd); 4559 4560 buffer_info->length = size; 4561 buffer_info->time_stamp = jiffies; 4562 buffer_info->next_to_watch = i; 4563 buffer_info->dma = dma_map_page(&pdev->dev, frag->page, 4564 offset, size, 4565 DMA_TO_DEVICE); 4566 buffer_info->mapped_as_page = true; 4567 if (dma_mapping_error(&pdev->dev, buffer_info->dma)) 4568 goto dma_error; 4569 4570 len -= size; 4571 offset += size; 4572 count++; 4573 } 4574 } 4575 4576 segs = skb_shinfo(skb)->gso_segs ?: 1; 4577 /* multiply data chunks by size of headers */ 4578 bytecount = ((segs - 1) * skb_headlen(skb)) + skb->len; 4579 4580 tx_ring->buffer_info[i].skb = skb; 4581 tx_ring->buffer_info[i].segs = segs; 4582 tx_ring->buffer_info[i].bytecount = bytecount; 4583 tx_ring->buffer_info[first].next_to_watch = i; 4584 4585 return count; 4586 4587dma_error: 4588 dev_err(&pdev->dev, "TX DMA map failed\n"); 4589 buffer_info->dma = 0; 4590 if (count) 4591 count--; 4592 4593 while (count--) { 4594 if (i==0) 4595 i += tx_ring->count; 4596 i--; 4597 buffer_info = &tx_ring->buffer_info[i]; 4598 e1000_put_txbuf(adapter, buffer_info);; 4599 } 4600 4601 return 0; 4602} 4603 4604static void e1000_tx_queue(struct e1000_adapter *adapter, 4605 int tx_flags, int count) 4606{ 4607 struct e1000_ring *tx_ring = adapter->tx_ring; 4608 struct e1000_tx_desc *tx_desc = NULL; 4609 struct e1000_buffer *buffer_info; 4610 u32 txd_upper = 0, txd_lower = E1000_TXD_CMD_IFCS; 4611 unsigned int i; 4612 4613 if (tx_flags & E1000_TX_FLAGS_TSO) { 4614 txd_lower |= E1000_TXD_CMD_DEXT | E1000_TXD_DTYP_D | 4615 E1000_TXD_CMD_TSE; 4616 txd_upper |= E1000_TXD_POPTS_TXSM << 8; 4617 4618 if (tx_flags & E1000_TX_FLAGS_IPV4) 4619 txd_upper |= E1000_TXD_POPTS_IXSM << 8; 4620 } 4621 4622 if (tx_flags & E1000_TX_FLAGS_CSUM) { 4623 txd_lower |= E1000_TXD_CMD_DEXT | E1000_TXD_DTYP_D; 4624 txd_upper |= E1000_TXD_POPTS_TXSM << 8; 4625 } 4626 4627 if (tx_flags & E1000_TX_FLAGS_VLAN) { 4628 txd_lower |= E1000_TXD_CMD_VLE; 4629 txd_upper |= (tx_flags & E1000_TX_FLAGS_VLAN_MASK); 4630 } 4631 4632 i = tx_ring->next_to_use; 4633 4634 while (count--) { 4635 buffer_info = &tx_ring->buffer_info[i]; 4636 tx_desc = E1000_TX_DESC(*tx_ring, i); 4637 tx_desc->buffer_addr = cpu_to_le64(buffer_info->dma); 4638 tx_desc->lower.data = 4639 cpu_to_le32(txd_lower | buffer_info->length); 4640 tx_desc->upper.data = cpu_to_le32(txd_upper); 4641 4642 i++; 4643 if (i == tx_ring->count) 4644 i = 0; 4645 } 4646 4647 tx_desc->lower.data |= cpu_to_le32(adapter->txd_cmd); 4648 4649 /* 4650 * Force memory writes to complete before letting h/w 4651 * know there are new descriptors to fetch. (Only 4652 * applicable for weak-ordered memory model archs, 4653 * such as IA-64). 4654 */ 4655 wmb(); 4656 4657 tx_ring->next_to_use = i; 4658 writel(i, adapter->hw.hw_addr + tx_ring->tail); 4659 /* 4660 * we need this if more than one processor can write to our tail 4661 * at a time, it synchronizes IO on IA64/Altix systems 4662 */ 4663 mmiowb(); 4664} 4665 4666#define MINIMUM_DHCP_PACKET_SIZE 282 4667static int e1000_transfer_dhcp_info(struct e1000_adapter *adapter, 4668 struct sk_buff *skb) 4669{ 4670 struct e1000_hw *hw = &adapter->hw; 4671 u16 length, offset; 4672 4673 if (vlan_tx_tag_present(skb)) { 4674 if (!((vlan_tx_tag_get(skb) == adapter->hw.mng_cookie.vlan_id) && 4675 (adapter->hw.mng_cookie.status & 4676 E1000_MNG_DHCP_COOKIE_STATUS_VLAN))) 4677 return 0; 4678 } 4679 4680 if (skb->len <= MINIMUM_DHCP_PACKET_SIZE) 4681 return 0; 4682 4683 if (((struct ethhdr *) skb->data)->h_proto != htons(ETH_P_IP)) 4684 return 0; 4685 4686 { 4687 const struct iphdr *ip = (struct iphdr *)((u8 *)skb->data+14); 4688 struct udphdr *udp; 4689 4690 if (ip->protocol != IPPROTO_UDP) 4691 return 0; 4692 4693 udp = (struct udphdr *)((u8 *)ip + (ip->ihl << 2)); 4694 if (ntohs(udp->dest) != 67) 4695 return 0; 4696 4697 offset = (u8 *)udp + 8 - skb->data; 4698 length = skb->len - offset; 4699 return e1000e_mng_write_dhcp_info(hw, (u8 *)udp + 8, length); 4700 } 4701 4702 return 0; 4703} 4704 4705static int __e1000_maybe_stop_tx(struct net_device *netdev, int size) 4706{ 4707 struct e1000_adapter *adapter = netdev_priv(netdev); 4708 4709 netif_stop_queue(netdev); 4710 /* 4711 * Herbert's original patch had: 4712 * smp_mb__after_netif_stop_queue(); 4713 * but since that doesn't exist yet, just open code it. 4714 */ 4715 smp_mb(); 4716 4717 /* 4718 * We need to check again in a case another CPU has just 4719 * made room available. 4720 */ 4721 if (e1000_desc_unused(adapter->tx_ring) < size) 4722 return -EBUSY; 4723 4724 /* A reprieve! */ 4725 netif_start_queue(netdev); 4726 ++adapter->restart_queue; 4727 return 0; 4728} 4729 4730static int e1000_maybe_stop_tx(struct net_device *netdev, int size) 4731{ 4732 struct e1000_adapter *adapter = netdev_priv(netdev); 4733 4734 if (e1000_desc_unused(adapter->tx_ring) >= size) 4735 return 0; 4736 return __e1000_maybe_stop_tx(netdev, size); 4737} 4738 4739#define TXD_USE_COUNT(S, X) (((S) >> (X)) + 1 ) 4740static netdev_tx_t e1000_xmit_frame(struct sk_buff *skb, 4741 struct net_device *netdev) 4742{ 4743 struct e1000_adapter *adapter = netdev_priv(netdev); 4744 struct e1000_ring *tx_ring = adapter->tx_ring; 4745 unsigned int first; 4746 unsigned int max_per_txd = E1000_MAX_PER_TXD; 4747 unsigned int max_txd_pwr = E1000_MAX_TXD_PWR; 4748 unsigned int tx_flags = 0; 4749 unsigned int len = skb_headlen(skb); 4750 unsigned int nr_frags; 4751 unsigned int mss; 4752 int count = 0; 4753 int tso; 4754 unsigned int f; 4755 4756 if (test_bit(__E1000_DOWN, &adapter->state)) { 4757 dev_kfree_skb_any(skb); 4758 return NETDEV_TX_OK; 4759 } 4760 4761 if (skb->len <= 0) { 4762 dev_kfree_skb_any(skb); 4763 return NETDEV_TX_OK; 4764 } 4765 4766 mss = skb_shinfo(skb)->gso_size; 4767 /* 4768 * The controller does a simple calculation to 4769 * make sure there is enough room in the FIFO before 4770 * initiating the DMA for each buffer. The calc is: 4771 * 4 = ceil(buffer len/mss). To make sure we don't 4772 * overrun the FIFO, adjust the max buffer len if mss 4773 * drops. 4774 */ 4775 if (mss) { 4776 u8 hdr_len; 4777 max_per_txd = min(mss << 2, max_per_txd); 4778 max_txd_pwr = fls(max_per_txd) - 1; 4779 4780 /* 4781 * TSO Workaround for 82571/2/3 Controllers -- if skb->data 4782 * points to just header, pull a few bytes of payload from 4783 * frags into skb->data 4784 */ 4785 hdr_len = skb_transport_offset(skb) + tcp_hdrlen(skb); 4786 /* 4787 * we do this workaround for ES2LAN, but it is un-necessary, 4788 * avoiding it could save a lot of cycles 4789 */ 4790 if (skb->data_len && (hdr_len == len)) { 4791 unsigned int pull_size; 4792 4793 pull_size = min((unsigned int)4, skb->data_len); 4794 if (!__pskb_pull_tail(skb, pull_size)) { 4795 e_err("__pskb_pull_tail failed.\n"); 4796 dev_kfree_skb_any(skb); 4797 return NETDEV_TX_OK; 4798 } 4799 len = skb_headlen(skb); 4800 } 4801 } 4802 4803 /* reserve a descriptor for the offload context */ 4804 if ((mss) || (skb->ip_summed == CHECKSUM_PARTIAL)) 4805 count++; 4806 count++; 4807 4808 count += TXD_USE_COUNT(len, max_txd_pwr); 4809 4810 nr_frags = skb_shinfo(skb)->nr_frags; 4811 for (f = 0; f < nr_frags; f++) 4812 count += TXD_USE_COUNT(skb_shinfo(skb)->frags[f].size, 4813 max_txd_pwr); 4814 4815 if (adapter->hw.mac.tx_pkt_filtering) 4816 e1000_transfer_dhcp_info(adapter, skb); 4817 4818 /* 4819 * need: count + 2 desc gap to keep tail from touching 4820 * head, otherwise try next time 4821 */ 4822 if (e1000_maybe_stop_tx(netdev, count + 2)) 4823 return NETDEV_TX_BUSY; 4824 4825 if (vlan_tx_tag_present(skb)) { 4826 tx_flags |= E1000_TX_FLAGS_VLAN; 4827 tx_flags |= (vlan_tx_tag_get(skb) << E1000_TX_FLAGS_VLAN_SHIFT); 4828 } 4829 4830 first = tx_ring->next_to_use; 4831 4832 tso = e1000_tso(adapter, skb); 4833 if (tso < 0) { 4834 dev_kfree_skb_any(skb); 4835 return NETDEV_TX_OK; 4836 } 4837 4838 if (tso) 4839 tx_flags |= E1000_TX_FLAGS_TSO; 4840 else if (e1000_tx_csum(adapter, skb)) 4841 tx_flags |= E1000_TX_FLAGS_CSUM; 4842 4843 /* 4844 * Old method was to assume IPv4 packet by default if TSO was enabled. 4845 * 82571 hardware supports TSO capabilities for IPv6 as well... 4846 * no longer assume, we must. 4847 */ 4848 if (skb->protocol == htons(ETH_P_IP)) 4849 tx_flags |= E1000_TX_FLAGS_IPV4; 4850 4851 /* if count is 0 then mapping error has occured */ 4852 count = e1000_tx_map(adapter, skb, first, max_per_txd, nr_frags, mss); 4853 if (count) { 4854 e1000_tx_queue(adapter, tx_flags, count); 4855 /* Make sure there is space in the ring for the next send. */ 4856 e1000_maybe_stop_tx(netdev, MAX_SKB_FRAGS + 2); 4857 4858 } else { 4859 dev_kfree_skb_any(skb); 4860 tx_ring->buffer_info[first].time_stamp = 0; 4861 tx_ring->next_to_use = first; 4862 } 4863 4864 return NETDEV_TX_OK; 4865} 4866 4867/** 4868 * e1000_tx_timeout - Respond to a Tx Hang 4869 * @netdev: network interface device structure 4870 **/ 4871static void e1000_tx_timeout(struct net_device *netdev) 4872{ 4873 struct e1000_adapter *adapter = netdev_priv(netdev); 4874 4875 /* Do the reset outside of interrupt context */ 4876 adapter->tx_timeout_count++; 4877 schedule_work(&adapter->reset_task); 4878} 4879 4880static void e1000_reset_task(struct work_struct *work) 4881{ 4882 struct e1000_adapter *adapter; 4883 adapter = container_of(work, struct e1000_adapter, reset_task); 4884 4885 if (!((adapter->flags & FLAG_RX_NEEDS_RESTART) && 4886 (adapter->flags & FLAG_RX_RESTART_NOW))) { 4887 e1000e_dump(adapter); 4888 e_err("Reset adapter\n"); 4889 } 4890 e1000e_reinit_locked(adapter); 4891} 4892 4893/** 4894 * e1000_get_stats - Get System Network Statistics 4895 * @netdev: network interface device structure 4896 * 4897 * Returns the address of the device statistics structure. 4898 * The statistics are actually updated from the timer callback. 4899 **/ 4900static struct net_device_stats *e1000_get_stats(struct net_device *netdev) 4901{ 4902 /* only return the current stats */ 4903 return &netdev->stats; 4904} 4905 4906/** 4907 * e1000_change_mtu - Change the Maximum Transfer Unit 4908 * @netdev: network interface device structure 4909 * @new_mtu: new value for maximum frame size 4910 * 4911 * Returns 0 on success, negative on failure 4912 **/ 4913static int e1000_change_mtu(struct net_device *netdev, int new_mtu) 4914{ 4915 struct e1000_adapter *adapter = netdev_priv(netdev); 4916 int max_frame = new_mtu + ETH_HLEN + ETH_FCS_LEN; 4917 4918 /* Jumbo frame support */ 4919 if ((max_frame > ETH_FRAME_LEN + ETH_FCS_LEN) && 4920 !(adapter->flags & FLAG_HAS_JUMBO_FRAMES)) { 4921 e_err("Jumbo Frames not supported.\n"); 4922 return -EINVAL; 4923 } 4924 4925 /* Supported frame sizes */ 4926 if ((new_mtu < ETH_ZLEN + ETH_FCS_LEN + VLAN_HLEN) || 4927 (max_frame > adapter->max_hw_frame_size)) { 4928 e_err("Unsupported MTU setting\n"); 4929 return -EINVAL; 4930 } 4931 4932 /* Jumbo frame workaround on 82579 requires CRC be stripped */ 4933 if ((adapter->hw.mac.type == e1000_pch2lan) && 4934 !(adapter->flags2 & FLAG2_CRC_STRIPPING) && 4935 (new_mtu > ETH_DATA_LEN)) { 4936 e_err("Jumbo Frames not supported on 82579 when CRC " 4937 "stripping is disabled.\n"); 4938 return -EINVAL; 4939 } 4940 4941 /* 82573 Errata 17 */ 4942 if (((adapter->hw.mac.type == e1000_82573) || 4943 (adapter->hw.mac.type == e1000_82574)) && 4944 (max_frame > ETH_FRAME_LEN + ETH_FCS_LEN)) { 4945 adapter->flags2 |= FLAG2_DISABLE_ASPM_L1; 4946 e1000e_disable_aspm(adapter->pdev, PCIE_LINK_STATE_L1); 4947 } 4948 4949 while (test_and_set_bit(__E1000_RESETTING, &adapter->state)) 4950 msleep(1); 4951 /* e1000e_down -> e1000e_reset dependent on max_frame_size & mtu */ 4952 adapter->max_frame_size = max_frame; 4953 e_info("changing MTU from %d to %d\n", netdev->mtu, new_mtu); 4954 netdev->mtu = new_mtu; 4955 if (netif_running(netdev)) 4956 e1000e_down(adapter); 4957 4958 /* 4959 * NOTE: netdev_alloc_skb reserves 16 bytes, and typically NET_IP_ALIGN 4960 * means we reserve 2 more, this pushes us to allocate from the next 4961 * larger slab size. 4962 * i.e. RXBUFFER_2048 --> size-4096 slab 4963 * However with the new *_jumbo_rx* routines, jumbo receives will use 4964 * fragmented skbs 4965 */ 4966 4967 if (max_frame <= 2048) 4968 adapter->rx_buffer_len = 2048; 4969 else 4970 adapter->rx_buffer_len = 4096; 4971 4972 /* adjust allocation if LPE protects us, and we aren't using SBP */ 4973 if ((max_frame == ETH_FRAME_LEN + ETH_FCS_LEN) || 4974 (max_frame == ETH_FRAME_LEN + VLAN_HLEN + ETH_FCS_LEN)) 4975 adapter->rx_buffer_len = ETH_FRAME_LEN + VLAN_HLEN 4976 + ETH_FCS_LEN; 4977 4978 if (netif_running(netdev)) 4979 e1000e_up(adapter); 4980 else 4981 e1000e_reset(adapter); 4982 4983 clear_bit(__E1000_RESETTING, &adapter->state); 4984 4985 return 0; 4986} 4987 4988static int e1000_mii_ioctl(struct net_device *netdev, struct ifreq *ifr, 4989 int cmd) 4990{ 4991 struct e1000_adapter *adapter = netdev_priv(netdev); 4992 struct mii_ioctl_data *data = if_mii(ifr); 4993 4994 if (adapter->hw.phy.media_type != e1000_media_type_copper) 4995 return -EOPNOTSUPP; 4996 4997 switch (cmd) { 4998 case SIOCGMIIPHY: 4999 data->phy_id = adapter->hw.phy.addr; 5000 break; 5001 case SIOCGMIIREG: 5002 e1000_phy_read_status(adapter); 5003 5004 switch (data->reg_num & 0x1F) { 5005 case MII_BMCR: 5006 data->val_out = adapter->phy_regs.bmcr; 5007 break; 5008 case MII_BMSR: 5009 data->val_out = adapter->phy_regs.bmsr; 5010 break; 5011 case MII_PHYSID1: 5012 data->val_out = (adapter->hw.phy.id >> 16); 5013 break; 5014 case MII_PHYSID2: 5015 data->val_out = (adapter->hw.phy.id & 0xFFFF); 5016 break; 5017 case MII_ADVERTISE: 5018 data->val_out = adapter->phy_regs.advertise; 5019 break; 5020 case MII_LPA: 5021 data->val_out = adapter->phy_regs.lpa; 5022 break; 5023 case MII_EXPANSION: 5024 data->val_out = adapter->phy_regs.expansion; 5025 break; 5026 case MII_CTRL1000: 5027 data->val_out = adapter->phy_regs.ctrl1000; 5028 break; 5029 case MII_STAT1000: 5030 data->val_out = adapter->phy_regs.stat1000; 5031 break; 5032 case MII_ESTATUS: 5033 data->val_out = adapter->phy_regs.estatus; 5034 break; 5035 default: 5036 return -EIO; 5037 } 5038 break; 5039 case SIOCSMIIREG: 5040 default: 5041 return -EOPNOTSUPP; 5042 } 5043 return 0; 5044} 5045 5046static int e1000_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd) 5047{ 5048 switch (cmd) { 5049 case SIOCGMIIPHY: 5050 case SIOCGMIIREG: 5051 case SIOCSMIIREG: 5052 return e1000_mii_ioctl(netdev, ifr, cmd); 5053 default: 5054 return -EOPNOTSUPP; 5055 } 5056} 5057 5058static int e1000_init_phy_wakeup(struct e1000_adapter *adapter, u32 wufc) 5059{ 5060 struct e1000_hw *hw = &adapter->hw; 5061 u32 i, mac_reg; 5062 u16 phy_reg; 5063 int retval = 0; 5064 5065 /* copy MAC RARs to PHY RARs */ 5066 e1000_copy_rx_addrs_to_phy_ich8lan(hw); 5067 5068 /* copy MAC MTA to PHY MTA */ 5069 for (i = 0; i < adapter->hw.mac.mta_reg_count; i++) { 5070 mac_reg = E1000_READ_REG_ARRAY(hw, E1000_MTA, i); 5071 e1e_wphy(hw, BM_MTA(i), (u16)(mac_reg & 0xFFFF)); 5072 e1e_wphy(hw, BM_MTA(i) + 1, (u16)((mac_reg >> 16) & 0xFFFF)); 5073 } 5074 5075 /* configure PHY Rx Control register */ 5076 e1e_rphy(&adapter->hw, BM_RCTL, &phy_reg); 5077 mac_reg = er32(RCTL); 5078 if (mac_reg & E1000_RCTL_UPE) 5079 phy_reg |= BM_RCTL_UPE; 5080 if (mac_reg & E1000_RCTL_MPE) 5081 phy_reg |= BM_RCTL_MPE; 5082 phy_reg &= ~(BM_RCTL_MO_MASK); 5083 if (mac_reg & E1000_RCTL_MO_3) 5084 phy_reg |= (((mac_reg & E1000_RCTL_MO_3) >> E1000_RCTL_MO_SHIFT) 5085 << BM_RCTL_MO_SHIFT); 5086 if (mac_reg & E1000_RCTL_BAM) 5087 phy_reg |= BM_RCTL_BAM; 5088 if (mac_reg & E1000_RCTL_PMCF) 5089 phy_reg |= BM_RCTL_PMCF; 5090 mac_reg = er32(CTRL); 5091 if (mac_reg & E1000_CTRL_RFCE) 5092 phy_reg |= BM_RCTL_RFCE; 5093 e1e_wphy(&adapter->hw, BM_RCTL, phy_reg); 5094 5095 /* enable PHY wakeup in MAC register */ 5096 ew32(WUFC, wufc); 5097 ew32(WUC, E1000_WUC_PHY_WAKE | E1000_WUC_PME_EN); 5098 5099 /* configure and enable PHY wakeup in PHY registers */ 5100 e1e_wphy(&adapter->hw, BM_WUFC, wufc); 5101 e1e_wphy(&adapter->hw, BM_WUC, E1000_WUC_PME_EN); 5102 5103 /* activate PHY wakeup */ 5104 retval = hw->phy.ops.acquire(hw); 5105 if (retval) { 5106 e_err("Could not acquire PHY\n"); 5107 return retval; 5108 } 5109 e1000e_write_phy_reg_mdic(hw, IGP01E1000_PHY_PAGE_SELECT, 5110 (BM_WUC_ENABLE_PAGE << IGP_PAGE_SHIFT)); 5111 retval = e1000e_read_phy_reg_mdic(hw, BM_WUC_ENABLE_REG, &phy_reg); 5112 if (retval) { 5113 e_err("Could not read PHY page 769\n"); 5114 goto out; 5115 } 5116 phy_reg |= BM_WUC_ENABLE_BIT | BM_WUC_HOST_WU_BIT; 5117 retval = e1000e_write_phy_reg_mdic(hw, BM_WUC_ENABLE_REG, phy_reg); 5118 if (retval) 5119 e_err("Could not set PHY Host Wakeup bit\n"); 5120out: 5121 hw->phy.ops.release(hw); 5122 5123 return retval; 5124} 5125 5126static int __e1000_shutdown(struct pci_dev *pdev, bool *enable_wake, 5127 bool runtime) 5128{ 5129 struct net_device *netdev = pci_get_drvdata(pdev); 5130 struct e1000_adapter *adapter = netdev_priv(netdev); 5131 struct e1000_hw *hw = &adapter->hw; 5132 u32 ctrl, ctrl_ext, rctl, status; 5133 /* Runtime suspend should only enable wakeup for link changes */ 5134 u32 wufc = runtime ? E1000_WUFC_LNKC : adapter->wol; 5135 int retval = 0; 5136 5137 netif_device_detach(netdev); 5138 5139 if (netif_running(netdev)) { 5140 WARN_ON(test_bit(__E1000_RESETTING, &adapter->state)); 5141 e1000e_down(adapter); 5142 e1000_free_irq(adapter); 5143 } 5144 e1000e_reset_interrupt_capability(adapter); 5145 5146 retval = pci_save_state(pdev); 5147 if (retval) 5148 return retval; 5149 5150 status = er32(STATUS); 5151 if (status & E1000_STATUS_LU) 5152 wufc &= ~E1000_WUFC_LNKC; 5153 5154 if (wufc) { 5155 e1000_setup_rctl(adapter); 5156 e1000_set_multi(netdev); 5157 5158 /* turn on all-multi mode if wake on multicast is enabled */ 5159 if (wufc & E1000_WUFC_MC) { 5160 rctl = er32(RCTL); 5161 rctl |= E1000_RCTL_MPE; 5162 ew32(RCTL, rctl); 5163 } 5164 5165 ctrl = er32(CTRL); 5166 /* advertise wake from D3Cold */ 5167 #define E1000_CTRL_ADVD3WUC 0x00100000 5168 /* phy power management enable */ 5169 #define E1000_CTRL_EN_PHY_PWR_MGMT 0x00200000 5170 ctrl |= E1000_CTRL_ADVD3WUC; 5171 if (!(adapter->flags2 & FLAG2_HAS_PHY_WAKEUP)) 5172 ctrl |= E1000_CTRL_EN_PHY_PWR_MGMT; 5173 ew32(CTRL, ctrl); 5174 5175 if (adapter->hw.phy.media_type == e1000_media_type_fiber || 5176 adapter->hw.phy.media_type == 5177 e1000_media_type_internal_serdes) { 5178 /* keep the laser running in D3 */ 5179 ctrl_ext = er32(CTRL_EXT); 5180 ctrl_ext |= E1000_CTRL_EXT_SDP3_DATA; 5181 ew32(CTRL_EXT, ctrl_ext); 5182 } 5183 5184 if (adapter->flags & FLAG_IS_ICH) 5185 e1000e_disable_gig_wol_ich8lan(&adapter->hw); 5186 5187 /* Allow time for pending master requests to run */ 5188 e1000e_disable_pcie_master(&adapter->hw); 5189 5190 if (adapter->flags2 & FLAG2_HAS_PHY_WAKEUP) { 5191 /* enable wakeup by the PHY */ 5192 retval = e1000_init_phy_wakeup(adapter, wufc); 5193 if (retval) 5194 return retval; 5195 } else { 5196 /* enable wakeup by the MAC */ 5197 ew32(WUFC, wufc); 5198 ew32(WUC, E1000_WUC_PME_EN); 5199 } 5200 } else { 5201 ew32(WUC, 0); 5202 ew32(WUFC, 0); 5203 } 5204 5205 *enable_wake = !!wufc; 5206 5207 /* make sure adapter isn't asleep if manageability is enabled */ 5208 if ((adapter->flags & FLAG_MNG_PT_ENABLED) || 5209 (hw->mac.ops.check_mng_mode(hw))) 5210 *enable_wake = true; 5211 5212 if (adapter->hw.phy.type == e1000_phy_igp_3) 5213 e1000e_igp3_phy_powerdown_workaround_ich8lan(&adapter->hw); 5214 5215 /* 5216 * Release control of h/w to f/w. If f/w is AMT enabled, this 5217 * would have already happened in close and is redundant. 5218 */ 5219 e1000_release_hw_control(adapter); 5220 5221 pci_disable_device(pdev); 5222 5223 return 0; 5224} 5225 5226static void e1000_power_off(struct pci_dev *pdev, bool sleep, bool wake) 5227{ 5228 if (sleep && wake) { 5229 pci_prepare_to_sleep(pdev); 5230 return; 5231 } 5232 5233 pci_wake_from_d3(pdev, wake); 5234 pci_set_power_state(pdev, PCI_D3hot); 5235} 5236 5237static void e1000_complete_shutdown(struct pci_dev *pdev, bool sleep, 5238 bool wake) 5239{ 5240 struct net_device *netdev = pci_get_drvdata(pdev); 5241 struct e1000_adapter *adapter = netdev_priv(netdev); 5242 5243 /* 5244 * The pci-e switch on some quad port adapters will report a 5245 * correctable error when the MAC transitions from D0 to D3. To 5246 * prevent this we need to mask off the correctable errors on the 5247 * downstream port of the pci-e switch. 5248 */ 5249 if (adapter->flags & FLAG_IS_QUAD_PORT) { 5250 struct pci_dev *us_dev = pdev->bus->self; 5251 int pos = pci_find_capability(us_dev, PCI_CAP_ID_EXP); 5252 u16 devctl; 5253 5254 pci_read_config_word(us_dev, pos + PCI_EXP_DEVCTL, &devctl); 5255 pci_write_config_word(us_dev, pos + PCI_EXP_DEVCTL, 5256 (devctl & ~PCI_EXP_DEVCTL_CERE)); 5257 5258 e1000_power_off(pdev, sleep, wake); 5259 5260 pci_write_config_word(us_dev, pos + PCI_EXP_DEVCTL, devctl); 5261 } else { 5262 e1000_power_off(pdev, sleep, wake); 5263 } 5264} 5265 5266#ifdef CONFIG_PCIEASPM 5267static void __e1000e_disable_aspm(struct pci_dev *pdev, u16 state) 5268{ 5269 pci_disable_link_state(pdev, state); 5270} 5271#else 5272static void __e1000e_disable_aspm(struct pci_dev *pdev, u16 state) 5273{ 5274 int pos; 5275 u16 reg16; 5276 5277 /* 5278 * Both device and parent should have the same ASPM setting. 5279 * Disable ASPM in downstream component first and then upstream. 5280 */ 5281 pos = pci_pcie_cap(pdev); 5282 pci_read_config_word(pdev, pos + PCI_EXP_LNKCTL, &reg16); 5283 reg16 &= ~state; 5284 pci_write_config_word(pdev, pos + PCI_EXP_LNKCTL, reg16); 5285 5286 if (!pdev->bus->self) 5287 return; 5288 5289 pos = pci_pcie_cap(pdev->bus->self); 5290 pci_read_config_word(pdev->bus->self, pos + PCI_EXP_LNKCTL, &reg16); 5291 reg16 &= ~state; 5292 pci_write_config_word(pdev->bus->self, pos + PCI_EXP_LNKCTL, reg16); 5293} 5294#endif 5295void e1000e_disable_aspm(struct pci_dev *pdev, u16 state) 5296{ 5297 dev_info(&pdev->dev, "Disabling ASPM %s %s\n", 5298 (state & PCIE_LINK_STATE_L0S) ? "L0s" : "", 5299 (state & PCIE_LINK_STATE_L1) ? "L1" : ""); 5300 5301 __e1000e_disable_aspm(pdev, state); 5302} 5303 5304#ifdef CONFIG_PM_OPS 5305static bool e1000e_pm_ready(struct e1000_adapter *adapter) 5306{ 5307 return !!adapter->tx_ring->buffer_info; 5308} 5309 5310static int __e1000_resume(struct pci_dev *pdev) 5311{ 5312 struct net_device *netdev = pci_get_drvdata(pdev); 5313 struct e1000_adapter *adapter = netdev_priv(netdev); 5314 struct e1000_hw *hw = &adapter->hw; 5315 u32 err; 5316 5317 pci_set_power_state(pdev, PCI_D0); 5318 pci_restore_state(pdev); 5319 pci_save_state(pdev); 5320 if (adapter->flags2 & FLAG2_DISABLE_ASPM_L1) 5321 e1000e_disable_aspm(pdev, PCIE_LINK_STATE_L1); 5322 5323 e1000e_set_interrupt_capability(adapter); 5324 if (netif_running(netdev)) { 5325 err = e1000_request_irq(adapter); 5326 if (err) 5327 return err; 5328 } 5329 5330 e1000e_power_up_phy(adapter); 5331 5332 /* report the system wakeup cause from S3/S4 */ 5333 if (adapter->flags2 & FLAG2_HAS_PHY_WAKEUP) { 5334 u16 phy_data; 5335 5336 e1e_rphy(&adapter->hw, BM_WUS, &phy_data); 5337 if (phy_data) { 5338 e_info("PHY Wakeup cause - %s\n", 5339 phy_data & E1000_WUS_EX ? "Unicast Packet" : 5340 phy_data & E1000_WUS_MC ? "Multicast Packet" : 5341 phy_data & E1000_WUS_BC ? "Broadcast Packet" : 5342 phy_data & E1000_WUS_MAG ? "Magic Packet" : 5343 phy_data & E1000_WUS_LNKC ? "Link Status " 5344 " Change" : "other"); 5345 } 5346 e1e_wphy(&adapter->hw, BM_WUS, ~0); 5347 } else { 5348 u32 wus = er32(WUS); 5349 if (wus) { 5350 e_info("MAC Wakeup cause - %s\n", 5351 wus & E1000_WUS_EX ? "Unicast Packet" : 5352 wus & E1000_WUS_MC ? "Multicast Packet" : 5353 wus & E1000_WUS_BC ? "Broadcast Packet" : 5354 wus & E1000_WUS_MAG ? "Magic Packet" : 5355 wus & E1000_WUS_LNKC ? "Link Status Change" : 5356 "other"); 5357 } 5358 ew32(WUS, ~0); 5359 } 5360 5361 e1000e_reset(adapter); 5362 5363 e1000_init_manageability_pt(adapter); 5364 5365 if (netif_running(netdev)) 5366 e1000e_up(adapter); 5367 5368 netif_device_attach(netdev); 5369 5370 /* 5371 * If the controller has AMT, do not set DRV_LOAD until the interface 5372 * is up. For all other cases, let the f/w know that the h/w is now 5373 * under the control of the driver. 5374 */ 5375 if (!(adapter->flags & FLAG_HAS_AMT)) 5376 e1000_get_hw_control(adapter); 5377 5378 return 0; 5379} 5380 5381#ifdef CONFIG_PM_SLEEP 5382static int e1000_suspend(struct device *dev) 5383{ 5384 struct pci_dev *pdev = to_pci_dev(dev); 5385 int retval; 5386 bool wake; 5387 5388 retval = __e1000_shutdown(pdev, &wake, false); 5389 if (!retval) 5390 e1000_complete_shutdown(pdev, true, wake); 5391 5392 return retval; 5393} 5394 5395static int e1000_resume(struct device *dev) 5396{ 5397 struct pci_dev *pdev = to_pci_dev(dev); 5398 struct net_device *netdev = pci_get_drvdata(pdev); 5399 struct e1000_adapter *adapter = netdev_priv(netdev); 5400 5401 if (e1000e_pm_ready(adapter)) 5402 adapter->idle_check = true; 5403 5404 return __e1000_resume(pdev); 5405} 5406#endif /* CONFIG_PM_SLEEP */ 5407 5408#ifdef CONFIG_PM_RUNTIME 5409static int e1000_runtime_suspend(struct device *dev) 5410{ 5411 struct pci_dev *pdev = to_pci_dev(dev); 5412 struct net_device *netdev = pci_get_drvdata(pdev); 5413 struct e1000_adapter *adapter = netdev_priv(netdev); 5414 5415 if (e1000e_pm_ready(adapter)) { 5416 bool wake; 5417 5418 __e1000_shutdown(pdev, &wake, true); 5419 } 5420 5421 return 0; 5422} 5423 5424static int e1000_idle(struct device *dev) 5425{ 5426 struct pci_dev *pdev = to_pci_dev(dev); 5427 struct net_device *netdev = pci_get_drvdata(pdev); 5428 struct e1000_adapter *adapter = netdev_priv(netdev); 5429 5430 if (!e1000e_pm_ready(adapter)) 5431 return 0; 5432 5433 if (adapter->idle_check) { 5434 adapter->idle_check = false; 5435 if (!e1000e_has_link(adapter)) 5436 pm_schedule_suspend(dev, MSEC_PER_SEC); 5437 } 5438 5439 return -EBUSY; 5440} 5441 5442static int e1000_runtime_resume(struct device *dev) 5443{ 5444 struct pci_dev *pdev = to_pci_dev(dev); 5445 struct net_device *netdev = pci_get_drvdata(pdev); 5446 struct e1000_adapter *adapter = netdev_priv(netdev); 5447 5448 if (!e1000e_pm_ready(adapter)) 5449 return 0; 5450 5451 adapter->idle_check = !dev->power.runtime_auto; 5452 return __e1000_resume(pdev); 5453} 5454#endif /* CONFIG_PM_RUNTIME */ 5455#endif /* CONFIG_PM_OPS */ 5456 5457static void e1000_shutdown(struct pci_dev *pdev) 5458{ 5459 bool wake = false; 5460 5461 __e1000_shutdown(pdev, &wake, false); 5462 5463 if (system_state == SYSTEM_POWER_OFF) 5464 e1000_complete_shutdown(pdev, false, wake); 5465} 5466 5467#ifdef CONFIG_NET_POLL_CONTROLLER 5468/* 5469 * Polling 'interrupt' - used by things like netconsole to send skbs 5470 * without having to re-enable interrupts. It's not called while 5471 * the interrupt routine is executing. 5472 */ 5473static void e1000_netpoll(struct net_device *netdev) 5474{ 5475 struct e1000_adapter *adapter = netdev_priv(netdev); 5476 5477 disable_irq(adapter->pdev->irq); 5478 e1000_intr(adapter->pdev->irq, netdev); 5479 5480 enable_irq(adapter->pdev->irq); 5481} 5482#endif 5483 5484/** 5485 * e1000_io_error_detected - called when PCI error is detected 5486 * @pdev: Pointer to PCI device 5487 * @state: The current pci connection state 5488 * 5489 * This function is called after a PCI bus error affecting 5490 * this device has been detected. 5491 */ 5492static pci_ers_result_t e1000_io_error_detected(struct pci_dev *pdev, 5493 pci_channel_state_t state) 5494{ 5495 struct net_device *netdev = pci_get_drvdata(pdev); 5496 struct e1000_adapter *adapter = netdev_priv(netdev); 5497 5498 netif_device_detach(netdev); 5499 5500 if (state == pci_channel_io_perm_failure) 5501 return PCI_ERS_RESULT_DISCONNECT; 5502 5503 if (netif_running(netdev)) 5504 e1000e_down(adapter); 5505 pci_disable_device(pdev); 5506 5507 /* Request a slot slot reset. */ 5508 return PCI_ERS_RESULT_NEED_RESET; 5509} 5510 5511/** 5512 * e1000_io_slot_reset - called after the pci bus has been reset. 5513 * @pdev: Pointer to PCI device 5514 * 5515 * Restart the card from scratch, as if from a cold-boot. Implementation 5516 * resembles the first-half of the e1000_resume routine. 5517 */ 5518static pci_ers_result_t e1000_io_slot_reset(struct pci_dev *pdev) 5519{ 5520 struct net_device *netdev = pci_get_drvdata(pdev); 5521 struct e1000_adapter *adapter = netdev_priv(netdev); 5522 struct e1000_hw *hw = &adapter->hw; 5523 int err; 5524 pci_ers_result_t result; 5525 5526 if (adapter->flags2 & FLAG2_DISABLE_ASPM_L1) 5527 e1000e_disable_aspm(pdev, PCIE_LINK_STATE_L1); 5528 err = pci_enable_device_mem(pdev); 5529 if (err) { 5530 dev_err(&pdev->dev, 5531 "Cannot re-enable PCI device after reset.\n"); 5532 result = PCI_ERS_RESULT_DISCONNECT; 5533 } else { 5534 pci_set_master(pdev); 5535 pdev->state_saved = true; 5536 pci_restore_state(pdev); 5537 5538 pci_enable_wake(pdev, PCI_D3hot, 0); 5539 pci_enable_wake(pdev, PCI_D3cold, 0); 5540 5541 e1000e_reset(adapter); 5542 ew32(WUS, ~0); 5543 result = PCI_ERS_RESULT_RECOVERED; 5544 } 5545 5546 pci_cleanup_aer_uncorrect_error_status(pdev); 5547 5548 return result; 5549} 5550 5551/** 5552 * e1000_io_resume - called when traffic can start flowing again. 5553 * @pdev: Pointer to PCI device 5554 * 5555 * This callback is called when the error recovery driver tells us that 5556 * its OK to resume normal operation. Implementation resembles the 5557 * second-half of the e1000_resume routine. 5558 */ 5559static void e1000_io_resume(struct pci_dev *pdev) 5560{ 5561 struct net_device *netdev = pci_get_drvdata(pdev); 5562 struct e1000_adapter *adapter = netdev_priv(netdev); 5563 5564 e1000_init_manageability_pt(adapter); 5565 5566 if (netif_running(netdev)) { 5567 if (e1000e_up(adapter)) { 5568 dev_err(&pdev->dev, 5569 "can't bring device back up after reset\n"); 5570 return; 5571 } 5572 } 5573 5574 netif_device_attach(netdev); 5575 5576 /* 5577 * If the controller has AMT, do not set DRV_LOAD until the interface 5578 * is up. For all other cases, let the f/w know that the h/w is now 5579 * under the control of the driver. 5580 */ 5581 if (!(adapter->flags & FLAG_HAS_AMT)) 5582 e1000_get_hw_control(adapter); 5583 5584} 5585 5586static void e1000_print_device_info(struct e1000_adapter *adapter) 5587{ 5588 struct e1000_hw *hw = &adapter->hw; 5589 struct net_device *netdev = adapter->netdev; 5590 u32 pba_num; 5591 5592 /* print bus type/speed/width info */ 5593 e_info("(PCI Express:2.5GB/s:%s) %pM\n", 5594 /* bus width */ 5595 ((hw->bus.width == e1000_bus_width_pcie_x4) ? "Width x4" : 5596 "Width x1"), 5597 /* MAC address */ 5598 netdev->dev_addr); 5599 e_info("Intel(R) PRO/%s Network Connection\n", 5600 (hw->phy.type == e1000_phy_ife) ? "10/100" : "1000"); 5601 e1000e_read_pba_num(hw, &pba_num); 5602 e_info("MAC: %d, PHY: %d, PBA No: %06x-%03x\n", 5603 hw->mac.type, hw->phy.type, (pba_num >> 8), (pba_num & 0xff)); 5604} 5605 5606static void e1000_eeprom_checks(struct e1000_adapter *adapter) 5607{ 5608 struct e1000_hw *hw = &adapter->hw; 5609 int ret_val; 5610 u16 buf = 0; 5611 5612 if (hw->mac.type != e1000_82573) 5613 return; 5614 5615 ret_val = e1000_read_nvm(hw, NVM_INIT_CONTROL2_REG, 1, &buf); 5616 if (!ret_val && (!(le16_to_cpu(buf) & (1 << 0)))) { 5617 /* Deep Smart Power Down (DSPD) */ 5618 dev_warn(&adapter->pdev->dev, 5619 "Warning: detected DSPD enabled in EEPROM\n"); 5620 } 5621} 5622 5623static const struct net_device_ops e1000e_netdev_ops = { 5624 .ndo_open = e1000_open, 5625 .ndo_stop = e1000_close, 5626 .ndo_start_xmit = e1000_xmit_frame, 5627 .ndo_get_stats = e1000_get_stats, 5628 .ndo_set_multicast_list = e1000_set_multi, 5629 .ndo_set_mac_address = e1000_set_mac, 5630 .ndo_change_mtu = e1000_change_mtu, 5631 .ndo_do_ioctl = e1000_ioctl, 5632 .ndo_tx_timeout = e1000_tx_timeout, 5633 .ndo_validate_addr = eth_validate_addr, 5634 5635 .ndo_vlan_rx_register = e1000_vlan_rx_register, 5636 .ndo_vlan_rx_add_vid = e1000_vlan_rx_add_vid, 5637 .ndo_vlan_rx_kill_vid = e1000_vlan_rx_kill_vid, 5638#ifdef CONFIG_NET_POLL_CONTROLLER 5639 .ndo_poll_controller = e1000_netpoll, 5640#endif 5641}; 5642 5643/** 5644 * e1000_probe - Device Initialization Routine 5645 * @pdev: PCI device information struct 5646 * @ent: entry in e1000_pci_tbl 5647 * 5648 * Returns 0 on success, negative on failure 5649 * 5650 * e1000_probe initializes an adapter identified by a pci_dev structure. 5651 * The OS initialization, configuring of the adapter private structure, 5652 * and a hardware reset occur. 5653 **/ 5654static int __devinit e1000_probe(struct pci_dev *pdev, 5655 const struct pci_device_id *ent) 5656{ 5657 struct net_device *netdev; 5658 struct e1000_adapter *adapter; 5659 struct e1000_hw *hw; 5660 const struct e1000_info *ei = e1000_info_tbl[ent->driver_data]; 5661 resource_size_t mmio_start, mmio_len; 5662 resource_size_t flash_start, flash_len; 5663 5664 static int cards_found; 5665 int i, err, pci_using_dac; 5666 u16 eeprom_data = 0; 5667 u16 eeprom_apme_mask = E1000_EEPROM_APME; 5668 5669 if (ei->flags2 & FLAG2_DISABLE_ASPM_L1) 5670 e1000e_disable_aspm(pdev, PCIE_LINK_STATE_L1); 5671 5672 err = pci_enable_device_mem(pdev); 5673 if (err) 5674 return err; 5675 5676 pci_using_dac = 0; 5677 err = dma_set_mask(&pdev->dev, DMA_BIT_MASK(64)); 5678 if (!err) { 5679 err = dma_set_coherent_mask(&pdev->dev, DMA_BIT_MASK(64)); 5680 if (!err) 5681 pci_using_dac = 1; 5682 } else { 5683 err = dma_set_mask(&pdev->dev, DMA_BIT_MASK(32)); 5684 if (err) { 5685 err = dma_set_coherent_mask(&pdev->dev, 5686 DMA_BIT_MASK(32)); 5687 if (err) { 5688 dev_err(&pdev->dev, "No usable DMA " 5689 "configuration, aborting\n"); 5690 goto err_dma; 5691 } 5692 } 5693 } 5694 5695 err = pci_request_selected_regions_exclusive(pdev, 5696 pci_select_bars(pdev, IORESOURCE_MEM), 5697 e1000e_driver_name); 5698 if (err) 5699 goto err_pci_reg; 5700 5701 /* AER (Advanced Error Reporting) hooks */ 5702 pci_enable_pcie_error_reporting(pdev); 5703 5704 pci_set_master(pdev); 5705 /* PCI config space info */ 5706 err = pci_save_state(pdev); 5707 if (err) 5708 goto err_alloc_etherdev; 5709 5710 err = -ENOMEM; 5711 netdev = alloc_etherdev(sizeof(struct e1000_adapter)); 5712 if (!netdev) 5713 goto err_alloc_etherdev; 5714 5715 SET_NETDEV_DEV(netdev, &pdev->dev); 5716 5717 netdev->irq = pdev->irq; 5718 5719 pci_set_drvdata(pdev, netdev); 5720 adapter = netdev_priv(netdev); 5721 hw = &adapter->hw; 5722 adapter->netdev = netdev; 5723 adapter->pdev = pdev; 5724 adapter->ei = ei; 5725 adapter->pba = ei->pba; 5726 adapter->flags = ei->flags; 5727 adapter->flags2 = ei->flags2; 5728 adapter->hw.adapter = adapter; 5729 adapter->hw.mac.type = ei->mac; 5730 adapter->max_hw_frame_size = ei->max_hw_frame_size; 5731 adapter->msg_enable = (1 << NETIF_MSG_DRV | NETIF_MSG_PROBE) - 1; 5732 5733 mmio_start = pci_resource_start(pdev, 0); 5734 mmio_len = pci_resource_len(pdev, 0); 5735 5736 err = -EIO; 5737 adapter->hw.hw_addr = ioremap(mmio_start, mmio_len); 5738 if (!adapter->hw.hw_addr) 5739 goto err_ioremap; 5740 5741 if ((adapter->flags & FLAG_HAS_FLASH) && 5742 (pci_resource_flags(pdev, 1) & IORESOURCE_MEM)) { 5743 flash_start = pci_resource_start(pdev, 1); 5744 flash_len = pci_resource_len(pdev, 1); 5745 adapter->hw.flash_address = ioremap(flash_start, flash_len); 5746 if (!adapter->hw.flash_address) 5747 goto err_flashmap; 5748 } 5749 5750 /* construct the net_device struct */ 5751 netdev->netdev_ops = &e1000e_netdev_ops; 5752 e1000e_set_ethtool_ops(netdev); 5753 netdev->watchdog_timeo = 5 * HZ; 5754 netif_napi_add(netdev, &adapter->napi, e1000_clean, 64); 5755 strncpy(netdev->name, pci_name(pdev), sizeof(netdev->name) - 1); 5756 5757 netdev->mem_start = mmio_start; 5758 netdev->mem_end = mmio_start + mmio_len; 5759 5760 adapter->bd_number = cards_found++; 5761 5762 e1000e_check_options(adapter); 5763 5764 /* setup adapter struct */ 5765 err = e1000_sw_init(adapter); 5766 if (err) 5767 goto err_sw_init; 5768 5769 memcpy(&hw->mac.ops, ei->mac_ops, sizeof(hw->mac.ops)); 5770 memcpy(&hw->nvm.ops, ei->nvm_ops, sizeof(hw->nvm.ops)); 5771 memcpy(&hw->phy.ops, ei->phy_ops, sizeof(hw->phy.ops)); 5772 5773 err = ei->get_variants(adapter); 5774 if (err) 5775 goto err_hw_init; 5776 5777 if ((adapter->flags & FLAG_IS_ICH) && 5778 (adapter->flags & FLAG_READ_ONLY_NVM)) 5779 e1000e_write_protect_nvm_ich8lan(&adapter->hw); 5780 5781 hw->mac.ops.get_bus_info(&adapter->hw); 5782 5783 adapter->hw.phy.autoneg_wait_to_complete = 0; 5784 5785 /* Copper options */ 5786 if (adapter->hw.phy.media_type == e1000_media_type_copper) { 5787 adapter->hw.phy.mdix = AUTO_ALL_MODES; 5788 adapter->hw.phy.disable_polarity_correction = 0; 5789 adapter->hw.phy.ms_type = e1000_ms_hw_default; 5790 } 5791 5792 if (e1000_check_reset_block(&adapter->hw)) 5793 e_info("PHY reset is blocked due to SOL/IDER session.\n"); 5794 5795 netdev->features = NETIF_F_SG | 5796 NETIF_F_HW_CSUM | 5797 NETIF_F_HW_VLAN_TX | 5798 NETIF_F_HW_VLAN_RX; 5799 5800 if (adapter->flags & FLAG_HAS_HW_VLAN_FILTER) 5801 netdev->features |= NETIF_F_HW_VLAN_FILTER; 5802 5803 netdev->features |= NETIF_F_TSO; 5804 netdev->features |= NETIF_F_TSO6; 5805 5806 netdev->vlan_features |= NETIF_F_TSO; 5807 netdev->vlan_features |= NETIF_F_TSO6; 5808 netdev->vlan_features |= NETIF_F_HW_CSUM; 5809 netdev->vlan_features |= NETIF_F_SG; 5810 5811 if (pci_using_dac) { 5812 netdev->features |= NETIF_F_HIGHDMA; 5813 netdev->vlan_features |= NETIF_F_HIGHDMA; 5814 } 5815 5816 if (e1000e_enable_mng_pass_thru(&adapter->hw)) 5817 adapter->flags |= FLAG_MNG_PT_ENABLED; 5818 5819 /* 5820 * before reading the NVM, reset the controller to 5821 * put the device in a known good starting state 5822 */ 5823 adapter->hw.mac.ops.reset_hw(&adapter->hw); 5824 5825 /* 5826 * systems with ASPM and others may see the checksum fail on the first 5827 * attempt. Let's give it a few tries 5828 */ 5829 for (i = 0;; i++) { 5830 if (e1000_validate_nvm_checksum(&adapter->hw) >= 0) 5831 break; 5832 if (i == 2) { 5833 e_err("The NVM Checksum Is Not Valid\n"); 5834 err = -EIO; 5835 goto err_eeprom; 5836 } 5837 } 5838 5839 e1000_eeprom_checks(adapter); 5840 5841 /* copy the MAC address */ 5842 if (e1000e_read_mac_addr(&adapter->hw)) 5843 e_err("NVM Read Error while reading MAC address\n"); 5844 5845 memcpy(netdev->dev_addr, adapter->hw.mac.addr, netdev->addr_len); 5846 memcpy(netdev->perm_addr, adapter->hw.mac.addr, netdev->addr_len); 5847 5848 if (!is_valid_ether_addr(netdev->perm_addr)) { 5849 e_err("Invalid MAC Address: %pM\n", netdev->perm_addr); 5850 err = -EIO; 5851 goto err_eeprom; 5852 } 5853 5854 init_timer(&adapter->watchdog_timer); 5855 adapter->watchdog_timer.function = e1000_watchdog; 5856 adapter->watchdog_timer.data = (unsigned long) adapter; 5857 5858 init_timer(&adapter->phy_info_timer); 5859 adapter->phy_info_timer.function = e1000_update_phy_info; 5860 adapter->phy_info_timer.data = (unsigned long) adapter; 5861 5862 INIT_WORK(&adapter->reset_task, e1000_reset_task); 5863 INIT_WORK(&adapter->watchdog_task, e1000_watchdog_task); 5864 INIT_WORK(&adapter->downshift_task, e1000e_downshift_workaround); 5865 INIT_WORK(&adapter->update_phy_task, e1000e_update_phy_task); 5866 INIT_WORK(&adapter->print_hang_task, e1000_print_hw_hang); 5867 5868 /* Initialize link parameters. User can change them with ethtool */ 5869 adapter->hw.mac.autoneg = 1; 5870 adapter->fc_autoneg = 1; 5871 adapter->hw.fc.requested_mode = e1000_fc_default; 5872 adapter->hw.fc.current_mode = e1000_fc_default; 5873 adapter->hw.phy.autoneg_advertised = 0x2f; 5874 5875 /* ring size defaults */ 5876 adapter->rx_ring->count = 256; 5877 adapter->tx_ring->count = 256; 5878 5879 /* 5880 * Initial Wake on LAN setting - If APM wake is enabled in 5881 * the EEPROM, enable the ACPI Magic Packet filter 5882 */ 5883 if (adapter->flags & FLAG_APME_IN_WUC) { 5884 /* APME bit in EEPROM is mapped to WUC.APME */ 5885 eeprom_data = er32(WUC); 5886 eeprom_apme_mask = E1000_WUC_APME; 5887 if (eeprom_data & E1000_WUC_PHY_WAKE) 5888 adapter->flags2 |= FLAG2_HAS_PHY_WAKEUP; 5889 } else if (adapter->flags & FLAG_APME_IN_CTRL3) { 5890 if (adapter->flags & FLAG_APME_CHECK_PORT_B && 5891 (adapter->hw.bus.func == 1)) 5892 e1000_read_nvm(&adapter->hw, 5893 NVM_INIT_CONTROL3_PORT_B, 1, &eeprom_data); 5894 else 5895 e1000_read_nvm(&adapter->hw, 5896 NVM_INIT_CONTROL3_PORT_A, 1, &eeprom_data); 5897 } 5898 5899 /* fetch WoL from EEPROM */ 5900 if (eeprom_data & eeprom_apme_mask) 5901 adapter->eeprom_wol |= E1000_WUFC_MAG; 5902 5903 /* 5904 * now that we have the eeprom settings, apply the special cases 5905 * where the eeprom may be wrong or the board simply won't support 5906 * wake on lan on a particular port 5907 */ 5908 if (!(adapter->flags & FLAG_HAS_WOL)) 5909 adapter->eeprom_wol = 0; 5910 5911 /* initialize the wol settings based on the eeprom settings */ 5912 adapter->wol = adapter->eeprom_wol; 5913 device_set_wakeup_enable(&adapter->pdev->dev, adapter->wol); 5914 5915 /* save off EEPROM version number */ 5916 e1000_read_nvm(&adapter->hw, 5, 1, &adapter->eeprom_vers); 5917 5918 /* reset the hardware with the new settings */ 5919 e1000e_reset(adapter); 5920 5921 /* 5922 * If the controller has AMT, do not set DRV_LOAD until the interface 5923 * is up. For all other cases, let the f/w know that the h/w is now 5924 * under the control of the driver. 5925 */ 5926 if (!(adapter->flags & FLAG_HAS_AMT)) 5927 e1000_get_hw_control(adapter); 5928 5929 strcpy(netdev->name, "eth%d"); 5930 err = register_netdev(netdev); 5931 if (err) 5932 goto err_register; 5933 5934 /* carrier off reporting is important to ethtool even BEFORE open */ 5935 netif_carrier_off(netdev); 5936 5937 e1000_print_device_info(adapter); 5938 5939 if (pci_dev_run_wake(pdev)) 5940 pm_runtime_put_noidle(&pdev->dev); 5941 5942 return 0; 5943 5944err_register: 5945 if (!(adapter->flags & FLAG_HAS_AMT)) 5946 e1000_release_hw_control(adapter); 5947err_eeprom: 5948 if (!e1000_check_reset_block(&adapter->hw)) 5949 e1000_phy_hw_reset(&adapter->hw); 5950err_hw_init: 5951 5952 kfree(adapter->tx_ring); 5953 kfree(adapter->rx_ring); 5954err_sw_init: 5955 if (adapter->hw.flash_address) 5956 iounmap(adapter->hw.flash_address); 5957 e1000e_reset_interrupt_capability(adapter); 5958err_flashmap: 5959 iounmap(adapter->hw.hw_addr); 5960err_ioremap: 5961 free_netdev(netdev); 5962err_alloc_etherdev: 5963 pci_release_selected_regions(pdev, 5964 pci_select_bars(pdev, IORESOURCE_MEM)); 5965err_pci_reg: 5966err_dma: 5967 pci_disable_device(pdev); 5968 return err; 5969} 5970 5971/** 5972 * e1000_remove - Device Removal Routine 5973 * @pdev: PCI device information struct 5974 * 5975 * e1000_remove is called by the PCI subsystem to alert the driver 5976 * that it should release a PCI device. The could be caused by a 5977 * Hot-Plug event, or because the driver is going to be removed from 5978 * memory. 5979 **/ 5980static void __devexit e1000_remove(struct pci_dev *pdev) 5981{ 5982 struct net_device *netdev = pci_get_drvdata(pdev); 5983 struct e1000_adapter *adapter = netdev_priv(netdev); 5984 bool down = test_bit(__E1000_DOWN, &adapter->state); 5985 5986 /* 5987 * flush_scheduled work may reschedule our watchdog task, so 5988 * explicitly disable watchdog tasks from being rescheduled 5989 */ 5990 if (!down) 5991 set_bit(__E1000_DOWN, &adapter->state); 5992 del_timer_sync(&adapter->watchdog_timer); 5993 del_timer_sync(&adapter->phy_info_timer); 5994 5995 cancel_work_sync(&adapter->reset_task); 5996 cancel_work_sync(&adapter->watchdog_task); 5997 cancel_work_sync(&adapter->downshift_task); 5998 cancel_work_sync(&adapter->update_phy_task); 5999 cancel_work_sync(&adapter->print_hang_task); 6000 flush_scheduled_work(); 6001 6002 if (!(netdev->flags & IFF_UP)) 6003 e1000_power_down_phy(adapter); 6004 6005 /* Don't lie to e1000_close() down the road. */ 6006 if (!down) 6007 clear_bit(__E1000_DOWN, &adapter->state); 6008 unregister_netdev(netdev); 6009 6010 if (pci_dev_run_wake(pdev)) 6011 pm_runtime_get_noresume(&pdev->dev); 6012 6013 /* 6014 * Release control of h/w to f/w. If f/w is AMT enabled, this 6015 * would have already happened in close and is redundant. 6016 */ 6017 e1000_release_hw_control(adapter); 6018 6019 e1000e_reset_interrupt_capability(adapter); 6020 kfree(adapter->tx_ring); 6021 kfree(adapter->rx_ring); 6022 6023 iounmap(adapter->hw.hw_addr); 6024 if (adapter->hw.flash_address) 6025 iounmap(adapter->hw.flash_address); 6026 pci_release_selected_regions(pdev, 6027 pci_select_bars(pdev, IORESOURCE_MEM)); 6028 6029 free_netdev(netdev); 6030 6031 /* AER disable */ 6032 pci_disable_pcie_error_reporting(pdev); 6033 6034 pci_disable_device(pdev); 6035} 6036 6037/* PCI Error Recovery (ERS) */ 6038static struct pci_error_handlers e1000_err_handler = { 6039 .error_detected = e1000_io_error_detected, 6040 .slot_reset = e1000_io_slot_reset, 6041 .resume = e1000_io_resume, 6042}; 6043 6044static DEFINE_PCI_DEVICE_TABLE(e1000_pci_tbl) = { 6045 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82571EB_COPPER), board_82571 }, 6046 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82571EB_FIBER), board_82571 }, 6047 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82571EB_QUAD_COPPER), board_82571 }, 6048 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82571EB_QUAD_COPPER_LP), board_82571 }, 6049 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82571EB_QUAD_FIBER), board_82571 }, 6050 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82571EB_SERDES), board_82571 }, 6051 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82571EB_SERDES_DUAL), board_82571 }, 6052 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82571EB_SERDES_QUAD), board_82571 }, 6053 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82571PT_QUAD_COPPER), board_82571 }, 6054 6055 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82572EI), board_82572 }, 6056 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82572EI_COPPER), board_82572 }, 6057 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82572EI_FIBER), board_82572 }, 6058 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82572EI_SERDES), board_82572 }, 6059 6060 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82573E), board_82573 }, 6061 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82573E_IAMT), board_82573 }, 6062 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82573L), board_82573 }, 6063 6064 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82574L), board_82574 }, 6065 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82574LA), board_82574 }, 6066 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82583V), board_82583 }, 6067 6068 { PCI_VDEVICE(INTEL, E1000_DEV_ID_80003ES2LAN_COPPER_DPT), 6069 board_80003es2lan }, 6070 { PCI_VDEVICE(INTEL, E1000_DEV_ID_80003ES2LAN_COPPER_SPT), 6071 board_80003es2lan }, 6072 { PCI_VDEVICE(INTEL, E1000_DEV_ID_80003ES2LAN_SERDES_DPT), 6073 board_80003es2lan }, 6074 { PCI_VDEVICE(INTEL, E1000_DEV_ID_80003ES2LAN_SERDES_SPT), 6075 board_80003es2lan }, 6076 6077 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH8_IFE), board_ich8lan }, 6078 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH8_IFE_G), board_ich8lan }, 6079 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH8_IFE_GT), board_ich8lan }, 6080 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH8_IGP_AMT), board_ich8lan }, 6081 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH8_IGP_C), board_ich8lan }, 6082 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH8_IGP_M), board_ich8lan }, 6083 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH8_IGP_M_AMT), board_ich8lan }, 6084 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH8_82567V_3), board_ich8lan }, 6085 6086 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH9_IFE), board_ich9lan }, 6087 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH9_IFE_G), board_ich9lan }, 6088 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH9_IFE_GT), board_ich9lan }, 6089 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH9_IGP_AMT), board_ich9lan }, 6090 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH9_IGP_C), board_ich9lan }, 6091 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH9_BM), board_ich9lan }, 6092 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH9_IGP_M), board_ich9lan }, 6093 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH9_IGP_M_AMT), board_ich9lan }, 6094 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH9_IGP_M_V), board_ich9lan }, 6095 6096 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH10_R_BM_LM), board_ich9lan }, 6097 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH10_R_BM_LF), board_ich9lan }, 6098 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH10_R_BM_V), board_ich9lan }, 6099 6100 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH10_D_BM_LM), board_ich10lan }, 6101 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH10_D_BM_LF), board_ich10lan }, 6102 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH10_D_BM_V), board_ich10lan }, 6103 6104 { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_M_HV_LM), board_pchlan }, 6105 { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_M_HV_LC), board_pchlan }, 6106 { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_D_HV_DM), board_pchlan }, 6107 { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_D_HV_DC), board_pchlan }, 6108 6109 { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH2_LV_LM), board_pch2lan }, 6110 { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH2_LV_V), board_pch2lan }, 6111 6112 { } /* terminate list */ 6113}; 6114MODULE_DEVICE_TABLE(pci, e1000_pci_tbl); 6115 6116#ifdef CONFIG_PM_OPS 6117static const struct dev_pm_ops e1000_pm_ops = { 6118 SET_SYSTEM_SLEEP_PM_OPS(e1000_suspend, e1000_resume) 6119 SET_RUNTIME_PM_OPS(e1000_runtime_suspend, 6120 e1000_runtime_resume, e1000_idle) 6121}; 6122#endif 6123 6124/* PCI Device API Driver */ 6125static struct pci_driver e1000_driver = { 6126 .name = e1000e_driver_name, 6127 .id_table = e1000_pci_tbl, 6128 .probe = e1000_probe, 6129 .remove = __devexit_p(e1000_remove), 6130#ifdef CONFIG_PM_OPS 6131 .driver.pm = &e1000_pm_ops, 6132#endif 6133 .shutdown = e1000_shutdown, 6134 .err_handler = &e1000_err_handler 6135}; 6136 6137/** 6138 * e1000_init_module - Driver Registration Routine 6139 * 6140 * e1000_init_module is the first routine called when the driver is 6141 * loaded. All it does is register with the PCI subsystem. 6142 **/ 6143static int __init e1000_init_module(void) 6144{ 6145 int ret; 6146 pr_info("Intel(R) PRO/1000 Network Driver - %s\n", 6147 e1000e_driver_version); 6148 pr_info("Copyright (c) 1999 - 2010 Intel Corporation.\n"); 6149 ret = pci_register_driver(&e1000_driver); 6150 6151 return ret; 6152} 6153module_init(e1000_init_module); 6154 6155/** 6156 * e1000_exit_module - Driver Exit Cleanup Routine 6157 * 6158 * e1000_exit_module is called just before the driver is removed 6159 * from memory. 6160 **/ 6161static void __exit e1000_exit_module(void) 6162{ 6163 pci_unregister_driver(&e1000_driver); 6164} 6165module_exit(e1000_exit_module); 6166 6167 6168MODULE_AUTHOR("Intel Corporation, <linux.nics@intel.com>"); 6169MODULE_DESCRIPTION("Intel(R) PRO/1000 Network Driver"); 6170MODULE_LICENSE("GPL"); 6171MODULE_VERSION(DRV_VERSION); 6172 6173/* e1000_main.c */