Linux kernel mirror (for testing)
git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel
os
linux
1/*
2 * Blackfin low-level cache routines
3 *
4 * Copyright 2004-2009 Analog Devices Inc.
5 *
6 * Licensed under the GPL-2 or later.
7 */
8
9#ifndef _BLACKFIN_CACHEFLUSH_H
10#define _BLACKFIN_CACHEFLUSH_H
11
12#include <asm/blackfin.h> /* for SSYNC() */
13#include <asm/sections.h> /* for _ramend */
14
15extern void blackfin_icache_flush_range(unsigned long start_address, unsigned long end_address);
16extern void blackfin_dcache_flush_range(unsigned long start_address, unsigned long end_address);
17extern void blackfin_dcache_invalidate_range(unsigned long start_address, unsigned long end_address);
18extern void blackfin_dflush_page(void *page);
19extern void blackfin_invalidate_entire_dcache(void);
20extern void blackfin_invalidate_entire_icache(void);
21
22#define flush_dcache_mmap_lock(mapping) do { } while (0)
23#define flush_dcache_mmap_unlock(mapping) do { } while (0)
24#define flush_cache_mm(mm) do { } while (0)
25#define flush_cache_range(vma, start, end) do { } while (0)
26#define flush_cache_page(vma, vmaddr) do { } while (0)
27#define flush_cache_vmap(start, end) do { } while (0)
28#define flush_cache_vunmap(start, end) do { } while (0)
29
30#ifdef CONFIG_SMP
31#define flush_icache_range_others(start, end) \
32 smp_icache_flush_range_others((start), (end))
33#else
34#define flush_icache_range_others(start, end) do { } while (0)
35#endif
36
37static inline void flush_icache_range(unsigned start, unsigned end)
38{
39#if defined(CONFIG_BFIN_EXTMEM_WRITEBACK) || defined(CONFIG_BFIN_L2_WRITEBACK)
40 blackfin_dcache_flush_range(start, end);
41#endif
42
43 /* Make sure all write buffers in the data side of the core
44 * are flushed before trying to invalidate the icache. This
45 * needs to be after the data flush and before the icache
46 * flush so that the SSYNC does the right thing in preventing
47 * the instruction prefetcher from hitting things in cached
48 * memory at the wrong time -- it runs much further ahead than
49 * the pipeline.
50 */
51 SSYNC();
52#if defined(CONFIG_BFIN_ICACHE)
53 blackfin_icache_flush_range(start, end);
54 flush_icache_range_others(start, end);
55#endif
56}
57
58#define copy_to_user_page(vma, page, vaddr, dst, src, len) \
59do { memcpy(dst, src, len); \
60 flush_icache_range((unsigned) (dst), (unsigned) (dst) + (len)); \
61} while (0)
62
63#define copy_from_user_page(vma, page, vaddr, dst, src, len) memcpy(dst, src, len)
64
65#if defined(CONFIG_BFIN_DCACHE)
66# define invalidate_dcache_range(start,end) blackfin_dcache_invalidate_range((start), (end))
67#else
68# define invalidate_dcache_range(start,end) do { } while (0)
69#endif
70#if defined(CONFIG_BFIN_EXTMEM_WRITEBACK) || defined(CONFIG_BFIN_L2_WRITEBACK)
71# define flush_dcache_range(start,end) blackfin_dcache_flush_range((start), (end))
72#define ARCH_IMPLEMENTS_FLUSH_DCACHE_PAGE 1
73# define flush_dcache_page(page) blackfin_dflush_page(page_address(page))
74#else
75# define flush_dcache_range(start,end) do { } while (0)
76#define ARCH_IMPLEMENTS_FLUSH_DCACHE_PAGE 0
77# define flush_dcache_page(page) do { } while (0)
78#endif
79
80extern unsigned long reserved_mem_dcache_on;
81extern unsigned long reserved_mem_icache_on;
82
83static inline int bfin_addr_dcacheable(unsigned long addr)
84{
85#ifdef CONFIG_BFIN_EXTMEM_DCACHEABLE
86 if (addr < (_ramend - DMA_UNCACHED_REGION))
87 return 1;
88#endif
89
90 if (reserved_mem_dcache_on &&
91 addr >= _ramend && addr < physical_mem_end)
92 return 1;
93
94#ifdef CONFIG_BFIN_L2_DCACHEABLE
95 if (addr >= L2_START && addr < L2_START + L2_LENGTH)
96 return 1;
97#endif
98
99 return 0;
100}
101
102#endif /* _BLACKFIN_ICACHEFLUSH_H */