tjh.dev
Linux kernel mirror (for testing)
git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel
os
linux
1#ifndef MFD_TMIO_H
2#define MFD_TMIO_H
3
4#include <linux/fb.h>
5#include <linux/io.h>
6#include <linux/platform_device.h>
7
8#define tmio_ioread8(addr) readb(addr)
9#define tmio_ioread16(addr) readw(addr)
10#define tmio_ioread16_rep(r, b, l) readsw(r, b, l)
11#define tmio_ioread32(addr) \
12 (((u32) readw((addr))) | (((u32) readw((addr) + 2)) << 16))
13
14#define tmio_iowrite8(val, addr) writeb((val), (addr))
15#define tmio_iowrite16(val, addr) writew((val), (addr))
16#define tmio_iowrite16_rep(r, b, l) writesw(r, b, l)
17#define tmio_iowrite32(val, addr) \
18 do { \
19 writew((val), (addr)); \
20 writew((val) >> 16, (addr) + 2); \
21 } while (0)
22
23#define CNF_CMD 0x04
24#define CNF_CTL_BASE 0x10
25#define CNF_INT_PIN 0x3d
26#define CNF_STOP_CLK_CTL 0x40
27#define CNF_GCLK_CTL 0x41
28#define CNF_SD_CLK_MODE 0x42
29#define CNF_PIN_STATUS 0x44
30#define CNF_PWR_CTL_1 0x48
31#define CNF_PWR_CTL_2 0x49
32#define CNF_PWR_CTL_3 0x4a
33#define CNF_CARD_DETECT_MODE 0x4c
34#define CNF_SD_SLOT 0x50
35#define CNF_EXT_GCLK_CTL_1 0xf0
36#define CNF_EXT_GCLK_CTL_2 0xf1
37#define CNF_EXT_GCLK_CTL_3 0xf9
38#define CNF_SD_LED_EN_1 0xfa
39#define CNF_SD_LED_EN_2 0xfe
40
41#define SDCREN 0x2 /* Enable access to MMC CTL regs. (flag in COMMAND_REG)*/
42
43#define sd_config_write8(base, shift, reg, val) \
44 tmio_iowrite8((val), (base) + ((reg) << (shift)))
45#define sd_config_write16(base, shift, reg, val) \
46 tmio_iowrite16((val), (base) + ((reg) << (shift)))
47#define sd_config_write32(base, shift, reg, val) \
48 do { \
49 tmio_iowrite16((val), (base) + ((reg) << (shift))); \
50 tmio_iowrite16((val) >> 16, (base) + ((reg + 2) << (shift))); \
51 } while (0)
52
53/* tmio MMC platform flags */
54#define TMIO_MMC_WRPROTECT_DISABLE (1 << 0)
55
56int tmio_core_mmc_enable(void __iomem *cnf, int shift, unsigned long base);
57int tmio_core_mmc_resume(void __iomem *cnf, int shift, unsigned long base);
58void tmio_core_mmc_pwr(void __iomem *cnf, int shift, int state);
59void tmio_core_mmc_clk_div(void __iomem *cnf, int shift, int state);
60
61struct tmio_mmc_dma {
62 void *chan_priv_tx;
63 void *chan_priv_rx;
64};
65
66/*
67 * data for the MMC controller
68 */
69struct tmio_mmc_data {
70 unsigned int hclk;
71 unsigned long capabilities;
72 unsigned long flags;
73 u32 ocr_mask; /* available voltages */
74 struct tmio_mmc_dma *dma;
75 void (*set_pwr)(struct platform_device *host, int state);
76 void (*set_clk_div)(struct platform_device *host, int state);
77};
78
79/*
80 * data for the NAND controller
81 */
82struct tmio_nand_data {
83 struct nand_bbt_descr *badblock_pattern;
84 struct mtd_partition *partition;
85 unsigned int num_partitions;
86};
87
88#define FBIO_TMIO_ACC_WRITE 0x7C639300
89#define FBIO_TMIO_ACC_SYNC 0x7C639301
90
91struct tmio_fb_data {
92 int (*lcd_set_power)(struct platform_device *fb_dev,
93 bool on);
94 int (*lcd_mode)(struct platform_device *fb_dev,
95 const struct fb_videomode *mode);
96 int num_modes;
97 struct fb_videomode *modes;
98
99 /* in mm: size of screen */
100 int height;
101 int width;
102};
103
104
105#endif