tjh.dev
Linux kernel mirror (for testing)
git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel
os
linux
1#ifndef __ASM_SH_PCI_H
2#define __ASM_SH_PCI_H
3
4#ifdef __KERNEL__
5
6/* Can be used to override the logic in pci_scan_bus for skipping
7 already-configured bus numbers - to be used for buggy BIOSes
8 or architectures with incomplete PCI setup by the loader */
9
10#define pcibios_assign_all_busses() 1
11
12/*
13 * A board can define one or more PCI channels that represent built-in (or
14 * external) PCI controllers.
15 */
16struct pci_channel {
17 struct pci_channel *next;
18 struct pci_bus *bus;
19
20 struct pci_ops *pci_ops;
21
22 struct resource *resources;
23 unsigned int nr_resources;
24
25 unsigned long io_offset;
26 unsigned long mem_offset;
27
28 unsigned long reg_base;
29 unsigned long io_map_base;
30
31 unsigned int index;
32 unsigned int need_domain_info;
33
34 /* Optional error handling */
35 struct timer_list err_timer, serr_timer;
36 unsigned int err_irq, serr_irq;
37};
38
39/* arch/sh/drivers/pci/pci.c */
40extern int register_pci_controller(struct pci_channel *hose);
41extern void pcibios_report_status(unsigned int status_mask, int warn);
42
43/* arch/sh/drivers/pci/common.c */
44extern int early_read_config_byte(struct pci_channel *hose, int top_bus,
45 int bus, int devfn, int offset, u8 *value);
46extern int early_read_config_word(struct pci_channel *hose, int top_bus,
47 int bus, int devfn, int offset, u16 *value);
48extern int early_read_config_dword(struct pci_channel *hose, int top_bus,
49 int bus, int devfn, int offset, u32 *value);
50extern int early_write_config_byte(struct pci_channel *hose, int top_bus,
51 int bus, int devfn, int offset, u8 value);
52extern int early_write_config_word(struct pci_channel *hose, int top_bus,
53 int bus, int devfn, int offset, u16 value);
54extern int early_write_config_dword(struct pci_channel *hose, int top_bus,
55 int bus, int devfn, int offset, u32 value);
56extern void pcibios_enable_timers(struct pci_channel *hose);
57extern unsigned int pcibios_handle_status_errors(unsigned long addr,
58 unsigned int status, struct pci_channel *hose);
59extern int pci_is_66mhz_capable(struct pci_channel *hose,
60 int top_bus, int current_bus);
61
62extern unsigned long PCIBIOS_MIN_IO, PCIBIOS_MIN_MEM;
63
64struct pci_dev;
65
66#define HAVE_PCI_MMAP
67extern int pci_mmap_page_range(struct pci_dev *dev, struct vm_area_struct *vma,
68 enum pci_mmap_state mmap_state, int write_combine);
69extern void pcibios_set_master(struct pci_dev *dev);
70
71static inline void pcibios_penalize_isa_irq(int irq, int active)
72{
73 /* We don't do dynamic PCI IRQ allocation */
74}
75
76/* Dynamic DMA mapping stuff.
77 * SuperH has everything mapped statically like x86.
78 */
79
80/* The PCI address space does equal the physical memory
81 * address space. The networking and block device layers use
82 * this boolean for bounce buffer decisions.
83 */
84#define PCI_DMA_BUS_IS_PHYS (dma_ops->is_phys)
85
86#ifdef CONFIG_PCI
87/*
88 * None of the SH PCI controllers support MWI, it is always treated as a
89 * direct memory write.
90 */
91#define PCI_DISABLE_MWI
92
93static inline void pci_dma_burst_advice(struct pci_dev *pdev,
94 enum pci_dma_burst_strategy *strat,
95 unsigned long *strategy_parameter)
96{
97 unsigned long cacheline_size;
98 u8 byte;
99
100 pci_read_config_byte(pdev, PCI_CACHE_LINE_SIZE, &byte);
101
102 if (byte == 0)
103 cacheline_size = L1_CACHE_BYTES;
104 else
105 cacheline_size = byte << 2;
106
107 *strat = PCI_DMA_BURST_MULTIPLE;
108 *strategy_parameter = cacheline_size;
109}
110#endif
111
112/* Board-specific fixup routines. */
113int pcibios_map_platform_irq(struct pci_dev *dev, u8 slot, u8 pin);
114
115extern void pcibios_resource_to_bus(struct pci_dev *dev,
116 struct pci_bus_region *region, struct resource *res);
117
118extern void pcibios_bus_to_resource(struct pci_dev *dev, struct resource *res,
119 struct pci_bus_region *region);
120
121#define pci_domain_nr(bus) ((struct pci_channel *)(bus)->sysdata)->index
122
123static inline int pci_proc_domain(struct pci_bus *bus)
124{
125 struct pci_channel *hose = bus->sysdata;
126 return hose->need_domain_info;
127}
128
129/* Chances are this interrupt is wired PC-style ... */
130static inline int pci_get_legacy_ide_irq(struct pci_dev *dev, int channel)
131{
132 return channel ? 15 : 14;
133}
134
135/* generic DMA-mapping stuff */
136#include <asm-generic/pci-dma-compat.h>
137
138#endif /* __KERNEL__ */
139#endif /* __ASM_SH_PCI_H */
140