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1/* 2 * 3 * Alchemy Au1x00 ethernet driver 4 * 5 * Copyright 2001-2003, 2006 MontaVista Software Inc. 6 * Copyright 2002 TimeSys Corp. 7 * Added ethtool/mii-tool support, 8 * Copyright 2004 Matt Porter <mporter@kernel.crashing.org> 9 * Update: 2004 Bjoern Riemer, riemer@fokus.fraunhofer.de 10 * or riemer@riemer-nt.de: fixed the link beat detection with 11 * ioctls (SIOCGMIIPHY) 12 * Copyright 2006 Herbert Valerio Riedel <hvr@gnu.org> 13 * converted to use linux-2.6.x's PHY framework 14 * 15 * Author: MontaVista Software, Inc. 16 * ppopov@mvista.com or source@mvista.com 17 * 18 * ######################################################################## 19 * 20 * This program is free software; you can distribute it and/or modify it 21 * under the terms of the GNU General Public License (Version 2) as 22 * published by the Free Software Foundation. 23 * 24 * This program is distributed in the hope it will be useful, but WITHOUT 25 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or 26 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License 27 * for more details. 28 * 29 * You should have received a copy of the GNU General Public License along 30 * with this program; if not, write to the Free Software Foundation, Inc., 31 * 59 Temple Place - Suite 330, Boston MA 02111-1307, USA. 32 * 33 * ######################################################################## 34 * 35 * 36 */ 37#include <linux/capability.h> 38#include <linux/dma-mapping.h> 39#include <linux/module.h> 40#include <linux/kernel.h> 41#include <linux/string.h> 42#include <linux/timer.h> 43#include <linux/errno.h> 44#include <linux/in.h> 45#include <linux/ioport.h> 46#include <linux/bitops.h> 47#include <linux/slab.h> 48#include <linux/interrupt.h> 49#include <linux/init.h> 50#include <linux/netdevice.h> 51#include <linux/etherdevice.h> 52#include <linux/ethtool.h> 53#include <linux/mii.h> 54#include <linux/skbuff.h> 55#include <linux/delay.h> 56#include <linux/crc32.h> 57#include <linux/phy.h> 58#include <linux/platform_device.h> 59 60#include <asm/cpu.h> 61#include <asm/mipsregs.h> 62#include <asm/irq.h> 63#include <asm/io.h> 64#include <asm/processor.h> 65 66#include <au1000.h> 67#include <au1xxx_eth.h> 68#include <prom.h> 69 70#include "au1000_eth.h" 71 72#ifdef AU1000_ETH_DEBUG 73static int au1000_debug = 5; 74#else 75static int au1000_debug = 3; 76#endif 77 78#define DRV_NAME "au1000_eth" 79#define DRV_VERSION "1.6" 80#define DRV_AUTHOR "Pete Popov <ppopov@embeddedalley.com>" 81#define DRV_DESC "Au1xxx on-chip Ethernet driver" 82 83MODULE_AUTHOR(DRV_AUTHOR); 84MODULE_DESCRIPTION(DRV_DESC); 85MODULE_LICENSE("GPL"); 86 87/* 88 * Theory of operation 89 * 90 * The Au1000 MACs use a simple rx and tx descriptor ring scheme. 91 * There are four receive and four transmit descriptors. These 92 * descriptors are not in memory; rather, they are just a set of 93 * hardware registers. 94 * 95 * Since the Au1000 has a coherent data cache, the receive and 96 * transmit buffers are allocated from the KSEG0 segment. The 97 * hardware registers, however, are still mapped at KSEG1 to 98 * make sure there's no out-of-order writes, and that all writes 99 * complete immediately. 100 */ 101 102/* These addresses are only used if yamon doesn't tell us what 103 * the mac address is, and the mac address is not passed on the 104 * command line. 105 */ 106static unsigned char au1000_mac_addr[6] __devinitdata = { 107 0x00, 0x50, 0xc2, 0x0c, 0x30, 0x00 108}; 109 110struct au1000_private *au_macs[NUM_ETH_INTERFACES]; 111 112/* 113 * board-specific configurations 114 * 115 * PHY detection algorithm 116 * 117 * If phy_static_config is undefined, the PHY setup is 118 * autodetected: 119 * 120 * mii_probe() first searches the current MAC's MII bus for a PHY, 121 * selecting the first (or last, if phy_search_highest_addr is 122 * defined) PHY address not already claimed by another netdev. 123 * 124 * If nothing was found that way when searching for the 2nd ethernet 125 * controller's PHY and phy1_search_mac0 is defined, then 126 * the first MII bus is searched as well for an unclaimed PHY; this is 127 * needed in case of a dual-PHY accessible only through the MAC0's MII 128 * bus. 129 * 130 * Finally, if no PHY is found, then the corresponding ethernet 131 * controller is not registered to the network subsystem. 132 */ 133 134/* autodetection defaults: phy1_search_mac0 */ 135 136/* static PHY setup 137 * 138 * most boards PHY setup should be detectable properly with the 139 * autodetection algorithm in mii_probe(), but in some cases (e.g. if 140 * you have a switch attached, or want to use the PHY's interrupt 141 * notification capabilities) you can provide a static PHY 142 * configuration here 143 * 144 * IRQs may only be set, if a PHY address was configured 145 * If a PHY address is given, also a bus id is required to be set 146 * 147 * ps: make sure the used irqs are configured properly in the board 148 * specific irq-map 149 */ 150 151static void enable_mac(struct net_device *dev, int force_reset) 152{ 153 unsigned long flags; 154 struct au1000_private *aup = netdev_priv(dev); 155 156 spin_lock_irqsave(&aup->lock, flags); 157 158 if(force_reset || (!aup->mac_enabled)) { 159 *aup->enable = MAC_EN_CLOCK_ENABLE; 160 au_sync_delay(2); 161 *aup->enable = (MAC_EN_RESET0 | MAC_EN_RESET1 | MAC_EN_RESET2 162 | MAC_EN_CLOCK_ENABLE); 163 au_sync_delay(2); 164 165 aup->mac_enabled = 1; 166 } 167 168 spin_unlock_irqrestore(&aup->lock, flags); 169} 170 171/* 172 * MII operations 173 */ 174static int au1000_mdio_read(struct net_device *dev, int phy_addr, int reg) 175{ 176 struct au1000_private *aup = netdev_priv(dev); 177 volatile u32 *const mii_control_reg = &aup->mac->mii_control; 178 volatile u32 *const mii_data_reg = &aup->mac->mii_data; 179 u32 timedout = 20; 180 u32 mii_control; 181 182 while (*mii_control_reg & MAC_MII_BUSY) { 183 mdelay(1); 184 if (--timedout == 0) { 185 printk(KERN_ERR "%s: read_MII busy timeout!!\n", 186 dev->name); 187 return -1; 188 } 189 } 190 191 mii_control = MAC_SET_MII_SELECT_REG(reg) | 192 MAC_SET_MII_SELECT_PHY(phy_addr) | MAC_MII_READ; 193 194 *mii_control_reg = mii_control; 195 196 timedout = 20; 197 while (*mii_control_reg & MAC_MII_BUSY) { 198 mdelay(1); 199 if (--timedout == 0) { 200 printk(KERN_ERR "%s: mdio_read busy timeout!!\n", 201 dev->name); 202 return -1; 203 } 204 } 205 return (int)*mii_data_reg; 206} 207 208static void au1000_mdio_write(struct net_device *dev, int phy_addr, 209 int reg, u16 value) 210{ 211 struct au1000_private *aup = netdev_priv(dev); 212 volatile u32 *const mii_control_reg = &aup->mac->mii_control; 213 volatile u32 *const mii_data_reg = &aup->mac->mii_data; 214 u32 timedout = 20; 215 u32 mii_control; 216 217 while (*mii_control_reg & MAC_MII_BUSY) { 218 mdelay(1); 219 if (--timedout == 0) { 220 printk(KERN_ERR "%s: mdio_write busy timeout!!\n", 221 dev->name); 222 return; 223 } 224 } 225 226 mii_control = MAC_SET_MII_SELECT_REG(reg) | 227 MAC_SET_MII_SELECT_PHY(phy_addr) | MAC_MII_WRITE; 228 229 *mii_data_reg = value; 230 *mii_control_reg = mii_control; 231} 232 233static int au1000_mdiobus_read(struct mii_bus *bus, int phy_addr, int regnum) 234{ 235 /* WARNING: bus->phy_map[phy_addr].attached_dev == dev does 236 * _NOT_ hold (e.g. when PHY is accessed through other MAC's MII bus) */ 237 struct net_device *const dev = bus->priv; 238 239 enable_mac(dev, 0); /* make sure the MAC associated with this 240 * mii_bus is enabled */ 241 return au1000_mdio_read(dev, phy_addr, regnum); 242} 243 244static int au1000_mdiobus_write(struct mii_bus *bus, int phy_addr, int regnum, 245 u16 value) 246{ 247 struct net_device *const dev = bus->priv; 248 249 enable_mac(dev, 0); /* make sure the MAC associated with this 250 * mii_bus is enabled */ 251 au1000_mdio_write(dev, phy_addr, regnum, value); 252 return 0; 253} 254 255static int au1000_mdiobus_reset(struct mii_bus *bus) 256{ 257 struct net_device *const dev = bus->priv; 258 259 enable_mac(dev, 0); /* make sure the MAC associated with this 260 * mii_bus is enabled */ 261 return 0; 262} 263 264static void hard_stop(struct net_device *dev) 265{ 266 struct au1000_private *aup = netdev_priv(dev); 267 268 if (au1000_debug > 4) 269 printk(KERN_INFO "%s: hard stop\n", dev->name); 270 271 aup->mac->control &= ~(MAC_RX_ENABLE | MAC_TX_ENABLE); 272 au_sync_delay(10); 273} 274 275static void enable_rx_tx(struct net_device *dev) 276{ 277 struct au1000_private *aup = netdev_priv(dev); 278 279 if (au1000_debug > 4) 280 printk(KERN_INFO "%s: enable_rx_tx\n", dev->name); 281 282 aup->mac->control |= (MAC_RX_ENABLE | MAC_TX_ENABLE); 283 au_sync_delay(10); 284} 285 286static void 287au1000_adjust_link(struct net_device *dev) 288{ 289 struct au1000_private *aup = netdev_priv(dev); 290 struct phy_device *phydev = aup->phy_dev; 291 unsigned long flags; 292 293 int status_change = 0; 294 295 BUG_ON(!aup->phy_dev); 296 297 spin_lock_irqsave(&aup->lock, flags); 298 299 if (phydev->link && (aup->old_speed != phydev->speed)) { 300 // speed changed 301 302 switch(phydev->speed) { 303 case SPEED_10: 304 case SPEED_100: 305 break; 306 default: 307 printk(KERN_WARNING 308 "%s: Speed (%d) is not 10/100 ???\n", 309 dev->name, phydev->speed); 310 break; 311 } 312 313 aup->old_speed = phydev->speed; 314 315 status_change = 1; 316 } 317 318 if (phydev->link && (aup->old_duplex != phydev->duplex)) { 319 // duplex mode changed 320 321 /* switching duplex mode requires to disable rx and tx! */ 322 hard_stop(dev); 323 324 if (DUPLEX_FULL == phydev->duplex) 325 aup->mac->control = ((aup->mac->control 326 | MAC_FULL_DUPLEX) 327 & ~MAC_DISABLE_RX_OWN); 328 else 329 aup->mac->control = ((aup->mac->control 330 & ~MAC_FULL_DUPLEX) 331 | MAC_DISABLE_RX_OWN); 332 au_sync_delay(1); 333 334 enable_rx_tx(dev); 335 aup->old_duplex = phydev->duplex; 336 337 status_change = 1; 338 } 339 340 if(phydev->link != aup->old_link) { 341 // link state changed 342 343 if (!phydev->link) { 344 /* link went down */ 345 aup->old_speed = 0; 346 aup->old_duplex = -1; 347 } 348 349 aup->old_link = phydev->link; 350 status_change = 1; 351 } 352 353 spin_unlock_irqrestore(&aup->lock, flags); 354 355 if (status_change) { 356 if (phydev->link) 357 printk(KERN_INFO "%s: link up (%d/%s)\n", 358 dev->name, phydev->speed, 359 DUPLEX_FULL == phydev->duplex ? "Full" : "Half"); 360 else 361 printk(KERN_INFO "%s: link down\n", dev->name); 362 } 363} 364 365static int mii_probe (struct net_device *dev) 366{ 367 struct au1000_private *const aup = netdev_priv(dev); 368 struct phy_device *phydev = NULL; 369 370 if (aup->phy_static_config) { 371 BUG_ON(aup->mac_id < 0 || aup->mac_id > 1); 372 373 if (aup->phy_addr) 374 phydev = aup->mii_bus->phy_map[aup->phy_addr]; 375 else 376 printk (KERN_INFO DRV_NAME ":%s: using PHY-less setup\n", 377 dev->name); 378 return 0; 379 } else { 380 int phy_addr; 381 382 /* find the first (lowest address) PHY on the current MAC's MII bus */ 383 for (phy_addr = 0; phy_addr < PHY_MAX_ADDR; phy_addr++) 384 if (aup->mii_bus->phy_map[phy_addr]) { 385 phydev = aup->mii_bus->phy_map[phy_addr]; 386 if (!aup->phy_search_highest_addr) 387 break; /* break out with first one found */ 388 } 389 390 if (aup->phy1_search_mac0) { 391 /* try harder to find a PHY */ 392 if (!phydev && (aup->mac_id == 1)) { 393 /* no PHY found, maybe we have a dual PHY? */ 394 printk (KERN_INFO DRV_NAME ": no PHY found on MAC1, " 395 "let's see if it's attached to MAC0...\n"); 396 397 /* find the first (lowest address) non-attached PHY on 398 * the MAC0 MII bus */ 399 for (phy_addr = 0; phy_addr < PHY_MAX_ADDR; phy_addr++) { 400 struct phy_device *const tmp_phydev = 401 aup->mii_bus->phy_map[phy_addr]; 402 403 if (aup->mac_id == 1) 404 break; 405 406 if (!tmp_phydev) 407 continue; /* no PHY here... */ 408 409 if (tmp_phydev->attached_dev) 410 continue; /* already claimed by MAC0 */ 411 412 phydev = tmp_phydev; 413 break; /* found it */ 414 } 415 } 416 } 417 } 418 419 if (!phydev) { 420 printk (KERN_ERR DRV_NAME ":%s: no PHY found\n", dev->name); 421 return -1; 422 } 423 424 /* now we are supposed to have a proper phydev, to attach to... */ 425 BUG_ON(phydev->attached_dev); 426 427 phydev = phy_connect(dev, dev_name(&phydev->dev), &au1000_adjust_link, 428 0, PHY_INTERFACE_MODE_MII); 429 430 if (IS_ERR(phydev)) { 431 printk(KERN_ERR "%s: Could not attach to PHY\n", dev->name); 432 return PTR_ERR(phydev); 433 } 434 435 /* mask with MAC supported features */ 436 phydev->supported &= (SUPPORTED_10baseT_Half 437 | SUPPORTED_10baseT_Full 438 | SUPPORTED_100baseT_Half 439 | SUPPORTED_100baseT_Full 440 | SUPPORTED_Autoneg 441 /* | SUPPORTED_Pause | SUPPORTED_Asym_Pause */ 442 | SUPPORTED_MII 443 | SUPPORTED_TP); 444 445 phydev->advertising = phydev->supported; 446 447 aup->old_link = 0; 448 aup->old_speed = 0; 449 aup->old_duplex = -1; 450 aup->phy_dev = phydev; 451 452 printk(KERN_INFO "%s: attached PHY driver [%s] " 453 "(mii_bus:phy_addr=%s, irq=%d)\n", dev->name, 454 phydev->drv->name, dev_name(&phydev->dev), phydev->irq); 455 456 return 0; 457} 458 459 460/* 461 * Buffer allocation/deallocation routines. The buffer descriptor returned 462 * has the virtual and dma address of a buffer suitable for 463 * both, receive and transmit operations. 464 */ 465static db_dest_t *GetFreeDB(struct au1000_private *aup) 466{ 467 db_dest_t *pDB; 468 pDB = aup->pDBfree; 469 470 if (pDB) { 471 aup->pDBfree = pDB->pnext; 472 } 473 return pDB; 474} 475 476void ReleaseDB(struct au1000_private *aup, db_dest_t *pDB) 477{ 478 db_dest_t *pDBfree = aup->pDBfree; 479 if (pDBfree) 480 pDBfree->pnext = pDB; 481 aup->pDBfree = pDB; 482} 483 484static void reset_mac_unlocked(struct net_device *dev) 485{ 486 struct au1000_private *const aup = netdev_priv(dev); 487 int i; 488 489 hard_stop(dev); 490 491 *aup->enable = MAC_EN_CLOCK_ENABLE; 492 au_sync_delay(2); 493 *aup->enable = 0; 494 au_sync_delay(2); 495 496 aup->tx_full = 0; 497 for (i = 0; i < NUM_RX_DMA; i++) { 498 /* reset control bits */ 499 aup->rx_dma_ring[i]->buff_stat &= ~0xf; 500 } 501 for (i = 0; i < NUM_TX_DMA; i++) { 502 /* reset control bits */ 503 aup->tx_dma_ring[i]->buff_stat &= ~0xf; 504 } 505 506 aup->mac_enabled = 0; 507 508} 509 510static void reset_mac(struct net_device *dev) 511{ 512 struct au1000_private *const aup = netdev_priv(dev); 513 unsigned long flags; 514 515 if (au1000_debug > 4) 516 printk(KERN_INFO "%s: reset mac, aup %x\n", 517 dev->name, (unsigned)aup); 518 519 spin_lock_irqsave(&aup->lock, flags); 520 521 reset_mac_unlocked (dev); 522 523 spin_unlock_irqrestore(&aup->lock, flags); 524} 525 526/* 527 * Setup the receive and transmit "rings". These pointers are the addresses 528 * of the rx and tx MAC DMA registers so they are fixed by the hardware -- 529 * these are not descriptors sitting in memory. 530 */ 531static void 532setup_hw_rings(struct au1000_private *aup, u32 rx_base, u32 tx_base) 533{ 534 int i; 535 536 for (i = 0; i < NUM_RX_DMA; i++) { 537 aup->rx_dma_ring[i] = 538 (volatile rx_dma_t *) (rx_base + sizeof(rx_dma_t)*i); 539 } 540 for (i = 0; i < NUM_TX_DMA; i++) { 541 aup->tx_dma_ring[i] = 542 (volatile tx_dma_t *) (tx_base + sizeof(tx_dma_t)*i); 543 } 544} 545 546/* 547 * ethtool operations 548 */ 549 550static int au1000_get_settings(struct net_device *dev, struct ethtool_cmd *cmd) 551{ 552 struct au1000_private *aup = netdev_priv(dev); 553 554 if (aup->phy_dev) 555 return phy_ethtool_gset(aup->phy_dev, cmd); 556 557 return -EINVAL; 558} 559 560static int au1000_set_settings(struct net_device *dev, struct ethtool_cmd *cmd) 561{ 562 struct au1000_private *aup = netdev_priv(dev); 563 564 if (!capable(CAP_NET_ADMIN)) 565 return -EPERM; 566 567 if (aup->phy_dev) 568 return phy_ethtool_sset(aup->phy_dev, cmd); 569 570 return -EINVAL; 571} 572 573static void 574au1000_get_drvinfo(struct net_device *dev, struct ethtool_drvinfo *info) 575{ 576 struct au1000_private *aup = netdev_priv(dev); 577 578 strcpy(info->driver, DRV_NAME); 579 strcpy(info->version, DRV_VERSION); 580 info->fw_version[0] = '\0'; 581 sprintf(info->bus_info, "%s %d", DRV_NAME, aup->mac_id); 582 info->regdump_len = 0; 583} 584 585static const struct ethtool_ops au1000_ethtool_ops = { 586 .get_settings = au1000_get_settings, 587 .set_settings = au1000_set_settings, 588 .get_drvinfo = au1000_get_drvinfo, 589 .get_link = ethtool_op_get_link, 590}; 591 592 593/* 594 * Initialize the interface. 595 * 596 * When the device powers up, the clocks are disabled and the 597 * mac is in reset state. When the interface is closed, we 598 * do the same -- reset the device and disable the clocks to 599 * conserve power. Thus, whenever au1000_init() is called, 600 * the device should already be in reset state. 601 */ 602static int au1000_init(struct net_device *dev) 603{ 604 struct au1000_private *aup = netdev_priv(dev); 605 unsigned long flags; 606 int i; 607 u32 control; 608 609 if (au1000_debug > 4) 610 printk("%s: au1000_init\n", dev->name); 611 612 /* bring the device out of reset */ 613 enable_mac(dev, 1); 614 615 spin_lock_irqsave(&aup->lock, flags); 616 617 aup->mac->control = 0; 618 aup->tx_head = (aup->tx_dma_ring[0]->buff_stat & 0xC) >> 2; 619 aup->tx_tail = aup->tx_head; 620 aup->rx_head = (aup->rx_dma_ring[0]->buff_stat & 0xC) >> 2; 621 622 aup->mac->mac_addr_high = dev->dev_addr[5]<<8 | dev->dev_addr[4]; 623 aup->mac->mac_addr_low = dev->dev_addr[3]<<24 | dev->dev_addr[2]<<16 | 624 dev->dev_addr[1]<<8 | dev->dev_addr[0]; 625 626 for (i = 0; i < NUM_RX_DMA; i++) { 627 aup->rx_dma_ring[i]->buff_stat |= RX_DMA_ENABLE; 628 } 629 au_sync(); 630 631 control = MAC_RX_ENABLE | MAC_TX_ENABLE; 632#ifndef CONFIG_CPU_LITTLE_ENDIAN 633 control |= MAC_BIG_ENDIAN; 634#endif 635 if (aup->phy_dev) { 636 if (aup->phy_dev->link && (DUPLEX_FULL == aup->phy_dev->duplex)) 637 control |= MAC_FULL_DUPLEX; 638 else 639 control |= MAC_DISABLE_RX_OWN; 640 } else { /* PHY-less op, assume full-duplex */ 641 control |= MAC_FULL_DUPLEX; 642 } 643 644 aup->mac->control = control; 645 aup->mac->vlan1_tag = 0x8100; /* activate vlan support */ 646 au_sync(); 647 648 spin_unlock_irqrestore(&aup->lock, flags); 649 return 0; 650} 651 652static inline void update_rx_stats(struct net_device *dev, u32 status) 653{ 654 struct net_device_stats *ps = &dev->stats; 655 656 ps->rx_packets++; 657 if (status & RX_MCAST_FRAME) 658 ps->multicast++; 659 660 if (status & RX_ERROR) { 661 ps->rx_errors++; 662 if (status & RX_MISSED_FRAME) 663 ps->rx_missed_errors++; 664 if (status & (RX_OVERLEN | RX_RUNT | RX_LEN_ERROR)) 665 ps->rx_length_errors++; 666 if (status & RX_CRC_ERROR) 667 ps->rx_crc_errors++; 668 if (status & RX_COLL) 669 ps->collisions++; 670 } 671 else 672 ps->rx_bytes += status & RX_FRAME_LEN_MASK; 673 674} 675 676/* 677 * Au1000 receive routine. 678 */ 679static int au1000_rx(struct net_device *dev) 680{ 681 struct au1000_private *aup = netdev_priv(dev); 682 struct sk_buff *skb; 683 volatile rx_dma_t *prxd; 684 u32 buff_stat, status; 685 db_dest_t *pDB; 686 u32 frmlen; 687 688 if (au1000_debug > 5) 689 printk("%s: au1000_rx head %d\n", dev->name, aup->rx_head); 690 691 prxd = aup->rx_dma_ring[aup->rx_head]; 692 buff_stat = prxd->buff_stat; 693 while (buff_stat & RX_T_DONE) { 694 status = prxd->status; 695 pDB = aup->rx_db_inuse[aup->rx_head]; 696 update_rx_stats(dev, status); 697 if (!(status & RX_ERROR)) { 698 699 /* good frame */ 700 frmlen = (status & RX_FRAME_LEN_MASK); 701 frmlen -= 4; /* Remove FCS */ 702 skb = dev_alloc_skb(frmlen + 2); 703 if (skb == NULL) { 704 printk(KERN_ERR 705 "%s: Memory squeeze, dropping packet.\n", 706 dev->name); 707 dev->stats.rx_dropped++; 708 continue; 709 } 710 skb_reserve(skb, 2); /* 16 byte IP header align */ 711 skb_copy_to_linear_data(skb, 712 (unsigned char *)pDB->vaddr, frmlen); 713 skb_put(skb, frmlen); 714 skb->protocol = eth_type_trans(skb, dev); 715 netif_rx(skb); /* pass the packet to upper layers */ 716 } 717 else { 718 if (au1000_debug > 4) { 719 if (status & RX_MISSED_FRAME) 720 printk("rx miss\n"); 721 if (status & RX_WDOG_TIMER) 722 printk("rx wdog\n"); 723 if (status & RX_RUNT) 724 printk("rx runt\n"); 725 if (status & RX_OVERLEN) 726 printk("rx overlen\n"); 727 if (status & RX_COLL) 728 printk("rx coll\n"); 729 if (status & RX_MII_ERROR) 730 printk("rx mii error\n"); 731 if (status & RX_CRC_ERROR) 732 printk("rx crc error\n"); 733 if (status & RX_LEN_ERROR) 734 printk("rx len error\n"); 735 if (status & RX_U_CNTRL_FRAME) 736 printk("rx u control frame\n"); 737 } 738 } 739 prxd->buff_stat = (u32)(pDB->dma_addr | RX_DMA_ENABLE); 740 aup->rx_head = (aup->rx_head + 1) & (NUM_RX_DMA - 1); 741 au_sync(); 742 743 /* next descriptor */ 744 prxd = aup->rx_dma_ring[aup->rx_head]; 745 buff_stat = prxd->buff_stat; 746 } 747 return 0; 748} 749 750static void update_tx_stats(struct net_device *dev, u32 status) 751{ 752 struct au1000_private *aup = netdev_priv(dev); 753 struct net_device_stats *ps = &dev->stats; 754 755 if (status & TX_FRAME_ABORTED) { 756 if (!aup->phy_dev || (DUPLEX_FULL == aup->phy_dev->duplex)) { 757 if (status & (TX_JAB_TIMEOUT | TX_UNDERRUN)) { 758 /* any other tx errors are only valid 759 * in half duplex mode */ 760 ps->tx_errors++; 761 ps->tx_aborted_errors++; 762 } 763 } 764 else { 765 ps->tx_errors++; 766 ps->tx_aborted_errors++; 767 if (status & (TX_NO_CARRIER | TX_LOSS_CARRIER)) 768 ps->tx_carrier_errors++; 769 } 770 } 771} 772 773/* 774 * Called from the interrupt service routine to acknowledge 775 * the TX DONE bits. This is a must if the irq is setup as 776 * edge triggered. 777 */ 778static void au1000_tx_ack(struct net_device *dev) 779{ 780 struct au1000_private *aup = netdev_priv(dev); 781 volatile tx_dma_t *ptxd; 782 783 ptxd = aup->tx_dma_ring[aup->tx_tail]; 784 785 while (ptxd->buff_stat & TX_T_DONE) { 786 update_tx_stats(dev, ptxd->status); 787 ptxd->buff_stat &= ~TX_T_DONE; 788 ptxd->len = 0; 789 au_sync(); 790 791 aup->tx_tail = (aup->tx_tail + 1) & (NUM_TX_DMA - 1); 792 ptxd = aup->tx_dma_ring[aup->tx_tail]; 793 794 if (aup->tx_full) { 795 aup->tx_full = 0; 796 netif_wake_queue(dev); 797 } 798 } 799} 800 801/* 802 * Au1000 interrupt service routine. 803 */ 804static irqreturn_t au1000_interrupt(int irq, void *dev_id) 805{ 806 struct net_device *dev = dev_id; 807 808 /* Handle RX interrupts first to minimize chance of overrun */ 809 810 au1000_rx(dev); 811 au1000_tx_ack(dev); 812 return IRQ_RETVAL(1); 813} 814 815static int au1000_open(struct net_device *dev) 816{ 817 int retval; 818 struct au1000_private *aup = netdev_priv(dev); 819 820 if (au1000_debug > 4) 821 printk("%s: open: dev=%p\n", dev->name, dev); 822 823 if ((retval = request_irq(dev->irq, au1000_interrupt, 0, 824 dev->name, dev))) { 825 printk(KERN_ERR "%s: unable to get IRQ %d\n", 826 dev->name, dev->irq); 827 return retval; 828 } 829 830 if ((retval = au1000_init(dev))) { 831 printk(KERN_ERR "%s: error in au1000_init\n", dev->name); 832 free_irq(dev->irq, dev); 833 return retval; 834 } 835 836 if (aup->phy_dev) { 837 /* cause the PHY state machine to schedule a link state check */ 838 aup->phy_dev->state = PHY_CHANGELINK; 839 phy_start(aup->phy_dev); 840 } 841 842 netif_start_queue(dev); 843 844 if (au1000_debug > 4) 845 printk("%s: open: Initialization done.\n", dev->name); 846 847 return 0; 848} 849 850static int au1000_close(struct net_device *dev) 851{ 852 unsigned long flags; 853 struct au1000_private *const aup = netdev_priv(dev); 854 855 if (au1000_debug > 4) 856 printk("%s: close: dev=%p\n", dev->name, dev); 857 858 if (aup->phy_dev) 859 phy_stop(aup->phy_dev); 860 861 spin_lock_irqsave(&aup->lock, flags); 862 863 reset_mac_unlocked (dev); 864 865 /* stop the device */ 866 netif_stop_queue(dev); 867 868 /* disable the interrupt */ 869 free_irq(dev->irq, dev); 870 spin_unlock_irqrestore(&aup->lock, flags); 871 872 return 0; 873} 874 875/* 876 * Au1000 transmit routine. 877 */ 878static netdev_tx_t au1000_tx(struct sk_buff *skb, struct net_device *dev) 879{ 880 struct au1000_private *aup = netdev_priv(dev); 881 struct net_device_stats *ps = &dev->stats; 882 volatile tx_dma_t *ptxd; 883 u32 buff_stat; 884 db_dest_t *pDB; 885 int i; 886 887 if (au1000_debug > 5) 888 printk("%s: tx: aup %x len=%d, data=%p, head %d\n", 889 dev->name, (unsigned)aup, skb->len, 890 skb->data, aup->tx_head); 891 892 ptxd = aup->tx_dma_ring[aup->tx_head]; 893 buff_stat = ptxd->buff_stat; 894 if (buff_stat & TX_DMA_ENABLE) { 895 /* We've wrapped around and the transmitter is still busy */ 896 netif_stop_queue(dev); 897 aup->tx_full = 1; 898 return NETDEV_TX_BUSY; 899 } 900 else if (buff_stat & TX_T_DONE) { 901 update_tx_stats(dev, ptxd->status); 902 ptxd->len = 0; 903 } 904 905 if (aup->tx_full) { 906 aup->tx_full = 0; 907 netif_wake_queue(dev); 908 } 909 910 pDB = aup->tx_db_inuse[aup->tx_head]; 911 skb_copy_from_linear_data(skb, (void *)pDB->vaddr, skb->len); 912 if (skb->len < ETH_ZLEN) { 913 for (i=skb->len; i<ETH_ZLEN; i++) { 914 ((char *)pDB->vaddr)[i] = 0; 915 } 916 ptxd->len = ETH_ZLEN; 917 } 918 else 919 ptxd->len = skb->len; 920 921 ps->tx_packets++; 922 ps->tx_bytes += ptxd->len; 923 924 ptxd->buff_stat = pDB->dma_addr | TX_DMA_ENABLE; 925 au_sync(); 926 dev_kfree_skb(skb); 927 aup->tx_head = (aup->tx_head + 1) & (NUM_TX_DMA - 1); 928 dev->trans_start = jiffies; 929 return NETDEV_TX_OK; 930} 931 932/* 933 * The Tx ring has been full longer than the watchdog timeout 934 * value. The transmitter must be hung? 935 */ 936static void au1000_tx_timeout(struct net_device *dev) 937{ 938 printk(KERN_ERR "%s: au1000_tx_timeout: dev=%p\n", dev->name, dev); 939 reset_mac(dev); 940 au1000_init(dev); 941 dev->trans_start = jiffies; 942 netif_wake_queue(dev); 943} 944 945static void au1000_multicast_list(struct net_device *dev) 946{ 947 struct au1000_private *aup = netdev_priv(dev); 948 949 if (au1000_debug > 4) 950 printk("%s: au1000_multicast_list: flags=%x\n", dev->name, dev->flags); 951 952 if (dev->flags & IFF_PROMISC) { /* Set promiscuous. */ 953 aup->mac->control |= MAC_PROMISCUOUS; 954 } else if ((dev->flags & IFF_ALLMULTI) || 955 netdev_mc_count(dev) > MULTICAST_FILTER_LIMIT) { 956 aup->mac->control |= MAC_PASS_ALL_MULTI; 957 aup->mac->control &= ~MAC_PROMISCUOUS; 958 printk(KERN_INFO "%s: Pass all multicast\n", dev->name); 959 } else { 960 struct dev_mc_list *mclist; 961 u32 mc_filter[2]; /* Multicast hash filter */ 962 963 mc_filter[1] = mc_filter[0] = 0; 964 netdev_for_each_mc_addr(mclist, dev) 965 set_bit(ether_crc(ETH_ALEN, mclist->dmi_addr)>>26, 966 (long *)mc_filter); 967 aup->mac->multi_hash_high = mc_filter[1]; 968 aup->mac->multi_hash_low = mc_filter[0]; 969 aup->mac->control &= ~MAC_PROMISCUOUS; 970 aup->mac->control |= MAC_HASH_MODE; 971 } 972} 973 974static int au1000_ioctl(struct net_device *dev, struct ifreq *rq, int cmd) 975{ 976 struct au1000_private *aup = netdev_priv(dev); 977 978 if (!netif_running(dev)) return -EINVAL; 979 980 if (!aup->phy_dev) return -EINVAL; // PHY not controllable 981 982 return phy_mii_ioctl(aup->phy_dev, if_mii(rq), cmd); 983} 984 985static const struct net_device_ops au1000_netdev_ops = { 986 .ndo_open = au1000_open, 987 .ndo_stop = au1000_close, 988 .ndo_start_xmit = au1000_tx, 989 .ndo_set_multicast_list = au1000_multicast_list, 990 .ndo_do_ioctl = au1000_ioctl, 991 .ndo_tx_timeout = au1000_tx_timeout, 992 .ndo_set_mac_address = eth_mac_addr, 993 .ndo_validate_addr = eth_validate_addr, 994 .ndo_change_mtu = eth_change_mtu, 995}; 996 997static int __devinit au1000_probe(struct platform_device *pdev) 998{ 999 static unsigned version_printed = 0; 1000 struct au1000_private *aup = NULL; 1001 struct au1000_eth_platform_data *pd; 1002 struct net_device *dev = NULL; 1003 db_dest_t *pDB, *pDBfree; 1004 int irq, i, err = 0; 1005 struct resource *base, *macen; 1006 char ethaddr[6]; 1007 1008 base = platform_get_resource(pdev, IORESOURCE_MEM, 0); 1009 if (!base) { 1010 printk(KERN_ERR DRV_NAME ": failed to retrieve base register\n"); 1011 err = -ENODEV; 1012 goto out; 1013 } 1014 1015 macen = platform_get_resource(pdev, IORESOURCE_MEM, 1); 1016 if (!macen) { 1017 printk(KERN_ERR DRV_NAME ": failed to retrieve MAC Enable register\n"); 1018 err = -ENODEV; 1019 goto out; 1020 } 1021 1022 irq = platform_get_irq(pdev, 0); 1023 if (irq < 0) { 1024 printk(KERN_ERR DRV_NAME ": failed to retrieve IRQ\n"); 1025 err = -ENODEV; 1026 goto out; 1027 } 1028 1029 if (!request_mem_region(base->start, resource_size(base), pdev->name)) { 1030 printk(KERN_ERR DRV_NAME ": failed to request memory region for base registers\n"); 1031 err = -ENXIO; 1032 goto out; 1033 } 1034 1035 if (!request_mem_region(macen->start, resource_size(macen), pdev->name)) { 1036 printk(KERN_ERR DRV_NAME ": failed to request memory region for MAC enable register\n"); 1037 err = -ENXIO; 1038 goto err_request; 1039 } 1040 1041 dev = alloc_etherdev(sizeof(struct au1000_private)); 1042 if (!dev) { 1043 printk(KERN_ERR "%s: alloc_etherdev failed\n", DRV_NAME); 1044 err = -ENOMEM; 1045 goto err_alloc; 1046 } 1047 1048 SET_NETDEV_DEV(dev, &pdev->dev); 1049 platform_set_drvdata(pdev, dev); 1050 aup = netdev_priv(dev); 1051 1052 spin_lock_init(&aup->lock); 1053 1054 /* Allocate the data buffers */ 1055 /* Snooping works fine with eth on all au1xxx */ 1056 aup->vaddr = (u32)dma_alloc_noncoherent(NULL, MAX_BUF_SIZE * 1057 (NUM_TX_BUFFS + NUM_RX_BUFFS), 1058 &aup->dma_addr, 0); 1059 if (!aup->vaddr) { 1060 printk(KERN_ERR DRV_NAME ": failed to allocate data buffers\n"); 1061 err = -ENOMEM; 1062 goto err_vaddr; 1063 } 1064 1065 /* aup->mac is the base address of the MAC's registers */ 1066 aup->mac = (volatile mac_reg_t *)ioremap_nocache(base->start, resource_size(base)); 1067 if (!aup->mac) { 1068 printk(KERN_ERR DRV_NAME ": failed to ioremap MAC registers\n"); 1069 err = -ENXIO; 1070 goto err_remap1; 1071 } 1072 1073 /* Setup some variables for quick register address access */ 1074 aup->enable = (volatile u32 *)ioremap_nocache(macen->start, resource_size(macen)); 1075 if (!aup->enable) { 1076 printk(KERN_ERR DRV_NAME ": failed to ioremap MAC enable register\n"); 1077 err = -ENXIO; 1078 goto err_remap2; 1079 } 1080 aup->mac_id = pdev->id; 1081 1082 if (pdev->id == 0) { 1083 if (prom_get_ethernet_addr(ethaddr) == 0) 1084 memcpy(au1000_mac_addr, ethaddr, sizeof(au1000_mac_addr)); 1085 else { 1086 printk(KERN_INFO "%s: No MAC address found\n", 1087 dev->name); 1088 /* Use the hard coded MAC addresses */ 1089 } 1090 1091 setup_hw_rings(aup, MAC0_RX_DMA_ADDR, MAC0_TX_DMA_ADDR); 1092 } else if (pdev->id == 1) 1093 setup_hw_rings(aup, MAC1_RX_DMA_ADDR, MAC1_TX_DMA_ADDR); 1094 1095 /* 1096 * Assign to the Ethernet ports two consecutive MAC addresses 1097 * to match those that are printed on their stickers 1098 */ 1099 memcpy(dev->dev_addr, au1000_mac_addr, sizeof(au1000_mac_addr)); 1100 dev->dev_addr[5] += pdev->id; 1101 1102 *aup->enable = 0; 1103 aup->mac_enabled = 0; 1104 1105 pd = pdev->dev.platform_data; 1106 if (!pd) { 1107 printk(KERN_INFO DRV_NAME ": no platform_data passed, PHY search on MAC0\n"); 1108 aup->phy1_search_mac0 = 1; 1109 } else { 1110 aup->phy_static_config = pd->phy_static_config; 1111 aup->phy_search_highest_addr = pd->phy_search_highest_addr; 1112 aup->phy1_search_mac0 = pd->phy1_search_mac0; 1113 aup->phy_addr = pd->phy_addr; 1114 aup->phy_busid = pd->phy_busid; 1115 aup->phy_irq = pd->phy_irq; 1116 } 1117 1118 if (aup->phy_busid && aup->phy_busid > 0) { 1119 printk(KERN_ERR DRV_NAME ": MAC0-associated PHY attached 2nd MACs MII" 1120 "bus not supported yet\n"); 1121 err = -ENODEV; 1122 goto err_mdiobus_alloc; 1123 } 1124 1125 aup->mii_bus = mdiobus_alloc(); 1126 if (aup->mii_bus == NULL) { 1127 printk(KERN_ERR DRV_NAME ": failed to allocate mdiobus structure\n"); 1128 err = -ENOMEM; 1129 goto err_mdiobus_alloc; 1130 } 1131 1132 aup->mii_bus->priv = dev; 1133 aup->mii_bus->read = au1000_mdiobus_read; 1134 aup->mii_bus->write = au1000_mdiobus_write; 1135 aup->mii_bus->reset = au1000_mdiobus_reset; 1136 aup->mii_bus->name = "au1000_eth_mii"; 1137 snprintf(aup->mii_bus->id, MII_BUS_ID_SIZE, "%x", aup->mac_id); 1138 aup->mii_bus->irq = kmalloc(sizeof(int)*PHY_MAX_ADDR, GFP_KERNEL); 1139 if (aup->mii_bus->irq == NULL) 1140 goto err_out; 1141 1142 for(i = 0; i < PHY_MAX_ADDR; ++i) 1143 aup->mii_bus->irq[i] = PHY_POLL; 1144 /* if known, set corresponding PHY IRQs */ 1145 if (aup->phy_static_config) 1146 if (aup->phy_irq && aup->phy_busid == aup->mac_id) 1147 aup->mii_bus->irq[aup->phy_addr] = aup->phy_irq; 1148 1149 err = mdiobus_register(aup->mii_bus); 1150 if (err) { 1151 printk(KERN_ERR DRV_NAME " failed to register MDIO bus\n"); 1152 goto err_mdiobus_reg; 1153 } 1154 1155 if (mii_probe(dev) != 0) 1156 goto err_out; 1157 1158 pDBfree = NULL; 1159 /* setup the data buffer descriptors and attach a buffer to each one */ 1160 pDB = aup->db; 1161 for (i = 0; i < (NUM_TX_BUFFS+NUM_RX_BUFFS); i++) { 1162 pDB->pnext = pDBfree; 1163 pDBfree = pDB; 1164 pDB->vaddr = (u32 *)((unsigned)aup->vaddr + MAX_BUF_SIZE*i); 1165 pDB->dma_addr = (dma_addr_t)virt_to_bus(pDB->vaddr); 1166 pDB++; 1167 } 1168 aup->pDBfree = pDBfree; 1169 1170 for (i = 0; i < NUM_RX_DMA; i++) { 1171 pDB = GetFreeDB(aup); 1172 if (!pDB) { 1173 goto err_out; 1174 } 1175 aup->rx_dma_ring[i]->buff_stat = (unsigned)pDB->dma_addr; 1176 aup->rx_db_inuse[i] = pDB; 1177 } 1178 for (i = 0; i < NUM_TX_DMA; i++) { 1179 pDB = GetFreeDB(aup); 1180 if (!pDB) { 1181 goto err_out; 1182 } 1183 aup->tx_dma_ring[i]->buff_stat = (unsigned)pDB->dma_addr; 1184 aup->tx_dma_ring[i]->len = 0; 1185 aup->tx_db_inuse[i] = pDB; 1186 } 1187 1188 dev->base_addr = base->start; 1189 dev->irq = irq; 1190 dev->netdev_ops = &au1000_netdev_ops; 1191 SET_ETHTOOL_OPS(dev, &au1000_ethtool_ops); 1192 dev->watchdog_timeo = ETH_TX_TIMEOUT; 1193 1194 /* 1195 * The boot code uses the ethernet controller, so reset it to start 1196 * fresh. au1000_init() expects that the device is in reset state. 1197 */ 1198 reset_mac(dev); 1199 1200 err = register_netdev(dev); 1201 if (err) { 1202 printk(KERN_ERR DRV_NAME "%s: Cannot register net device, aborting.\n", 1203 dev->name); 1204 goto err_out; 1205 } 1206 1207 printk("%s: Au1xx0 Ethernet found at 0x%lx, irq %d\n", 1208 dev->name, (unsigned long)base->start, irq); 1209 if (version_printed++ == 0) 1210 printk("%s version %s %s\n", DRV_NAME, DRV_VERSION, DRV_AUTHOR); 1211 1212 return 0; 1213 1214err_out: 1215 if (aup->mii_bus != NULL) 1216 mdiobus_unregister(aup->mii_bus); 1217 1218 /* here we should have a valid dev plus aup-> register addresses 1219 * so we can reset the mac properly.*/ 1220 reset_mac(dev); 1221 1222 for (i = 0; i < NUM_RX_DMA; i++) { 1223 if (aup->rx_db_inuse[i]) 1224 ReleaseDB(aup, aup->rx_db_inuse[i]); 1225 } 1226 for (i = 0; i < NUM_TX_DMA; i++) { 1227 if (aup->tx_db_inuse[i]) 1228 ReleaseDB(aup, aup->tx_db_inuse[i]); 1229 } 1230err_mdiobus_reg: 1231 mdiobus_free(aup->mii_bus); 1232err_mdiobus_alloc: 1233 iounmap(aup->enable); 1234err_remap2: 1235 iounmap(aup->mac); 1236err_remap1: 1237 dma_free_noncoherent(NULL, MAX_BUF_SIZE * (NUM_TX_BUFFS + NUM_RX_BUFFS), 1238 (void *)aup->vaddr, aup->dma_addr); 1239err_vaddr: 1240 free_netdev(dev); 1241err_alloc: 1242 release_mem_region(macen->start, resource_size(macen)); 1243err_request: 1244 release_mem_region(base->start, resource_size(base)); 1245out: 1246 return err; 1247} 1248 1249static int __devexit au1000_remove(struct platform_device *pdev) 1250{ 1251 struct net_device *dev = platform_get_drvdata(pdev); 1252 struct au1000_private *aup = netdev_priv(dev); 1253 int i; 1254 struct resource *base, *macen; 1255 1256 platform_set_drvdata(pdev, NULL); 1257 1258 unregister_netdev(dev); 1259 mdiobus_unregister(aup->mii_bus); 1260 mdiobus_free(aup->mii_bus); 1261 1262 for (i = 0; i < NUM_RX_DMA; i++) 1263 if (aup->rx_db_inuse[i]) 1264 ReleaseDB(aup, aup->rx_db_inuse[i]); 1265 1266 for (i = 0; i < NUM_TX_DMA; i++) 1267 if (aup->tx_db_inuse[i]) 1268 ReleaseDB(aup, aup->tx_db_inuse[i]); 1269 1270 dma_free_noncoherent(NULL, MAX_BUF_SIZE * 1271 (NUM_TX_BUFFS + NUM_RX_BUFFS), 1272 (void *)aup->vaddr, aup->dma_addr); 1273 1274 iounmap(aup->mac); 1275 iounmap(aup->enable); 1276 1277 base = platform_get_resource(pdev, IORESOURCE_MEM, 0); 1278 release_mem_region(base->start, resource_size(base)); 1279 1280 macen = platform_get_resource(pdev, IORESOURCE_MEM, 1); 1281 release_mem_region(macen->start, resource_size(macen)); 1282 1283 free_netdev(dev); 1284 1285 return 0; 1286} 1287 1288static struct platform_driver au1000_eth_driver = { 1289 .probe = au1000_probe, 1290 .remove = __devexit_p(au1000_remove), 1291 .driver = { 1292 .name = "au1000-eth", 1293 .owner = THIS_MODULE, 1294 }, 1295}; 1296MODULE_ALIAS("platform:au1000-eth"); 1297 1298 1299static int __init au1000_init_module(void) 1300{ 1301 return platform_driver_register(&au1000_eth_driver); 1302} 1303 1304static void __exit au1000_exit_module(void) 1305{ 1306 platform_driver_unregister(&au1000_eth_driver); 1307} 1308 1309module_init(au1000_init_module); 1310module_exit(au1000_exit_module);