Linux kernel mirror (for testing) git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel os linux
at v2.6.34-rc3 5425 lines 150 kB view raw
1/******************************************************************************* 2 3 Intel PRO/1000 Linux driver 4 Copyright(c) 1999 - 2009 Intel Corporation. 5 6 This program is free software; you can redistribute it and/or modify it 7 under the terms and conditions of the GNU General Public License, 8 version 2, as published by the Free Software Foundation. 9 10 This program is distributed in the hope it will be useful, but WITHOUT 11 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or 12 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for 13 more details. 14 15 You should have received a copy of the GNU General Public License along with 16 this program; if not, write to the Free Software Foundation, Inc., 17 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA. 18 19 The full GNU General Public License is included in this distribution in 20 the file called "COPYING". 21 22 Contact Information: 23 Linux NICS <linux.nics@intel.com> 24 e1000-devel Mailing List <e1000-devel@lists.sourceforge.net> 25 Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497 26 27*******************************************************************************/ 28 29#include <linux/module.h> 30#include <linux/types.h> 31#include <linux/init.h> 32#include <linux/pci.h> 33#include <linux/vmalloc.h> 34#include <linux/pagemap.h> 35#include <linux/delay.h> 36#include <linux/netdevice.h> 37#include <linux/tcp.h> 38#include <linux/ipv6.h> 39#include <net/checksum.h> 40#include <net/ip6_checksum.h> 41#include <linux/mii.h> 42#include <linux/ethtool.h> 43#include <linux/if_vlan.h> 44#include <linux/cpu.h> 45#include <linux/smp.h> 46#include <linux/pm_qos_params.h> 47#include <linux/aer.h> 48 49#include "e1000.h" 50 51#define DRV_VERSION "1.0.2-k2" 52char e1000e_driver_name[] = "e1000e"; 53const char e1000e_driver_version[] = DRV_VERSION; 54 55static const struct e1000_info *e1000_info_tbl[] = { 56 [board_82571] = &e1000_82571_info, 57 [board_82572] = &e1000_82572_info, 58 [board_82573] = &e1000_82573_info, 59 [board_82574] = &e1000_82574_info, 60 [board_82583] = &e1000_82583_info, 61 [board_80003es2lan] = &e1000_es2_info, 62 [board_ich8lan] = &e1000_ich8_info, 63 [board_ich9lan] = &e1000_ich9_info, 64 [board_ich10lan] = &e1000_ich10_info, 65 [board_pchlan] = &e1000_pch_info, 66}; 67 68/** 69 * e1000_desc_unused - calculate if we have unused descriptors 70 **/ 71static int e1000_desc_unused(struct e1000_ring *ring) 72{ 73 if (ring->next_to_clean > ring->next_to_use) 74 return ring->next_to_clean - ring->next_to_use - 1; 75 76 return ring->count + ring->next_to_clean - ring->next_to_use - 1; 77} 78 79/** 80 * e1000_receive_skb - helper function to handle Rx indications 81 * @adapter: board private structure 82 * @status: descriptor status field as written by hardware 83 * @vlan: descriptor vlan field as written by hardware (no le/be conversion) 84 * @skb: pointer to sk_buff to be indicated to stack 85 **/ 86static void e1000_receive_skb(struct e1000_adapter *adapter, 87 struct net_device *netdev, 88 struct sk_buff *skb, 89 u8 status, __le16 vlan) 90{ 91 skb->protocol = eth_type_trans(skb, netdev); 92 93 if (adapter->vlgrp && (status & E1000_RXD_STAT_VP)) 94 vlan_gro_receive(&adapter->napi, adapter->vlgrp, 95 le16_to_cpu(vlan), skb); 96 else 97 napi_gro_receive(&adapter->napi, skb); 98} 99 100/** 101 * e1000_rx_checksum - Receive Checksum Offload for 82543 102 * @adapter: board private structure 103 * @status_err: receive descriptor status and error fields 104 * @csum: receive descriptor csum field 105 * @sk_buff: socket buffer with received data 106 **/ 107static void e1000_rx_checksum(struct e1000_adapter *adapter, u32 status_err, 108 u32 csum, struct sk_buff *skb) 109{ 110 u16 status = (u16)status_err; 111 u8 errors = (u8)(status_err >> 24); 112 skb->ip_summed = CHECKSUM_NONE; 113 114 /* Ignore Checksum bit is set */ 115 if (status & E1000_RXD_STAT_IXSM) 116 return; 117 /* TCP/UDP checksum error bit is set */ 118 if (errors & E1000_RXD_ERR_TCPE) { 119 /* let the stack verify checksum errors */ 120 adapter->hw_csum_err++; 121 return; 122 } 123 124 /* TCP/UDP Checksum has not been calculated */ 125 if (!(status & (E1000_RXD_STAT_TCPCS | E1000_RXD_STAT_UDPCS))) 126 return; 127 128 /* It must be a TCP or UDP packet with a valid checksum */ 129 if (status & E1000_RXD_STAT_TCPCS) { 130 /* TCP checksum is good */ 131 skb->ip_summed = CHECKSUM_UNNECESSARY; 132 } else { 133 /* 134 * IP fragment with UDP payload 135 * Hardware complements the payload checksum, so we undo it 136 * and then put the value in host order for further stack use. 137 */ 138 __sum16 sum = (__force __sum16)htons(csum); 139 skb->csum = csum_unfold(~sum); 140 skb->ip_summed = CHECKSUM_COMPLETE; 141 } 142 adapter->hw_csum_good++; 143} 144 145/** 146 * e1000_alloc_rx_buffers - Replace used receive buffers; legacy & extended 147 * @adapter: address of board private structure 148 **/ 149static void e1000_alloc_rx_buffers(struct e1000_adapter *adapter, 150 int cleaned_count) 151{ 152 struct net_device *netdev = adapter->netdev; 153 struct pci_dev *pdev = adapter->pdev; 154 struct e1000_ring *rx_ring = adapter->rx_ring; 155 struct e1000_rx_desc *rx_desc; 156 struct e1000_buffer *buffer_info; 157 struct sk_buff *skb; 158 unsigned int i; 159 unsigned int bufsz = adapter->rx_buffer_len; 160 161 i = rx_ring->next_to_use; 162 buffer_info = &rx_ring->buffer_info[i]; 163 164 while (cleaned_count--) { 165 skb = buffer_info->skb; 166 if (skb) { 167 skb_trim(skb, 0); 168 goto map_skb; 169 } 170 171 skb = netdev_alloc_skb_ip_align(netdev, bufsz); 172 if (!skb) { 173 /* Better luck next round */ 174 adapter->alloc_rx_buff_failed++; 175 break; 176 } 177 178 buffer_info->skb = skb; 179map_skb: 180 buffer_info->dma = pci_map_single(pdev, skb->data, 181 adapter->rx_buffer_len, 182 PCI_DMA_FROMDEVICE); 183 if (pci_dma_mapping_error(pdev, buffer_info->dma)) { 184 dev_err(&pdev->dev, "RX DMA map failed\n"); 185 adapter->rx_dma_failed++; 186 break; 187 } 188 189 rx_desc = E1000_RX_DESC(*rx_ring, i); 190 rx_desc->buffer_addr = cpu_to_le64(buffer_info->dma); 191 192 i++; 193 if (i == rx_ring->count) 194 i = 0; 195 buffer_info = &rx_ring->buffer_info[i]; 196 } 197 198 if (rx_ring->next_to_use != i) { 199 rx_ring->next_to_use = i; 200 if (i-- == 0) 201 i = (rx_ring->count - 1); 202 203 /* 204 * Force memory writes to complete before letting h/w 205 * know there are new descriptors to fetch. (Only 206 * applicable for weak-ordered memory model archs, 207 * such as IA-64). 208 */ 209 wmb(); 210 writel(i, adapter->hw.hw_addr + rx_ring->tail); 211 } 212} 213 214/** 215 * e1000_alloc_rx_buffers_ps - Replace used receive buffers; packet split 216 * @adapter: address of board private structure 217 **/ 218static void e1000_alloc_rx_buffers_ps(struct e1000_adapter *adapter, 219 int cleaned_count) 220{ 221 struct net_device *netdev = adapter->netdev; 222 struct pci_dev *pdev = adapter->pdev; 223 union e1000_rx_desc_packet_split *rx_desc; 224 struct e1000_ring *rx_ring = adapter->rx_ring; 225 struct e1000_buffer *buffer_info; 226 struct e1000_ps_page *ps_page; 227 struct sk_buff *skb; 228 unsigned int i, j; 229 230 i = rx_ring->next_to_use; 231 buffer_info = &rx_ring->buffer_info[i]; 232 233 while (cleaned_count--) { 234 rx_desc = E1000_RX_DESC_PS(*rx_ring, i); 235 236 for (j = 0; j < PS_PAGE_BUFFERS; j++) { 237 ps_page = &buffer_info->ps_pages[j]; 238 if (j >= adapter->rx_ps_pages) { 239 /* all unused desc entries get hw null ptr */ 240 rx_desc->read.buffer_addr[j+1] = ~cpu_to_le64(0); 241 continue; 242 } 243 if (!ps_page->page) { 244 ps_page->page = alloc_page(GFP_ATOMIC); 245 if (!ps_page->page) { 246 adapter->alloc_rx_buff_failed++; 247 goto no_buffers; 248 } 249 ps_page->dma = pci_map_page(pdev, 250 ps_page->page, 251 0, PAGE_SIZE, 252 PCI_DMA_FROMDEVICE); 253 if (pci_dma_mapping_error(pdev, ps_page->dma)) { 254 dev_err(&adapter->pdev->dev, 255 "RX DMA page map failed\n"); 256 adapter->rx_dma_failed++; 257 goto no_buffers; 258 } 259 } 260 /* 261 * Refresh the desc even if buffer_addrs 262 * didn't change because each write-back 263 * erases this info. 264 */ 265 rx_desc->read.buffer_addr[j+1] = 266 cpu_to_le64(ps_page->dma); 267 } 268 269 skb = netdev_alloc_skb_ip_align(netdev, 270 adapter->rx_ps_bsize0); 271 272 if (!skb) { 273 adapter->alloc_rx_buff_failed++; 274 break; 275 } 276 277 buffer_info->skb = skb; 278 buffer_info->dma = pci_map_single(pdev, skb->data, 279 adapter->rx_ps_bsize0, 280 PCI_DMA_FROMDEVICE); 281 if (pci_dma_mapping_error(pdev, buffer_info->dma)) { 282 dev_err(&pdev->dev, "RX DMA map failed\n"); 283 adapter->rx_dma_failed++; 284 /* cleanup skb */ 285 dev_kfree_skb_any(skb); 286 buffer_info->skb = NULL; 287 break; 288 } 289 290 rx_desc->read.buffer_addr[0] = cpu_to_le64(buffer_info->dma); 291 292 i++; 293 if (i == rx_ring->count) 294 i = 0; 295 buffer_info = &rx_ring->buffer_info[i]; 296 } 297 298no_buffers: 299 if (rx_ring->next_to_use != i) { 300 rx_ring->next_to_use = i; 301 302 if (!(i--)) 303 i = (rx_ring->count - 1); 304 305 /* 306 * Force memory writes to complete before letting h/w 307 * know there are new descriptors to fetch. (Only 308 * applicable for weak-ordered memory model archs, 309 * such as IA-64). 310 */ 311 wmb(); 312 /* 313 * Hardware increments by 16 bytes, but packet split 314 * descriptors are 32 bytes...so we increment tail 315 * twice as much. 316 */ 317 writel(i<<1, adapter->hw.hw_addr + rx_ring->tail); 318 } 319} 320 321/** 322 * e1000_alloc_jumbo_rx_buffers - Replace used jumbo receive buffers 323 * @adapter: address of board private structure 324 * @cleaned_count: number of buffers to allocate this pass 325 **/ 326 327static void e1000_alloc_jumbo_rx_buffers(struct e1000_adapter *adapter, 328 int cleaned_count) 329{ 330 struct net_device *netdev = adapter->netdev; 331 struct pci_dev *pdev = adapter->pdev; 332 struct e1000_rx_desc *rx_desc; 333 struct e1000_ring *rx_ring = adapter->rx_ring; 334 struct e1000_buffer *buffer_info; 335 struct sk_buff *skb; 336 unsigned int i; 337 unsigned int bufsz = 256 - 16 /* for skb_reserve */; 338 339 i = rx_ring->next_to_use; 340 buffer_info = &rx_ring->buffer_info[i]; 341 342 while (cleaned_count--) { 343 skb = buffer_info->skb; 344 if (skb) { 345 skb_trim(skb, 0); 346 goto check_page; 347 } 348 349 skb = netdev_alloc_skb_ip_align(netdev, bufsz); 350 if (unlikely(!skb)) { 351 /* Better luck next round */ 352 adapter->alloc_rx_buff_failed++; 353 break; 354 } 355 356 buffer_info->skb = skb; 357check_page: 358 /* allocate a new page if necessary */ 359 if (!buffer_info->page) { 360 buffer_info->page = alloc_page(GFP_ATOMIC); 361 if (unlikely(!buffer_info->page)) { 362 adapter->alloc_rx_buff_failed++; 363 break; 364 } 365 } 366 367 if (!buffer_info->dma) 368 buffer_info->dma = pci_map_page(pdev, 369 buffer_info->page, 0, 370 PAGE_SIZE, 371 PCI_DMA_FROMDEVICE); 372 373 rx_desc = E1000_RX_DESC(*rx_ring, i); 374 rx_desc->buffer_addr = cpu_to_le64(buffer_info->dma); 375 376 if (unlikely(++i == rx_ring->count)) 377 i = 0; 378 buffer_info = &rx_ring->buffer_info[i]; 379 } 380 381 if (likely(rx_ring->next_to_use != i)) { 382 rx_ring->next_to_use = i; 383 if (unlikely(i-- == 0)) 384 i = (rx_ring->count - 1); 385 386 /* Force memory writes to complete before letting h/w 387 * know there are new descriptors to fetch. (Only 388 * applicable for weak-ordered memory model archs, 389 * such as IA-64). */ 390 wmb(); 391 writel(i, adapter->hw.hw_addr + rx_ring->tail); 392 } 393} 394 395/** 396 * e1000_clean_rx_irq - Send received data up the network stack; legacy 397 * @adapter: board private structure 398 * 399 * the return value indicates whether actual cleaning was done, there 400 * is no guarantee that everything was cleaned 401 **/ 402static bool e1000_clean_rx_irq(struct e1000_adapter *adapter, 403 int *work_done, int work_to_do) 404{ 405 struct net_device *netdev = adapter->netdev; 406 struct pci_dev *pdev = adapter->pdev; 407 struct e1000_hw *hw = &adapter->hw; 408 struct e1000_ring *rx_ring = adapter->rx_ring; 409 struct e1000_rx_desc *rx_desc, *next_rxd; 410 struct e1000_buffer *buffer_info, *next_buffer; 411 u32 length; 412 unsigned int i; 413 int cleaned_count = 0; 414 bool cleaned = 0; 415 unsigned int total_rx_bytes = 0, total_rx_packets = 0; 416 417 i = rx_ring->next_to_clean; 418 rx_desc = E1000_RX_DESC(*rx_ring, i); 419 buffer_info = &rx_ring->buffer_info[i]; 420 421 while (rx_desc->status & E1000_RXD_STAT_DD) { 422 struct sk_buff *skb; 423 u8 status; 424 425 if (*work_done >= work_to_do) 426 break; 427 (*work_done)++; 428 429 status = rx_desc->status; 430 skb = buffer_info->skb; 431 buffer_info->skb = NULL; 432 433 prefetch(skb->data - NET_IP_ALIGN); 434 435 i++; 436 if (i == rx_ring->count) 437 i = 0; 438 next_rxd = E1000_RX_DESC(*rx_ring, i); 439 prefetch(next_rxd); 440 441 next_buffer = &rx_ring->buffer_info[i]; 442 443 cleaned = 1; 444 cleaned_count++; 445 pci_unmap_single(pdev, 446 buffer_info->dma, 447 adapter->rx_buffer_len, 448 PCI_DMA_FROMDEVICE); 449 buffer_info->dma = 0; 450 451 length = le16_to_cpu(rx_desc->length); 452 453 /* 454 * !EOP means multiple descriptors were used to store a single 455 * packet, if that's the case we need to toss it. In fact, we 456 * need to toss every packet with the EOP bit clear and the 457 * next frame that _does_ have the EOP bit set, as it is by 458 * definition only a frame fragment 459 */ 460 if (unlikely(!(status & E1000_RXD_STAT_EOP))) 461 adapter->flags2 |= FLAG2_IS_DISCARDING; 462 463 if (adapter->flags2 & FLAG2_IS_DISCARDING) { 464 /* All receives must fit into a single buffer */ 465 e_dbg("Receive packet consumed multiple buffers\n"); 466 /* recycle */ 467 buffer_info->skb = skb; 468 if (status & E1000_RXD_STAT_EOP) 469 adapter->flags2 &= ~FLAG2_IS_DISCARDING; 470 goto next_desc; 471 } 472 473 if (rx_desc->errors & E1000_RXD_ERR_FRAME_ERR_MASK) { 474 /* recycle */ 475 buffer_info->skb = skb; 476 goto next_desc; 477 } 478 479 /* adjust length to remove Ethernet CRC */ 480 if (!(adapter->flags2 & FLAG2_CRC_STRIPPING)) 481 length -= 4; 482 483 total_rx_bytes += length; 484 total_rx_packets++; 485 486 /* 487 * code added for copybreak, this should improve 488 * performance for small packets with large amounts 489 * of reassembly being done in the stack 490 */ 491 if (length < copybreak) { 492 struct sk_buff *new_skb = 493 netdev_alloc_skb_ip_align(netdev, length); 494 if (new_skb) { 495 skb_copy_to_linear_data_offset(new_skb, 496 -NET_IP_ALIGN, 497 (skb->data - 498 NET_IP_ALIGN), 499 (length + 500 NET_IP_ALIGN)); 501 /* save the skb in buffer_info as good */ 502 buffer_info->skb = skb; 503 skb = new_skb; 504 } 505 /* else just continue with the old one */ 506 } 507 /* end copybreak code */ 508 skb_put(skb, length); 509 510 /* Receive Checksum Offload */ 511 e1000_rx_checksum(adapter, 512 (u32)(status) | 513 ((u32)(rx_desc->errors) << 24), 514 le16_to_cpu(rx_desc->csum), skb); 515 516 e1000_receive_skb(adapter, netdev, skb,status,rx_desc->special); 517 518next_desc: 519 rx_desc->status = 0; 520 521 /* return some buffers to hardware, one at a time is too slow */ 522 if (cleaned_count >= E1000_RX_BUFFER_WRITE) { 523 adapter->alloc_rx_buf(adapter, cleaned_count); 524 cleaned_count = 0; 525 } 526 527 /* use prefetched values */ 528 rx_desc = next_rxd; 529 buffer_info = next_buffer; 530 } 531 rx_ring->next_to_clean = i; 532 533 cleaned_count = e1000_desc_unused(rx_ring); 534 if (cleaned_count) 535 adapter->alloc_rx_buf(adapter, cleaned_count); 536 537 adapter->total_rx_bytes += total_rx_bytes; 538 adapter->total_rx_packets += total_rx_packets; 539 netdev->stats.rx_bytes += total_rx_bytes; 540 netdev->stats.rx_packets += total_rx_packets; 541 return cleaned; 542} 543 544static void e1000_put_txbuf(struct e1000_adapter *adapter, 545 struct e1000_buffer *buffer_info) 546{ 547 if (buffer_info->dma) { 548 if (buffer_info->mapped_as_page) 549 pci_unmap_page(adapter->pdev, buffer_info->dma, 550 buffer_info->length, PCI_DMA_TODEVICE); 551 else 552 pci_unmap_single(adapter->pdev, buffer_info->dma, 553 buffer_info->length, 554 PCI_DMA_TODEVICE); 555 buffer_info->dma = 0; 556 } 557 if (buffer_info->skb) { 558 dev_kfree_skb_any(buffer_info->skb); 559 buffer_info->skb = NULL; 560 } 561 buffer_info->time_stamp = 0; 562} 563 564static void e1000_print_hw_hang(struct work_struct *work) 565{ 566 struct e1000_adapter *adapter = container_of(work, 567 struct e1000_adapter, 568 print_hang_task); 569 struct e1000_ring *tx_ring = adapter->tx_ring; 570 unsigned int i = tx_ring->next_to_clean; 571 unsigned int eop = tx_ring->buffer_info[i].next_to_watch; 572 struct e1000_tx_desc *eop_desc = E1000_TX_DESC(*tx_ring, eop); 573 struct e1000_hw *hw = &adapter->hw; 574 u16 phy_status, phy_1000t_status, phy_ext_status; 575 u16 pci_status; 576 577 e1e_rphy(hw, PHY_STATUS, &phy_status); 578 e1e_rphy(hw, PHY_1000T_STATUS, &phy_1000t_status); 579 e1e_rphy(hw, PHY_EXT_STATUS, &phy_ext_status); 580 581 pci_read_config_word(adapter->pdev, PCI_STATUS, &pci_status); 582 583 /* detected Hardware unit hang */ 584 e_err("Detected Hardware Unit Hang:\n" 585 " TDH <%x>\n" 586 " TDT <%x>\n" 587 " next_to_use <%x>\n" 588 " next_to_clean <%x>\n" 589 "buffer_info[next_to_clean]:\n" 590 " time_stamp <%lx>\n" 591 " next_to_watch <%x>\n" 592 " jiffies <%lx>\n" 593 " next_to_watch.status <%x>\n" 594 "MAC Status <%x>\n" 595 "PHY Status <%x>\n" 596 "PHY 1000BASE-T Status <%x>\n" 597 "PHY Extended Status <%x>\n" 598 "PCI Status <%x>\n", 599 readl(adapter->hw.hw_addr + tx_ring->head), 600 readl(adapter->hw.hw_addr + tx_ring->tail), 601 tx_ring->next_to_use, 602 tx_ring->next_to_clean, 603 tx_ring->buffer_info[eop].time_stamp, 604 eop, 605 jiffies, 606 eop_desc->upper.fields.status, 607 er32(STATUS), 608 phy_status, 609 phy_1000t_status, 610 phy_ext_status, 611 pci_status); 612} 613 614/** 615 * e1000_clean_tx_irq - Reclaim resources after transmit completes 616 * @adapter: board private structure 617 * 618 * the return value indicates whether actual cleaning was done, there 619 * is no guarantee that everything was cleaned 620 **/ 621static bool e1000_clean_tx_irq(struct e1000_adapter *adapter) 622{ 623 struct net_device *netdev = adapter->netdev; 624 struct e1000_hw *hw = &adapter->hw; 625 struct e1000_ring *tx_ring = adapter->tx_ring; 626 struct e1000_tx_desc *tx_desc, *eop_desc; 627 struct e1000_buffer *buffer_info; 628 unsigned int i, eop; 629 unsigned int count = 0; 630 unsigned int total_tx_bytes = 0, total_tx_packets = 0; 631 632 i = tx_ring->next_to_clean; 633 eop = tx_ring->buffer_info[i].next_to_watch; 634 eop_desc = E1000_TX_DESC(*tx_ring, eop); 635 636 while ((eop_desc->upper.data & cpu_to_le32(E1000_TXD_STAT_DD)) && 637 (count < tx_ring->count)) { 638 bool cleaned = false; 639 for (; !cleaned; count++) { 640 tx_desc = E1000_TX_DESC(*tx_ring, i); 641 buffer_info = &tx_ring->buffer_info[i]; 642 cleaned = (i == eop); 643 644 if (cleaned) { 645 struct sk_buff *skb = buffer_info->skb; 646 unsigned int segs, bytecount; 647 segs = skb_shinfo(skb)->gso_segs ?: 1; 648 /* multiply data chunks by size of headers */ 649 bytecount = ((segs - 1) * skb_headlen(skb)) + 650 skb->len; 651 total_tx_packets += segs; 652 total_tx_bytes += bytecount; 653 } 654 655 e1000_put_txbuf(adapter, buffer_info); 656 tx_desc->upper.data = 0; 657 658 i++; 659 if (i == tx_ring->count) 660 i = 0; 661 } 662 663 eop = tx_ring->buffer_info[i].next_to_watch; 664 eop_desc = E1000_TX_DESC(*tx_ring, eop); 665 } 666 667 tx_ring->next_to_clean = i; 668 669#define TX_WAKE_THRESHOLD 32 670 if (count && netif_carrier_ok(netdev) && 671 e1000_desc_unused(tx_ring) >= TX_WAKE_THRESHOLD) { 672 /* Make sure that anybody stopping the queue after this 673 * sees the new next_to_clean. 674 */ 675 smp_mb(); 676 677 if (netif_queue_stopped(netdev) && 678 !(test_bit(__E1000_DOWN, &adapter->state))) { 679 netif_wake_queue(netdev); 680 ++adapter->restart_queue; 681 } 682 } 683 684 if (adapter->detect_tx_hung) { 685 /* 686 * Detect a transmit hang in hardware, this serializes the 687 * check with the clearing of time_stamp and movement of i 688 */ 689 adapter->detect_tx_hung = 0; 690 if (tx_ring->buffer_info[i].time_stamp && 691 time_after(jiffies, tx_ring->buffer_info[i].time_stamp 692 + (adapter->tx_timeout_factor * HZ)) && 693 !(er32(STATUS) & E1000_STATUS_TXOFF)) { 694 schedule_work(&adapter->print_hang_task); 695 netif_stop_queue(netdev); 696 } 697 } 698 adapter->total_tx_bytes += total_tx_bytes; 699 adapter->total_tx_packets += total_tx_packets; 700 netdev->stats.tx_bytes += total_tx_bytes; 701 netdev->stats.tx_packets += total_tx_packets; 702 return (count < tx_ring->count); 703} 704 705/** 706 * e1000_clean_rx_irq_ps - Send received data up the network stack; packet split 707 * @adapter: board private structure 708 * 709 * the return value indicates whether actual cleaning was done, there 710 * is no guarantee that everything was cleaned 711 **/ 712static bool e1000_clean_rx_irq_ps(struct e1000_adapter *adapter, 713 int *work_done, int work_to_do) 714{ 715 struct e1000_hw *hw = &adapter->hw; 716 union e1000_rx_desc_packet_split *rx_desc, *next_rxd; 717 struct net_device *netdev = adapter->netdev; 718 struct pci_dev *pdev = adapter->pdev; 719 struct e1000_ring *rx_ring = adapter->rx_ring; 720 struct e1000_buffer *buffer_info, *next_buffer; 721 struct e1000_ps_page *ps_page; 722 struct sk_buff *skb; 723 unsigned int i, j; 724 u32 length, staterr; 725 int cleaned_count = 0; 726 bool cleaned = 0; 727 unsigned int total_rx_bytes = 0, total_rx_packets = 0; 728 729 i = rx_ring->next_to_clean; 730 rx_desc = E1000_RX_DESC_PS(*rx_ring, i); 731 staterr = le32_to_cpu(rx_desc->wb.middle.status_error); 732 buffer_info = &rx_ring->buffer_info[i]; 733 734 while (staterr & E1000_RXD_STAT_DD) { 735 if (*work_done >= work_to_do) 736 break; 737 (*work_done)++; 738 skb = buffer_info->skb; 739 740 /* in the packet split case this is header only */ 741 prefetch(skb->data - NET_IP_ALIGN); 742 743 i++; 744 if (i == rx_ring->count) 745 i = 0; 746 next_rxd = E1000_RX_DESC_PS(*rx_ring, i); 747 prefetch(next_rxd); 748 749 next_buffer = &rx_ring->buffer_info[i]; 750 751 cleaned = 1; 752 cleaned_count++; 753 pci_unmap_single(pdev, buffer_info->dma, 754 adapter->rx_ps_bsize0, 755 PCI_DMA_FROMDEVICE); 756 buffer_info->dma = 0; 757 758 /* see !EOP comment in other rx routine */ 759 if (!(staterr & E1000_RXD_STAT_EOP)) 760 adapter->flags2 |= FLAG2_IS_DISCARDING; 761 762 if (adapter->flags2 & FLAG2_IS_DISCARDING) { 763 e_dbg("Packet Split buffers didn't pick up the full " 764 "packet\n"); 765 dev_kfree_skb_irq(skb); 766 if (staterr & E1000_RXD_STAT_EOP) 767 adapter->flags2 &= ~FLAG2_IS_DISCARDING; 768 goto next_desc; 769 } 770 771 if (staterr & E1000_RXDEXT_ERR_FRAME_ERR_MASK) { 772 dev_kfree_skb_irq(skb); 773 goto next_desc; 774 } 775 776 length = le16_to_cpu(rx_desc->wb.middle.length0); 777 778 if (!length) { 779 e_dbg("Last part of the packet spanning multiple " 780 "descriptors\n"); 781 dev_kfree_skb_irq(skb); 782 goto next_desc; 783 } 784 785 /* Good Receive */ 786 skb_put(skb, length); 787 788 { 789 /* 790 * this looks ugly, but it seems compiler issues make it 791 * more efficient than reusing j 792 */ 793 int l1 = le16_to_cpu(rx_desc->wb.upper.length[0]); 794 795 /* 796 * page alloc/put takes too long and effects small packet 797 * throughput, so unsplit small packets and save the alloc/put 798 * only valid in softirq (napi) context to call kmap_* 799 */ 800 if (l1 && (l1 <= copybreak) && 801 ((length + l1) <= adapter->rx_ps_bsize0)) { 802 u8 *vaddr; 803 804 ps_page = &buffer_info->ps_pages[0]; 805 806 /* 807 * there is no documentation about how to call 808 * kmap_atomic, so we can't hold the mapping 809 * very long 810 */ 811 pci_dma_sync_single_for_cpu(pdev, ps_page->dma, 812 PAGE_SIZE, PCI_DMA_FROMDEVICE); 813 vaddr = kmap_atomic(ps_page->page, KM_SKB_DATA_SOFTIRQ); 814 memcpy(skb_tail_pointer(skb), vaddr, l1); 815 kunmap_atomic(vaddr, KM_SKB_DATA_SOFTIRQ); 816 pci_dma_sync_single_for_device(pdev, ps_page->dma, 817 PAGE_SIZE, PCI_DMA_FROMDEVICE); 818 819 /* remove the CRC */ 820 if (!(adapter->flags2 & FLAG2_CRC_STRIPPING)) 821 l1 -= 4; 822 823 skb_put(skb, l1); 824 goto copydone; 825 } /* if */ 826 } 827 828 for (j = 0; j < PS_PAGE_BUFFERS; j++) { 829 length = le16_to_cpu(rx_desc->wb.upper.length[j]); 830 if (!length) 831 break; 832 833 ps_page = &buffer_info->ps_pages[j]; 834 pci_unmap_page(pdev, ps_page->dma, PAGE_SIZE, 835 PCI_DMA_FROMDEVICE); 836 ps_page->dma = 0; 837 skb_fill_page_desc(skb, j, ps_page->page, 0, length); 838 ps_page->page = NULL; 839 skb->len += length; 840 skb->data_len += length; 841 skb->truesize += length; 842 } 843 844 /* strip the ethernet crc, problem is we're using pages now so 845 * this whole operation can get a little cpu intensive 846 */ 847 if (!(adapter->flags2 & FLAG2_CRC_STRIPPING)) 848 pskb_trim(skb, skb->len - 4); 849 850copydone: 851 total_rx_bytes += skb->len; 852 total_rx_packets++; 853 854 e1000_rx_checksum(adapter, staterr, le16_to_cpu( 855 rx_desc->wb.lower.hi_dword.csum_ip.csum), skb); 856 857 if (rx_desc->wb.upper.header_status & 858 cpu_to_le16(E1000_RXDPS_HDRSTAT_HDRSP)) 859 adapter->rx_hdr_split++; 860 861 e1000_receive_skb(adapter, netdev, skb, 862 staterr, rx_desc->wb.middle.vlan); 863 864next_desc: 865 rx_desc->wb.middle.status_error &= cpu_to_le32(~0xFF); 866 buffer_info->skb = NULL; 867 868 /* return some buffers to hardware, one at a time is too slow */ 869 if (cleaned_count >= E1000_RX_BUFFER_WRITE) { 870 adapter->alloc_rx_buf(adapter, cleaned_count); 871 cleaned_count = 0; 872 } 873 874 /* use prefetched values */ 875 rx_desc = next_rxd; 876 buffer_info = next_buffer; 877 878 staterr = le32_to_cpu(rx_desc->wb.middle.status_error); 879 } 880 rx_ring->next_to_clean = i; 881 882 cleaned_count = e1000_desc_unused(rx_ring); 883 if (cleaned_count) 884 adapter->alloc_rx_buf(adapter, cleaned_count); 885 886 adapter->total_rx_bytes += total_rx_bytes; 887 adapter->total_rx_packets += total_rx_packets; 888 netdev->stats.rx_bytes += total_rx_bytes; 889 netdev->stats.rx_packets += total_rx_packets; 890 return cleaned; 891} 892 893/** 894 * e1000_consume_page - helper function 895 **/ 896static void e1000_consume_page(struct e1000_buffer *bi, struct sk_buff *skb, 897 u16 length) 898{ 899 bi->page = NULL; 900 skb->len += length; 901 skb->data_len += length; 902 skb->truesize += length; 903} 904 905/** 906 * e1000_clean_jumbo_rx_irq - Send received data up the network stack; legacy 907 * @adapter: board private structure 908 * 909 * the return value indicates whether actual cleaning was done, there 910 * is no guarantee that everything was cleaned 911 **/ 912 913static bool e1000_clean_jumbo_rx_irq(struct e1000_adapter *adapter, 914 int *work_done, int work_to_do) 915{ 916 struct net_device *netdev = adapter->netdev; 917 struct pci_dev *pdev = adapter->pdev; 918 struct e1000_ring *rx_ring = adapter->rx_ring; 919 struct e1000_rx_desc *rx_desc, *next_rxd; 920 struct e1000_buffer *buffer_info, *next_buffer; 921 u32 length; 922 unsigned int i; 923 int cleaned_count = 0; 924 bool cleaned = false; 925 unsigned int total_rx_bytes=0, total_rx_packets=0; 926 927 i = rx_ring->next_to_clean; 928 rx_desc = E1000_RX_DESC(*rx_ring, i); 929 buffer_info = &rx_ring->buffer_info[i]; 930 931 while (rx_desc->status & E1000_RXD_STAT_DD) { 932 struct sk_buff *skb; 933 u8 status; 934 935 if (*work_done >= work_to_do) 936 break; 937 (*work_done)++; 938 939 status = rx_desc->status; 940 skb = buffer_info->skb; 941 buffer_info->skb = NULL; 942 943 ++i; 944 if (i == rx_ring->count) 945 i = 0; 946 next_rxd = E1000_RX_DESC(*rx_ring, i); 947 prefetch(next_rxd); 948 949 next_buffer = &rx_ring->buffer_info[i]; 950 951 cleaned = true; 952 cleaned_count++; 953 pci_unmap_page(pdev, buffer_info->dma, PAGE_SIZE, 954 PCI_DMA_FROMDEVICE); 955 buffer_info->dma = 0; 956 957 length = le16_to_cpu(rx_desc->length); 958 959 /* errors is only valid for DD + EOP descriptors */ 960 if (unlikely((status & E1000_RXD_STAT_EOP) && 961 (rx_desc->errors & E1000_RXD_ERR_FRAME_ERR_MASK))) { 962 /* recycle both page and skb */ 963 buffer_info->skb = skb; 964 /* an error means any chain goes out the window 965 * too */ 966 if (rx_ring->rx_skb_top) 967 dev_kfree_skb(rx_ring->rx_skb_top); 968 rx_ring->rx_skb_top = NULL; 969 goto next_desc; 970 } 971 972#define rxtop rx_ring->rx_skb_top 973 if (!(status & E1000_RXD_STAT_EOP)) { 974 /* this descriptor is only the beginning (or middle) */ 975 if (!rxtop) { 976 /* this is the beginning of a chain */ 977 rxtop = skb; 978 skb_fill_page_desc(rxtop, 0, buffer_info->page, 979 0, length); 980 } else { 981 /* this is the middle of a chain */ 982 skb_fill_page_desc(rxtop, 983 skb_shinfo(rxtop)->nr_frags, 984 buffer_info->page, 0, length); 985 /* re-use the skb, only consumed the page */ 986 buffer_info->skb = skb; 987 } 988 e1000_consume_page(buffer_info, rxtop, length); 989 goto next_desc; 990 } else { 991 if (rxtop) { 992 /* end of the chain */ 993 skb_fill_page_desc(rxtop, 994 skb_shinfo(rxtop)->nr_frags, 995 buffer_info->page, 0, length); 996 /* re-use the current skb, we only consumed the 997 * page */ 998 buffer_info->skb = skb; 999 skb = rxtop; 1000 rxtop = NULL; 1001 e1000_consume_page(buffer_info, skb, length); 1002 } else { 1003 /* no chain, got EOP, this buf is the packet 1004 * copybreak to save the put_page/alloc_page */ 1005 if (length <= copybreak && 1006 skb_tailroom(skb) >= length) { 1007 u8 *vaddr; 1008 vaddr = kmap_atomic(buffer_info->page, 1009 KM_SKB_DATA_SOFTIRQ); 1010 memcpy(skb_tail_pointer(skb), vaddr, 1011 length); 1012 kunmap_atomic(vaddr, 1013 KM_SKB_DATA_SOFTIRQ); 1014 /* re-use the page, so don't erase 1015 * buffer_info->page */ 1016 skb_put(skb, length); 1017 } else { 1018 skb_fill_page_desc(skb, 0, 1019 buffer_info->page, 0, 1020 length); 1021 e1000_consume_page(buffer_info, skb, 1022 length); 1023 } 1024 } 1025 } 1026 1027 /* Receive Checksum Offload XXX recompute due to CRC strip? */ 1028 e1000_rx_checksum(adapter, 1029 (u32)(status) | 1030 ((u32)(rx_desc->errors) << 24), 1031 le16_to_cpu(rx_desc->csum), skb); 1032 1033 /* probably a little skewed due to removing CRC */ 1034 total_rx_bytes += skb->len; 1035 total_rx_packets++; 1036 1037 /* eth type trans needs skb->data to point to something */ 1038 if (!pskb_may_pull(skb, ETH_HLEN)) { 1039 e_err("pskb_may_pull failed.\n"); 1040 dev_kfree_skb(skb); 1041 goto next_desc; 1042 } 1043 1044 e1000_receive_skb(adapter, netdev, skb, status, 1045 rx_desc->special); 1046 1047next_desc: 1048 rx_desc->status = 0; 1049 1050 /* return some buffers to hardware, one at a time is too slow */ 1051 if (unlikely(cleaned_count >= E1000_RX_BUFFER_WRITE)) { 1052 adapter->alloc_rx_buf(adapter, cleaned_count); 1053 cleaned_count = 0; 1054 } 1055 1056 /* use prefetched values */ 1057 rx_desc = next_rxd; 1058 buffer_info = next_buffer; 1059 } 1060 rx_ring->next_to_clean = i; 1061 1062 cleaned_count = e1000_desc_unused(rx_ring); 1063 if (cleaned_count) 1064 adapter->alloc_rx_buf(adapter, cleaned_count); 1065 1066 adapter->total_rx_bytes += total_rx_bytes; 1067 adapter->total_rx_packets += total_rx_packets; 1068 netdev->stats.rx_bytes += total_rx_bytes; 1069 netdev->stats.rx_packets += total_rx_packets; 1070 return cleaned; 1071} 1072 1073/** 1074 * e1000_clean_rx_ring - Free Rx Buffers per Queue 1075 * @adapter: board private structure 1076 **/ 1077static void e1000_clean_rx_ring(struct e1000_adapter *adapter) 1078{ 1079 struct e1000_ring *rx_ring = adapter->rx_ring; 1080 struct e1000_buffer *buffer_info; 1081 struct e1000_ps_page *ps_page; 1082 struct pci_dev *pdev = adapter->pdev; 1083 unsigned int i, j; 1084 1085 /* Free all the Rx ring sk_buffs */ 1086 for (i = 0; i < rx_ring->count; i++) { 1087 buffer_info = &rx_ring->buffer_info[i]; 1088 if (buffer_info->dma) { 1089 if (adapter->clean_rx == e1000_clean_rx_irq) 1090 pci_unmap_single(pdev, buffer_info->dma, 1091 adapter->rx_buffer_len, 1092 PCI_DMA_FROMDEVICE); 1093 else if (adapter->clean_rx == e1000_clean_jumbo_rx_irq) 1094 pci_unmap_page(pdev, buffer_info->dma, 1095 PAGE_SIZE, 1096 PCI_DMA_FROMDEVICE); 1097 else if (adapter->clean_rx == e1000_clean_rx_irq_ps) 1098 pci_unmap_single(pdev, buffer_info->dma, 1099 adapter->rx_ps_bsize0, 1100 PCI_DMA_FROMDEVICE); 1101 buffer_info->dma = 0; 1102 } 1103 1104 if (buffer_info->page) { 1105 put_page(buffer_info->page); 1106 buffer_info->page = NULL; 1107 } 1108 1109 if (buffer_info->skb) { 1110 dev_kfree_skb(buffer_info->skb); 1111 buffer_info->skb = NULL; 1112 } 1113 1114 for (j = 0; j < PS_PAGE_BUFFERS; j++) { 1115 ps_page = &buffer_info->ps_pages[j]; 1116 if (!ps_page->page) 1117 break; 1118 pci_unmap_page(pdev, ps_page->dma, PAGE_SIZE, 1119 PCI_DMA_FROMDEVICE); 1120 ps_page->dma = 0; 1121 put_page(ps_page->page); 1122 ps_page->page = NULL; 1123 } 1124 } 1125 1126 /* there also may be some cached data from a chained receive */ 1127 if (rx_ring->rx_skb_top) { 1128 dev_kfree_skb(rx_ring->rx_skb_top); 1129 rx_ring->rx_skb_top = NULL; 1130 } 1131 1132 /* Zero out the descriptor ring */ 1133 memset(rx_ring->desc, 0, rx_ring->size); 1134 1135 rx_ring->next_to_clean = 0; 1136 rx_ring->next_to_use = 0; 1137 adapter->flags2 &= ~FLAG2_IS_DISCARDING; 1138 1139 writel(0, adapter->hw.hw_addr + rx_ring->head); 1140 writel(0, adapter->hw.hw_addr + rx_ring->tail); 1141} 1142 1143static void e1000e_downshift_workaround(struct work_struct *work) 1144{ 1145 struct e1000_adapter *adapter = container_of(work, 1146 struct e1000_adapter, downshift_task); 1147 1148 e1000e_gig_downshift_workaround_ich8lan(&adapter->hw); 1149} 1150 1151/** 1152 * e1000_intr_msi - Interrupt Handler 1153 * @irq: interrupt number 1154 * @data: pointer to a network interface device structure 1155 **/ 1156static irqreturn_t e1000_intr_msi(int irq, void *data) 1157{ 1158 struct net_device *netdev = data; 1159 struct e1000_adapter *adapter = netdev_priv(netdev); 1160 struct e1000_hw *hw = &adapter->hw; 1161 u32 icr = er32(ICR); 1162 1163 /* 1164 * read ICR disables interrupts using IAM 1165 */ 1166 1167 if (icr & E1000_ICR_LSC) { 1168 hw->mac.get_link_status = 1; 1169 /* 1170 * ICH8 workaround-- Call gig speed drop workaround on cable 1171 * disconnect (LSC) before accessing any PHY registers 1172 */ 1173 if ((adapter->flags & FLAG_LSC_GIG_SPEED_DROP) && 1174 (!(er32(STATUS) & E1000_STATUS_LU))) 1175 schedule_work(&adapter->downshift_task); 1176 1177 /* 1178 * 80003ES2LAN workaround-- For packet buffer work-around on 1179 * link down event; disable receives here in the ISR and reset 1180 * adapter in watchdog 1181 */ 1182 if (netif_carrier_ok(netdev) && 1183 adapter->flags & FLAG_RX_NEEDS_RESTART) { 1184 /* disable receives */ 1185 u32 rctl = er32(RCTL); 1186 ew32(RCTL, rctl & ~E1000_RCTL_EN); 1187 adapter->flags |= FLAG_RX_RESTART_NOW; 1188 } 1189 /* guard against interrupt when we're going down */ 1190 if (!test_bit(__E1000_DOWN, &adapter->state)) 1191 mod_timer(&adapter->watchdog_timer, jiffies + 1); 1192 } 1193 1194 if (napi_schedule_prep(&adapter->napi)) { 1195 adapter->total_tx_bytes = 0; 1196 adapter->total_tx_packets = 0; 1197 adapter->total_rx_bytes = 0; 1198 adapter->total_rx_packets = 0; 1199 __napi_schedule(&adapter->napi); 1200 } 1201 1202 return IRQ_HANDLED; 1203} 1204 1205/** 1206 * e1000_intr - Interrupt Handler 1207 * @irq: interrupt number 1208 * @data: pointer to a network interface device structure 1209 **/ 1210static irqreturn_t e1000_intr(int irq, void *data) 1211{ 1212 struct net_device *netdev = data; 1213 struct e1000_adapter *adapter = netdev_priv(netdev); 1214 struct e1000_hw *hw = &adapter->hw; 1215 u32 rctl, icr = er32(ICR); 1216 1217 if (!icr || test_bit(__E1000_DOWN, &adapter->state)) 1218 return IRQ_NONE; /* Not our interrupt */ 1219 1220 /* 1221 * IMS will not auto-mask if INT_ASSERTED is not set, and if it is 1222 * not set, then the adapter didn't send an interrupt 1223 */ 1224 if (!(icr & E1000_ICR_INT_ASSERTED)) 1225 return IRQ_NONE; 1226 1227 /* 1228 * Interrupt Auto-Mask...upon reading ICR, 1229 * interrupts are masked. No need for the 1230 * IMC write 1231 */ 1232 1233 if (icr & E1000_ICR_LSC) { 1234 hw->mac.get_link_status = 1; 1235 /* 1236 * ICH8 workaround-- Call gig speed drop workaround on cable 1237 * disconnect (LSC) before accessing any PHY registers 1238 */ 1239 if ((adapter->flags & FLAG_LSC_GIG_SPEED_DROP) && 1240 (!(er32(STATUS) & E1000_STATUS_LU))) 1241 schedule_work(&adapter->downshift_task); 1242 1243 /* 1244 * 80003ES2LAN workaround-- 1245 * For packet buffer work-around on link down event; 1246 * disable receives here in the ISR and 1247 * reset adapter in watchdog 1248 */ 1249 if (netif_carrier_ok(netdev) && 1250 (adapter->flags & FLAG_RX_NEEDS_RESTART)) { 1251 /* disable receives */ 1252 rctl = er32(RCTL); 1253 ew32(RCTL, rctl & ~E1000_RCTL_EN); 1254 adapter->flags |= FLAG_RX_RESTART_NOW; 1255 } 1256 /* guard against interrupt when we're going down */ 1257 if (!test_bit(__E1000_DOWN, &adapter->state)) 1258 mod_timer(&adapter->watchdog_timer, jiffies + 1); 1259 } 1260 1261 if (napi_schedule_prep(&adapter->napi)) { 1262 adapter->total_tx_bytes = 0; 1263 adapter->total_tx_packets = 0; 1264 adapter->total_rx_bytes = 0; 1265 adapter->total_rx_packets = 0; 1266 __napi_schedule(&adapter->napi); 1267 } 1268 1269 return IRQ_HANDLED; 1270} 1271 1272static irqreturn_t e1000_msix_other(int irq, void *data) 1273{ 1274 struct net_device *netdev = data; 1275 struct e1000_adapter *adapter = netdev_priv(netdev); 1276 struct e1000_hw *hw = &adapter->hw; 1277 u32 icr = er32(ICR); 1278 1279 if (!(icr & E1000_ICR_INT_ASSERTED)) { 1280 if (!test_bit(__E1000_DOWN, &adapter->state)) 1281 ew32(IMS, E1000_IMS_OTHER); 1282 return IRQ_NONE; 1283 } 1284 1285 if (icr & adapter->eiac_mask) 1286 ew32(ICS, (icr & adapter->eiac_mask)); 1287 1288 if (icr & E1000_ICR_OTHER) { 1289 if (!(icr & E1000_ICR_LSC)) 1290 goto no_link_interrupt; 1291 hw->mac.get_link_status = 1; 1292 /* guard against interrupt when we're going down */ 1293 if (!test_bit(__E1000_DOWN, &adapter->state)) 1294 mod_timer(&adapter->watchdog_timer, jiffies + 1); 1295 } 1296 1297no_link_interrupt: 1298 if (!test_bit(__E1000_DOWN, &adapter->state)) 1299 ew32(IMS, E1000_IMS_LSC | E1000_IMS_OTHER); 1300 1301 return IRQ_HANDLED; 1302} 1303 1304 1305static irqreturn_t e1000_intr_msix_tx(int irq, void *data) 1306{ 1307 struct net_device *netdev = data; 1308 struct e1000_adapter *adapter = netdev_priv(netdev); 1309 struct e1000_hw *hw = &adapter->hw; 1310 struct e1000_ring *tx_ring = adapter->tx_ring; 1311 1312 1313 adapter->total_tx_bytes = 0; 1314 adapter->total_tx_packets = 0; 1315 1316 if (!e1000_clean_tx_irq(adapter)) 1317 /* Ring was not completely cleaned, so fire another interrupt */ 1318 ew32(ICS, tx_ring->ims_val); 1319 1320 return IRQ_HANDLED; 1321} 1322 1323static irqreturn_t e1000_intr_msix_rx(int irq, void *data) 1324{ 1325 struct net_device *netdev = data; 1326 struct e1000_adapter *adapter = netdev_priv(netdev); 1327 1328 /* Write the ITR value calculated at the end of the 1329 * previous interrupt. 1330 */ 1331 if (adapter->rx_ring->set_itr) { 1332 writel(1000000000 / (adapter->rx_ring->itr_val * 256), 1333 adapter->hw.hw_addr + adapter->rx_ring->itr_register); 1334 adapter->rx_ring->set_itr = 0; 1335 } 1336 1337 if (napi_schedule_prep(&adapter->napi)) { 1338 adapter->total_rx_bytes = 0; 1339 adapter->total_rx_packets = 0; 1340 __napi_schedule(&adapter->napi); 1341 } 1342 return IRQ_HANDLED; 1343} 1344 1345/** 1346 * e1000_configure_msix - Configure MSI-X hardware 1347 * 1348 * e1000_configure_msix sets up the hardware to properly 1349 * generate MSI-X interrupts. 1350 **/ 1351static void e1000_configure_msix(struct e1000_adapter *adapter) 1352{ 1353 struct e1000_hw *hw = &adapter->hw; 1354 struct e1000_ring *rx_ring = adapter->rx_ring; 1355 struct e1000_ring *tx_ring = adapter->tx_ring; 1356 int vector = 0; 1357 u32 ctrl_ext, ivar = 0; 1358 1359 adapter->eiac_mask = 0; 1360 1361 /* Workaround issue with spurious interrupts on 82574 in MSI-X mode */ 1362 if (hw->mac.type == e1000_82574) { 1363 u32 rfctl = er32(RFCTL); 1364 rfctl |= E1000_RFCTL_ACK_DIS; 1365 ew32(RFCTL, rfctl); 1366 } 1367 1368#define E1000_IVAR_INT_ALLOC_VALID 0x8 1369 /* Configure Rx vector */ 1370 rx_ring->ims_val = E1000_IMS_RXQ0; 1371 adapter->eiac_mask |= rx_ring->ims_val; 1372 if (rx_ring->itr_val) 1373 writel(1000000000 / (rx_ring->itr_val * 256), 1374 hw->hw_addr + rx_ring->itr_register); 1375 else 1376 writel(1, hw->hw_addr + rx_ring->itr_register); 1377 ivar = E1000_IVAR_INT_ALLOC_VALID | vector; 1378 1379 /* Configure Tx vector */ 1380 tx_ring->ims_val = E1000_IMS_TXQ0; 1381 vector++; 1382 if (tx_ring->itr_val) 1383 writel(1000000000 / (tx_ring->itr_val * 256), 1384 hw->hw_addr + tx_ring->itr_register); 1385 else 1386 writel(1, hw->hw_addr + tx_ring->itr_register); 1387 adapter->eiac_mask |= tx_ring->ims_val; 1388 ivar |= ((E1000_IVAR_INT_ALLOC_VALID | vector) << 8); 1389 1390 /* set vector for Other Causes, e.g. link changes */ 1391 vector++; 1392 ivar |= ((E1000_IVAR_INT_ALLOC_VALID | vector) << 16); 1393 if (rx_ring->itr_val) 1394 writel(1000000000 / (rx_ring->itr_val * 256), 1395 hw->hw_addr + E1000_EITR_82574(vector)); 1396 else 1397 writel(1, hw->hw_addr + E1000_EITR_82574(vector)); 1398 1399 /* Cause Tx interrupts on every write back */ 1400 ivar |= (1 << 31); 1401 1402 ew32(IVAR, ivar); 1403 1404 /* enable MSI-X PBA support */ 1405 ctrl_ext = er32(CTRL_EXT); 1406 ctrl_ext |= E1000_CTRL_EXT_PBA_CLR; 1407 1408 /* Auto-Mask Other interrupts upon ICR read */ 1409#define E1000_EIAC_MASK_82574 0x01F00000 1410 ew32(IAM, ~E1000_EIAC_MASK_82574 | E1000_IMS_OTHER); 1411 ctrl_ext |= E1000_CTRL_EXT_EIAME; 1412 ew32(CTRL_EXT, ctrl_ext); 1413 e1e_flush(); 1414} 1415 1416void e1000e_reset_interrupt_capability(struct e1000_adapter *adapter) 1417{ 1418 if (adapter->msix_entries) { 1419 pci_disable_msix(adapter->pdev); 1420 kfree(adapter->msix_entries); 1421 adapter->msix_entries = NULL; 1422 } else if (adapter->flags & FLAG_MSI_ENABLED) { 1423 pci_disable_msi(adapter->pdev); 1424 adapter->flags &= ~FLAG_MSI_ENABLED; 1425 } 1426 1427 return; 1428} 1429 1430/** 1431 * e1000e_set_interrupt_capability - set MSI or MSI-X if supported 1432 * 1433 * Attempt to configure interrupts using the best available 1434 * capabilities of the hardware and kernel. 1435 **/ 1436void e1000e_set_interrupt_capability(struct e1000_adapter *adapter) 1437{ 1438 int err; 1439 int numvecs, i; 1440 1441 1442 switch (adapter->int_mode) { 1443 case E1000E_INT_MODE_MSIX: 1444 if (adapter->flags & FLAG_HAS_MSIX) { 1445 numvecs = 3; /* RxQ0, TxQ0 and other */ 1446 adapter->msix_entries = kcalloc(numvecs, 1447 sizeof(struct msix_entry), 1448 GFP_KERNEL); 1449 if (adapter->msix_entries) { 1450 for (i = 0; i < numvecs; i++) 1451 adapter->msix_entries[i].entry = i; 1452 1453 err = pci_enable_msix(adapter->pdev, 1454 adapter->msix_entries, 1455 numvecs); 1456 if (err == 0) 1457 return; 1458 } 1459 /* MSI-X failed, so fall through and try MSI */ 1460 e_err("Failed to initialize MSI-X interrupts. " 1461 "Falling back to MSI interrupts.\n"); 1462 e1000e_reset_interrupt_capability(adapter); 1463 } 1464 adapter->int_mode = E1000E_INT_MODE_MSI; 1465 /* Fall through */ 1466 case E1000E_INT_MODE_MSI: 1467 if (!pci_enable_msi(adapter->pdev)) { 1468 adapter->flags |= FLAG_MSI_ENABLED; 1469 } else { 1470 adapter->int_mode = E1000E_INT_MODE_LEGACY; 1471 e_err("Failed to initialize MSI interrupts. Falling " 1472 "back to legacy interrupts.\n"); 1473 } 1474 /* Fall through */ 1475 case E1000E_INT_MODE_LEGACY: 1476 /* Don't do anything; this is the system default */ 1477 break; 1478 } 1479 1480 return; 1481} 1482 1483/** 1484 * e1000_request_msix - Initialize MSI-X interrupts 1485 * 1486 * e1000_request_msix allocates MSI-X vectors and requests interrupts from the 1487 * kernel. 1488 **/ 1489static int e1000_request_msix(struct e1000_adapter *adapter) 1490{ 1491 struct net_device *netdev = adapter->netdev; 1492 int err = 0, vector = 0; 1493 1494 if (strlen(netdev->name) < (IFNAMSIZ - 5)) 1495 sprintf(adapter->rx_ring->name, "%s-rx-0", netdev->name); 1496 else 1497 memcpy(adapter->rx_ring->name, netdev->name, IFNAMSIZ); 1498 err = request_irq(adapter->msix_entries[vector].vector, 1499 e1000_intr_msix_rx, 0, adapter->rx_ring->name, 1500 netdev); 1501 if (err) 1502 goto out; 1503 adapter->rx_ring->itr_register = E1000_EITR_82574(vector); 1504 adapter->rx_ring->itr_val = adapter->itr; 1505 vector++; 1506 1507 if (strlen(netdev->name) < (IFNAMSIZ - 5)) 1508 sprintf(adapter->tx_ring->name, "%s-tx-0", netdev->name); 1509 else 1510 memcpy(adapter->tx_ring->name, netdev->name, IFNAMSIZ); 1511 err = request_irq(adapter->msix_entries[vector].vector, 1512 e1000_intr_msix_tx, 0, adapter->tx_ring->name, 1513 netdev); 1514 if (err) 1515 goto out; 1516 adapter->tx_ring->itr_register = E1000_EITR_82574(vector); 1517 adapter->tx_ring->itr_val = adapter->itr; 1518 vector++; 1519 1520 err = request_irq(adapter->msix_entries[vector].vector, 1521 e1000_msix_other, 0, netdev->name, netdev); 1522 if (err) 1523 goto out; 1524 1525 e1000_configure_msix(adapter); 1526 return 0; 1527out: 1528 return err; 1529} 1530 1531/** 1532 * e1000_request_irq - initialize interrupts 1533 * 1534 * Attempts to configure interrupts using the best available 1535 * capabilities of the hardware and kernel. 1536 **/ 1537static int e1000_request_irq(struct e1000_adapter *adapter) 1538{ 1539 struct net_device *netdev = adapter->netdev; 1540 int err; 1541 1542 if (adapter->msix_entries) { 1543 err = e1000_request_msix(adapter); 1544 if (!err) 1545 return err; 1546 /* fall back to MSI */ 1547 e1000e_reset_interrupt_capability(adapter); 1548 adapter->int_mode = E1000E_INT_MODE_MSI; 1549 e1000e_set_interrupt_capability(adapter); 1550 } 1551 if (adapter->flags & FLAG_MSI_ENABLED) { 1552 err = request_irq(adapter->pdev->irq, e1000_intr_msi, 0, 1553 netdev->name, netdev); 1554 if (!err) 1555 return err; 1556 1557 /* fall back to legacy interrupt */ 1558 e1000e_reset_interrupt_capability(adapter); 1559 adapter->int_mode = E1000E_INT_MODE_LEGACY; 1560 } 1561 1562 err = request_irq(adapter->pdev->irq, e1000_intr, IRQF_SHARED, 1563 netdev->name, netdev); 1564 if (err) 1565 e_err("Unable to allocate interrupt, Error: %d\n", err); 1566 1567 return err; 1568} 1569 1570static void e1000_free_irq(struct e1000_adapter *adapter) 1571{ 1572 struct net_device *netdev = adapter->netdev; 1573 1574 if (adapter->msix_entries) { 1575 int vector = 0; 1576 1577 free_irq(adapter->msix_entries[vector].vector, netdev); 1578 vector++; 1579 1580 free_irq(adapter->msix_entries[vector].vector, netdev); 1581 vector++; 1582 1583 /* Other Causes interrupt vector */ 1584 free_irq(adapter->msix_entries[vector].vector, netdev); 1585 return; 1586 } 1587 1588 free_irq(adapter->pdev->irq, netdev); 1589} 1590 1591/** 1592 * e1000_irq_disable - Mask off interrupt generation on the NIC 1593 **/ 1594static void e1000_irq_disable(struct e1000_adapter *adapter) 1595{ 1596 struct e1000_hw *hw = &adapter->hw; 1597 1598 ew32(IMC, ~0); 1599 if (adapter->msix_entries) 1600 ew32(EIAC_82574, 0); 1601 e1e_flush(); 1602 synchronize_irq(adapter->pdev->irq); 1603} 1604 1605/** 1606 * e1000_irq_enable - Enable default interrupt generation settings 1607 **/ 1608static void e1000_irq_enable(struct e1000_adapter *adapter) 1609{ 1610 struct e1000_hw *hw = &adapter->hw; 1611 1612 if (adapter->msix_entries) { 1613 ew32(EIAC_82574, adapter->eiac_mask & E1000_EIAC_MASK_82574); 1614 ew32(IMS, adapter->eiac_mask | E1000_IMS_OTHER | E1000_IMS_LSC); 1615 } else { 1616 ew32(IMS, IMS_ENABLE_MASK); 1617 } 1618 e1e_flush(); 1619} 1620 1621/** 1622 * e1000_get_hw_control - get control of the h/w from f/w 1623 * @adapter: address of board private structure 1624 * 1625 * e1000_get_hw_control sets {CTRL_EXT|SWSM}:DRV_LOAD bit. 1626 * For ASF and Pass Through versions of f/w this means that 1627 * the driver is loaded. For AMT version (only with 82573) 1628 * of the f/w this means that the network i/f is open. 1629 **/ 1630static void e1000_get_hw_control(struct e1000_adapter *adapter) 1631{ 1632 struct e1000_hw *hw = &adapter->hw; 1633 u32 ctrl_ext; 1634 u32 swsm; 1635 1636 /* Let firmware know the driver has taken over */ 1637 if (adapter->flags & FLAG_HAS_SWSM_ON_LOAD) { 1638 swsm = er32(SWSM); 1639 ew32(SWSM, swsm | E1000_SWSM_DRV_LOAD); 1640 } else if (adapter->flags & FLAG_HAS_CTRLEXT_ON_LOAD) { 1641 ctrl_ext = er32(CTRL_EXT); 1642 ew32(CTRL_EXT, ctrl_ext | E1000_CTRL_EXT_DRV_LOAD); 1643 } 1644} 1645 1646/** 1647 * e1000_release_hw_control - release control of the h/w to f/w 1648 * @adapter: address of board private structure 1649 * 1650 * e1000_release_hw_control resets {CTRL_EXT|SWSM}:DRV_LOAD bit. 1651 * For ASF and Pass Through versions of f/w this means that the 1652 * driver is no longer loaded. For AMT version (only with 82573) i 1653 * of the f/w this means that the network i/f is closed. 1654 * 1655 **/ 1656static void e1000_release_hw_control(struct e1000_adapter *adapter) 1657{ 1658 struct e1000_hw *hw = &adapter->hw; 1659 u32 ctrl_ext; 1660 u32 swsm; 1661 1662 /* Let firmware taken over control of h/w */ 1663 if (adapter->flags & FLAG_HAS_SWSM_ON_LOAD) { 1664 swsm = er32(SWSM); 1665 ew32(SWSM, swsm & ~E1000_SWSM_DRV_LOAD); 1666 } else if (adapter->flags & FLAG_HAS_CTRLEXT_ON_LOAD) { 1667 ctrl_ext = er32(CTRL_EXT); 1668 ew32(CTRL_EXT, ctrl_ext & ~E1000_CTRL_EXT_DRV_LOAD); 1669 } 1670} 1671 1672/** 1673 * @e1000_alloc_ring - allocate memory for a ring structure 1674 **/ 1675static int e1000_alloc_ring_dma(struct e1000_adapter *adapter, 1676 struct e1000_ring *ring) 1677{ 1678 struct pci_dev *pdev = adapter->pdev; 1679 1680 ring->desc = dma_alloc_coherent(&pdev->dev, ring->size, &ring->dma, 1681 GFP_KERNEL); 1682 if (!ring->desc) 1683 return -ENOMEM; 1684 1685 return 0; 1686} 1687 1688/** 1689 * e1000e_setup_tx_resources - allocate Tx resources (Descriptors) 1690 * @adapter: board private structure 1691 * 1692 * Return 0 on success, negative on failure 1693 **/ 1694int e1000e_setup_tx_resources(struct e1000_adapter *adapter) 1695{ 1696 struct e1000_ring *tx_ring = adapter->tx_ring; 1697 int err = -ENOMEM, size; 1698 1699 size = sizeof(struct e1000_buffer) * tx_ring->count; 1700 tx_ring->buffer_info = vmalloc(size); 1701 if (!tx_ring->buffer_info) 1702 goto err; 1703 memset(tx_ring->buffer_info, 0, size); 1704 1705 /* round up to nearest 4K */ 1706 tx_ring->size = tx_ring->count * sizeof(struct e1000_tx_desc); 1707 tx_ring->size = ALIGN(tx_ring->size, 4096); 1708 1709 err = e1000_alloc_ring_dma(adapter, tx_ring); 1710 if (err) 1711 goto err; 1712 1713 tx_ring->next_to_use = 0; 1714 tx_ring->next_to_clean = 0; 1715 1716 return 0; 1717err: 1718 vfree(tx_ring->buffer_info); 1719 e_err("Unable to allocate memory for the transmit descriptor ring\n"); 1720 return err; 1721} 1722 1723/** 1724 * e1000e_setup_rx_resources - allocate Rx resources (Descriptors) 1725 * @adapter: board private structure 1726 * 1727 * Returns 0 on success, negative on failure 1728 **/ 1729int e1000e_setup_rx_resources(struct e1000_adapter *adapter) 1730{ 1731 struct e1000_ring *rx_ring = adapter->rx_ring; 1732 struct e1000_buffer *buffer_info; 1733 int i, size, desc_len, err = -ENOMEM; 1734 1735 size = sizeof(struct e1000_buffer) * rx_ring->count; 1736 rx_ring->buffer_info = vmalloc(size); 1737 if (!rx_ring->buffer_info) 1738 goto err; 1739 memset(rx_ring->buffer_info, 0, size); 1740 1741 for (i = 0; i < rx_ring->count; i++) { 1742 buffer_info = &rx_ring->buffer_info[i]; 1743 buffer_info->ps_pages = kcalloc(PS_PAGE_BUFFERS, 1744 sizeof(struct e1000_ps_page), 1745 GFP_KERNEL); 1746 if (!buffer_info->ps_pages) 1747 goto err_pages; 1748 } 1749 1750 desc_len = sizeof(union e1000_rx_desc_packet_split); 1751 1752 /* Round up to nearest 4K */ 1753 rx_ring->size = rx_ring->count * desc_len; 1754 rx_ring->size = ALIGN(rx_ring->size, 4096); 1755 1756 err = e1000_alloc_ring_dma(adapter, rx_ring); 1757 if (err) 1758 goto err_pages; 1759 1760 rx_ring->next_to_clean = 0; 1761 rx_ring->next_to_use = 0; 1762 rx_ring->rx_skb_top = NULL; 1763 1764 return 0; 1765 1766err_pages: 1767 for (i = 0; i < rx_ring->count; i++) { 1768 buffer_info = &rx_ring->buffer_info[i]; 1769 kfree(buffer_info->ps_pages); 1770 } 1771err: 1772 vfree(rx_ring->buffer_info); 1773 e_err("Unable to allocate memory for the transmit descriptor ring\n"); 1774 return err; 1775} 1776 1777/** 1778 * e1000_clean_tx_ring - Free Tx Buffers 1779 * @adapter: board private structure 1780 **/ 1781static void e1000_clean_tx_ring(struct e1000_adapter *adapter) 1782{ 1783 struct e1000_ring *tx_ring = adapter->tx_ring; 1784 struct e1000_buffer *buffer_info; 1785 unsigned long size; 1786 unsigned int i; 1787 1788 for (i = 0; i < tx_ring->count; i++) { 1789 buffer_info = &tx_ring->buffer_info[i]; 1790 e1000_put_txbuf(adapter, buffer_info); 1791 } 1792 1793 size = sizeof(struct e1000_buffer) * tx_ring->count; 1794 memset(tx_ring->buffer_info, 0, size); 1795 1796 memset(tx_ring->desc, 0, tx_ring->size); 1797 1798 tx_ring->next_to_use = 0; 1799 tx_ring->next_to_clean = 0; 1800 1801 writel(0, adapter->hw.hw_addr + tx_ring->head); 1802 writel(0, adapter->hw.hw_addr + tx_ring->tail); 1803} 1804 1805/** 1806 * e1000e_free_tx_resources - Free Tx Resources per Queue 1807 * @adapter: board private structure 1808 * 1809 * Free all transmit software resources 1810 **/ 1811void e1000e_free_tx_resources(struct e1000_adapter *adapter) 1812{ 1813 struct pci_dev *pdev = adapter->pdev; 1814 struct e1000_ring *tx_ring = adapter->tx_ring; 1815 1816 e1000_clean_tx_ring(adapter); 1817 1818 vfree(tx_ring->buffer_info); 1819 tx_ring->buffer_info = NULL; 1820 1821 dma_free_coherent(&pdev->dev, tx_ring->size, tx_ring->desc, 1822 tx_ring->dma); 1823 tx_ring->desc = NULL; 1824} 1825 1826/** 1827 * e1000e_free_rx_resources - Free Rx Resources 1828 * @adapter: board private structure 1829 * 1830 * Free all receive software resources 1831 **/ 1832 1833void e1000e_free_rx_resources(struct e1000_adapter *adapter) 1834{ 1835 struct pci_dev *pdev = adapter->pdev; 1836 struct e1000_ring *rx_ring = adapter->rx_ring; 1837 int i; 1838 1839 e1000_clean_rx_ring(adapter); 1840 1841 for (i = 0; i < rx_ring->count; i++) { 1842 kfree(rx_ring->buffer_info[i].ps_pages); 1843 } 1844 1845 vfree(rx_ring->buffer_info); 1846 rx_ring->buffer_info = NULL; 1847 1848 dma_free_coherent(&pdev->dev, rx_ring->size, rx_ring->desc, 1849 rx_ring->dma); 1850 rx_ring->desc = NULL; 1851} 1852 1853/** 1854 * e1000_update_itr - update the dynamic ITR value based on statistics 1855 * @adapter: pointer to adapter 1856 * @itr_setting: current adapter->itr 1857 * @packets: the number of packets during this measurement interval 1858 * @bytes: the number of bytes during this measurement interval 1859 * 1860 * Stores a new ITR value based on packets and byte 1861 * counts during the last interrupt. The advantage of per interrupt 1862 * computation is faster updates and more accurate ITR for the current 1863 * traffic pattern. Constants in this function were computed 1864 * based on theoretical maximum wire speed and thresholds were set based 1865 * on testing data as well as attempting to minimize response time 1866 * while increasing bulk throughput. This functionality is controlled 1867 * by the InterruptThrottleRate module parameter. 1868 **/ 1869static unsigned int e1000_update_itr(struct e1000_adapter *adapter, 1870 u16 itr_setting, int packets, 1871 int bytes) 1872{ 1873 unsigned int retval = itr_setting; 1874 1875 if (packets == 0) 1876 goto update_itr_done; 1877 1878 switch (itr_setting) { 1879 case lowest_latency: 1880 /* handle TSO and jumbo frames */ 1881 if (bytes/packets > 8000) 1882 retval = bulk_latency; 1883 else if ((packets < 5) && (bytes > 512)) { 1884 retval = low_latency; 1885 } 1886 break; 1887 case low_latency: /* 50 usec aka 20000 ints/s */ 1888 if (bytes > 10000) { 1889 /* this if handles the TSO accounting */ 1890 if (bytes/packets > 8000) { 1891 retval = bulk_latency; 1892 } else if ((packets < 10) || ((bytes/packets) > 1200)) { 1893 retval = bulk_latency; 1894 } else if ((packets > 35)) { 1895 retval = lowest_latency; 1896 } 1897 } else if (bytes/packets > 2000) { 1898 retval = bulk_latency; 1899 } else if (packets <= 2 && bytes < 512) { 1900 retval = lowest_latency; 1901 } 1902 break; 1903 case bulk_latency: /* 250 usec aka 4000 ints/s */ 1904 if (bytes > 25000) { 1905 if (packets > 35) { 1906 retval = low_latency; 1907 } 1908 } else if (bytes < 6000) { 1909 retval = low_latency; 1910 } 1911 break; 1912 } 1913 1914update_itr_done: 1915 return retval; 1916} 1917 1918static void e1000_set_itr(struct e1000_adapter *adapter) 1919{ 1920 struct e1000_hw *hw = &adapter->hw; 1921 u16 current_itr; 1922 u32 new_itr = adapter->itr; 1923 1924 /* for non-gigabit speeds, just fix the interrupt rate at 4000 */ 1925 if (adapter->link_speed != SPEED_1000) { 1926 current_itr = 0; 1927 new_itr = 4000; 1928 goto set_itr_now; 1929 } 1930 1931 adapter->tx_itr = e1000_update_itr(adapter, 1932 adapter->tx_itr, 1933 adapter->total_tx_packets, 1934 adapter->total_tx_bytes); 1935 /* conservative mode (itr 3) eliminates the lowest_latency setting */ 1936 if (adapter->itr_setting == 3 && adapter->tx_itr == lowest_latency) 1937 adapter->tx_itr = low_latency; 1938 1939 adapter->rx_itr = e1000_update_itr(adapter, 1940 adapter->rx_itr, 1941 adapter->total_rx_packets, 1942 adapter->total_rx_bytes); 1943 /* conservative mode (itr 3) eliminates the lowest_latency setting */ 1944 if (adapter->itr_setting == 3 && adapter->rx_itr == lowest_latency) 1945 adapter->rx_itr = low_latency; 1946 1947 current_itr = max(adapter->rx_itr, adapter->tx_itr); 1948 1949 switch (current_itr) { 1950 /* counts and packets in update_itr are dependent on these numbers */ 1951 case lowest_latency: 1952 new_itr = 70000; 1953 break; 1954 case low_latency: 1955 new_itr = 20000; /* aka hwitr = ~200 */ 1956 break; 1957 case bulk_latency: 1958 new_itr = 4000; 1959 break; 1960 default: 1961 break; 1962 } 1963 1964set_itr_now: 1965 if (new_itr != adapter->itr) { 1966 /* 1967 * this attempts to bias the interrupt rate towards Bulk 1968 * by adding intermediate steps when interrupt rate is 1969 * increasing 1970 */ 1971 new_itr = new_itr > adapter->itr ? 1972 min(adapter->itr + (new_itr >> 2), new_itr) : 1973 new_itr; 1974 adapter->itr = new_itr; 1975 adapter->rx_ring->itr_val = new_itr; 1976 if (adapter->msix_entries) 1977 adapter->rx_ring->set_itr = 1; 1978 else 1979 ew32(ITR, 1000000000 / (new_itr * 256)); 1980 } 1981} 1982 1983/** 1984 * e1000_alloc_queues - Allocate memory for all rings 1985 * @adapter: board private structure to initialize 1986 **/ 1987static int __devinit e1000_alloc_queues(struct e1000_adapter *adapter) 1988{ 1989 adapter->tx_ring = kzalloc(sizeof(struct e1000_ring), GFP_KERNEL); 1990 if (!adapter->tx_ring) 1991 goto err; 1992 1993 adapter->rx_ring = kzalloc(sizeof(struct e1000_ring), GFP_KERNEL); 1994 if (!adapter->rx_ring) 1995 goto err; 1996 1997 return 0; 1998err: 1999 e_err("Unable to allocate memory for queues\n"); 2000 kfree(adapter->rx_ring); 2001 kfree(adapter->tx_ring); 2002 return -ENOMEM; 2003} 2004 2005/** 2006 * e1000_clean - NAPI Rx polling callback 2007 * @napi: struct associated with this polling callback 2008 * @budget: amount of packets driver is allowed to process this poll 2009 **/ 2010static int e1000_clean(struct napi_struct *napi, int budget) 2011{ 2012 struct e1000_adapter *adapter = container_of(napi, struct e1000_adapter, napi); 2013 struct e1000_hw *hw = &adapter->hw; 2014 struct net_device *poll_dev = adapter->netdev; 2015 int tx_cleaned = 1, work_done = 0; 2016 2017 adapter = netdev_priv(poll_dev); 2018 2019 if (adapter->msix_entries && 2020 !(adapter->rx_ring->ims_val & adapter->tx_ring->ims_val)) 2021 goto clean_rx; 2022 2023 tx_cleaned = e1000_clean_tx_irq(adapter); 2024 2025clean_rx: 2026 adapter->clean_rx(adapter, &work_done, budget); 2027 2028 if (!tx_cleaned) 2029 work_done = budget; 2030 2031 /* If budget not fully consumed, exit the polling mode */ 2032 if (work_done < budget) { 2033 if (adapter->itr_setting & 3) 2034 e1000_set_itr(adapter); 2035 napi_complete(napi); 2036 if (!test_bit(__E1000_DOWN, &adapter->state)) { 2037 if (adapter->msix_entries) 2038 ew32(IMS, adapter->rx_ring->ims_val); 2039 else 2040 e1000_irq_enable(adapter); 2041 } 2042 } 2043 2044 return work_done; 2045} 2046 2047static void e1000_vlan_rx_add_vid(struct net_device *netdev, u16 vid) 2048{ 2049 struct e1000_adapter *adapter = netdev_priv(netdev); 2050 struct e1000_hw *hw = &adapter->hw; 2051 u32 vfta, index; 2052 2053 /* don't update vlan cookie if already programmed */ 2054 if ((adapter->hw.mng_cookie.status & 2055 E1000_MNG_DHCP_COOKIE_STATUS_VLAN) && 2056 (vid == adapter->mng_vlan_id)) 2057 return; 2058 2059 /* add VID to filter table */ 2060 if (adapter->flags & FLAG_HAS_HW_VLAN_FILTER) { 2061 index = (vid >> 5) & 0x7F; 2062 vfta = E1000_READ_REG_ARRAY(hw, E1000_VFTA, index); 2063 vfta |= (1 << (vid & 0x1F)); 2064 hw->mac.ops.write_vfta(hw, index, vfta); 2065 } 2066} 2067 2068static void e1000_vlan_rx_kill_vid(struct net_device *netdev, u16 vid) 2069{ 2070 struct e1000_adapter *adapter = netdev_priv(netdev); 2071 struct e1000_hw *hw = &adapter->hw; 2072 u32 vfta, index; 2073 2074 if (!test_bit(__E1000_DOWN, &adapter->state)) 2075 e1000_irq_disable(adapter); 2076 vlan_group_set_device(adapter->vlgrp, vid, NULL); 2077 2078 if (!test_bit(__E1000_DOWN, &adapter->state)) 2079 e1000_irq_enable(adapter); 2080 2081 if ((adapter->hw.mng_cookie.status & 2082 E1000_MNG_DHCP_COOKIE_STATUS_VLAN) && 2083 (vid == adapter->mng_vlan_id)) { 2084 /* release control to f/w */ 2085 e1000_release_hw_control(adapter); 2086 return; 2087 } 2088 2089 /* remove VID from filter table */ 2090 if (adapter->flags & FLAG_HAS_HW_VLAN_FILTER) { 2091 index = (vid >> 5) & 0x7F; 2092 vfta = E1000_READ_REG_ARRAY(hw, E1000_VFTA, index); 2093 vfta &= ~(1 << (vid & 0x1F)); 2094 hw->mac.ops.write_vfta(hw, index, vfta); 2095 } 2096} 2097 2098static void e1000_update_mng_vlan(struct e1000_adapter *adapter) 2099{ 2100 struct net_device *netdev = adapter->netdev; 2101 u16 vid = adapter->hw.mng_cookie.vlan_id; 2102 u16 old_vid = adapter->mng_vlan_id; 2103 2104 if (!adapter->vlgrp) 2105 return; 2106 2107 if (!vlan_group_get_device(adapter->vlgrp, vid)) { 2108 adapter->mng_vlan_id = E1000_MNG_VLAN_NONE; 2109 if (adapter->hw.mng_cookie.status & 2110 E1000_MNG_DHCP_COOKIE_STATUS_VLAN) { 2111 e1000_vlan_rx_add_vid(netdev, vid); 2112 adapter->mng_vlan_id = vid; 2113 } 2114 2115 if ((old_vid != (u16)E1000_MNG_VLAN_NONE) && 2116 (vid != old_vid) && 2117 !vlan_group_get_device(adapter->vlgrp, old_vid)) 2118 e1000_vlan_rx_kill_vid(netdev, old_vid); 2119 } else { 2120 adapter->mng_vlan_id = vid; 2121 } 2122} 2123 2124 2125static void e1000_vlan_rx_register(struct net_device *netdev, 2126 struct vlan_group *grp) 2127{ 2128 struct e1000_adapter *adapter = netdev_priv(netdev); 2129 struct e1000_hw *hw = &adapter->hw; 2130 u32 ctrl, rctl; 2131 2132 if (!test_bit(__E1000_DOWN, &adapter->state)) 2133 e1000_irq_disable(adapter); 2134 adapter->vlgrp = grp; 2135 2136 if (grp) { 2137 /* enable VLAN tag insert/strip */ 2138 ctrl = er32(CTRL); 2139 ctrl |= E1000_CTRL_VME; 2140 ew32(CTRL, ctrl); 2141 2142 if (adapter->flags & FLAG_HAS_HW_VLAN_FILTER) { 2143 /* enable VLAN receive filtering */ 2144 rctl = er32(RCTL); 2145 rctl &= ~E1000_RCTL_CFIEN; 2146 ew32(RCTL, rctl); 2147 e1000_update_mng_vlan(adapter); 2148 } 2149 } else { 2150 /* disable VLAN tag insert/strip */ 2151 ctrl = er32(CTRL); 2152 ctrl &= ~E1000_CTRL_VME; 2153 ew32(CTRL, ctrl); 2154 2155 if (adapter->flags & FLAG_HAS_HW_VLAN_FILTER) { 2156 if (adapter->mng_vlan_id != 2157 (u16)E1000_MNG_VLAN_NONE) { 2158 e1000_vlan_rx_kill_vid(netdev, 2159 adapter->mng_vlan_id); 2160 adapter->mng_vlan_id = E1000_MNG_VLAN_NONE; 2161 } 2162 } 2163 } 2164 2165 if (!test_bit(__E1000_DOWN, &adapter->state)) 2166 e1000_irq_enable(adapter); 2167} 2168 2169static void e1000_restore_vlan(struct e1000_adapter *adapter) 2170{ 2171 u16 vid; 2172 2173 e1000_vlan_rx_register(adapter->netdev, adapter->vlgrp); 2174 2175 if (!adapter->vlgrp) 2176 return; 2177 2178 for (vid = 0; vid < VLAN_GROUP_ARRAY_LEN; vid++) { 2179 if (!vlan_group_get_device(adapter->vlgrp, vid)) 2180 continue; 2181 e1000_vlan_rx_add_vid(adapter->netdev, vid); 2182 } 2183} 2184 2185static void e1000_init_manageability(struct e1000_adapter *adapter) 2186{ 2187 struct e1000_hw *hw = &adapter->hw; 2188 u32 manc, manc2h; 2189 2190 if (!(adapter->flags & FLAG_MNG_PT_ENABLED)) 2191 return; 2192 2193 manc = er32(MANC); 2194 2195 /* 2196 * enable receiving management packets to the host. this will probably 2197 * generate destination unreachable messages from the host OS, but 2198 * the packets will be handled on SMBUS 2199 */ 2200 manc |= E1000_MANC_EN_MNG2HOST; 2201 manc2h = er32(MANC2H); 2202#define E1000_MNG2HOST_PORT_623 (1 << 5) 2203#define E1000_MNG2HOST_PORT_664 (1 << 6) 2204 manc2h |= E1000_MNG2HOST_PORT_623; 2205 manc2h |= E1000_MNG2HOST_PORT_664; 2206 ew32(MANC2H, manc2h); 2207 ew32(MANC, manc); 2208} 2209 2210/** 2211 * e1000_configure_tx - Configure 8254x Transmit Unit after Reset 2212 * @adapter: board private structure 2213 * 2214 * Configure the Tx unit of the MAC after a reset. 2215 **/ 2216static void e1000_configure_tx(struct e1000_adapter *adapter) 2217{ 2218 struct e1000_hw *hw = &adapter->hw; 2219 struct e1000_ring *tx_ring = adapter->tx_ring; 2220 u64 tdba; 2221 u32 tdlen, tctl, tipg, tarc; 2222 u32 ipgr1, ipgr2; 2223 2224 /* Setup the HW Tx Head and Tail descriptor pointers */ 2225 tdba = tx_ring->dma; 2226 tdlen = tx_ring->count * sizeof(struct e1000_tx_desc); 2227 ew32(TDBAL, (tdba & DMA_BIT_MASK(32))); 2228 ew32(TDBAH, (tdba >> 32)); 2229 ew32(TDLEN, tdlen); 2230 ew32(TDH, 0); 2231 ew32(TDT, 0); 2232 tx_ring->head = E1000_TDH; 2233 tx_ring->tail = E1000_TDT; 2234 2235 /* Set the default values for the Tx Inter Packet Gap timer */ 2236 tipg = DEFAULT_82543_TIPG_IPGT_COPPER; /* 8 */ 2237 ipgr1 = DEFAULT_82543_TIPG_IPGR1; /* 8 */ 2238 ipgr2 = DEFAULT_82543_TIPG_IPGR2; /* 6 */ 2239 2240 if (adapter->flags & FLAG_TIPG_MEDIUM_FOR_80003ESLAN) 2241 ipgr2 = DEFAULT_80003ES2LAN_TIPG_IPGR2; /* 7 */ 2242 2243 tipg |= ipgr1 << E1000_TIPG_IPGR1_SHIFT; 2244 tipg |= ipgr2 << E1000_TIPG_IPGR2_SHIFT; 2245 ew32(TIPG, tipg); 2246 2247 /* Set the Tx Interrupt Delay register */ 2248 ew32(TIDV, adapter->tx_int_delay); 2249 /* Tx irq moderation */ 2250 ew32(TADV, adapter->tx_abs_int_delay); 2251 2252 /* Program the Transmit Control Register */ 2253 tctl = er32(TCTL); 2254 tctl &= ~E1000_TCTL_CT; 2255 tctl |= E1000_TCTL_PSP | E1000_TCTL_RTLC | 2256 (E1000_COLLISION_THRESHOLD << E1000_CT_SHIFT); 2257 2258 if (adapter->flags & FLAG_TARC_SPEED_MODE_BIT) { 2259 tarc = er32(TARC(0)); 2260 /* 2261 * set the speed mode bit, we'll clear it if we're not at 2262 * gigabit link later 2263 */ 2264#define SPEED_MODE_BIT (1 << 21) 2265 tarc |= SPEED_MODE_BIT; 2266 ew32(TARC(0), tarc); 2267 } 2268 2269 /* errata: program both queues to unweighted RR */ 2270 if (adapter->flags & FLAG_TARC_SET_BIT_ZERO) { 2271 tarc = er32(TARC(0)); 2272 tarc |= 1; 2273 ew32(TARC(0), tarc); 2274 tarc = er32(TARC(1)); 2275 tarc |= 1; 2276 ew32(TARC(1), tarc); 2277 } 2278 2279 /* Setup Transmit Descriptor Settings for eop descriptor */ 2280 adapter->txd_cmd = E1000_TXD_CMD_EOP | E1000_TXD_CMD_IFCS; 2281 2282 /* only set IDE if we are delaying interrupts using the timers */ 2283 if (adapter->tx_int_delay) 2284 adapter->txd_cmd |= E1000_TXD_CMD_IDE; 2285 2286 /* enable Report Status bit */ 2287 adapter->txd_cmd |= E1000_TXD_CMD_RS; 2288 2289 ew32(TCTL, tctl); 2290 2291 e1000e_config_collision_dist(hw); 2292} 2293 2294/** 2295 * e1000_setup_rctl - configure the receive control registers 2296 * @adapter: Board private structure 2297 **/ 2298#define PAGE_USE_COUNT(S) (((S) >> PAGE_SHIFT) + \ 2299 (((S) & (PAGE_SIZE - 1)) ? 1 : 0)) 2300static void e1000_setup_rctl(struct e1000_adapter *adapter) 2301{ 2302 struct e1000_hw *hw = &adapter->hw; 2303 u32 rctl, rfctl; 2304 u32 psrctl = 0; 2305 u32 pages = 0; 2306 2307 /* Program MC offset vector base */ 2308 rctl = er32(RCTL); 2309 rctl &= ~(3 << E1000_RCTL_MO_SHIFT); 2310 rctl |= E1000_RCTL_EN | E1000_RCTL_BAM | 2311 E1000_RCTL_LBM_NO | E1000_RCTL_RDMTS_HALF | 2312 (adapter->hw.mac.mc_filter_type << E1000_RCTL_MO_SHIFT); 2313 2314 /* Do not Store bad packets */ 2315 rctl &= ~E1000_RCTL_SBP; 2316 2317 /* Enable Long Packet receive */ 2318 if (adapter->netdev->mtu <= ETH_DATA_LEN) 2319 rctl &= ~E1000_RCTL_LPE; 2320 else 2321 rctl |= E1000_RCTL_LPE; 2322 2323 /* Some systems expect that the CRC is included in SMBUS traffic. The 2324 * hardware strips the CRC before sending to both SMBUS (BMC) and to 2325 * host memory when this is enabled 2326 */ 2327 if (adapter->flags2 & FLAG2_CRC_STRIPPING) 2328 rctl |= E1000_RCTL_SECRC; 2329 2330 /* Workaround Si errata on 82577 PHY - configure IPG for jumbos */ 2331 if ((hw->phy.type == e1000_phy_82577) && (rctl & E1000_RCTL_LPE)) { 2332 u16 phy_data; 2333 2334 e1e_rphy(hw, PHY_REG(770, 26), &phy_data); 2335 phy_data &= 0xfff8; 2336 phy_data |= (1 << 2); 2337 e1e_wphy(hw, PHY_REG(770, 26), phy_data); 2338 2339 e1e_rphy(hw, 22, &phy_data); 2340 phy_data &= 0x0fff; 2341 phy_data |= (1 << 14); 2342 e1e_wphy(hw, 0x10, 0x2823); 2343 e1e_wphy(hw, 0x11, 0x0003); 2344 e1e_wphy(hw, 22, phy_data); 2345 } 2346 2347 /* Setup buffer sizes */ 2348 rctl &= ~E1000_RCTL_SZ_4096; 2349 rctl |= E1000_RCTL_BSEX; 2350 switch (adapter->rx_buffer_len) { 2351 case 2048: 2352 default: 2353 rctl |= E1000_RCTL_SZ_2048; 2354 rctl &= ~E1000_RCTL_BSEX; 2355 break; 2356 case 4096: 2357 rctl |= E1000_RCTL_SZ_4096; 2358 break; 2359 case 8192: 2360 rctl |= E1000_RCTL_SZ_8192; 2361 break; 2362 case 16384: 2363 rctl |= E1000_RCTL_SZ_16384; 2364 break; 2365 } 2366 2367 /* 2368 * 82571 and greater support packet-split where the protocol 2369 * header is placed in skb->data and the packet data is 2370 * placed in pages hanging off of skb_shinfo(skb)->nr_frags. 2371 * In the case of a non-split, skb->data is linearly filled, 2372 * followed by the page buffers. Therefore, skb->data is 2373 * sized to hold the largest protocol header. 2374 * 2375 * allocations using alloc_page take too long for regular MTU 2376 * so only enable packet split for jumbo frames 2377 * 2378 * Using pages when the page size is greater than 16k wastes 2379 * a lot of memory, since we allocate 3 pages at all times 2380 * per packet. 2381 */ 2382 pages = PAGE_USE_COUNT(adapter->netdev->mtu); 2383 if (!(adapter->flags & FLAG_IS_ICH) && (pages <= 3) && 2384 (PAGE_SIZE <= 16384) && (rctl & E1000_RCTL_LPE)) 2385 adapter->rx_ps_pages = pages; 2386 else 2387 adapter->rx_ps_pages = 0; 2388 2389 if (adapter->rx_ps_pages) { 2390 /* Configure extra packet-split registers */ 2391 rfctl = er32(RFCTL); 2392 rfctl |= E1000_RFCTL_EXTEN; 2393 /* 2394 * disable packet split support for IPv6 extension headers, 2395 * because some malformed IPv6 headers can hang the Rx 2396 */ 2397 rfctl |= (E1000_RFCTL_IPV6_EX_DIS | 2398 E1000_RFCTL_NEW_IPV6_EXT_DIS); 2399 2400 ew32(RFCTL, rfctl); 2401 2402 /* Enable Packet split descriptors */ 2403 rctl |= E1000_RCTL_DTYP_PS; 2404 2405 psrctl |= adapter->rx_ps_bsize0 >> 2406 E1000_PSRCTL_BSIZE0_SHIFT; 2407 2408 switch (adapter->rx_ps_pages) { 2409 case 3: 2410 psrctl |= PAGE_SIZE << 2411 E1000_PSRCTL_BSIZE3_SHIFT; 2412 case 2: 2413 psrctl |= PAGE_SIZE << 2414 E1000_PSRCTL_BSIZE2_SHIFT; 2415 case 1: 2416 psrctl |= PAGE_SIZE >> 2417 E1000_PSRCTL_BSIZE1_SHIFT; 2418 break; 2419 } 2420 2421 ew32(PSRCTL, psrctl); 2422 } 2423 2424 ew32(RCTL, rctl); 2425 /* just started the receive unit, no need to restart */ 2426 adapter->flags &= ~FLAG_RX_RESTART_NOW; 2427} 2428 2429/** 2430 * e1000_configure_rx - Configure Receive Unit after Reset 2431 * @adapter: board private structure 2432 * 2433 * Configure the Rx unit of the MAC after a reset. 2434 **/ 2435static void e1000_configure_rx(struct e1000_adapter *adapter) 2436{ 2437 struct e1000_hw *hw = &adapter->hw; 2438 struct e1000_ring *rx_ring = adapter->rx_ring; 2439 u64 rdba; 2440 u32 rdlen, rctl, rxcsum, ctrl_ext; 2441 2442 if (adapter->rx_ps_pages) { 2443 /* this is a 32 byte descriptor */ 2444 rdlen = rx_ring->count * 2445 sizeof(union e1000_rx_desc_packet_split); 2446 adapter->clean_rx = e1000_clean_rx_irq_ps; 2447 adapter->alloc_rx_buf = e1000_alloc_rx_buffers_ps; 2448 } else if (adapter->netdev->mtu > ETH_FRAME_LEN + ETH_FCS_LEN) { 2449 rdlen = rx_ring->count * sizeof(struct e1000_rx_desc); 2450 adapter->clean_rx = e1000_clean_jumbo_rx_irq; 2451 adapter->alloc_rx_buf = e1000_alloc_jumbo_rx_buffers; 2452 } else { 2453 rdlen = rx_ring->count * sizeof(struct e1000_rx_desc); 2454 adapter->clean_rx = e1000_clean_rx_irq; 2455 adapter->alloc_rx_buf = e1000_alloc_rx_buffers; 2456 } 2457 2458 /* disable receives while setting up the descriptors */ 2459 rctl = er32(RCTL); 2460 ew32(RCTL, rctl & ~E1000_RCTL_EN); 2461 e1e_flush(); 2462 msleep(10); 2463 2464 /* set the Receive Delay Timer Register */ 2465 ew32(RDTR, adapter->rx_int_delay); 2466 2467 /* irq moderation */ 2468 ew32(RADV, adapter->rx_abs_int_delay); 2469 if (adapter->itr_setting != 0) 2470 ew32(ITR, 1000000000 / (adapter->itr * 256)); 2471 2472 ctrl_ext = er32(CTRL_EXT); 2473 /* Auto-Mask interrupts upon ICR access */ 2474 ctrl_ext |= E1000_CTRL_EXT_IAME; 2475 ew32(IAM, 0xffffffff); 2476 ew32(CTRL_EXT, ctrl_ext); 2477 e1e_flush(); 2478 2479 /* 2480 * Setup the HW Rx Head and Tail Descriptor Pointers and 2481 * the Base and Length of the Rx Descriptor Ring 2482 */ 2483 rdba = rx_ring->dma; 2484 ew32(RDBAL, (rdba & DMA_BIT_MASK(32))); 2485 ew32(RDBAH, (rdba >> 32)); 2486 ew32(RDLEN, rdlen); 2487 ew32(RDH, 0); 2488 ew32(RDT, 0); 2489 rx_ring->head = E1000_RDH; 2490 rx_ring->tail = E1000_RDT; 2491 2492 /* Enable Receive Checksum Offload for TCP and UDP */ 2493 rxcsum = er32(RXCSUM); 2494 if (adapter->flags & FLAG_RX_CSUM_ENABLED) { 2495 rxcsum |= E1000_RXCSUM_TUOFL; 2496 2497 /* 2498 * IPv4 payload checksum for UDP fragments must be 2499 * used in conjunction with packet-split. 2500 */ 2501 if (adapter->rx_ps_pages) 2502 rxcsum |= E1000_RXCSUM_IPPCSE; 2503 } else { 2504 rxcsum &= ~E1000_RXCSUM_TUOFL; 2505 /* no need to clear IPPCSE as it defaults to 0 */ 2506 } 2507 ew32(RXCSUM, rxcsum); 2508 2509 /* 2510 * Enable early receives on supported devices, only takes effect when 2511 * packet size is equal or larger than the specified value (in 8 byte 2512 * units), e.g. using jumbo frames when setting to E1000_ERT_2048 2513 */ 2514 if (adapter->flags & FLAG_HAS_ERT) { 2515 if (adapter->netdev->mtu > ETH_DATA_LEN) { 2516 u32 rxdctl = er32(RXDCTL(0)); 2517 ew32(RXDCTL(0), rxdctl | 0x3); 2518 ew32(ERT, E1000_ERT_2048 | (1 << 13)); 2519 /* 2520 * With jumbo frames and early-receive enabled, 2521 * excessive C-state transition latencies result in 2522 * dropped transactions. 2523 */ 2524 pm_qos_update_requirement(PM_QOS_CPU_DMA_LATENCY, 2525 adapter->netdev->name, 55); 2526 } else { 2527 pm_qos_update_requirement(PM_QOS_CPU_DMA_LATENCY, 2528 adapter->netdev->name, 2529 PM_QOS_DEFAULT_VALUE); 2530 } 2531 } 2532 2533 /* Enable Receives */ 2534 ew32(RCTL, rctl); 2535} 2536 2537/** 2538 * e1000_update_mc_addr_list - Update Multicast addresses 2539 * @hw: pointer to the HW structure 2540 * @mc_addr_list: array of multicast addresses to program 2541 * @mc_addr_count: number of multicast addresses to program 2542 * 2543 * Updates the Multicast Table Array. 2544 * The caller must have a packed mc_addr_list of multicast addresses. 2545 **/ 2546static void e1000_update_mc_addr_list(struct e1000_hw *hw, u8 *mc_addr_list, 2547 u32 mc_addr_count) 2548{ 2549 hw->mac.ops.update_mc_addr_list(hw, mc_addr_list, mc_addr_count); 2550} 2551 2552/** 2553 * e1000_set_multi - Multicast and Promiscuous mode set 2554 * @netdev: network interface device structure 2555 * 2556 * The set_multi entry point is called whenever the multicast address 2557 * list or the network interface flags are updated. This routine is 2558 * responsible for configuring the hardware for proper multicast, 2559 * promiscuous mode, and all-multi behavior. 2560 **/ 2561static void e1000_set_multi(struct net_device *netdev) 2562{ 2563 struct e1000_adapter *adapter = netdev_priv(netdev); 2564 struct e1000_hw *hw = &adapter->hw; 2565 struct dev_mc_list *mc_ptr; 2566 u8 *mta_list; 2567 u32 rctl; 2568 int i; 2569 2570 /* Check for Promiscuous and All Multicast modes */ 2571 2572 rctl = er32(RCTL); 2573 2574 if (netdev->flags & IFF_PROMISC) { 2575 rctl |= (E1000_RCTL_UPE | E1000_RCTL_MPE); 2576 rctl &= ~E1000_RCTL_VFE; 2577 } else { 2578 if (netdev->flags & IFF_ALLMULTI) { 2579 rctl |= E1000_RCTL_MPE; 2580 rctl &= ~E1000_RCTL_UPE; 2581 } else { 2582 rctl &= ~(E1000_RCTL_UPE | E1000_RCTL_MPE); 2583 } 2584 if (adapter->flags & FLAG_HAS_HW_VLAN_FILTER) 2585 rctl |= E1000_RCTL_VFE; 2586 } 2587 2588 ew32(RCTL, rctl); 2589 2590 if (!netdev_mc_empty(netdev)) { 2591 mta_list = kmalloc(netdev_mc_count(netdev) * 6, GFP_ATOMIC); 2592 if (!mta_list) 2593 return; 2594 2595 /* prepare a packed array of only addresses. */ 2596 i = 0; 2597 netdev_for_each_mc_addr(mc_ptr, netdev) 2598 memcpy(mta_list + (i++ * ETH_ALEN), 2599 mc_ptr->dmi_addr, ETH_ALEN); 2600 2601 e1000_update_mc_addr_list(hw, mta_list, i); 2602 kfree(mta_list); 2603 } else { 2604 /* 2605 * if we're called from probe, we might not have 2606 * anything to do here, so clear out the list 2607 */ 2608 e1000_update_mc_addr_list(hw, NULL, 0); 2609 } 2610} 2611 2612/** 2613 * e1000_configure - configure the hardware for Rx and Tx 2614 * @adapter: private board structure 2615 **/ 2616static void e1000_configure(struct e1000_adapter *adapter) 2617{ 2618 e1000_set_multi(adapter->netdev); 2619 2620 e1000_restore_vlan(adapter); 2621 e1000_init_manageability(adapter); 2622 2623 e1000_configure_tx(adapter); 2624 e1000_setup_rctl(adapter); 2625 e1000_configure_rx(adapter); 2626 adapter->alloc_rx_buf(adapter, e1000_desc_unused(adapter->rx_ring)); 2627} 2628 2629/** 2630 * e1000e_power_up_phy - restore link in case the phy was powered down 2631 * @adapter: address of board private structure 2632 * 2633 * The phy may be powered down to save power and turn off link when the 2634 * driver is unloaded and wake on lan is not enabled (among others) 2635 * *** this routine MUST be followed by a call to e1000e_reset *** 2636 **/ 2637void e1000e_power_up_phy(struct e1000_adapter *adapter) 2638{ 2639 if (adapter->hw.phy.ops.power_up) 2640 adapter->hw.phy.ops.power_up(&adapter->hw); 2641 2642 adapter->hw.mac.ops.setup_link(&adapter->hw); 2643} 2644 2645/** 2646 * e1000_power_down_phy - Power down the PHY 2647 * 2648 * Power down the PHY so no link is implied when interface is down. 2649 * The PHY cannot be powered down if management or WoL is active. 2650 */ 2651static void e1000_power_down_phy(struct e1000_adapter *adapter) 2652{ 2653 /* WoL is enabled */ 2654 if (adapter->wol) 2655 return; 2656 2657 if (adapter->hw.phy.ops.power_down) 2658 adapter->hw.phy.ops.power_down(&adapter->hw); 2659} 2660 2661/** 2662 * e1000e_reset - bring the hardware into a known good state 2663 * 2664 * This function boots the hardware and enables some settings that 2665 * require a configuration cycle of the hardware - those cannot be 2666 * set/changed during runtime. After reset the device needs to be 2667 * properly configured for Rx, Tx etc. 2668 */ 2669void e1000e_reset(struct e1000_adapter *adapter) 2670{ 2671 struct e1000_mac_info *mac = &adapter->hw.mac; 2672 struct e1000_fc_info *fc = &adapter->hw.fc; 2673 struct e1000_hw *hw = &adapter->hw; 2674 u32 tx_space, min_tx_space, min_rx_space; 2675 u32 pba = adapter->pba; 2676 u16 hwm; 2677 2678 /* reset Packet Buffer Allocation to default */ 2679 ew32(PBA, pba); 2680 2681 if (adapter->max_frame_size > ETH_FRAME_LEN + ETH_FCS_LEN) { 2682 /* 2683 * To maintain wire speed transmits, the Tx FIFO should be 2684 * large enough to accommodate two full transmit packets, 2685 * rounded up to the next 1KB and expressed in KB. Likewise, 2686 * the Rx FIFO should be large enough to accommodate at least 2687 * one full receive packet and is similarly rounded up and 2688 * expressed in KB. 2689 */ 2690 pba = er32(PBA); 2691 /* upper 16 bits has Tx packet buffer allocation size in KB */ 2692 tx_space = pba >> 16; 2693 /* lower 16 bits has Rx packet buffer allocation size in KB */ 2694 pba &= 0xffff; 2695 /* 2696 * the Tx fifo also stores 16 bytes of information about the tx 2697 * but don't include ethernet FCS because hardware appends it 2698 */ 2699 min_tx_space = (adapter->max_frame_size + 2700 sizeof(struct e1000_tx_desc) - 2701 ETH_FCS_LEN) * 2; 2702 min_tx_space = ALIGN(min_tx_space, 1024); 2703 min_tx_space >>= 10; 2704 /* software strips receive CRC, so leave room for it */ 2705 min_rx_space = adapter->max_frame_size; 2706 min_rx_space = ALIGN(min_rx_space, 1024); 2707 min_rx_space >>= 10; 2708 2709 /* 2710 * If current Tx allocation is less than the min Tx FIFO size, 2711 * and the min Tx FIFO size is less than the current Rx FIFO 2712 * allocation, take space away from current Rx allocation 2713 */ 2714 if ((tx_space < min_tx_space) && 2715 ((min_tx_space - tx_space) < pba)) { 2716 pba -= min_tx_space - tx_space; 2717 2718 /* 2719 * if short on Rx space, Rx wins and must trump tx 2720 * adjustment or use Early Receive if available 2721 */ 2722 if ((pba < min_rx_space) && 2723 (!(adapter->flags & FLAG_HAS_ERT))) 2724 /* ERT enabled in e1000_configure_rx */ 2725 pba = min_rx_space; 2726 } 2727 2728 ew32(PBA, pba); 2729 } 2730 2731 2732 /* 2733 * flow control settings 2734 * 2735 * The high water mark must be low enough to fit one full frame 2736 * (or the size used for early receive) above it in the Rx FIFO. 2737 * Set it to the lower of: 2738 * - 90% of the Rx FIFO size, and 2739 * - the full Rx FIFO size minus the early receive size (for parts 2740 * with ERT support assuming ERT set to E1000_ERT_2048), or 2741 * - the full Rx FIFO size minus one full frame 2742 */ 2743 if (hw->mac.type == e1000_pchlan) { 2744 /* 2745 * Workaround PCH LOM adapter hangs with certain network 2746 * loads. If hangs persist, try disabling Tx flow control. 2747 */ 2748 if (adapter->netdev->mtu > ETH_DATA_LEN) { 2749 fc->high_water = 0x3500; 2750 fc->low_water = 0x1500; 2751 } else { 2752 fc->high_water = 0x5000; 2753 fc->low_water = 0x3000; 2754 } 2755 } else { 2756 if ((adapter->flags & FLAG_HAS_ERT) && 2757 (adapter->netdev->mtu > ETH_DATA_LEN)) 2758 hwm = min(((pba << 10) * 9 / 10), 2759 ((pba << 10) - (E1000_ERT_2048 << 3))); 2760 else 2761 hwm = min(((pba << 10) * 9 / 10), 2762 ((pba << 10) - adapter->max_frame_size)); 2763 2764 fc->high_water = hwm & E1000_FCRTH_RTH; /* 8-byte granularity */ 2765 fc->low_water = fc->high_water - 8; 2766 } 2767 2768 if (adapter->flags & FLAG_DISABLE_FC_PAUSE_TIME) 2769 fc->pause_time = 0xFFFF; 2770 else 2771 fc->pause_time = E1000_FC_PAUSE_TIME; 2772 fc->send_xon = 1; 2773 fc->current_mode = fc->requested_mode; 2774 2775 /* Allow time for pending master requests to run */ 2776 mac->ops.reset_hw(hw); 2777 2778 /* 2779 * For parts with AMT enabled, let the firmware know 2780 * that the network interface is in control 2781 */ 2782 if (adapter->flags & FLAG_HAS_AMT) 2783 e1000_get_hw_control(adapter); 2784 2785 ew32(WUC, 0); 2786 if (adapter->flags2 & FLAG2_HAS_PHY_WAKEUP) 2787 e1e_wphy(&adapter->hw, BM_WUC, 0); 2788 2789 if (mac->ops.init_hw(hw)) 2790 e_err("Hardware Error\n"); 2791 2792 /* additional part of the flow-control workaround above */ 2793 if (hw->mac.type == e1000_pchlan) 2794 ew32(FCRTV_PCH, 0x1000); 2795 2796 e1000_update_mng_vlan(adapter); 2797 2798 /* Enable h/w to recognize an 802.1Q VLAN Ethernet packet */ 2799 ew32(VET, ETH_P_8021Q); 2800 2801 e1000e_reset_adaptive(hw); 2802 e1000_get_phy_info(hw); 2803 2804 if ((adapter->flags & FLAG_HAS_SMART_POWER_DOWN) && 2805 !(adapter->flags & FLAG_SMART_POWER_DOWN)) { 2806 u16 phy_data = 0; 2807 /* 2808 * speed up time to link by disabling smart power down, ignore 2809 * the return value of this function because there is nothing 2810 * different we would do if it failed 2811 */ 2812 e1e_rphy(hw, IGP02E1000_PHY_POWER_MGMT, &phy_data); 2813 phy_data &= ~IGP02E1000_PM_SPD; 2814 e1e_wphy(hw, IGP02E1000_PHY_POWER_MGMT, phy_data); 2815 } 2816} 2817 2818int e1000e_up(struct e1000_adapter *adapter) 2819{ 2820 struct e1000_hw *hw = &adapter->hw; 2821 2822 /* DMA latency requirement to workaround early-receive/jumbo issue */ 2823 if (adapter->flags & FLAG_HAS_ERT) 2824 pm_qos_add_requirement(PM_QOS_CPU_DMA_LATENCY, 2825 adapter->netdev->name, 2826 PM_QOS_DEFAULT_VALUE); 2827 2828 /* hardware has been reset, we need to reload some things */ 2829 e1000_configure(adapter); 2830 2831 clear_bit(__E1000_DOWN, &adapter->state); 2832 2833 napi_enable(&adapter->napi); 2834 if (adapter->msix_entries) 2835 e1000_configure_msix(adapter); 2836 e1000_irq_enable(adapter); 2837 2838 netif_wake_queue(adapter->netdev); 2839 2840 /* fire a link change interrupt to start the watchdog */ 2841 ew32(ICS, E1000_ICS_LSC); 2842 return 0; 2843} 2844 2845void e1000e_down(struct e1000_adapter *adapter) 2846{ 2847 struct net_device *netdev = adapter->netdev; 2848 struct e1000_hw *hw = &adapter->hw; 2849 u32 tctl, rctl; 2850 2851 /* 2852 * signal that we're down so the interrupt handler does not 2853 * reschedule our watchdog timer 2854 */ 2855 set_bit(__E1000_DOWN, &adapter->state); 2856 2857 /* disable receives in the hardware */ 2858 rctl = er32(RCTL); 2859 ew32(RCTL, rctl & ~E1000_RCTL_EN); 2860 /* flush and sleep below */ 2861 2862 netif_stop_queue(netdev); 2863 2864 /* disable transmits in the hardware */ 2865 tctl = er32(TCTL); 2866 tctl &= ~E1000_TCTL_EN; 2867 ew32(TCTL, tctl); 2868 /* flush both disables and wait for them to finish */ 2869 e1e_flush(); 2870 msleep(10); 2871 2872 napi_disable(&adapter->napi); 2873 e1000_irq_disable(adapter); 2874 2875 del_timer_sync(&adapter->watchdog_timer); 2876 del_timer_sync(&adapter->phy_info_timer); 2877 2878 netif_carrier_off(netdev); 2879 adapter->link_speed = 0; 2880 adapter->link_duplex = 0; 2881 2882 if (!pci_channel_offline(adapter->pdev)) 2883 e1000e_reset(adapter); 2884 e1000_clean_tx_ring(adapter); 2885 e1000_clean_rx_ring(adapter); 2886 2887 if (adapter->flags & FLAG_HAS_ERT) 2888 pm_qos_remove_requirement(PM_QOS_CPU_DMA_LATENCY, 2889 adapter->netdev->name); 2890 2891 /* 2892 * TODO: for power management, we could drop the link and 2893 * pci_disable_device here. 2894 */ 2895} 2896 2897void e1000e_reinit_locked(struct e1000_adapter *adapter) 2898{ 2899 might_sleep(); 2900 while (test_and_set_bit(__E1000_RESETTING, &adapter->state)) 2901 msleep(1); 2902 e1000e_down(adapter); 2903 e1000e_up(adapter); 2904 clear_bit(__E1000_RESETTING, &adapter->state); 2905} 2906 2907/** 2908 * e1000_sw_init - Initialize general software structures (struct e1000_adapter) 2909 * @adapter: board private structure to initialize 2910 * 2911 * e1000_sw_init initializes the Adapter private data structure. 2912 * Fields are initialized based on PCI device information and 2913 * OS network device settings (MTU size). 2914 **/ 2915static int __devinit e1000_sw_init(struct e1000_adapter *adapter) 2916{ 2917 struct net_device *netdev = adapter->netdev; 2918 2919 adapter->rx_buffer_len = ETH_FRAME_LEN + VLAN_HLEN + ETH_FCS_LEN; 2920 adapter->rx_ps_bsize0 = 128; 2921 adapter->max_frame_size = netdev->mtu + ETH_HLEN + ETH_FCS_LEN; 2922 adapter->min_frame_size = ETH_ZLEN + ETH_FCS_LEN; 2923 2924 e1000e_set_interrupt_capability(adapter); 2925 2926 if (e1000_alloc_queues(adapter)) 2927 return -ENOMEM; 2928 2929 /* Explicitly disable IRQ since the NIC can be in any state. */ 2930 e1000_irq_disable(adapter); 2931 2932 set_bit(__E1000_DOWN, &adapter->state); 2933 return 0; 2934} 2935 2936/** 2937 * e1000_intr_msi_test - Interrupt Handler 2938 * @irq: interrupt number 2939 * @data: pointer to a network interface device structure 2940 **/ 2941static irqreturn_t e1000_intr_msi_test(int irq, void *data) 2942{ 2943 struct net_device *netdev = data; 2944 struct e1000_adapter *adapter = netdev_priv(netdev); 2945 struct e1000_hw *hw = &adapter->hw; 2946 u32 icr = er32(ICR); 2947 2948 e_dbg("icr is %08X\n", icr); 2949 if (icr & E1000_ICR_RXSEQ) { 2950 adapter->flags &= ~FLAG_MSI_TEST_FAILED; 2951 wmb(); 2952 } 2953 2954 return IRQ_HANDLED; 2955} 2956 2957/** 2958 * e1000_test_msi_interrupt - Returns 0 for successful test 2959 * @adapter: board private struct 2960 * 2961 * code flow taken from tg3.c 2962 **/ 2963static int e1000_test_msi_interrupt(struct e1000_adapter *adapter) 2964{ 2965 struct net_device *netdev = adapter->netdev; 2966 struct e1000_hw *hw = &adapter->hw; 2967 int err; 2968 2969 /* poll_enable hasn't been called yet, so don't need disable */ 2970 /* clear any pending events */ 2971 er32(ICR); 2972 2973 /* free the real vector and request a test handler */ 2974 e1000_free_irq(adapter); 2975 e1000e_reset_interrupt_capability(adapter); 2976 2977 /* Assume that the test fails, if it succeeds then the test 2978 * MSI irq handler will unset this flag */ 2979 adapter->flags |= FLAG_MSI_TEST_FAILED; 2980 2981 err = pci_enable_msi(adapter->pdev); 2982 if (err) 2983 goto msi_test_failed; 2984 2985 err = request_irq(adapter->pdev->irq, e1000_intr_msi_test, 0, 2986 netdev->name, netdev); 2987 if (err) { 2988 pci_disable_msi(adapter->pdev); 2989 goto msi_test_failed; 2990 } 2991 2992 wmb(); 2993 2994 e1000_irq_enable(adapter); 2995 2996 /* fire an unusual interrupt on the test handler */ 2997 ew32(ICS, E1000_ICS_RXSEQ); 2998 e1e_flush(); 2999 msleep(50); 3000 3001 e1000_irq_disable(adapter); 3002 3003 rmb(); 3004 3005 if (adapter->flags & FLAG_MSI_TEST_FAILED) { 3006 adapter->int_mode = E1000E_INT_MODE_LEGACY; 3007 err = -EIO; 3008 e_info("MSI interrupt test failed!\n"); 3009 } 3010 3011 free_irq(adapter->pdev->irq, netdev); 3012 pci_disable_msi(adapter->pdev); 3013 3014 if (err == -EIO) 3015 goto msi_test_failed; 3016 3017 /* okay so the test worked, restore settings */ 3018 e_dbg("MSI interrupt test succeeded!\n"); 3019msi_test_failed: 3020 e1000e_set_interrupt_capability(adapter); 3021 e1000_request_irq(adapter); 3022 return err; 3023} 3024 3025/** 3026 * e1000_test_msi - Returns 0 if MSI test succeeds or INTx mode is restored 3027 * @adapter: board private struct 3028 * 3029 * code flow taken from tg3.c, called with e1000 interrupts disabled. 3030 **/ 3031static int e1000_test_msi(struct e1000_adapter *adapter) 3032{ 3033 int err; 3034 u16 pci_cmd; 3035 3036 if (!(adapter->flags & FLAG_MSI_ENABLED)) 3037 return 0; 3038 3039 /* disable SERR in case the MSI write causes a master abort */ 3040 pci_read_config_word(adapter->pdev, PCI_COMMAND, &pci_cmd); 3041 pci_write_config_word(adapter->pdev, PCI_COMMAND, 3042 pci_cmd & ~PCI_COMMAND_SERR); 3043 3044 err = e1000_test_msi_interrupt(adapter); 3045 3046 /* restore previous setting of command word */ 3047 pci_write_config_word(adapter->pdev, PCI_COMMAND, pci_cmd); 3048 3049 /* success ! */ 3050 if (!err) 3051 return 0; 3052 3053 /* EIO means MSI test failed */ 3054 if (err != -EIO) 3055 return err; 3056 3057 /* back to INTx mode */ 3058 e_warn("MSI interrupt test failed, using legacy interrupt.\n"); 3059 3060 e1000_free_irq(adapter); 3061 3062 err = e1000_request_irq(adapter); 3063 3064 return err; 3065} 3066 3067/** 3068 * e1000_open - Called when a network interface is made active 3069 * @netdev: network interface device structure 3070 * 3071 * Returns 0 on success, negative value on failure 3072 * 3073 * The open entry point is called when a network interface is made 3074 * active by the system (IFF_UP). At this point all resources needed 3075 * for transmit and receive operations are allocated, the interrupt 3076 * handler is registered with the OS, the watchdog timer is started, 3077 * and the stack is notified that the interface is ready. 3078 **/ 3079static int e1000_open(struct net_device *netdev) 3080{ 3081 struct e1000_adapter *adapter = netdev_priv(netdev); 3082 struct e1000_hw *hw = &adapter->hw; 3083 int err; 3084 3085 /* disallow open during test */ 3086 if (test_bit(__E1000_TESTING, &adapter->state)) 3087 return -EBUSY; 3088 3089 netif_carrier_off(netdev); 3090 3091 /* allocate transmit descriptors */ 3092 err = e1000e_setup_tx_resources(adapter); 3093 if (err) 3094 goto err_setup_tx; 3095 3096 /* allocate receive descriptors */ 3097 err = e1000e_setup_rx_resources(adapter); 3098 if (err) 3099 goto err_setup_rx; 3100 3101 e1000e_power_up_phy(adapter); 3102 3103 adapter->mng_vlan_id = E1000_MNG_VLAN_NONE; 3104 if ((adapter->hw.mng_cookie.status & 3105 E1000_MNG_DHCP_COOKIE_STATUS_VLAN)) 3106 e1000_update_mng_vlan(adapter); 3107 3108 /* 3109 * If AMT is enabled, let the firmware know that the network 3110 * interface is now open 3111 */ 3112 if (adapter->flags & FLAG_HAS_AMT) 3113 e1000_get_hw_control(adapter); 3114 3115 /* 3116 * before we allocate an interrupt, we must be ready to handle it. 3117 * Setting DEBUG_SHIRQ in the kernel makes it fire an interrupt 3118 * as soon as we call pci_request_irq, so we have to setup our 3119 * clean_rx handler before we do so. 3120 */ 3121 e1000_configure(adapter); 3122 3123 err = e1000_request_irq(adapter); 3124 if (err) 3125 goto err_req_irq; 3126 3127 /* 3128 * Work around PCIe errata with MSI interrupts causing some chipsets to 3129 * ignore e1000e MSI messages, which means we need to test our MSI 3130 * interrupt now 3131 */ 3132 if (adapter->int_mode != E1000E_INT_MODE_LEGACY) { 3133 err = e1000_test_msi(adapter); 3134 if (err) { 3135 e_err("Interrupt allocation failed\n"); 3136 goto err_req_irq; 3137 } 3138 } 3139 3140 /* From here on the code is the same as e1000e_up() */ 3141 clear_bit(__E1000_DOWN, &adapter->state); 3142 3143 napi_enable(&adapter->napi); 3144 3145 e1000_irq_enable(adapter); 3146 3147 netif_start_queue(netdev); 3148 3149 /* fire a link status change interrupt to start the watchdog */ 3150 ew32(ICS, E1000_ICS_LSC); 3151 3152 return 0; 3153 3154err_req_irq: 3155 e1000_release_hw_control(adapter); 3156 e1000_power_down_phy(adapter); 3157 e1000e_free_rx_resources(adapter); 3158err_setup_rx: 3159 e1000e_free_tx_resources(adapter); 3160err_setup_tx: 3161 e1000e_reset(adapter); 3162 3163 return err; 3164} 3165 3166/** 3167 * e1000_close - Disables a network interface 3168 * @netdev: network interface device structure 3169 * 3170 * Returns 0, this is not allowed to fail 3171 * 3172 * The close entry point is called when an interface is de-activated 3173 * by the OS. The hardware is still under the drivers control, but 3174 * needs to be disabled. A global MAC reset is issued to stop the 3175 * hardware, and all transmit and receive resources are freed. 3176 **/ 3177static int e1000_close(struct net_device *netdev) 3178{ 3179 struct e1000_adapter *adapter = netdev_priv(netdev); 3180 3181 WARN_ON(test_bit(__E1000_RESETTING, &adapter->state)); 3182 e1000e_down(adapter); 3183 e1000_power_down_phy(adapter); 3184 e1000_free_irq(adapter); 3185 3186 e1000e_free_tx_resources(adapter); 3187 e1000e_free_rx_resources(adapter); 3188 3189 /* 3190 * kill manageability vlan ID if supported, but not if a vlan with 3191 * the same ID is registered on the host OS (let 8021q kill it) 3192 */ 3193 if ((adapter->hw.mng_cookie.status & 3194 E1000_MNG_DHCP_COOKIE_STATUS_VLAN) && 3195 !(adapter->vlgrp && 3196 vlan_group_get_device(adapter->vlgrp, adapter->mng_vlan_id))) 3197 e1000_vlan_rx_kill_vid(netdev, adapter->mng_vlan_id); 3198 3199 /* 3200 * If AMT is enabled, let the firmware know that the network 3201 * interface is now closed 3202 */ 3203 if (adapter->flags & FLAG_HAS_AMT) 3204 e1000_release_hw_control(adapter); 3205 3206 return 0; 3207} 3208/** 3209 * e1000_set_mac - Change the Ethernet Address of the NIC 3210 * @netdev: network interface device structure 3211 * @p: pointer to an address structure 3212 * 3213 * Returns 0 on success, negative on failure 3214 **/ 3215static int e1000_set_mac(struct net_device *netdev, void *p) 3216{ 3217 struct e1000_adapter *adapter = netdev_priv(netdev); 3218 struct sockaddr *addr = p; 3219 3220 if (!is_valid_ether_addr(addr->sa_data)) 3221 return -EADDRNOTAVAIL; 3222 3223 memcpy(netdev->dev_addr, addr->sa_data, netdev->addr_len); 3224 memcpy(adapter->hw.mac.addr, addr->sa_data, netdev->addr_len); 3225 3226 e1000e_rar_set(&adapter->hw, adapter->hw.mac.addr, 0); 3227 3228 if (adapter->flags & FLAG_RESET_OVERWRITES_LAA) { 3229 /* activate the work around */ 3230 e1000e_set_laa_state_82571(&adapter->hw, 1); 3231 3232 /* 3233 * Hold a copy of the LAA in RAR[14] This is done so that 3234 * between the time RAR[0] gets clobbered and the time it 3235 * gets fixed (in e1000_watchdog), the actual LAA is in one 3236 * of the RARs and no incoming packets directed to this port 3237 * are dropped. Eventually the LAA will be in RAR[0] and 3238 * RAR[14] 3239 */ 3240 e1000e_rar_set(&adapter->hw, 3241 adapter->hw.mac.addr, 3242 adapter->hw.mac.rar_entry_count - 1); 3243 } 3244 3245 return 0; 3246} 3247 3248/** 3249 * e1000e_update_phy_task - work thread to update phy 3250 * @work: pointer to our work struct 3251 * 3252 * this worker thread exists because we must acquire a 3253 * semaphore to read the phy, which we could msleep while 3254 * waiting for it, and we can't msleep in a timer. 3255 **/ 3256static void e1000e_update_phy_task(struct work_struct *work) 3257{ 3258 struct e1000_adapter *adapter = container_of(work, 3259 struct e1000_adapter, update_phy_task); 3260 e1000_get_phy_info(&adapter->hw); 3261} 3262 3263/* 3264 * Need to wait a few seconds after link up to get diagnostic information from 3265 * the phy 3266 */ 3267static void e1000_update_phy_info(unsigned long data) 3268{ 3269 struct e1000_adapter *adapter = (struct e1000_adapter *) data; 3270 schedule_work(&adapter->update_phy_task); 3271} 3272 3273/** 3274 * e1000e_update_stats - Update the board statistics counters 3275 * @adapter: board private structure 3276 **/ 3277void e1000e_update_stats(struct e1000_adapter *adapter) 3278{ 3279 struct net_device *netdev = adapter->netdev; 3280 struct e1000_hw *hw = &adapter->hw; 3281 struct pci_dev *pdev = adapter->pdev; 3282 u16 phy_data; 3283 3284 /* 3285 * Prevent stats update while adapter is being reset, or if the pci 3286 * connection is down. 3287 */ 3288 if (adapter->link_speed == 0) 3289 return; 3290 if (pci_channel_offline(pdev)) 3291 return; 3292 3293 adapter->stats.crcerrs += er32(CRCERRS); 3294 adapter->stats.gprc += er32(GPRC); 3295 adapter->stats.gorc += er32(GORCL); 3296 er32(GORCH); /* Clear gorc */ 3297 adapter->stats.bprc += er32(BPRC); 3298 adapter->stats.mprc += er32(MPRC); 3299 adapter->stats.roc += er32(ROC); 3300 3301 adapter->stats.mpc += er32(MPC); 3302 if ((hw->phy.type == e1000_phy_82578) || 3303 (hw->phy.type == e1000_phy_82577)) { 3304 e1e_rphy(hw, HV_SCC_UPPER, &phy_data); 3305 if (!e1e_rphy(hw, HV_SCC_LOWER, &phy_data)) 3306 adapter->stats.scc += phy_data; 3307 3308 e1e_rphy(hw, HV_ECOL_UPPER, &phy_data); 3309 if (!e1e_rphy(hw, HV_ECOL_LOWER, &phy_data)) 3310 adapter->stats.ecol += phy_data; 3311 3312 e1e_rphy(hw, HV_MCC_UPPER, &phy_data); 3313 if (!e1e_rphy(hw, HV_MCC_LOWER, &phy_data)) 3314 adapter->stats.mcc += phy_data; 3315 3316 e1e_rphy(hw, HV_LATECOL_UPPER, &phy_data); 3317 if (!e1e_rphy(hw, HV_LATECOL_LOWER, &phy_data)) 3318 adapter->stats.latecol += phy_data; 3319 3320 e1e_rphy(hw, HV_DC_UPPER, &phy_data); 3321 if (!e1e_rphy(hw, HV_DC_LOWER, &phy_data)) 3322 adapter->stats.dc += phy_data; 3323 } else { 3324 adapter->stats.scc += er32(SCC); 3325 adapter->stats.ecol += er32(ECOL); 3326 adapter->stats.mcc += er32(MCC); 3327 adapter->stats.latecol += er32(LATECOL); 3328 adapter->stats.dc += er32(DC); 3329 } 3330 adapter->stats.xonrxc += er32(XONRXC); 3331 adapter->stats.xontxc += er32(XONTXC); 3332 adapter->stats.xoffrxc += er32(XOFFRXC); 3333 adapter->stats.xofftxc += er32(XOFFTXC); 3334 adapter->stats.gptc += er32(GPTC); 3335 adapter->stats.gotc += er32(GOTCL); 3336 er32(GOTCH); /* Clear gotc */ 3337 adapter->stats.rnbc += er32(RNBC); 3338 adapter->stats.ruc += er32(RUC); 3339 3340 adapter->stats.mptc += er32(MPTC); 3341 adapter->stats.bptc += er32(BPTC); 3342 3343 /* used for adaptive IFS */ 3344 3345 hw->mac.tx_packet_delta = er32(TPT); 3346 adapter->stats.tpt += hw->mac.tx_packet_delta; 3347 if ((hw->phy.type == e1000_phy_82578) || 3348 (hw->phy.type == e1000_phy_82577)) { 3349 e1e_rphy(hw, HV_COLC_UPPER, &phy_data); 3350 if (!e1e_rphy(hw, HV_COLC_LOWER, &phy_data)) 3351 hw->mac.collision_delta = phy_data; 3352 } else { 3353 hw->mac.collision_delta = er32(COLC); 3354 } 3355 adapter->stats.colc += hw->mac.collision_delta; 3356 3357 adapter->stats.algnerrc += er32(ALGNERRC); 3358 adapter->stats.rxerrc += er32(RXERRC); 3359 if ((hw->phy.type == e1000_phy_82578) || 3360 (hw->phy.type == e1000_phy_82577)) { 3361 e1e_rphy(hw, HV_TNCRS_UPPER, &phy_data); 3362 if (!e1e_rphy(hw, HV_TNCRS_LOWER, &phy_data)) 3363 adapter->stats.tncrs += phy_data; 3364 } else { 3365 if ((hw->mac.type != e1000_82574) && 3366 (hw->mac.type != e1000_82583)) 3367 adapter->stats.tncrs += er32(TNCRS); 3368 } 3369 adapter->stats.cexterr += er32(CEXTERR); 3370 adapter->stats.tsctc += er32(TSCTC); 3371 adapter->stats.tsctfc += er32(TSCTFC); 3372 3373 /* Fill out the OS statistics structure */ 3374 netdev->stats.multicast = adapter->stats.mprc; 3375 netdev->stats.collisions = adapter->stats.colc; 3376 3377 /* Rx Errors */ 3378 3379 /* 3380 * RLEC on some newer hardware can be incorrect so build 3381 * our own version based on RUC and ROC 3382 */ 3383 netdev->stats.rx_errors = adapter->stats.rxerrc + 3384 adapter->stats.crcerrs + adapter->stats.algnerrc + 3385 adapter->stats.ruc + adapter->stats.roc + 3386 adapter->stats.cexterr; 3387 netdev->stats.rx_length_errors = adapter->stats.ruc + 3388 adapter->stats.roc; 3389 netdev->stats.rx_crc_errors = adapter->stats.crcerrs; 3390 netdev->stats.rx_frame_errors = adapter->stats.algnerrc; 3391 netdev->stats.rx_missed_errors = adapter->stats.mpc; 3392 3393 /* Tx Errors */ 3394 netdev->stats.tx_errors = adapter->stats.ecol + 3395 adapter->stats.latecol; 3396 netdev->stats.tx_aborted_errors = adapter->stats.ecol; 3397 netdev->stats.tx_window_errors = adapter->stats.latecol; 3398 netdev->stats.tx_carrier_errors = adapter->stats.tncrs; 3399 3400 /* Tx Dropped needs to be maintained elsewhere */ 3401 3402 /* Management Stats */ 3403 adapter->stats.mgptc += er32(MGTPTC); 3404 adapter->stats.mgprc += er32(MGTPRC); 3405 adapter->stats.mgpdc += er32(MGTPDC); 3406} 3407 3408/** 3409 * e1000_phy_read_status - Update the PHY register status snapshot 3410 * @adapter: board private structure 3411 **/ 3412static void e1000_phy_read_status(struct e1000_adapter *adapter) 3413{ 3414 struct e1000_hw *hw = &adapter->hw; 3415 struct e1000_phy_regs *phy = &adapter->phy_regs; 3416 int ret_val; 3417 3418 if ((er32(STATUS) & E1000_STATUS_LU) && 3419 (adapter->hw.phy.media_type == e1000_media_type_copper)) { 3420 ret_val = e1e_rphy(hw, PHY_CONTROL, &phy->bmcr); 3421 ret_val |= e1e_rphy(hw, PHY_STATUS, &phy->bmsr); 3422 ret_val |= e1e_rphy(hw, PHY_AUTONEG_ADV, &phy->advertise); 3423 ret_val |= e1e_rphy(hw, PHY_LP_ABILITY, &phy->lpa); 3424 ret_val |= e1e_rphy(hw, PHY_AUTONEG_EXP, &phy->expansion); 3425 ret_val |= e1e_rphy(hw, PHY_1000T_CTRL, &phy->ctrl1000); 3426 ret_val |= e1e_rphy(hw, PHY_1000T_STATUS, &phy->stat1000); 3427 ret_val |= e1e_rphy(hw, PHY_EXT_STATUS, &phy->estatus); 3428 if (ret_val) 3429 e_warn("Error reading PHY register\n"); 3430 } else { 3431 /* 3432 * Do not read PHY registers if link is not up 3433 * Set values to typical power-on defaults 3434 */ 3435 phy->bmcr = (BMCR_SPEED1000 | BMCR_ANENABLE | BMCR_FULLDPLX); 3436 phy->bmsr = (BMSR_100FULL | BMSR_100HALF | BMSR_10FULL | 3437 BMSR_10HALF | BMSR_ESTATEN | BMSR_ANEGCAPABLE | 3438 BMSR_ERCAP); 3439 phy->advertise = (ADVERTISE_PAUSE_ASYM | ADVERTISE_PAUSE_CAP | 3440 ADVERTISE_ALL | ADVERTISE_CSMA); 3441 phy->lpa = 0; 3442 phy->expansion = EXPANSION_ENABLENPAGE; 3443 phy->ctrl1000 = ADVERTISE_1000FULL; 3444 phy->stat1000 = 0; 3445 phy->estatus = (ESTATUS_1000_TFULL | ESTATUS_1000_THALF); 3446 } 3447} 3448 3449static void e1000_print_link_info(struct e1000_adapter *adapter) 3450{ 3451 struct e1000_hw *hw = &adapter->hw; 3452 u32 ctrl = er32(CTRL); 3453 3454 /* Link status message must follow this format for user tools */ 3455 printk(KERN_INFO "e1000e: %s NIC Link is Up %d Mbps %s, " 3456 "Flow Control: %s\n", 3457 adapter->netdev->name, 3458 adapter->link_speed, 3459 (adapter->link_duplex == FULL_DUPLEX) ? 3460 "Full Duplex" : "Half Duplex", 3461 ((ctrl & E1000_CTRL_TFCE) && (ctrl & E1000_CTRL_RFCE)) ? 3462 "RX/TX" : 3463 ((ctrl & E1000_CTRL_RFCE) ? "RX" : 3464 ((ctrl & E1000_CTRL_TFCE) ? "TX" : "None" ))); 3465} 3466 3467bool e1000e_has_link(struct e1000_adapter *adapter) 3468{ 3469 struct e1000_hw *hw = &adapter->hw; 3470 bool link_active = 0; 3471 s32 ret_val = 0; 3472 3473 /* 3474 * get_link_status is set on LSC (link status) interrupt or 3475 * Rx sequence error interrupt. get_link_status will stay 3476 * false until the check_for_link establishes link 3477 * for copper adapters ONLY 3478 */ 3479 switch (hw->phy.media_type) { 3480 case e1000_media_type_copper: 3481 if (hw->mac.get_link_status) { 3482 ret_val = hw->mac.ops.check_for_link(hw); 3483 link_active = !hw->mac.get_link_status; 3484 } else { 3485 link_active = 1; 3486 } 3487 break; 3488 case e1000_media_type_fiber: 3489 ret_val = hw->mac.ops.check_for_link(hw); 3490 link_active = !!(er32(STATUS) & E1000_STATUS_LU); 3491 break; 3492 case e1000_media_type_internal_serdes: 3493 ret_val = hw->mac.ops.check_for_link(hw); 3494 link_active = adapter->hw.mac.serdes_has_link; 3495 break; 3496 default: 3497 case e1000_media_type_unknown: 3498 break; 3499 } 3500 3501 if ((ret_val == E1000_ERR_PHY) && (hw->phy.type == e1000_phy_igp_3) && 3502 (er32(CTRL) & E1000_PHY_CTRL_GBE_DISABLE)) { 3503 /* See e1000_kmrn_lock_loss_workaround_ich8lan() */ 3504 e_info("Gigabit has been disabled, downgrading speed\n"); 3505 } 3506 3507 return link_active; 3508} 3509 3510static void e1000e_enable_receives(struct e1000_adapter *adapter) 3511{ 3512 /* make sure the receive unit is started */ 3513 if ((adapter->flags & FLAG_RX_NEEDS_RESTART) && 3514 (adapter->flags & FLAG_RX_RESTART_NOW)) { 3515 struct e1000_hw *hw = &adapter->hw; 3516 u32 rctl = er32(RCTL); 3517 ew32(RCTL, rctl | E1000_RCTL_EN); 3518 adapter->flags &= ~FLAG_RX_RESTART_NOW; 3519 } 3520} 3521 3522/** 3523 * e1000_watchdog - Timer Call-back 3524 * @data: pointer to adapter cast into an unsigned long 3525 **/ 3526static void e1000_watchdog(unsigned long data) 3527{ 3528 struct e1000_adapter *adapter = (struct e1000_adapter *) data; 3529 3530 /* Do the rest outside of interrupt context */ 3531 schedule_work(&adapter->watchdog_task); 3532 3533 /* TODO: make this use queue_delayed_work() */ 3534} 3535 3536static void e1000_watchdog_task(struct work_struct *work) 3537{ 3538 struct e1000_adapter *adapter = container_of(work, 3539 struct e1000_adapter, watchdog_task); 3540 struct net_device *netdev = adapter->netdev; 3541 struct e1000_mac_info *mac = &adapter->hw.mac; 3542 struct e1000_phy_info *phy = &adapter->hw.phy; 3543 struct e1000_ring *tx_ring = adapter->tx_ring; 3544 struct e1000_hw *hw = &adapter->hw; 3545 u32 link, tctl; 3546 int tx_pending = 0; 3547 3548 link = e1000e_has_link(adapter); 3549 if ((netif_carrier_ok(netdev)) && link) { 3550 e1000e_enable_receives(adapter); 3551 goto link_up; 3552 } 3553 3554 if ((e1000e_enable_tx_pkt_filtering(hw)) && 3555 (adapter->mng_vlan_id != adapter->hw.mng_cookie.vlan_id)) 3556 e1000_update_mng_vlan(adapter); 3557 3558 if (link) { 3559 if (!netif_carrier_ok(netdev)) { 3560 bool txb2b = 1; 3561 /* update snapshot of PHY registers on LSC */ 3562 e1000_phy_read_status(adapter); 3563 mac->ops.get_link_up_info(&adapter->hw, 3564 &adapter->link_speed, 3565 &adapter->link_duplex); 3566 e1000_print_link_info(adapter); 3567 /* 3568 * On supported PHYs, check for duplex mismatch only 3569 * if link has autonegotiated at 10/100 half 3570 */ 3571 if ((hw->phy.type == e1000_phy_igp_3 || 3572 hw->phy.type == e1000_phy_bm) && 3573 (hw->mac.autoneg == true) && 3574 (adapter->link_speed == SPEED_10 || 3575 adapter->link_speed == SPEED_100) && 3576 (adapter->link_duplex == HALF_DUPLEX)) { 3577 u16 autoneg_exp; 3578 3579 e1e_rphy(hw, PHY_AUTONEG_EXP, &autoneg_exp); 3580 3581 if (!(autoneg_exp & NWAY_ER_LP_NWAY_CAPS)) 3582 e_info("Autonegotiated half duplex but" 3583 " link partner cannot autoneg. " 3584 " Try forcing full duplex if " 3585 "link gets many collisions.\n"); 3586 } 3587 3588 /* adjust timeout factor according to speed/duplex */ 3589 adapter->tx_timeout_factor = 1; 3590 switch (adapter->link_speed) { 3591 case SPEED_10: 3592 txb2b = 0; 3593 adapter->tx_timeout_factor = 16; 3594 break; 3595 case SPEED_100: 3596 txb2b = 0; 3597 adapter->tx_timeout_factor = 10; 3598 break; 3599 } 3600 3601 /* 3602 * workaround: re-program speed mode bit after 3603 * link-up event 3604 */ 3605 if ((adapter->flags & FLAG_TARC_SPEED_MODE_BIT) && 3606 !txb2b) { 3607 u32 tarc0; 3608 tarc0 = er32(TARC(0)); 3609 tarc0 &= ~SPEED_MODE_BIT; 3610 ew32(TARC(0), tarc0); 3611 } 3612 3613 /* 3614 * disable TSO for pcie and 10/100 speeds, to avoid 3615 * some hardware issues 3616 */ 3617 if (!(adapter->flags & FLAG_TSO_FORCE)) { 3618 switch (adapter->link_speed) { 3619 case SPEED_10: 3620 case SPEED_100: 3621 e_info("10/100 speed: disabling TSO\n"); 3622 netdev->features &= ~NETIF_F_TSO; 3623 netdev->features &= ~NETIF_F_TSO6; 3624 break; 3625 case SPEED_1000: 3626 netdev->features |= NETIF_F_TSO; 3627 netdev->features |= NETIF_F_TSO6; 3628 break; 3629 default: 3630 /* oops */ 3631 break; 3632 } 3633 } 3634 3635 /* 3636 * enable transmits in the hardware, need to do this 3637 * after setting TARC(0) 3638 */ 3639 tctl = er32(TCTL); 3640 tctl |= E1000_TCTL_EN; 3641 ew32(TCTL, tctl); 3642 3643 /* 3644 * Perform any post-link-up configuration before 3645 * reporting link up. 3646 */ 3647 if (phy->ops.cfg_on_link_up) 3648 phy->ops.cfg_on_link_up(hw); 3649 3650 netif_carrier_on(netdev); 3651 3652 if (!test_bit(__E1000_DOWN, &adapter->state)) 3653 mod_timer(&adapter->phy_info_timer, 3654 round_jiffies(jiffies + 2 * HZ)); 3655 } 3656 } else { 3657 if (netif_carrier_ok(netdev)) { 3658 adapter->link_speed = 0; 3659 adapter->link_duplex = 0; 3660 /* Link status message must follow this format */ 3661 printk(KERN_INFO "e1000e: %s NIC Link is Down\n", 3662 adapter->netdev->name); 3663 netif_carrier_off(netdev); 3664 if (!test_bit(__E1000_DOWN, &adapter->state)) 3665 mod_timer(&adapter->phy_info_timer, 3666 round_jiffies(jiffies + 2 * HZ)); 3667 3668 if (adapter->flags & FLAG_RX_NEEDS_RESTART) 3669 schedule_work(&adapter->reset_task); 3670 } 3671 } 3672 3673link_up: 3674 e1000e_update_stats(adapter); 3675 3676 mac->tx_packet_delta = adapter->stats.tpt - adapter->tpt_old; 3677 adapter->tpt_old = adapter->stats.tpt; 3678 mac->collision_delta = adapter->stats.colc - adapter->colc_old; 3679 adapter->colc_old = adapter->stats.colc; 3680 3681 adapter->gorc = adapter->stats.gorc - adapter->gorc_old; 3682 adapter->gorc_old = adapter->stats.gorc; 3683 adapter->gotc = adapter->stats.gotc - adapter->gotc_old; 3684 adapter->gotc_old = adapter->stats.gotc; 3685 3686 e1000e_update_adaptive(&adapter->hw); 3687 3688 if (!netif_carrier_ok(netdev)) { 3689 tx_pending = (e1000_desc_unused(tx_ring) + 1 < 3690 tx_ring->count); 3691 if (tx_pending) { 3692 /* 3693 * We've lost link, so the controller stops DMA, 3694 * but we've got queued Tx work that's never going 3695 * to get done, so reset controller to flush Tx. 3696 * (Do the reset outside of interrupt context). 3697 */ 3698 adapter->tx_timeout_count++; 3699 schedule_work(&adapter->reset_task); 3700 /* return immediately since reset is imminent */ 3701 return; 3702 } 3703 } 3704 3705 /* Cause software interrupt to ensure Rx ring is cleaned */ 3706 if (adapter->msix_entries) 3707 ew32(ICS, adapter->rx_ring->ims_val); 3708 else 3709 ew32(ICS, E1000_ICS_RXDMT0); 3710 3711 /* Force detection of hung controller every watchdog period */ 3712 adapter->detect_tx_hung = 1; 3713 3714 /* 3715 * With 82571 controllers, LAA may be overwritten due to controller 3716 * reset from the other port. Set the appropriate LAA in RAR[0] 3717 */ 3718 if (e1000e_get_laa_state_82571(hw)) 3719 e1000e_rar_set(hw, adapter->hw.mac.addr, 0); 3720 3721 /* Reset the timer */ 3722 if (!test_bit(__E1000_DOWN, &adapter->state)) 3723 mod_timer(&adapter->watchdog_timer, 3724 round_jiffies(jiffies + 2 * HZ)); 3725} 3726 3727#define E1000_TX_FLAGS_CSUM 0x00000001 3728#define E1000_TX_FLAGS_VLAN 0x00000002 3729#define E1000_TX_FLAGS_TSO 0x00000004 3730#define E1000_TX_FLAGS_IPV4 0x00000008 3731#define E1000_TX_FLAGS_VLAN_MASK 0xffff0000 3732#define E1000_TX_FLAGS_VLAN_SHIFT 16 3733 3734static int e1000_tso(struct e1000_adapter *adapter, 3735 struct sk_buff *skb) 3736{ 3737 struct e1000_ring *tx_ring = adapter->tx_ring; 3738 struct e1000_context_desc *context_desc; 3739 struct e1000_buffer *buffer_info; 3740 unsigned int i; 3741 u32 cmd_length = 0; 3742 u16 ipcse = 0, tucse, mss; 3743 u8 ipcss, ipcso, tucss, tucso, hdr_len; 3744 int err; 3745 3746 if (!skb_is_gso(skb)) 3747 return 0; 3748 3749 if (skb_header_cloned(skb)) { 3750 err = pskb_expand_head(skb, 0, 0, GFP_ATOMIC); 3751 if (err) 3752 return err; 3753 } 3754 3755 hdr_len = skb_transport_offset(skb) + tcp_hdrlen(skb); 3756 mss = skb_shinfo(skb)->gso_size; 3757 if (skb->protocol == htons(ETH_P_IP)) { 3758 struct iphdr *iph = ip_hdr(skb); 3759 iph->tot_len = 0; 3760 iph->check = 0; 3761 tcp_hdr(skb)->check = ~csum_tcpudp_magic(iph->saddr, iph->daddr, 3762 0, IPPROTO_TCP, 0); 3763 cmd_length = E1000_TXD_CMD_IP; 3764 ipcse = skb_transport_offset(skb) - 1; 3765 } else if (skb_is_gso_v6(skb)) { 3766 ipv6_hdr(skb)->payload_len = 0; 3767 tcp_hdr(skb)->check = ~csum_ipv6_magic(&ipv6_hdr(skb)->saddr, 3768 &ipv6_hdr(skb)->daddr, 3769 0, IPPROTO_TCP, 0); 3770 ipcse = 0; 3771 } 3772 ipcss = skb_network_offset(skb); 3773 ipcso = (void *)&(ip_hdr(skb)->check) - (void *)skb->data; 3774 tucss = skb_transport_offset(skb); 3775 tucso = (void *)&(tcp_hdr(skb)->check) - (void *)skb->data; 3776 tucse = 0; 3777 3778 cmd_length |= (E1000_TXD_CMD_DEXT | E1000_TXD_CMD_TSE | 3779 E1000_TXD_CMD_TCP | (skb->len - (hdr_len))); 3780 3781 i = tx_ring->next_to_use; 3782 context_desc = E1000_CONTEXT_DESC(*tx_ring, i); 3783 buffer_info = &tx_ring->buffer_info[i]; 3784 3785 context_desc->lower_setup.ip_fields.ipcss = ipcss; 3786 context_desc->lower_setup.ip_fields.ipcso = ipcso; 3787 context_desc->lower_setup.ip_fields.ipcse = cpu_to_le16(ipcse); 3788 context_desc->upper_setup.tcp_fields.tucss = tucss; 3789 context_desc->upper_setup.tcp_fields.tucso = tucso; 3790 context_desc->upper_setup.tcp_fields.tucse = cpu_to_le16(tucse); 3791 context_desc->tcp_seg_setup.fields.mss = cpu_to_le16(mss); 3792 context_desc->tcp_seg_setup.fields.hdr_len = hdr_len; 3793 context_desc->cmd_and_length = cpu_to_le32(cmd_length); 3794 3795 buffer_info->time_stamp = jiffies; 3796 buffer_info->next_to_watch = i; 3797 3798 i++; 3799 if (i == tx_ring->count) 3800 i = 0; 3801 tx_ring->next_to_use = i; 3802 3803 return 1; 3804} 3805 3806static bool e1000_tx_csum(struct e1000_adapter *adapter, struct sk_buff *skb) 3807{ 3808 struct e1000_ring *tx_ring = adapter->tx_ring; 3809 struct e1000_context_desc *context_desc; 3810 struct e1000_buffer *buffer_info; 3811 unsigned int i; 3812 u8 css; 3813 u32 cmd_len = E1000_TXD_CMD_DEXT; 3814 __be16 protocol; 3815 3816 if (skb->ip_summed != CHECKSUM_PARTIAL) 3817 return 0; 3818 3819 if (skb->protocol == cpu_to_be16(ETH_P_8021Q)) 3820 protocol = vlan_eth_hdr(skb)->h_vlan_encapsulated_proto; 3821 else 3822 protocol = skb->protocol; 3823 3824 switch (protocol) { 3825 case cpu_to_be16(ETH_P_IP): 3826 if (ip_hdr(skb)->protocol == IPPROTO_TCP) 3827 cmd_len |= E1000_TXD_CMD_TCP; 3828 break; 3829 case cpu_to_be16(ETH_P_IPV6): 3830 /* XXX not handling all IPV6 headers */ 3831 if (ipv6_hdr(skb)->nexthdr == IPPROTO_TCP) 3832 cmd_len |= E1000_TXD_CMD_TCP; 3833 break; 3834 default: 3835 if (unlikely(net_ratelimit())) 3836 e_warn("checksum_partial proto=%x!\n", 3837 be16_to_cpu(protocol)); 3838 break; 3839 } 3840 3841 css = skb_transport_offset(skb); 3842 3843 i = tx_ring->next_to_use; 3844 buffer_info = &tx_ring->buffer_info[i]; 3845 context_desc = E1000_CONTEXT_DESC(*tx_ring, i); 3846 3847 context_desc->lower_setup.ip_config = 0; 3848 context_desc->upper_setup.tcp_fields.tucss = css; 3849 context_desc->upper_setup.tcp_fields.tucso = 3850 css + skb->csum_offset; 3851 context_desc->upper_setup.tcp_fields.tucse = 0; 3852 context_desc->tcp_seg_setup.data = 0; 3853 context_desc->cmd_and_length = cpu_to_le32(cmd_len); 3854 3855 buffer_info->time_stamp = jiffies; 3856 buffer_info->next_to_watch = i; 3857 3858 i++; 3859 if (i == tx_ring->count) 3860 i = 0; 3861 tx_ring->next_to_use = i; 3862 3863 return 1; 3864} 3865 3866#define E1000_MAX_PER_TXD 8192 3867#define E1000_MAX_TXD_PWR 12 3868 3869static int e1000_tx_map(struct e1000_adapter *adapter, 3870 struct sk_buff *skb, unsigned int first, 3871 unsigned int max_per_txd, unsigned int nr_frags, 3872 unsigned int mss) 3873{ 3874 struct e1000_ring *tx_ring = adapter->tx_ring; 3875 struct pci_dev *pdev = adapter->pdev; 3876 struct e1000_buffer *buffer_info; 3877 unsigned int len = skb_headlen(skb); 3878 unsigned int offset = 0, size, count = 0, i; 3879 unsigned int f; 3880 3881 i = tx_ring->next_to_use; 3882 3883 while (len) { 3884 buffer_info = &tx_ring->buffer_info[i]; 3885 size = min(len, max_per_txd); 3886 3887 buffer_info->length = size; 3888 buffer_info->time_stamp = jiffies; 3889 buffer_info->next_to_watch = i; 3890 buffer_info->dma = pci_map_single(pdev, skb->data + offset, 3891 size, PCI_DMA_TODEVICE); 3892 buffer_info->mapped_as_page = false; 3893 if (pci_dma_mapping_error(pdev, buffer_info->dma)) 3894 goto dma_error; 3895 3896 len -= size; 3897 offset += size; 3898 count++; 3899 3900 if (len) { 3901 i++; 3902 if (i == tx_ring->count) 3903 i = 0; 3904 } 3905 } 3906 3907 for (f = 0; f < nr_frags; f++) { 3908 struct skb_frag_struct *frag; 3909 3910 frag = &skb_shinfo(skb)->frags[f]; 3911 len = frag->size; 3912 offset = frag->page_offset; 3913 3914 while (len) { 3915 i++; 3916 if (i == tx_ring->count) 3917 i = 0; 3918 3919 buffer_info = &tx_ring->buffer_info[i]; 3920 size = min(len, max_per_txd); 3921 3922 buffer_info->length = size; 3923 buffer_info->time_stamp = jiffies; 3924 buffer_info->next_to_watch = i; 3925 buffer_info->dma = pci_map_page(pdev, frag->page, 3926 offset, size, 3927 PCI_DMA_TODEVICE); 3928 buffer_info->mapped_as_page = true; 3929 if (pci_dma_mapping_error(pdev, buffer_info->dma)) 3930 goto dma_error; 3931 3932 len -= size; 3933 offset += size; 3934 count++; 3935 } 3936 } 3937 3938 tx_ring->buffer_info[i].skb = skb; 3939 tx_ring->buffer_info[first].next_to_watch = i; 3940 3941 return count; 3942 3943dma_error: 3944 dev_err(&pdev->dev, "TX DMA map failed\n"); 3945 buffer_info->dma = 0; 3946 if (count) 3947 count--; 3948 3949 while (count--) { 3950 if (i==0) 3951 i += tx_ring->count; 3952 i--; 3953 buffer_info = &tx_ring->buffer_info[i]; 3954 e1000_put_txbuf(adapter, buffer_info);; 3955 } 3956 3957 return 0; 3958} 3959 3960static void e1000_tx_queue(struct e1000_adapter *adapter, 3961 int tx_flags, int count) 3962{ 3963 struct e1000_ring *tx_ring = adapter->tx_ring; 3964 struct e1000_tx_desc *tx_desc = NULL; 3965 struct e1000_buffer *buffer_info; 3966 u32 txd_upper = 0, txd_lower = E1000_TXD_CMD_IFCS; 3967 unsigned int i; 3968 3969 if (tx_flags & E1000_TX_FLAGS_TSO) { 3970 txd_lower |= E1000_TXD_CMD_DEXT | E1000_TXD_DTYP_D | 3971 E1000_TXD_CMD_TSE; 3972 txd_upper |= E1000_TXD_POPTS_TXSM << 8; 3973 3974 if (tx_flags & E1000_TX_FLAGS_IPV4) 3975 txd_upper |= E1000_TXD_POPTS_IXSM << 8; 3976 } 3977 3978 if (tx_flags & E1000_TX_FLAGS_CSUM) { 3979 txd_lower |= E1000_TXD_CMD_DEXT | E1000_TXD_DTYP_D; 3980 txd_upper |= E1000_TXD_POPTS_TXSM << 8; 3981 } 3982 3983 if (tx_flags & E1000_TX_FLAGS_VLAN) { 3984 txd_lower |= E1000_TXD_CMD_VLE; 3985 txd_upper |= (tx_flags & E1000_TX_FLAGS_VLAN_MASK); 3986 } 3987 3988 i = tx_ring->next_to_use; 3989 3990 while (count--) { 3991 buffer_info = &tx_ring->buffer_info[i]; 3992 tx_desc = E1000_TX_DESC(*tx_ring, i); 3993 tx_desc->buffer_addr = cpu_to_le64(buffer_info->dma); 3994 tx_desc->lower.data = 3995 cpu_to_le32(txd_lower | buffer_info->length); 3996 tx_desc->upper.data = cpu_to_le32(txd_upper); 3997 3998 i++; 3999 if (i == tx_ring->count) 4000 i = 0; 4001 } 4002 4003 tx_desc->lower.data |= cpu_to_le32(adapter->txd_cmd); 4004 4005 /* 4006 * Force memory writes to complete before letting h/w 4007 * know there are new descriptors to fetch. (Only 4008 * applicable for weak-ordered memory model archs, 4009 * such as IA-64). 4010 */ 4011 wmb(); 4012 4013 tx_ring->next_to_use = i; 4014 writel(i, adapter->hw.hw_addr + tx_ring->tail); 4015 /* 4016 * we need this if more than one processor can write to our tail 4017 * at a time, it synchronizes IO on IA64/Altix systems 4018 */ 4019 mmiowb(); 4020} 4021 4022#define MINIMUM_DHCP_PACKET_SIZE 282 4023static int e1000_transfer_dhcp_info(struct e1000_adapter *adapter, 4024 struct sk_buff *skb) 4025{ 4026 struct e1000_hw *hw = &adapter->hw; 4027 u16 length, offset; 4028 4029 if (vlan_tx_tag_present(skb)) { 4030 if (!((vlan_tx_tag_get(skb) == adapter->hw.mng_cookie.vlan_id) && 4031 (adapter->hw.mng_cookie.status & 4032 E1000_MNG_DHCP_COOKIE_STATUS_VLAN))) 4033 return 0; 4034 } 4035 4036 if (skb->len <= MINIMUM_DHCP_PACKET_SIZE) 4037 return 0; 4038 4039 if (((struct ethhdr *) skb->data)->h_proto != htons(ETH_P_IP)) 4040 return 0; 4041 4042 { 4043 const struct iphdr *ip = (struct iphdr *)((u8 *)skb->data+14); 4044 struct udphdr *udp; 4045 4046 if (ip->protocol != IPPROTO_UDP) 4047 return 0; 4048 4049 udp = (struct udphdr *)((u8 *)ip + (ip->ihl << 2)); 4050 if (ntohs(udp->dest) != 67) 4051 return 0; 4052 4053 offset = (u8 *)udp + 8 - skb->data; 4054 length = skb->len - offset; 4055 return e1000e_mng_write_dhcp_info(hw, (u8 *)udp + 8, length); 4056 } 4057 4058 return 0; 4059} 4060 4061static int __e1000_maybe_stop_tx(struct net_device *netdev, int size) 4062{ 4063 struct e1000_adapter *adapter = netdev_priv(netdev); 4064 4065 netif_stop_queue(netdev); 4066 /* 4067 * Herbert's original patch had: 4068 * smp_mb__after_netif_stop_queue(); 4069 * but since that doesn't exist yet, just open code it. 4070 */ 4071 smp_mb(); 4072 4073 /* 4074 * We need to check again in a case another CPU has just 4075 * made room available. 4076 */ 4077 if (e1000_desc_unused(adapter->tx_ring) < size) 4078 return -EBUSY; 4079 4080 /* A reprieve! */ 4081 netif_start_queue(netdev); 4082 ++adapter->restart_queue; 4083 return 0; 4084} 4085 4086static int e1000_maybe_stop_tx(struct net_device *netdev, int size) 4087{ 4088 struct e1000_adapter *adapter = netdev_priv(netdev); 4089 4090 if (e1000_desc_unused(adapter->tx_ring) >= size) 4091 return 0; 4092 return __e1000_maybe_stop_tx(netdev, size); 4093} 4094 4095#define TXD_USE_COUNT(S, X) (((S) >> (X)) + 1 ) 4096static netdev_tx_t e1000_xmit_frame(struct sk_buff *skb, 4097 struct net_device *netdev) 4098{ 4099 struct e1000_adapter *adapter = netdev_priv(netdev); 4100 struct e1000_ring *tx_ring = adapter->tx_ring; 4101 unsigned int first; 4102 unsigned int max_per_txd = E1000_MAX_PER_TXD; 4103 unsigned int max_txd_pwr = E1000_MAX_TXD_PWR; 4104 unsigned int tx_flags = 0; 4105 unsigned int len = skb->len - skb->data_len; 4106 unsigned int nr_frags; 4107 unsigned int mss; 4108 int count = 0; 4109 int tso; 4110 unsigned int f; 4111 4112 if (test_bit(__E1000_DOWN, &adapter->state)) { 4113 dev_kfree_skb_any(skb); 4114 return NETDEV_TX_OK; 4115 } 4116 4117 if (skb->len <= 0) { 4118 dev_kfree_skb_any(skb); 4119 return NETDEV_TX_OK; 4120 } 4121 4122 mss = skb_shinfo(skb)->gso_size; 4123 /* 4124 * The controller does a simple calculation to 4125 * make sure there is enough room in the FIFO before 4126 * initiating the DMA for each buffer. The calc is: 4127 * 4 = ceil(buffer len/mss). To make sure we don't 4128 * overrun the FIFO, adjust the max buffer len if mss 4129 * drops. 4130 */ 4131 if (mss) { 4132 u8 hdr_len; 4133 max_per_txd = min(mss << 2, max_per_txd); 4134 max_txd_pwr = fls(max_per_txd) - 1; 4135 4136 /* 4137 * TSO Workaround for 82571/2/3 Controllers -- if skb->data 4138 * points to just header, pull a few bytes of payload from 4139 * frags into skb->data 4140 */ 4141 hdr_len = skb_transport_offset(skb) + tcp_hdrlen(skb); 4142 /* 4143 * we do this workaround for ES2LAN, but it is un-necessary, 4144 * avoiding it could save a lot of cycles 4145 */ 4146 if (skb->data_len && (hdr_len == len)) { 4147 unsigned int pull_size; 4148 4149 pull_size = min((unsigned int)4, skb->data_len); 4150 if (!__pskb_pull_tail(skb, pull_size)) { 4151 e_err("__pskb_pull_tail failed.\n"); 4152 dev_kfree_skb_any(skb); 4153 return NETDEV_TX_OK; 4154 } 4155 len = skb->len - skb->data_len; 4156 } 4157 } 4158 4159 /* reserve a descriptor for the offload context */ 4160 if ((mss) || (skb->ip_summed == CHECKSUM_PARTIAL)) 4161 count++; 4162 count++; 4163 4164 count += TXD_USE_COUNT(len, max_txd_pwr); 4165 4166 nr_frags = skb_shinfo(skb)->nr_frags; 4167 for (f = 0; f < nr_frags; f++) 4168 count += TXD_USE_COUNT(skb_shinfo(skb)->frags[f].size, 4169 max_txd_pwr); 4170 4171 if (adapter->hw.mac.tx_pkt_filtering) 4172 e1000_transfer_dhcp_info(adapter, skb); 4173 4174 /* 4175 * need: count + 2 desc gap to keep tail from touching 4176 * head, otherwise try next time 4177 */ 4178 if (e1000_maybe_stop_tx(netdev, count + 2)) 4179 return NETDEV_TX_BUSY; 4180 4181 if (adapter->vlgrp && vlan_tx_tag_present(skb)) { 4182 tx_flags |= E1000_TX_FLAGS_VLAN; 4183 tx_flags |= (vlan_tx_tag_get(skb) << E1000_TX_FLAGS_VLAN_SHIFT); 4184 } 4185 4186 first = tx_ring->next_to_use; 4187 4188 tso = e1000_tso(adapter, skb); 4189 if (tso < 0) { 4190 dev_kfree_skb_any(skb); 4191 return NETDEV_TX_OK; 4192 } 4193 4194 if (tso) 4195 tx_flags |= E1000_TX_FLAGS_TSO; 4196 else if (e1000_tx_csum(adapter, skb)) 4197 tx_flags |= E1000_TX_FLAGS_CSUM; 4198 4199 /* 4200 * Old method was to assume IPv4 packet by default if TSO was enabled. 4201 * 82571 hardware supports TSO capabilities for IPv6 as well... 4202 * no longer assume, we must. 4203 */ 4204 if (skb->protocol == htons(ETH_P_IP)) 4205 tx_flags |= E1000_TX_FLAGS_IPV4; 4206 4207 /* if count is 0 then mapping error has occured */ 4208 count = e1000_tx_map(adapter, skb, first, max_per_txd, nr_frags, mss); 4209 if (count) { 4210 e1000_tx_queue(adapter, tx_flags, count); 4211 /* Make sure there is space in the ring for the next send. */ 4212 e1000_maybe_stop_tx(netdev, MAX_SKB_FRAGS + 2); 4213 4214 } else { 4215 dev_kfree_skb_any(skb); 4216 tx_ring->buffer_info[first].time_stamp = 0; 4217 tx_ring->next_to_use = first; 4218 } 4219 4220 return NETDEV_TX_OK; 4221} 4222 4223/** 4224 * e1000_tx_timeout - Respond to a Tx Hang 4225 * @netdev: network interface device structure 4226 **/ 4227static void e1000_tx_timeout(struct net_device *netdev) 4228{ 4229 struct e1000_adapter *adapter = netdev_priv(netdev); 4230 4231 /* Do the reset outside of interrupt context */ 4232 adapter->tx_timeout_count++; 4233 schedule_work(&adapter->reset_task); 4234} 4235 4236static void e1000_reset_task(struct work_struct *work) 4237{ 4238 struct e1000_adapter *adapter; 4239 adapter = container_of(work, struct e1000_adapter, reset_task); 4240 4241 e1000e_reinit_locked(adapter); 4242} 4243 4244/** 4245 * e1000_get_stats - Get System Network Statistics 4246 * @netdev: network interface device structure 4247 * 4248 * Returns the address of the device statistics structure. 4249 * The statistics are actually updated from the timer callback. 4250 **/ 4251static struct net_device_stats *e1000_get_stats(struct net_device *netdev) 4252{ 4253 /* only return the current stats */ 4254 return &netdev->stats; 4255} 4256 4257/** 4258 * e1000_change_mtu - Change the Maximum Transfer Unit 4259 * @netdev: network interface device structure 4260 * @new_mtu: new value for maximum frame size 4261 * 4262 * Returns 0 on success, negative on failure 4263 **/ 4264static int e1000_change_mtu(struct net_device *netdev, int new_mtu) 4265{ 4266 struct e1000_adapter *adapter = netdev_priv(netdev); 4267 int max_frame = new_mtu + ETH_HLEN + ETH_FCS_LEN; 4268 4269 /* Jumbo frame support */ 4270 if ((max_frame > ETH_FRAME_LEN + ETH_FCS_LEN) && 4271 !(adapter->flags & FLAG_HAS_JUMBO_FRAMES)) { 4272 e_err("Jumbo Frames not supported.\n"); 4273 return -EINVAL; 4274 } 4275 4276 /* Supported frame sizes */ 4277 if ((new_mtu < ETH_ZLEN + ETH_FCS_LEN + VLAN_HLEN) || 4278 (max_frame > adapter->max_hw_frame_size)) { 4279 e_err("Unsupported MTU setting\n"); 4280 return -EINVAL; 4281 } 4282 4283 while (test_and_set_bit(__E1000_RESETTING, &adapter->state)) 4284 msleep(1); 4285 /* e1000e_down -> e1000e_reset dependent on max_frame_size & mtu */ 4286 adapter->max_frame_size = max_frame; 4287 e_info("changing MTU from %d to %d\n", netdev->mtu, new_mtu); 4288 netdev->mtu = new_mtu; 4289 if (netif_running(netdev)) 4290 e1000e_down(adapter); 4291 4292 /* 4293 * NOTE: netdev_alloc_skb reserves 16 bytes, and typically NET_IP_ALIGN 4294 * means we reserve 2 more, this pushes us to allocate from the next 4295 * larger slab size. 4296 * i.e. RXBUFFER_2048 --> size-4096 slab 4297 * However with the new *_jumbo_rx* routines, jumbo receives will use 4298 * fragmented skbs 4299 */ 4300 4301 if (max_frame <= 2048) 4302 adapter->rx_buffer_len = 2048; 4303 else 4304 adapter->rx_buffer_len = 4096; 4305 4306 /* adjust allocation if LPE protects us, and we aren't using SBP */ 4307 if ((max_frame == ETH_FRAME_LEN + ETH_FCS_LEN) || 4308 (max_frame == ETH_FRAME_LEN + VLAN_HLEN + ETH_FCS_LEN)) 4309 adapter->rx_buffer_len = ETH_FRAME_LEN + VLAN_HLEN 4310 + ETH_FCS_LEN; 4311 4312 if (netif_running(netdev)) 4313 e1000e_up(adapter); 4314 else 4315 e1000e_reset(adapter); 4316 4317 clear_bit(__E1000_RESETTING, &adapter->state); 4318 4319 return 0; 4320} 4321 4322static int e1000_mii_ioctl(struct net_device *netdev, struct ifreq *ifr, 4323 int cmd) 4324{ 4325 struct e1000_adapter *adapter = netdev_priv(netdev); 4326 struct mii_ioctl_data *data = if_mii(ifr); 4327 4328 if (adapter->hw.phy.media_type != e1000_media_type_copper) 4329 return -EOPNOTSUPP; 4330 4331 switch (cmd) { 4332 case SIOCGMIIPHY: 4333 data->phy_id = adapter->hw.phy.addr; 4334 break; 4335 case SIOCGMIIREG: 4336 e1000_phy_read_status(adapter); 4337 4338 switch (data->reg_num & 0x1F) { 4339 case MII_BMCR: 4340 data->val_out = adapter->phy_regs.bmcr; 4341 break; 4342 case MII_BMSR: 4343 data->val_out = adapter->phy_regs.bmsr; 4344 break; 4345 case MII_PHYSID1: 4346 data->val_out = (adapter->hw.phy.id >> 16); 4347 break; 4348 case MII_PHYSID2: 4349 data->val_out = (adapter->hw.phy.id & 0xFFFF); 4350 break; 4351 case MII_ADVERTISE: 4352 data->val_out = adapter->phy_regs.advertise; 4353 break; 4354 case MII_LPA: 4355 data->val_out = adapter->phy_regs.lpa; 4356 break; 4357 case MII_EXPANSION: 4358 data->val_out = adapter->phy_regs.expansion; 4359 break; 4360 case MII_CTRL1000: 4361 data->val_out = adapter->phy_regs.ctrl1000; 4362 break; 4363 case MII_STAT1000: 4364 data->val_out = adapter->phy_regs.stat1000; 4365 break; 4366 case MII_ESTATUS: 4367 data->val_out = adapter->phy_regs.estatus; 4368 break; 4369 default: 4370 return -EIO; 4371 } 4372 break; 4373 case SIOCSMIIREG: 4374 default: 4375 return -EOPNOTSUPP; 4376 } 4377 return 0; 4378} 4379 4380static int e1000_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd) 4381{ 4382 switch (cmd) { 4383 case SIOCGMIIPHY: 4384 case SIOCGMIIREG: 4385 case SIOCSMIIREG: 4386 return e1000_mii_ioctl(netdev, ifr, cmd); 4387 default: 4388 return -EOPNOTSUPP; 4389 } 4390} 4391 4392static int e1000_init_phy_wakeup(struct e1000_adapter *adapter, u32 wufc) 4393{ 4394 struct e1000_hw *hw = &adapter->hw; 4395 u32 i, mac_reg; 4396 u16 phy_reg; 4397 int retval = 0; 4398 4399 /* copy MAC RARs to PHY RARs */ 4400 for (i = 0; i < adapter->hw.mac.rar_entry_count; i++) { 4401 mac_reg = er32(RAL(i)); 4402 e1e_wphy(hw, BM_RAR_L(i), (u16)(mac_reg & 0xFFFF)); 4403 e1e_wphy(hw, BM_RAR_M(i), (u16)((mac_reg >> 16) & 0xFFFF)); 4404 mac_reg = er32(RAH(i)); 4405 e1e_wphy(hw, BM_RAR_H(i), (u16)(mac_reg & 0xFFFF)); 4406 e1e_wphy(hw, BM_RAR_CTRL(i), (u16)((mac_reg >> 16) & 0xFFFF)); 4407 } 4408 4409 /* copy MAC MTA to PHY MTA */ 4410 for (i = 0; i < adapter->hw.mac.mta_reg_count; i++) { 4411 mac_reg = E1000_READ_REG_ARRAY(hw, E1000_MTA, i); 4412 e1e_wphy(hw, BM_MTA(i), (u16)(mac_reg & 0xFFFF)); 4413 e1e_wphy(hw, BM_MTA(i) + 1, (u16)((mac_reg >> 16) & 0xFFFF)); 4414 } 4415 4416 /* configure PHY Rx Control register */ 4417 e1e_rphy(&adapter->hw, BM_RCTL, &phy_reg); 4418 mac_reg = er32(RCTL); 4419 if (mac_reg & E1000_RCTL_UPE) 4420 phy_reg |= BM_RCTL_UPE; 4421 if (mac_reg & E1000_RCTL_MPE) 4422 phy_reg |= BM_RCTL_MPE; 4423 phy_reg &= ~(BM_RCTL_MO_MASK); 4424 if (mac_reg & E1000_RCTL_MO_3) 4425 phy_reg |= (((mac_reg & E1000_RCTL_MO_3) >> E1000_RCTL_MO_SHIFT) 4426 << BM_RCTL_MO_SHIFT); 4427 if (mac_reg & E1000_RCTL_BAM) 4428 phy_reg |= BM_RCTL_BAM; 4429 if (mac_reg & E1000_RCTL_PMCF) 4430 phy_reg |= BM_RCTL_PMCF; 4431 mac_reg = er32(CTRL); 4432 if (mac_reg & E1000_CTRL_RFCE) 4433 phy_reg |= BM_RCTL_RFCE; 4434 e1e_wphy(&adapter->hw, BM_RCTL, phy_reg); 4435 4436 /* enable PHY wakeup in MAC register */ 4437 ew32(WUFC, wufc); 4438 ew32(WUC, E1000_WUC_PHY_WAKE | E1000_WUC_PME_EN); 4439 4440 /* configure and enable PHY wakeup in PHY registers */ 4441 e1e_wphy(&adapter->hw, BM_WUFC, wufc); 4442 e1e_wphy(&adapter->hw, BM_WUC, E1000_WUC_PME_EN); 4443 4444 /* activate PHY wakeup */ 4445 retval = hw->phy.ops.acquire(hw); 4446 if (retval) { 4447 e_err("Could not acquire PHY\n"); 4448 return retval; 4449 } 4450 e1000e_write_phy_reg_mdic(hw, IGP01E1000_PHY_PAGE_SELECT, 4451 (BM_WUC_ENABLE_PAGE << IGP_PAGE_SHIFT)); 4452 retval = e1000e_read_phy_reg_mdic(hw, BM_WUC_ENABLE_REG, &phy_reg); 4453 if (retval) { 4454 e_err("Could not read PHY page 769\n"); 4455 goto out; 4456 } 4457 phy_reg |= BM_WUC_ENABLE_BIT | BM_WUC_HOST_WU_BIT; 4458 retval = e1000e_write_phy_reg_mdic(hw, BM_WUC_ENABLE_REG, phy_reg); 4459 if (retval) 4460 e_err("Could not set PHY Host Wakeup bit\n"); 4461out: 4462 hw->phy.ops.release(hw); 4463 4464 return retval; 4465} 4466 4467static int __e1000_shutdown(struct pci_dev *pdev, bool *enable_wake) 4468{ 4469 struct net_device *netdev = pci_get_drvdata(pdev); 4470 struct e1000_adapter *adapter = netdev_priv(netdev); 4471 struct e1000_hw *hw = &adapter->hw; 4472 u32 ctrl, ctrl_ext, rctl, status; 4473 u32 wufc = adapter->wol; 4474 int retval = 0; 4475 4476 netif_device_detach(netdev); 4477 4478 if (netif_running(netdev)) { 4479 WARN_ON(test_bit(__E1000_RESETTING, &adapter->state)); 4480 e1000e_down(adapter); 4481 e1000_free_irq(adapter); 4482 } 4483 e1000e_reset_interrupt_capability(adapter); 4484 4485 retval = pci_save_state(pdev); 4486 if (retval) 4487 return retval; 4488 4489 status = er32(STATUS); 4490 if (status & E1000_STATUS_LU) 4491 wufc &= ~E1000_WUFC_LNKC; 4492 4493 if (wufc) { 4494 e1000_setup_rctl(adapter); 4495 e1000_set_multi(netdev); 4496 4497 /* turn on all-multi mode if wake on multicast is enabled */ 4498 if (wufc & E1000_WUFC_MC) { 4499 rctl = er32(RCTL); 4500 rctl |= E1000_RCTL_MPE; 4501 ew32(RCTL, rctl); 4502 } 4503 4504 ctrl = er32(CTRL); 4505 /* advertise wake from D3Cold */ 4506 #define E1000_CTRL_ADVD3WUC 0x00100000 4507 /* phy power management enable */ 4508 #define E1000_CTRL_EN_PHY_PWR_MGMT 0x00200000 4509 ctrl |= E1000_CTRL_ADVD3WUC; 4510 if (!(adapter->flags2 & FLAG2_HAS_PHY_WAKEUP)) 4511 ctrl |= E1000_CTRL_EN_PHY_PWR_MGMT; 4512 ew32(CTRL, ctrl); 4513 4514 if (adapter->hw.phy.media_type == e1000_media_type_fiber || 4515 adapter->hw.phy.media_type == 4516 e1000_media_type_internal_serdes) { 4517 /* keep the laser running in D3 */ 4518 ctrl_ext = er32(CTRL_EXT); 4519 ctrl_ext |= E1000_CTRL_EXT_SDP3_DATA; 4520 ew32(CTRL_EXT, ctrl_ext); 4521 } 4522 4523 if (adapter->flags & FLAG_IS_ICH) 4524 e1000e_disable_gig_wol_ich8lan(&adapter->hw); 4525 4526 /* Allow time for pending master requests to run */ 4527 e1000e_disable_pcie_master(&adapter->hw); 4528 4529 if (adapter->flags2 & FLAG2_HAS_PHY_WAKEUP) { 4530 /* enable wakeup by the PHY */ 4531 retval = e1000_init_phy_wakeup(adapter, wufc); 4532 if (retval) 4533 return retval; 4534 } else { 4535 /* enable wakeup by the MAC */ 4536 ew32(WUFC, wufc); 4537 ew32(WUC, E1000_WUC_PME_EN); 4538 } 4539 } else { 4540 ew32(WUC, 0); 4541 ew32(WUFC, 0); 4542 } 4543 4544 *enable_wake = !!wufc; 4545 4546 /* make sure adapter isn't asleep if manageability is enabled */ 4547 if ((adapter->flags & FLAG_MNG_PT_ENABLED) || 4548 (hw->mac.ops.check_mng_mode(hw))) 4549 *enable_wake = true; 4550 4551 if (adapter->hw.phy.type == e1000_phy_igp_3) 4552 e1000e_igp3_phy_powerdown_workaround_ich8lan(&adapter->hw); 4553 4554 /* 4555 * Release control of h/w to f/w. If f/w is AMT enabled, this 4556 * would have already happened in close and is redundant. 4557 */ 4558 e1000_release_hw_control(adapter); 4559 4560 pci_disable_device(pdev); 4561 4562 return 0; 4563} 4564 4565static void e1000_power_off(struct pci_dev *pdev, bool sleep, bool wake) 4566{ 4567 if (sleep && wake) { 4568 pci_prepare_to_sleep(pdev); 4569 return; 4570 } 4571 4572 pci_wake_from_d3(pdev, wake); 4573 pci_set_power_state(pdev, PCI_D3hot); 4574} 4575 4576static void e1000_complete_shutdown(struct pci_dev *pdev, bool sleep, 4577 bool wake) 4578{ 4579 struct net_device *netdev = pci_get_drvdata(pdev); 4580 struct e1000_adapter *adapter = netdev_priv(netdev); 4581 4582 /* 4583 * The pci-e switch on some quad port adapters will report a 4584 * correctable error when the MAC transitions from D0 to D3. To 4585 * prevent this we need to mask off the correctable errors on the 4586 * downstream port of the pci-e switch. 4587 */ 4588 if (adapter->flags & FLAG_IS_QUAD_PORT) { 4589 struct pci_dev *us_dev = pdev->bus->self; 4590 int pos = pci_find_capability(us_dev, PCI_CAP_ID_EXP); 4591 u16 devctl; 4592 4593 pci_read_config_word(us_dev, pos + PCI_EXP_DEVCTL, &devctl); 4594 pci_write_config_word(us_dev, pos + PCI_EXP_DEVCTL, 4595 (devctl & ~PCI_EXP_DEVCTL_CERE)); 4596 4597 e1000_power_off(pdev, sleep, wake); 4598 4599 pci_write_config_word(us_dev, pos + PCI_EXP_DEVCTL, devctl); 4600 } else { 4601 e1000_power_off(pdev, sleep, wake); 4602 } 4603} 4604 4605static void e1000e_disable_l1aspm(struct pci_dev *pdev) 4606{ 4607 int pos; 4608 u16 val; 4609 4610 /* 4611 * 82573 workaround - disable L1 ASPM on mobile chipsets 4612 * 4613 * L1 ASPM on various mobile (ich7) chipsets do not behave properly 4614 * resulting in lost data or garbage information on the pci-e link 4615 * level. This could result in (false) bad EEPROM checksum errors, 4616 * long ping times (up to 2s) or even a system freeze/hang. 4617 * 4618 * Unfortunately this feature saves about 1W power consumption when 4619 * active. 4620 */ 4621 pos = pci_find_capability(pdev, PCI_CAP_ID_EXP); 4622 pci_read_config_word(pdev, pos + PCI_EXP_LNKCTL, &val); 4623 if (val & 0x2) { 4624 dev_warn(&pdev->dev, "Disabling L1 ASPM\n"); 4625 val &= ~0x2; 4626 pci_write_config_word(pdev, pos + PCI_EXP_LNKCTL, val); 4627 } 4628} 4629 4630#ifdef CONFIG_PM 4631static int e1000_suspend(struct pci_dev *pdev, pm_message_t state) 4632{ 4633 int retval; 4634 bool wake; 4635 4636 retval = __e1000_shutdown(pdev, &wake); 4637 if (!retval) 4638 e1000_complete_shutdown(pdev, true, wake); 4639 4640 return retval; 4641} 4642 4643static int e1000_resume(struct pci_dev *pdev) 4644{ 4645 struct net_device *netdev = pci_get_drvdata(pdev); 4646 struct e1000_adapter *adapter = netdev_priv(netdev); 4647 struct e1000_hw *hw = &adapter->hw; 4648 u32 err; 4649 4650 pci_set_power_state(pdev, PCI_D0); 4651 pci_restore_state(pdev); 4652 pci_save_state(pdev); 4653 e1000e_disable_l1aspm(pdev); 4654 4655 err = pci_enable_device_mem(pdev); 4656 if (err) { 4657 dev_err(&pdev->dev, 4658 "Cannot enable PCI device from suspend\n"); 4659 return err; 4660 } 4661 4662 pci_set_master(pdev); 4663 4664 pci_enable_wake(pdev, PCI_D3hot, 0); 4665 pci_enable_wake(pdev, PCI_D3cold, 0); 4666 4667 e1000e_set_interrupt_capability(adapter); 4668 if (netif_running(netdev)) { 4669 err = e1000_request_irq(adapter); 4670 if (err) 4671 return err; 4672 } 4673 4674 e1000e_power_up_phy(adapter); 4675 4676 /* report the system wakeup cause from S3/S4 */ 4677 if (adapter->flags2 & FLAG2_HAS_PHY_WAKEUP) { 4678 u16 phy_data; 4679 4680 e1e_rphy(&adapter->hw, BM_WUS, &phy_data); 4681 if (phy_data) { 4682 e_info("PHY Wakeup cause - %s\n", 4683 phy_data & E1000_WUS_EX ? "Unicast Packet" : 4684 phy_data & E1000_WUS_MC ? "Multicast Packet" : 4685 phy_data & E1000_WUS_BC ? "Broadcast Packet" : 4686 phy_data & E1000_WUS_MAG ? "Magic Packet" : 4687 phy_data & E1000_WUS_LNKC ? "Link Status " 4688 " Change" : "other"); 4689 } 4690 e1e_wphy(&adapter->hw, BM_WUS, ~0); 4691 } else { 4692 u32 wus = er32(WUS); 4693 if (wus) { 4694 e_info("MAC Wakeup cause - %s\n", 4695 wus & E1000_WUS_EX ? "Unicast Packet" : 4696 wus & E1000_WUS_MC ? "Multicast Packet" : 4697 wus & E1000_WUS_BC ? "Broadcast Packet" : 4698 wus & E1000_WUS_MAG ? "Magic Packet" : 4699 wus & E1000_WUS_LNKC ? "Link Status Change" : 4700 "other"); 4701 } 4702 ew32(WUS, ~0); 4703 } 4704 4705 e1000e_reset(adapter); 4706 4707 e1000_init_manageability(adapter); 4708 4709 if (netif_running(netdev)) 4710 e1000e_up(adapter); 4711 4712 netif_device_attach(netdev); 4713 4714 /* 4715 * If the controller has AMT, do not set DRV_LOAD until the interface 4716 * is up. For all other cases, let the f/w know that the h/w is now 4717 * under the control of the driver. 4718 */ 4719 if (!(adapter->flags & FLAG_HAS_AMT)) 4720 e1000_get_hw_control(adapter); 4721 4722 return 0; 4723} 4724#endif 4725 4726static void e1000_shutdown(struct pci_dev *pdev) 4727{ 4728 bool wake = false; 4729 4730 __e1000_shutdown(pdev, &wake); 4731 4732 if (system_state == SYSTEM_POWER_OFF) 4733 e1000_complete_shutdown(pdev, false, wake); 4734} 4735 4736#ifdef CONFIG_NET_POLL_CONTROLLER 4737/* 4738 * Polling 'interrupt' - used by things like netconsole to send skbs 4739 * without having to re-enable interrupts. It's not called while 4740 * the interrupt routine is executing. 4741 */ 4742static void e1000_netpoll(struct net_device *netdev) 4743{ 4744 struct e1000_adapter *adapter = netdev_priv(netdev); 4745 4746 disable_irq(adapter->pdev->irq); 4747 e1000_intr(adapter->pdev->irq, netdev); 4748 4749 enable_irq(adapter->pdev->irq); 4750} 4751#endif 4752 4753/** 4754 * e1000_io_error_detected - called when PCI error is detected 4755 * @pdev: Pointer to PCI device 4756 * @state: The current pci connection state 4757 * 4758 * This function is called after a PCI bus error affecting 4759 * this device has been detected. 4760 */ 4761static pci_ers_result_t e1000_io_error_detected(struct pci_dev *pdev, 4762 pci_channel_state_t state) 4763{ 4764 struct net_device *netdev = pci_get_drvdata(pdev); 4765 struct e1000_adapter *adapter = netdev_priv(netdev); 4766 4767 netif_device_detach(netdev); 4768 4769 if (state == pci_channel_io_perm_failure) 4770 return PCI_ERS_RESULT_DISCONNECT; 4771 4772 if (netif_running(netdev)) 4773 e1000e_down(adapter); 4774 pci_disable_device(pdev); 4775 4776 /* Request a slot slot reset. */ 4777 return PCI_ERS_RESULT_NEED_RESET; 4778} 4779 4780/** 4781 * e1000_io_slot_reset - called after the pci bus has been reset. 4782 * @pdev: Pointer to PCI device 4783 * 4784 * Restart the card from scratch, as if from a cold-boot. Implementation 4785 * resembles the first-half of the e1000_resume routine. 4786 */ 4787static pci_ers_result_t e1000_io_slot_reset(struct pci_dev *pdev) 4788{ 4789 struct net_device *netdev = pci_get_drvdata(pdev); 4790 struct e1000_adapter *adapter = netdev_priv(netdev); 4791 struct e1000_hw *hw = &adapter->hw; 4792 int err; 4793 pci_ers_result_t result; 4794 4795 e1000e_disable_l1aspm(pdev); 4796 err = pci_enable_device_mem(pdev); 4797 if (err) { 4798 dev_err(&pdev->dev, 4799 "Cannot re-enable PCI device after reset.\n"); 4800 result = PCI_ERS_RESULT_DISCONNECT; 4801 } else { 4802 pci_set_master(pdev); 4803 pci_restore_state(pdev); 4804 pci_save_state(pdev); 4805 4806 pci_enable_wake(pdev, PCI_D3hot, 0); 4807 pci_enable_wake(pdev, PCI_D3cold, 0); 4808 4809 e1000e_reset(adapter); 4810 ew32(WUS, ~0); 4811 result = PCI_ERS_RESULT_RECOVERED; 4812 } 4813 4814 pci_cleanup_aer_uncorrect_error_status(pdev); 4815 4816 return result; 4817} 4818 4819/** 4820 * e1000_io_resume - called when traffic can start flowing again. 4821 * @pdev: Pointer to PCI device 4822 * 4823 * This callback is called when the error recovery driver tells us that 4824 * its OK to resume normal operation. Implementation resembles the 4825 * second-half of the e1000_resume routine. 4826 */ 4827static void e1000_io_resume(struct pci_dev *pdev) 4828{ 4829 struct net_device *netdev = pci_get_drvdata(pdev); 4830 struct e1000_adapter *adapter = netdev_priv(netdev); 4831 4832 e1000_init_manageability(adapter); 4833 4834 if (netif_running(netdev)) { 4835 if (e1000e_up(adapter)) { 4836 dev_err(&pdev->dev, 4837 "can't bring device back up after reset\n"); 4838 return; 4839 } 4840 } 4841 4842 netif_device_attach(netdev); 4843 4844 /* 4845 * If the controller has AMT, do not set DRV_LOAD until the interface 4846 * is up. For all other cases, let the f/w know that the h/w is now 4847 * under the control of the driver. 4848 */ 4849 if (!(adapter->flags & FLAG_HAS_AMT)) 4850 e1000_get_hw_control(adapter); 4851 4852} 4853 4854static void e1000_print_device_info(struct e1000_adapter *adapter) 4855{ 4856 struct e1000_hw *hw = &adapter->hw; 4857 struct net_device *netdev = adapter->netdev; 4858 u32 pba_num; 4859 4860 /* print bus type/speed/width info */ 4861 e_info("(PCI Express:2.5GB/s:%s) %pM\n", 4862 /* bus width */ 4863 ((hw->bus.width == e1000_bus_width_pcie_x4) ? "Width x4" : 4864 "Width x1"), 4865 /* MAC address */ 4866 netdev->dev_addr); 4867 e_info("Intel(R) PRO/%s Network Connection\n", 4868 (hw->phy.type == e1000_phy_ife) ? "10/100" : "1000"); 4869 e1000e_read_pba_num(hw, &pba_num); 4870 e_info("MAC: %d, PHY: %d, PBA No: %06x-%03x\n", 4871 hw->mac.type, hw->phy.type, (pba_num >> 8), (pba_num & 0xff)); 4872} 4873 4874static void e1000_eeprom_checks(struct e1000_adapter *adapter) 4875{ 4876 struct e1000_hw *hw = &adapter->hw; 4877 int ret_val; 4878 u16 buf = 0; 4879 4880 if (hw->mac.type != e1000_82573) 4881 return; 4882 4883 ret_val = e1000_read_nvm(hw, NVM_INIT_CONTROL2_REG, 1, &buf); 4884 if (!ret_val && (!(le16_to_cpu(buf) & (1 << 0)))) { 4885 /* Deep Smart Power Down (DSPD) */ 4886 dev_warn(&adapter->pdev->dev, 4887 "Warning: detected DSPD enabled in EEPROM\n"); 4888 } 4889 4890 ret_val = e1000_read_nvm(hw, NVM_INIT_3GIO_3, 1, &buf); 4891 if (!ret_val && (le16_to_cpu(buf) & (3 << 2))) { 4892 /* ASPM enable */ 4893 dev_warn(&adapter->pdev->dev, 4894 "Warning: detected ASPM enabled in EEPROM\n"); 4895 } 4896} 4897 4898static const struct net_device_ops e1000e_netdev_ops = { 4899 .ndo_open = e1000_open, 4900 .ndo_stop = e1000_close, 4901 .ndo_start_xmit = e1000_xmit_frame, 4902 .ndo_get_stats = e1000_get_stats, 4903 .ndo_set_multicast_list = e1000_set_multi, 4904 .ndo_set_mac_address = e1000_set_mac, 4905 .ndo_change_mtu = e1000_change_mtu, 4906 .ndo_do_ioctl = e1000_ioctl, 4907 .ndo_tx_timeout = e1000_tx_timeout, 4908 .ndo_validate_addr = eth_validate_addr, 4909 4910 .ndo_vlan_rx_register = e1000_vlan_rx_register, 4911 .ndo_vlan_rx_add_vid = e1000_vlan_rx_add_vid, 4912 .ndo_vlan_rx_kill_vid = e1000_vlan_rx_kill_vid, 4913#ifdef CONFIG_NET_POLL_CONTROLLER 4914 .ndo_poll_controller = e1000_netpoll, 4915#endif 4916}; 4917 4918/** 4919 * e1000_probe - Device Initialization Routine 4920 * @pdev: PCI device information struct 4921 * @ent: entry in e1000_pci_tbl 4922 * 4923 * Returns 0 on success, negative on failure 4924 * 4925 * e1000_probe initializes an adapter identified by a pci_dev structure. 4926 * The OS initialization, configuring of the adapter private structure, 4927 * and a hardware reset occur. 4928 **/ 4929static int __devinit e1000_probe(struct pci_dev *pdev, 4930 const struct pci_device_id *ent) 4931{ 4932 struct net_device *netdev; 4933 struct e1000_adapter *adapter; 4934 struct e1000_hw *hw; 4935 const struct e1000_info *ei = e1000_info_tbl[ent->driver_data]; 4936 resource_size_t mmio_start, mmio_len; 4937 resource_size_t flash_start, flash_len; 4938 4939 static int cards_found; 4940 int i, err, pci_using_dac; 4941 u16 eeprom_data = 0; 4942 u16 eeprom_apme_mask = E1000_EEPROM_APME; 4943 4944 e1000e_disable_l1aspm(pdev); 4945 4946 err = pci_enable_device_mem(pdev); 4947 if (err) 4948 return err; 4949 4950 pci_using_dac = 0; 4951 err = pci_set_dma_mask(pdev, DMA_BIT_MASK(64)); 4952 if (!err) { 4953 err = pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(64)); 4954 if (!err) 4955 pci_using_dac = 1; 4956 } else { 4957 err = pci_set_dma_mask(pdev, DMA_BIT_MASK(32)); 4958 if (err) { 4959 err = pci_set_consistent_dma_mask(pdev, 4960 DMA_BIT_MASK(32)); 4961 if (err) { 4962 dev_err(&pdev->dev, "No usable DMA " 4963 "configuration, aborting\n"); 4964 goto err_dma; 4965 } 4966 } 4967 } 4968 4969 err = pci_request_selected_regions_exclusive(pdev, 4970 pci_select_bars(pdev, IORESOURCE_MEM), 4971 e1000e_driver_name); 4972 if (err) 4973 goto err_pci_reg; 4974 4975 /* AER (Advanced Error Reporting) hooks */ 4976 pci_enable_pcie_error_reporting(pdev); 4977 4978 pci_set_master(pdev); 4979 /* PCI config space info */ 4980 err = pci_save_state(pdev); 4981 if (err) 4982 goto err_alloc_etherdev; 4983 4984 err = -ENOMEM; 4985 netdev = alloc_etherdev(sizeof(struct e1000_adapter)); 4986 if (!netdev) 4987 goto err_alloc_etherdev; 4988 4989 SET_NETDEV_DEV(netdev, &pdev->dev); 4990 4991 pci_set_drvdata(pdev, netdev); 4992 adapter = netdev_priv(netdev); 4993 hw = &adapter->hw; 4994 adapter->netdev = netdev; 4995 adapter->pdev = pdev; 4996 adapter->ei = ei; 4997 adapter->pba = ei->pba; 4998 adapter->flags = ei->flags; 4999 adapter->flags2 = ei->flags2; 5000 adapter->hw.adapter = adapter; 5001 adapter->hw.mac.type = ei->mac; 5002 adapter->max_hw_frame_size = ei->max_hw_frame_size; 5003 adapter->msg_enable = (1 << NETIF_MSG_DRV | NETIF_MSG_PROBE) - 1; 5004 5005 mmio_start = pci_resource_start(pdev, 0); 5006 mmio_len = pci_resource_len(pdev, 0); 5007 5008 err = -EIO; 5009 adapter->hw.hw_addr = ioremap(mmio_start, mmio_len); 5010 if (!adapter->hw.hw_addr) 5011 goto err_ioremap; 5012 5013 if ((adapter->flags & FLAG_HAS_FLASH) && 5014 (pci_resource_flags(pdev, 1) & IORESOURCE_MEM)) { 5015 flash_start = pci_resource_start(pdev, 1); 5016 flash_len = pci_resource_len(pdev, 1); 5017 adapter->hw.flash_address = ioremap(flash_start, flash_len); 5018 if (!adapter->hw.flash_address) 5019 goto err_flashmap; 5020 } 5021 5022 /* construct the net_device struct */ 5023 netdev->netdev_ops = &e1000e_netdev_ops; 5024 e1000e_set_ethtool_ops(netdev); 5025 netdev->watchdog_timeo = 5 * HZ; 5026 netif_napi_add(netdev, &adapter->napi, e1000_clean, 64); 5027 strncpy(netdev->name, pci_name(pdev), sizeof(netdev->name) - 1); 5028 5029 netdev->mem_start = mmio_start; 5030 netdev->mem_end = mmio_start + mmio_len; 5031 5032 adapter->bd_number = cards_found++; 5033 5034 e1000e_check_options(adapter); 5035 5036 /* setup adapter struct */ 5037 err = e1000_sw_init(adapter); 5038 if (err) 5039 goto err_sw_init; 5040 5041 err = -EIO; 5042 5043 memcpy(&hw->mac.ops, ei->mac_ops, sizeof(hw->mac.ops)); 5044 memcpy(&hw->nvm.ops, ei->nvm_ops, sizeof(hw->nvm.ops)); 5045 memcpy(&hw->phy.ops, ei->phy_ops, sizeof(hw->phy.ops)); 5046 5047 err = ei->get_variants(adapter); 5048 if (err) 5049 goto err_hw_init; 5050 5051 if ((adapter->flags & FLAG_IS_ICH) && 5052 (adapter->flags & FLAG_READ_ONLY_NVM)) 5053 e1000e_write_protect_nvm_ich8lan(&adapter->hw); 5054 5055 hw->mac.ops.get_bus_info(&adapter->hw); 5056 5057 adapter->hw.phy.autoneg_wait_to_complete = 0; 5058 5059 /* Copper options */ 5060 if (adapter->hw.phy.media_type == e1000_media_type_copper) { 5061 adapter->hw.phy.mdix = AUTO_ALL_MODES; 5062 adapter->hw.phy.disable_polarity_correction = 0; 5063 adapter->hw.phy.ms_type = e1000_ms_hw_default; 5064 } 5065 5066 if (e1000_check_reset_block(&adapter->hw)) 5067 e_info("PHY reset is blocked due to SOL/IDER session.\n"); 5068 5069 netdev->features = NETIF_F_SG | 5070 NETIF_F_HW_CSUM | 5071 NETIF_F_HW_VLAN_TX | 5072 NETIF_F_HW_VLAN_RX; 5073 5074 if (adapter->flags & FLAG_HAS_HW_VLAN_FILTER) 5075 netdev->features |= NETIF_F_HW_VLAN_FILTER; 5076 5077 netdev->features |= NETIF_F_TSO; 5078 netdev->features |= NETIF_F_TSO6; 5079 5080 netdev->vlan_features |= NETIF_F_TSO; 5081 netdev->vlan_features |= NETIF_F_TSO6; 5082 netdev->vlan_features |= NETIF_F_HW_CSUM; 5083 netdev->vlan_features |= NETIF_F_SG; 5084 5085 if (pci_using_dac) 5086 netdev->features |= NETIF_F_HIGHDMA; 5087 5088 if (e1000e_enable_mng_pass_thru(&adapter->hw)) 5089 adapter->flags |= FLAG_MNG_PT_ENABLED; 5090 5091 /* 5092 * before reading the NVM, reset the controller to 5093 * put the device in a known good starting state 5094 */ 5095 adapter->hw.mac.ops.reset_hw(&adapter->hw); 5096 5097 /* 5098 * systems with ASPM and others may see the checksum fail on the first 5099 * attempt. Let's give it a few tries 5100 */ 5101 for (i = 0;; i++) { 5102 if (e1000_validate_nvm_checksum(&adapter->hw) >= 0) 5103 break; 5104 if (i == 2) { 5105 e_err("The NVM Checksum Is Not Valid\n"); 5106 err = -EIO; 5107 goto err_eeprom; 5108 } 5109 } 5110 5111 e1000_eeprom_checks(adapter); 5112 5113 /* copy the MAC address */ 5114 if (e1000e_read_mac_addr(&adapter->hw)) 5115 e_err("NVM Read Error while reading MAC address\n"); 5116 5117 memcpy(netdev->dev_addr, adapter->hw.mac.addr, netdev->addr_len); 5118 memcpy(netdev->perm_addr, adapter->hw.mac.addr, netdev->addr_len); 5119 5120 if (!is_valid_ether_addr(netdev->perm_addr)) { 5121 e_err("Invalid MAC Address: %pM\n", netdev->perm_addr); 5122 err = -EIO; 5123 goto err_eeprom; 5124 } 5125 5126 init_timer(&adapter->watchdog_timer); 5127 adapter->watchdog_timer.function = &e1000_watchdog; 5128 adapter->watchdog_timer.data = (unsigned long) adapter; 5129 5130 init_timer(&adapter->phy_info_timer); 5131 adapter->phy_info_timer.function = &e1000_update_phy_info; 5132 adapter->phy_info_timer.data = (unsigned long) adapter; 5133 5134 INIT_WORK(&adapter->reset_task, e1000_reset_task); 5135 INIT_WORK(&adapter->watchdog_task, e1000_watchdog_task); 5136 INIT_WORK(&adapter->downshift_task, e1000e_downshift_workaround); 5137 INIT_WORK(&adapter->update_phy_task, e1000e_update_phy_task); 5138 INIT_WORK(&adapter->print_hang_task, e1000_print_hw_hang); 5139 5140 /* Initialize link parameters. User can change them with ethtool */ 5141 adapter->hw.mac.autoneg = 1; 5142 adapter->fc_autoneg = 1; 5143 adapter->hw.fc.requested_mode = e1000_fc_default; 5144 adapter->hw.fc.current_mode = e1000_fc_default; 5145 adapter->hw.phy.autoneg_advertised = 0x2f; 5146 5147 /* ring size defaults */ 5148 adapter->rx_ring->count = 256; 5149 adapter->tx_ring->count = 256; 5150 5151 /* 5152 * Initial Wake on LAN setting - If APM wake is enabled in 5153 * the EEPROM, enable the ACPI Magic Packet filter 5154 */ 5155 if (adapter->flags & FLAG_APME_IN_WUC) { 5156 /* APME bit in EEPROM is mapped to WUC.APME */ 5157 eeprom_data = er32(WUC); 5158 eeprom_apme_mask = E1000_WUC_APME; 5159 if (eeprom_data & E1000_WUC_PHY_WAKE) 5160 adapter->flags2 |= FLAG2_HAS_PHY_WAKEUP; 5161 } else if (adapter->flags & FLAG_APME_IN_CTRL3) { 5162 if (adapter->flags & FLAG_APME_CHECK_PORT_B && 5163 (adapter->hw.bus.func == 1)) 5164 e1000_read_nvm(&adapter->hw, 5165 NVM_INIT_CONTROL3_PORT_B, 1, &eeprom_data); 5166 else 5167 e1000_read_nvm(&adapter->hw, 5168 NVM_INIT_CONTROL3_PORT_A, 1, &eeprom_data); 5169 } 5170 5171 /* fetch WoL from EEPROM */ 5172 if (eeprom_data & eeprom_apme_mask) 5173 adapter->eeprom_wol |= E1000_WUFC_MAG; 5174 5175 /* 5176 * now that we have the eeprom settings, apply the special cases 5177 * where the eeprom may be wrong or the board simply won't support 5178 * wake on lan on a particular port 5179 */ 5180 if (!(adapter->flags & FLAG_HAS_WOL)) 5181 adapter->eeprom_wol = 0; 5182 5183 /* initialize the wol settings based on the eeprom settings */ 5184 adapter->wol = adapter->eeprom_wol; 5185 device_set_wakeup_enable(&adapter->pdev->dev, adapter->wol); 5186 5187 /* save off EEPROM version number */ 5188 e1000_read_nvm(&adapter->hw, 5, 1, &adapter->eeprom_vers); 5189 5190 /* reset the hardware with the new settings */ 5191 e1000e_reset(adapter); 5192 5193 /* 5194 * If the controller has AMT, do not set DRV_LOAD until the interface 5195 * is up. For all other cases, let the f/w know that the h/w is now 5196 * under the control of the driver. 5197 */ 5198 if (!(adapter->flags & FLAG_HAS_AMT)) 5199 e1000_get_hw_control(adapter); 5200 5201 strcpy(netdev->name, "eth%d"); 5202 err = register_netdev(netdev); 5203 if (err) 5204 goto err_register; 5205 5206 /* carrier off reporting is important to ethtool even BEFORE open */ 5207 netif_carrier_off(netdev); 5208 5209 e1000_print_device_info(adapter); 5210 5211 return 0; 5212 5213err_register: 5214 if (!(adapter->flags & FLAG_HAS_AMT)) 5215 e1000_release_hw_control(adapter); 5216err_eeprom: 5217 if (!e1000_check_reset_block(&adapter->hw)) 5218 e1000_phy_hw_reset(&adapter->hw); 5219err_hw_init: 5220 5221 kfree(adapter->tx_ring); 5222 kfree(adapter->rx_ring); 5223err_sw_init: 5224 if (adapter->hw.flash_address) 5225 iounmap(adapter->hw.flash_address); 5226 e1000e_reset_interrupt_capability(adapter); 5227err_flashmap: 5228 iounmap(adapter->hw.hw_addr); 5229err_ioremap: 5230 free_netdev(netdev); 5231err_alloc_etherdev: 5232 pci_release_selected_regions(pdev, 5233 pci_select_bars(pdev, IORESOURCE_MEM)); 5234err_pci_reg: 5235err_dma: 5236 pci_disable_device(pdev); 5237 return err; 5238} 5239 5240/** 5241 * e1000_remove - Device Removal Routine 5242 * @pdev: PCI device information struct 5243 * 5244 * e1000_remove is called by the PCI subsystem to alert the driver 5245 * that it should release a PCI device. The could be caused by a 5246 * Hot-Plug event, or because the driver is going to be removed from 5247 * memory. 5248 **/ 5249static void __devexit e1000_remove(struct pci_dev *pdev) 5250{ 5251 struct net_device *netdev = pci_get_drvdata(pdev); 5252 struct e1000_adapter *adapter = netdev_priv(netdev); 5253 5254 /* 5255 * flush_scheduled work may reschedule our watchdog task, so 5256 * explicitly disable watchdog tasks from being rescheduled 5257 */ 5258 set_bit(__E1000_DOWN, &adapter->state); 5259 del_timer_sync(&adapter->watchdog_timer); 5260 del_timer_sync(&adapter->phy_info_timer); 5261 5262 cancel_work_sync(&adapter->reset_task); 5263 cancel_work_sync(&adapter->watchdog_task); 5264 cancel_work_sync(&adapter->downshift_task); 5265 cancel_work_sync(&adapter->update_phy_task); 5266 cancel_work_sync(&adapter->print_hang_task); 5267 flush_scheduled_work(); 5268 5269 if (!(netdev->flags & IFF_UP)) 5270 e1000_power_down_phy(adapter); 5271 5272 unregister_netdev(netdev); 5273 5274 /* 5275 * Release control of h/w to f/w. If f/w is AMT enabled, this 5276 * would have already happened in close and is redundant. 5277 */ 5278 e1000_release_hw_control(adapter); 5279 5280 e1000e_reset_interrupt_capability(adapter); 5281 kfree(adapter->tx_ring); 5282 kfree(adapter->rx_ring); 5283 5284 iounmap(adapter->hw.hw_addr); 5285 if (adapter->hw.flash_address) 5286 iounmap(adapter->hw.flash_address); 5287 pci_release_selected_regions(pdev, 5288 pci_select_bars(pdev, IORESOURCE_MEM)); 5289 5290 free_netdev(netdev); 5291 5292 /* AER disable */ 5293 pci_disable_pcie_error_reporting(pdev); 5294 5295 pci_disable_device(pdev); 5296} 5297 5298/* PCI Error Recovery (ERS) */ 5299static struct pci_error_handlers e1000_err_handler = { 5300 .error_detected = e1000_io_error_detected, 5301 .slot_reset = e1000_io_slot_reset, 5302 .resume = e1000_io_resume, 5303}; 5304 5305static DEFINE_PCI_DEVICE_TABLE(e1000_pci_tbl) = { 5306 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82571EB_COPPER), board_82571 }, 5307 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82571EB_FIBER), board_82571 }, 5308 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82571EB_QUAD_COPPER), board_82571 }, 5309 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82571EB_QUAD_COPPER_LP), board_82571 }, 5310 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82571EB_QUAD_FIBER), board_82571 }, 5311 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82571EB_SERDES), board_82571 }, 5312 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82571EB_SERDES_DUAL), board_82571 }, 5313 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82571EB_SERDES_QUAD), board_82571 }, 5314 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82571PT_QUAD_COPPER), board_82571 }, 5315 5316 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82572EI), board_82572 }, 5317 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82572EI_COPPER), board_82572 }, 5318 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82572EI_FIBER), board_82572 }, 5319 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82572EI_SERDES), board_82572 }, 5320 5321 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82573E), board_82573 }, 5322 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82573E_IAMT), board_82573 }, 5323 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82573L), board_82573 }, 5324 5325 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82574L), board_82574 }, 5326 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82574LA), board_82574 }, 5327 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82583V), board_82583 }, 5328 5329 { PCI_VDEVICE(INTEL, E1000_DEV_ID_80003ES2LAN_COPPER_DPT), 5330 board_80003es2lan }, 5331 { PCI_VDEVICE(INTEL, E1000_DEV_ID_80003ES2LAN_COPPER_SPT), 5332 board_80003es2lan }, 5333 { PCI_VDEVICE(INTEL, E1000_DEV_ID_80003ES2LAN_SERDES_DPT), 5334 board_80003es2lan }, 5335 { PCI_VDEVICE(INTEL, E1000_DEV_ID_80003ES2LAN_SERDES_SPT), 5336 board_80003es2lan }, 5337 5338 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH8_IFE), board_ich8lan }, 5339 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH8_IFE_G), board_ich8lan }, 5340 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH8_IFE_GT), board_ich8lan }, 5341 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH8_IGP_AMT), board_ich8lan }, 5342 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH8_IGP_C), board_ich8lan }, 5343 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH8_IGP_M), board_ich8lan }, 5344 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH8_IGP_M_AMT), board_ich8lan }, 5345 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH8_82567V_3), board_ich8lan }, 5346 5347 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH9_IFE), board_ich9lan }, 5348 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH9_IFE_G), board_ich9lan }, 5349 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH9_IFE_GT), board_ich9lan }, 5350 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH9_IGP_AMT), board_ich9lan }, 5351 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH9_IGP_C), board_ich9lan }, 5352 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH9_BM), board_ich9lan }, 5353 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH9_IGP_M), board_ich9lan }, 5354 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH9_IGP_M_AMT), board_ich9lan }, 5355 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH9_IGP_M_V), board_ich9lan }, 5356 5357 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH10_R_BM_LM), board_ich9lan }, 5358 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH10_R_BM_LF), board_ich9lan }, 5359 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH10_R_BM_V), board_ich9lan }, 5360 5361 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH10_D_BM_LM), board_ich10lan }, 5362 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH10_D_BM_LF), board_ich10lan }, 5363 5364 { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_M_HV_LM), board_pchlan }, 5365 { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_M_HV_LC), board_pchlan }, 5366 { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_D_HV_DM), board_pchlan }, 5367 { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_D_HV_DC), board_pchlan }, 5368 5369 { } /* terminate list */ 5370}; 5371MODULE_DEVICE_TABLE(pci, e1000_pci_tbl); 5372 5373/* PCI Device API Driver */ 5374static struct pci_driver e1000_driver = { 5375 .name = e1000e_driver_name, 5376 .id_table = e1000_pci_tbl, 5377 .probe = e1000_probe, 5378 .remove = __devexit_p(e1000_remove), 5379#ifdef CONFIG_PM 5380 /* Power Management Hooks */ 5381 .suspend = e1000_suspend, 5382 .resume = e1000_resume, 5383#endif 5384 .shutdown = e1000_shutdown, 5385 .err_handler = &e1000_err_handler 5386}; 5387 5388/** 5389 * e1000_init_module - Driver Registration Routine 5390 * 5391 * e1000_init_module is the first routine called when the driver is 5392 * loaded. All it does is register with the PCI subsystem. 5393 **/ 5394static int __init e1000_init_module(void) 5395{ 5396 int ret; 5397 printk(KERN_INFO "%s: Intel(R) PRO/1000 Network Driver - %s\n", 5398 e1000e_driver_name, e1000e_driver_version); 5399 printk(KERN_INFO "%s: Copyright (c) 1999 - 2009 Intel Corporation.\n", 5400 e1000e_driver_name); 5401 ret = pci_register_driver(&e1000_driver); 5402 5403 return ret; 5404} 5405module_init(e1000_init_module); 5406 5407/** 5408 * e1000_exit_module - Driver Exit Cleanup Routine 5409 * 5410 * e1000_exit_module is called just before the driver is removed 5411 * from memory. 5412 **/ 5413static void __exit e1000_exit_module(void) 5414{ 5415 pci_unregister_driver(&e1000_driver); 5416} 5417module_exit(e1000_exit_module); 5418 5419 5420MODULE_AUTHOR("Intel Corporation, <linux.nics@intel.com>"); 5421MODULE_DESCRIPTION("Intel(R) PRO/1000 Network Driver"); 5422MODULE_LICENSE("GPL"); 5423MODULE_VERSION(DRV_VERSION); 5424 5425/* e1000_main.c */