tjh.dev
Linux kernel mirror (for testing)
git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel
os
linux
1/*
2 * PATA driver for AT91SAM9260 Static Memory Controller
3 * with CompactFlash interface in True IDE mode
4 *
5 * Copyright (C) 2009 Matyukevich Sergey
6 *
7 * Based on:
8 * * generic platform driver by Paul Mundt: drivers/ata/pata_platform.c
9 * * pata_at32 driver by Kristoffer Nyborg Gregertsen
10 * * at91_ide driver by Stanislaw Gruszka
11 *
12 * This program is free software; you can redistribute it and/or modify it
13 * under the terms of the GNU General Public License version 2
14 * as published by the Free Software Foundation.
15 *
16 */
17
18#include <linux/kernel.h>
19#include <linux/module.h>
20#include <linux/init.h>
21#include <linux/blkdev.h>
22#include <scsi/scsi_host.h>
23#include <linux/ata.h>
24#include <linux/clk.h>
25#include <linux/libata.h>
26#include <linux/platform_device.h>
27#include <linux/ata_platform.h>
28
29#include <mach/at91sam9_smc.h>
30#include <mach/board.h>
31#include <mach/gpio.h>
32
33
34#define DRV_NAME "pata_at91"
35#define DRV_VERSION "0.1"
36
37#define CF_IDE_OFFSET 0x00c00000
38#define CF_ALT_IDE_OFFSET 0x00e00000
39#define CF_IDE_RES_SIZE 0x08
40
41struct at91_ide_info {
42 unsigned long mode;
43 unsigned int cs;
44
45 struct clk *mck;
46
47 void __iomem *ide_addr;
48 void __iomem *alt_addr;
49};
50
51static const struct ata_timing initial_timing =
52 {XFER_PIO_0, 70, 290, 240, 600, 165, 150, 600, 0};
53
54static unsigned long calc_mck_cycles(unsigned long ns, unsigned long mck_hz)
55{
56 unsigned long mul;
57
58 /*
59 * cycles = x [nsec] * f [Hz] / 10^9 [ns in sec] =
60 * x * (f / 1_000_000_000) =
61 * x * ((f * 65536) / 1_000_000_000) / 65536 =
62 * x * (((f / 10_000) * 65536) / 100_000) / 65536 =
63 */
64
65 mul = (mck_hz / 10000) << 16;
66 mul /= 100000;
67
68 return (ns * mul + 65536) >> 16; /* rounding */
69}
70
71static void set_smc_mode(struct at91_ide_info *info)
72{
73 at91_sys_write(AT91_SMC_MODE(info->cs), info->mode);
74 return;
75}
76
77static void set_smc_timing(struct device *dev,
78 struct at91_ide_info *info, const struct ata_timing *ata)
79{
80 unsigned long read_cycle, write_cycle, active, recover;
81 unsigned long nrd_setup, nrd_pulse, nrd_recover;
82 unsigned long nwe_setup, nwe_pulse;
83
84 unsigned long ncs_write_setup, ncs_write_pulse;
85 unsigned long ncs_read_setup, ncs_read_pulse;
86
87 unsigned long mck_hz;
88
89 read_cycle = ata->cyc8b;
90 nrd_setup = ata->setup;
91 nrd_pulse = ata->act8b;
92 nrd_recover = ata->rec8b;
93
94 mck_hz = clk_get_rate(info->mck);
95
96 read_cycle = calc_mck_cycles(read_cycle, mck_hz);
97 nrd_setup = calc_mck_cycles(nrd_setup, mck_hz);
98 nrd_pulse = calc_mck_cycles(nrd_pulse, mck_hz);
99 nrd_recover = calc_mck_cycles(nrd_recover, mck_hz);
100
101 active = nrd_setup + nrd_pulse;
102 recover = read_cycle - active;
103
104 /* Need at least two cycles recovery */
105 if (recover < 2)
106 read_cycle = active + 2;
107
108 /* (CS0, CS1, DIR, OE) <= (CFCE1, CFCE2, CFRNW, NCSX) timings */
109 ncs_read_setup = 1;
110 ncs_read_pulse = read_cycle - 2;
111
112 /* Write timings same as read timings */
113 write_cycle = read_cycle;
114 nwe_setup = nrd_setup;
115 nwe_pulse = nrd_pulse;
116 ncs_write_setup = ncs_read_setup;
117 ncs_write_pulse = ncs_read_pulse;
118
119 dev_dbg(dev, "ATA timings: nrd_setup = %lu nrd_pulse = %lu nrd_cycle = %lu\n",
120 nrd_setup, nrd_pulse, read_cycle);
121 dev_dbg(dev, "ATA timings: nwe_setup = %lu nwe_pulse = %lu nwe_cycle = %lu\n",
122 nwe_setup, nwe_pulse, write_cycle);
123 dev_dbg(dev, "ATA timings: ncs_read_setup = %lu ncs_read_pulse = %lu\n",
124 ncs_read_setup, ncs_read_pulse);
125 dev_dbg(dev, "ATA timings: ncs_write_setup = %lu ncs_write_pulse = %lu\n",
126 ncs_write_setup, ncs_write_pulse);
127
128 at91_sys_write(AT91_SMC_SETUP(info->cs),
129 AT91_SMC_NWESETUP_(nwe_setup) |
130 AT91_SMC_NRDSETUP_(nrd_setup) |
131 AT91_SMC_NCS_WRSETUP_(ncs_write_setup) |
132 AT91_SMC_NCS_RDSETUP_(ncs_read_setup));
133
134 at91_sys_write(AT91_SMC_PULSE(info->cs),
135 AT91_SMC_NWEPULSE_(nwe_pulse) |
136 AT91_SMC_NRDPULSE_(nrd_pulse) |
137 AT91_SMC_NCS_WRPULSE_(ncs_write_pulse) |
138 AT91_SMC_NCS_RDPULSE_(ncs_read_pulse));
139
140 at91_sys_write(AT91_SMC_CYCLE(info->cs),
141 AT91_SMC_NWECYCLE_(write_cycle) |
142 AT91_SMC_NRDCYCLE_(read_cycle));
143
144 return;
145}
146
147static void pata_at91_set_piomode(struct ata_port *ap, struct ata_device *adev)
148{
149 struct at91_ide_info *info = ap->host->private_data;
150 struct ata_timing timing;
151 int ret;
152
153 /* Compute ATA timing and set it to SMC */
154 ret = ata_timing_compute(adev, adev->pio_mode, &timing, 1000, 0);
155 if (ret) {
156 dev_warn(ap->dev, "Failed to compute ATA timing %d, "
157 "set PIO_0 timing\n", ret);
158 set_smc_timing(ap->dev, info, &initial_timing);
159 } else {
160 set_smc_timing(ap->dev, info, &timing);
161 }
162
163 /* Setup SMC mode */
164 set_smc_mode(info);
165
166 return;
167}
168
169static unsigned int pata_at91_data_xfer_noirq(struct ata_device *dev,
170 unsigned char *buf, unsigned int buflen, int rw)
171{
172 struct at91_ide_info *info = dev->link->ap->host->private_data;
173 unsigned int consumed;
174 unsigned long flags;
175 unsigned int mode;
176
177 local_irq_save(flags);
178 mode = at91_sys_read(AT91_SMC_MODE(info->cs));
179
180 /* set 16bit mode before writing data */
181 at91_sys_write(AT91_SMC_MODE(info->cs),
182 (mode & ~AT91_SMC_DBW) | AT91_SMC_DBW_16);
183
184 consumed = ata_sff_data_xfer(dev, buf, buflen, rw);
185
186 /* restore 8bit mode after data is written */
187 at91_sys_write(AT91_SMC_MODE(info->cs),
188 (mode & ~AT91_SMC_DBW) | AT91_SMC_DBW_8);
189
190 local_irq_restore(flags);
191 return consumed;
192}
193
194static struct scsi_host_template pata_at91_sht = {
195 ATA_PIO_SHT(DRV_NAME),
196};
197
198static struct ata_port_operations pata_at91_port_ops = {
199 .inherits = &ata_sff_port_ops,
200
201 .sff_data_xfer = pata_at91_data_xfer_noirq,
202 .set_piomode = pata_at91_set_piomode,
203 .cable_detect = ata_cable_40wire,
204 .port_start = ATA_OP_NULL,
205};
206
207static int __devinit pata_at91_probe(struct platform_device *pdev)
208{
209 struct at91_cf_data *board = pdev->dev.platform_data;
210 struct device *dev = &pdev->dev;
211 struct at91_ide_info *info;
212 struct resource *mem_res;
213 struct ata_host *host;
214 struct ata_port *ap;
215
216 int irq_flags = 0;
217 int irq = 0;
218 int ret;
219
220 /* get platform resources: IO/CTL memories and irq/rst pins */
221
222 if (pdev->num_resources != 1) {
223 dev_err(&pdev->dev, "invalid number of resources\n");
224 return -EINVAL;
225 }
226
227 mem_res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
228
229 if (!mem_res) {
230 dev_err(dev, "failed to get mem resource\n");
231 return -EINVAL;
232 }
233
234 irq = board->irq_pin;
235
236 /* init ata host */
237
238 host = ata_host_alloc(dev, 1);
239
240 if (!host)
241 return -ENOMEM;
242
243 ap = host->ports[0];
244 ap->ops = &pata_at91_port_ops;
245 ap->flags |= ATA_FLAG_SLAVE_POSS;
246 ap->pio_mask = ATA_PIO4;
247
248 if (!irq) {
249 ap->flags |= ATA_FLAG_PIO_POLLING;
250 ata_port_desc(ap, "no IRQ, using PIO polling");
251 }
252
253 info = devm_kzalloc(dev, sizeof(*info), GFP_KERNEL);
254
255 if (!info) {
256 dev_err(dev, "failed to allocate memory for private data\n");
257 return -ENOMEM;
258 }
259
260 info->mck = clk_get(NULL, "mck");
261
262 if (IS_ERR(info->mck)) {
263 dev_err(dev, "failed to get access to mck clock\n");
264 return -ENODEV;
265 }
266
267 info->cs = board->chipselect;
268 info->mode = AT91_SMC_READMODE | AT91_SMC_WRITEMODE |
269 AT91_SMC_EXNWMODE_READY | AT91_SMC_BAT_SELECT |
270 AT91_SMC_DBW_8 | AT91_SMC_TDF_(0);
271
272 info->ide_addr = devm_ioremap(dev,
273 mem_res->start + CF_IDE_OFFSET, CF_IDE_RES_SIZE);
274
275 if (!info->ide_addr) {
276 dev_err(dev, "failed to map IO base\n");
277 ret = -ENOMEM;
278 goto err_put;
279 }
280
281 info->alt_addr = devm_ioremap(dev,
282 mem_res->start + CF_ALT_IDE_OFFSET, CF_IDE_RES_SIZE);
283
284 if (!info->alt_addr) {
285 dev_err(dev, "failed to map CTL base\n");
286 ret = -ENOMEM;
287 goto err_put;
288 }
289
290 ap->ioaddr.cmd_addr = info->ide_addr;
291 ap->ioaddr.ctl_addr = info->alt_addr + 0x06;
292 ap->ioaddr.altstatus_addr = ap->ioaddr.ctl_addr;
293
294 ata_sff_std_ports(&ap->ioaddr);
295
296 ata_port_desc(ap, "mmio cmd 0x%llx ctl 0x%llx",
297 (unsigned long long)mem_res->start + CF_IDE_OFFSET,
298 (unsigned long long)mem_res->start + CF_ALT_IDE_OFFSET);
299
300 host->private_data = info;
301
302 return ata_host_activate(host, irq ? gpio_to_irq(irq) : 0,
303 irq ? ata_sff_interrupt : NULL,
304 irq_flags, &pata_at91_sht);
305
306err_put:
307 clk_put(info->mck);
308 return ret;
309}
310
311static int __devexit pata_at91_remove(struct platform_device *pdev)
312{
313 struct ata_host *host = dev_get_drvdata(&pdev->dev);
314 struct at91_ide_info *info;
315
316 if (!host)
317 return 0;
318 info = host->private_data;
319
320 ata_host_detach(host);
321
322 if (!info)
323 return 0;
324
325 clk_put(info->mck);
326
327 return 0;
328}
329
330static struct platform_driver pata_at91_driver = {
331 .probe = pata_at91_probe,
332 .remove = __devexit_p(pata_at91_remove),
333 .driver = {
334 .name = DRV_NAME,
335 .owner = THIS_MODULE,
336 },
337};
338
339static int __init pata_at91_init(void)
340{
341 return platform_driver_register(&pata_at91_driver);
342}
343
344static void __exit pata_at91_exit(void)
345{
346 platform_driver_unregister(&pata_at91_driver);
347}
348
349
350module_init(pata_at91_init);
351module_exit(pata_at91_exit);
352
353
354MODULE_LICENSE("GPL");
355MODULE_DESCRIPTION("Driver for CF in True IDE mode on AT91SAM9260 SoC");
356MODULE_AUTHOR("Matyukevich Sergey");
357MODULE_VERSION(DRV_VERSION);
358