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1/* 2 * Sealevel Systems 4021 driver. 3 * 4 * This program is free software; you can redistribute it and/or 5 * modify it under the terms of the GNU General Public License 6 * as published by the Free Software Foundation; either version 7 * 2 of the License, or (at your option) any later version. 8 * 9 * (c) Copyright 1999, 2001 Alan Cox 10 * (c) Copyright 2001 Red Hat Inc. 11 * Generic HDLC port Copyright (C) 2008 Krzysztof Halasa <khc@pm.waw.pl> 12 * 13 */ 14 15#include <linux/module.h> 16#include <linux/kernel.h> 17#include <linux/mm.h> 18#include <linux/net.h> 19#include <linux/skbuff.h> 20#include <linux/netdevice.h> 21#include <linux/if_arp.h> 22#include <linux/delay.h> 23#include <linux/hdlc.h> 24#include <linux/ioport.h> 25#include <linux/init.h> 26#include <net/arp.h> 27 28#include <asm/irq.h> 29#include <asm/io.h> 30#include <asm/dma.h> 31#include <asm/byteorder.h> 32#include "z85230.h" 33 34 35struct slvl_device 36{ 37 struct z8530_channel *chan; 38 int channel; 39}; 40 41 42struct slvl_board 43{ 44 struct slvl_device dev[2]; 45 struct z8530_dev board; 46 int iobase; 47}; 48 49/* 50 * Network driver support routines 51 */ 52 53static inline struct slvl_device* dev_to_chan(struct net_device *dev) 54{ 55 return (struct slvl_device *)dev_to_hdlc(dev)->priv; 56} 57 58/* 59 * Frame receive. Simple for our card as we do HDLC and there 60 * is no funny garbage involved 61 */ 62 63static void sealevel_input(struct z8530_channel *c, struct sk_buff *skb) 64{ 65 /* Drop the CRC - it's not a good idea to try and negotiate it ;) */ 66 skb_trim(skb, skb->len - 2); 67 skb->protocol = hdlc_type_trans(skb, c->netdevice); 68 skb_reset_mac_header(skb); 69 skb->dev = c->netdevice; 70 netif_rx(skb); 71} 72 73/* 74 * We've been placed in the UP state 75 */ 76 77static int sealevel_open(struct net_device *d) 78{ 79 struct slvl_device *slvl = dev_to_chan(d); 80 int err = -1; 81 int unit = slvl->channel; 82 83 /* 84 * Link layer up. 85 */ 86 87 switch (unit) { 88 case 0: 89 err = z8530_sync_dma_open(d, slvl->chan); 90 break; 91 case 1: 92 err = z8530_sync_open(d, slvl->chan); 93 break; 94 } 95 96 if (err) 97 return err; 98 99 err = hdlc_open(d); 100 if (err) { 101 switch (unit) { 102 case 0: 103 z8530_sync_dma_close(d, slvl->chan); 104 break; 105 case 1: 106 z8530_sync_close(d, slvl->chan); 107 break; 108 } 109 return err; 110 } 111 112 slvl->chan->rx_function = sealevel_input; 113 114 /* 115 * Go go go 116 */ 117 netif_start_queue(d); 118 return 0; 119} 120 121static int sealevel_close(struct net_device *d) 122{ 123 struct slvl_device *slvl = dev_to_chan(d); 124 int unit = slvl->channel; 125 126 /* 127 * Discard new frames 128 */ 129 130 slvl->chan->rx_function = z8530_null_rx; 131 132 hdlc_close(d); 133 netif_stop_queue(d); 134 135 switch (unit) { 136 case 0: 137 z8530_sync_dma_close(d, slvl->chan); 138 break; 139 case 1: 140 z8530_sync_close(d, slvl->chan); 141 break; 142 } 143 return 0; 144} 145 146static int sealevel_ioctl(struct net_device *d, struct ifreq *ifr, int cmd) 147{ 148 /* struct slvl_device *slvl=dev_to_chan(d); 149 z8530_ioctl(d,&slvl->sync.chanA,ifr,cmd) */ 150 return hdlc_ioctl(d, ifr, cmd); 151} 152 153/* 154 * Passed network frames, fire them downwind. 155 */ 156 157static netdev_tx_t sealevel_queue_xmit(struct sk_buff *skb, 158 struct net_device *d) 159{ 160 return z8530_queue_xmit(dev_to_chan(d)->chan, skb); 161} 162 163static int sealevel_attach(struct net_device *dev, unsigned short encoding, 164 unsigned short parity) 165{ 166 if (encoding == ENCODING_NRZ && parity == PARITY_CRC16_PR1_CCITT) 167 return 0; 168 return -EINVAL; 169} 170 171static const struct net_device_ops sealevel_ops = { 172 .ndo_open = sealevel_open, 173 .ndo_stop = sealevel_close, 174 .ndo_change_mtu = hdlc_change_mtu, 175 .ndo_start_xmit = hdlc_start_xmit, 176 .ndo_do_ioctl = sealevel_ioctl, 177}; 178 179static int slvl_setup(struct slvl_device *sv, int iobase, int irq) 180{ 181 struct net_device *dev = alloc_hdlcdev(sv); 182 if (!dev) 183 return -1; 184 185 dev_to_hdlc(dev)->attach = sealevel_attach; 186 dev_to_hdlc(dev)->xmit = sealevel_queue_xmit; 187 dev->netdev_ops = &sealevel_ops; 188 dev->base_addr = iobase; 189 dev->irq = irq; 190 191 if (register_hdlc_device(dev)) { 192 printk(KERN_ERR "sealevel: unable to register HDLC device\n"); 193 free_netdev(dev); 194 return -1; 195 } 196 197 sv->chan->netdevice = dev; 198 return 0; 199} 200 201 202/* 203 * Allocate and setup Sealevel board. 204 */ 205 206static __init struct slvl_board *slvl_init(int iobase, int irq, 207 int txdma, int rxdma, int slow) 208{ 209 struct z8530_dev *dev; 210 struct slvl_board *b; 211 212 /* 213 * Get the needed I/O space 214 */ 215 216 if (!request_region(iobase, 8, "Sealevel 4021")) { 217 printk(KERN_WARNING "sealevel: I/O 0x%X already in use.\n", 218 iobase); 219 return NULL; 220 } 221 222 b = kzalloc(sizeof(struct slvl_board), GFP_KERNEL); 223 if (!b) 224 goto err_kzalloc; 225 226 b->dev[0].chan = &b->board.chanA; 227 b->dev[0].channel = 0; 228 229 b->dev[1].chan = &b->board.chanB; 230 b->dev[1].channel = 1; 231 232 dev = &b->board; 233 234 /* 235 * Stuff in the I/O addressing 236 */ 237 238 dev->active = 0; 239 240 b->iobase = iobase; 241 242 /* 243 * Select 8530 delays for the old board 244 */ 245 246 if (slow) 247 iobase |= Z8530_PORT_SLEEP; 248 249 dev->chanA.ctrlio = iobase + 1; 250 dev->chanA.dataio = iobase; 251 dev->chanB.ctrlio = iobase + 3; 252 dev->chanB.dataio = iobase + 2; 253 254 dev->chanA.irqs = &z8530_nop; 255 dev->chanB.irqs = &z8530_nop; 256 257 /* 258 * Assert DTR enable DMA 259 */ 260 261 outb(3 | (1 << 7), b->iobase + 4); 262 263 264 /* We want a fast IRQ for this device. Actually we'd like an even faster 265 IRQ ;) - This is one driver RtLinux is made for */ 266 267 if (request_irq(irq, z8530_interrupt, IRQF_DISABLED, 268 "SeaLevel", dev) < 0) { 269 printk(KERN_WARNING "sealevel: IRQ %d already in use.\n", irq); 270 goto err_request_irq; 271 } 272 273 dev->irq = irq; 274 dev->chanA.private = &b->dev[0]; 275 dev->chanB.private = &b->dev[1]; 276 dev->chanA.dev = dev; 277 dev->chanB.dev = dev; 278 279 dev->chanA.txdma = 3; 280 dev->chanA.rxdma = 1; 281 if (request_dma(dev->chanA.txdma, "SeaLevel (TX)")) 282 goto err_dma_tx; 283 284 if (request_dma(dev->chanA.rxdma, "SeaLevel (RX)")) 285 goto err_dma_rx; 286 287 disable_irq(irq); 288 289 /* 290 * Begin normal initialise 291 */ 292 293 if (z8530_init(dev) != 0) { 294 printk(KERN_ERR "Z8530 series device not found.\n"); 295 enable_irq(irq); 296 goto free_hw; 297 } 298 if (dev->type == Z85C30) { 299 z8530_channel_load(&dev->chanA, z8530_hdlc_kilostream); 300 z8530_channel_load(&dev->chanB, z8530_hdlc_kilostream); 301 } else { 302 z8530_channel_load(&dev->chanA, z8530_hdlc_kilostream_85230); 303 z8530_channel_load(&dev->chanB, z8530_hdlc_kilostream_85230); 304 } 305 306 /* 307 * Now we can take the IRQ 308 */ 309 310 enable_irq(irq); 311 312 if (slvl_setup(&b->dev[0], iobase, irq)) 313 goto free_hw; 314 if (slvl_setup(&b->dev[1], iobase, irq)) 315 goto free_netdev0; 316 317 z8530_describe(dev, "I/O", iobase); 318 dev->active = 1; 319 return b; 320 321free_netdev0: 322 unregister_hdlc_device(b->dev[0].chan->netdevice); 323 free_netdev(b->dev[0].chan->netdevice); 324free_hw: 325 free_dma(dev->chanA.rxdma); 326err_dma_rx: 327 free_dma(dev->chanA.txdma); 328err_dma_tx: 329 free_irq(irq, dev); 330err_request_irq: 331 kfree(b); 332err_kzalloc: 333 release_region(iobase, 8); 334 return NULL; 335} 336 337static void __exit slvl_shutdown(struct slvl_board *b) 338{ 339 int u; 340 341 z8530_shutdown(&b->board); 342 343 for (u = 0; u < 2; u++) { 344 struct net_device *d = b->dev[u].chan->netdevice; 345 unregister_hdlc_device(d); 346 free_netdev(d); 347 } 348 349 free_irq(b->board.irq, &b->board); 350 free_dma(b->board.chanA.rxdma); 351 free_dma(b->board.chanA.txdma); 352 /* DMA off on the card, drop DTR */ 353 outb(0, b->iobase); 354 release_region(b->iobase, 8); 355 kfree(b); 356} 357 358 359static int io=0x238; 360static int txdma=1; 361static int rxdma=3; 362static int irq=5; 363static int slow=0; 364 365module_param(io, int, 0); 366MODULE_PARM_DESC(io, "The I/O base of the Sealevel card"); 367module_param(txdma, int, 0); 368MODULE_PARM_DESC(txdma, "Transmit DMA channel"); 369module_param(rxdma, int, 0); 370MODULE_PARM_DESC(rxdma, "Receive DMA channel"); 371module_param(irq, int, 0); 372MODULE_PARM_DESC(irq, "The interrupt line setting for the SeaLevel card"); 373module_param(slow, bool, 0); 374MODULE_PARM_DESC(slow, "Set this for an older Sealevel card such as the 4012"); 375 376MODULE_AUTHOR("Alan Cox"); 377MODULE_LICENSE("GPL"); 378MODULE_DESCRIPTION("Modular driver for the SeaLevel 4021"); 379 380static struct slvl_board *slvl_unit; 381 382static int __init slvl_init_module(void) 383{ 384 slvl_unit = slvl_init(io, irq, txdma, rxdma, slow); 385 386 return slvl_unit ? 0 : -ENODEV; 387} 388 389static void __exit slvl_cleanup_module(void) 390{ 391 if (slvl_unit) 392 slvl_shutdown(slvl_unit); 393} 394 395module_init(slvl_init_module); 396module_exit(slvl_cleanup_module);