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1/* 2 * Dynamic DMA mapping support. 3 * 4 * This implementation is a fallback for platforms that do not support 5 * I/O TLBs (aka DMA address translation hardware). 6 * Copyright (C) 2000 Asit Mallick <Asit.K.Mallick@intel.com> 7 * Copyright (C) 2000 Goutham Rao <goutham.rao@intel.com> 8 * Copyright (C) 2000, 2003 Hewlett-Packard Co 9 * David Mosberger-Tang <davidm@hpl.hp.com> 10 * 11 * 03/05/07 davidm Switch from PCI-DMA to generic device DMA API. 12 * 00/12/13 davidm Rename to swiotlb.c and add mark_clean() to avoid 13 * unnecessary i-cache flushing. 14 * 04/07/.. ak Better overflow handling. Assorted fixes. 15 * 05/09/10 linville Add support for syncing ranges, support syncing for 16 * DMA_BIDIRECTIONAL mappings, miscellaneous cleanup. 17 * 08/12/11 beckyb Add highmem support 18 */ 19 20#include <linux/cache.h> 21#include <linux/dma-mapping.h> 22#include <linux/mm.h> 23#include <linux/module.h> 24#include <linux/spinlock.h> 25#include <linux/string.h> 26#include <linux/swiotlb.h> 27#include <linux/pfn.h> 28#include <linux/types.h> 29#include <linux/ctype.h> 30#include <linux/highmem.h> 31 32#include <asm/io.h> 33#include <asm/dma.h> 34#include <asm/scatterlist.h> 35 36#include <linux/init.h> 37#include <linux/bootmem.h> 38#include <linux/iommu-helper.h> 39 40#define OFFSET(val,align) ((unsigned long) \ 41 ( (val) & ( (align) - 1))) 42 43#define SLABS_PER_PAGE (1 << (PAGE_SHIFT - IO_TLB_SHIFT)) 44 45/* 46 * Minimum IO TLB size to bother booting with. Systems with mainly 47 * 64bit capable cards will only lightly use the swiotlb. If we can't 48 * allocate a contiguous 1MB, we're probably in trouble anyway. 49 */ 50#define IO_TLB_MIN_SLABS ((1<<20) >> IO_TLB_SHIFT) 51 52/* 53 * Enumeration for sync targets 54 */ 55enum dma_sync_target { 56 SYNC_FOR_CPU = 0, 57 SYNC_FOR_DEVICE = 1, 58}; 59 60int swiotlb_force; 61 62/* 63 * Used to do a quick range check in unmap_single and 64 * sync_single_*, to see if the memory was in fact allocated by this 65 * API. 66 */ 67static char *io_tlb_start, *io_tlb_end; 68 69/* 70 * The number of IO TLB blocks (in groups of 64) betweeen io_tlb_start and 71 * io_tlb_end. This is command line adjustable via setup_io_tlb_npages. 72 */ 73static unsigned long io_tlb_nslabs; 74 75/* 76 * When the IOMMU overflows we return a fallback buffer. This sets the size. 77 */ 78static unsigned long io_tlb_overflow = 32*1024; 79 80void *io_tlb_overflow_buffer; 81 82/* 83 * This is a free list describing the number of free entries available from 84 * each index 85 */ 86static unsigned int *io_tlb_list; 87static unsigned int io_tlb_index; 88 89/* 90 * We need to save away the original address corresponding to a mapped entry 91 * for the sync operations. 92 */ 93static phys_addr_t *io_tlb_orig_addr; 94 95/* 96 * Protect the above data structures in the map and unmap calls 97 */ 98static DEFINE_SPINLOCK(io_tlb_lock); 99 100static int late_alloc; 101 102static int __init 103setup_io_tlb_npages(char *str) 104{ 105 if (isdigit(*str)) { 106 io_tlb_nslabs = simple_strtoul(str, &str, 0); 107 /* avoid tail segment of size < IO_TLB_SEGSIZE */ 108 io_tlb_nslabs = ALIGN(io_tlb_nslabs, IO_TLB_SEGSIZE); 109 } 110 if (*str == ',') 111 ++str; 112 if (!strcmp(str, "force")) 113 swiotlb_force = 1; 114 115 return 1; 116} 117__setup("swiotlb=", setup_io_tlb_npages); 118/* make io_tlb_overflow tunable too? */ 119 120/* Note that this doesn't work with highmem page */ 121static dma_addr_t swiotlb_virt_to_bus(struct device *hwdev, 122 volatile void *address) 123{ 124 return phys_to_dma(hwdev, virt_to_phys(address)); 125} 126 127void swiotlb_print_info(void) 128{ 129 unsigned long bytes = io_tlb_nslabs << IO_TLB_SHIFT; 130 phys_addr_t pstart, pend; 131 132 pstart = virt_to_phys(io_tlb_start); 133 pend = virt_to_phys(io_tlb_end); 134 135 printk(KERN_INFO "Placing %luMB software IO TLB between %p - %p\n", 136 bytes >> 20, io_tlb_start, io_tlb_end); 137 printk(KERN_INFO "software IO TLB at phys %#llx - %#llx\n", 138 (unsigned long long)pstart, 139 (unsigned long long)pend); 140} 141 142/* 143 * Statically reserve bounce buffer space and initialize bounce buffer data 144 * structures for the software IO TLB used to implement the DMA API. 145 */ 146void __init 147swiotlb_init_with_default_size(size_t default_size, int verbose) 148{ 149 unsigned long i, bytes; 150 151 if (!io_tlb_nslabs) { 152 io_tlb_nslabs = (default_size >> IO_TLB_SHIFT); 153 io_tlb_nslabs = ALIGN(io_tlb_nslabs, IO_TLB_SEGSIZE); 154 } 155 156 bytes = io_tlb_nslabs << IO_TLB_SHIFT; 157 158 /* 159 * Get IO TLB memory from the low pages 160 */ 161 io_tlb_start = alloc_bootmem_low_pages(bytes); 162 if (!io_tlb_start) 163 panic("Cannot allocate SWIOTLB buffer"); 164 io_tlb_end = io_tlb_start + bytes; 165 166 /* 167 * Allocate and initialize the free list array. This array is used 168 * to find contiguous free memory regions of size up to IO_TLB_SEGSIZE 169 * between io_tlb_start and io_tlb_end. 170 */ 171 io_tlb_list = alloc_bootmem(io_tlb_nslabs * sizeof(int)); 172 for (i = 0; i < io_tlb_nslabs; i++) 173 io_tlb_list[i] = IO_TLB_SEGSIZE - OFFSET(i, IO_TLB_SEGSIZE); 174 io_tlb_index = 0; 175 io_tlb_orig_addr = alloc_bootmem(io_tlb_nslabs * sizeof(phys_addr_t)); 176 177 /* 178 * Get the overflow emergency buffer 179 */ 180 io_tlb_overflow_buffer = alloc_bootmem_low(io_tlb_overflow); 181 if (!io_tlb_overflow_buffer) 182 panic("Cannot allocate SWIOTLB overflow buffer!\n"); 183 if (verbose) 184 swiotlb_print_info(); 185} 186 187void __init 188swiotlb_init(int verbose) 189{ 190 swiotlb_init_with_default_size(64 * (1<<20), verbose); /* default to 64MB */ 191} 192 193/* 194 * Systems with larger DMA zones (those that don't support ISA) can 195 * initialize the swiotlb later using the slab allocator if needed. 196 * This should be just like above, but with some error catching. 197 */ 198int 199swiotlb_late_init_with_default_size(size_t default_size) 200{ 201 unsigned long i, bytes, req_nslabs = io_tlb_nslabs; 202 unsigned int order; 203 204 if (!io_tlb_nslabs) { 205 io_tlb_nslabs = (default_size >> IO_TLB_SHIFT); 206 io_tlb_nslabs = ALIGN(io_tlb_nslabs, IO_TLB_SEGSIZE); 207 } 208 209 /* 210 * Get IO TLB memory from the low pages 211 */ 212 order = get_order(io_tlb_nslabs << IO_TLB_SHIFT); 213 io_tlb_nslabs = SLABS_PER_PAGE << order; 214 bytes = io_tlb_nslabs << IO_TLB_SHIFT; 215 216 while ((SLABS_PER_PAGE << order) > IO_TLB_MIN_SLABS) { 217 io_tlb_start = (void *)__get_free_pages(GFP_DMA | __GFP_NOWARN, 218 order); 219 if (io_tlb_start) 220 break; 221 order--; 222 } 223 224 if (!io_tlb_start) 225 goto cleanup1; 226 227 if (order != get_order(bytes)) { 228 printk(KERN_WARNING "Warning: only able to allocate %ld MB " 229 "for software IO TLB\n", (PAGE_SIZE << order) >> 20); 230 io_tlb_nslabs = SLABS_PER_PAGE << order; 231 bytes = io_tlb_nslabs << IO_TLB_SHIFT; 232 } 233 io_tlb_end = io_tlb_start + bytes; 234 memset(io_tlb_start, 0, bytes); 235 236 /* 237 * Allocate and initialize the free list array. This array is used 238 * to find contiguous free memory regions of size up to IO_TLB_SEGSIZE 239 * between io_tlb_start and io_tlb_end. 240 */ 241 io_tlb_list = (unsigned int *)__get_free_pages(GFP_KERNEL, 242 get_order(io_tlb_nslabs * sizeof(int))); 243 if (!io_tlb_list) 244 goto cleanup2; 245 246 for (i = 0; i < io_tlb_nslabs; i++) 247 io_tlb_list[i] = IO_TLB_SEGSIZE - OFFSET(i, IO_TLB_SEGSIZE); 248 io_tlb_index = 0; 249 250 io_tlb_orig_addr = (phys_addr_t *) 251 __get_free_pages(GFP_KERNEL, 252 get_order(io_tlb_nslabs * 253 sizeof(phys_addr_t))); 254 if (!io_tlb_orig_addr) 255 goto cleanup3; 256 257 memset(io_tlb_orig_addr, 0, io_tlb_nslabs * sizeof(phys_addr_t)); 258 259 /* 260 * Get the overflow emergency buffer 261 */ 262 io_tlb_overflow_buffer = (void *)__get_free_pages(GFP_DMA, 263 get_order(io_tlb_overflow)); 264 if (!io_tlb_overflow_buffer) 265 goto cleanup4; 266 267 swiotlb_print_info(); 268 269 late_alloc = 1; 270 271 return 0; 272 273cleanup4: 274 free_pages((unsigned long)io_tlb_orig_addr, 275 get_order(io_tlb_nslabs * sizeof(phys_addr_t))); 276 io_tlb_orig_addr = NULL; 277cleanup3: 278 free_pages((unsigned long)io_tlb_list, get_order(io_tlb_nslabs * 279 sizeof(int))); 280 io_tlb_list = NULL; 281cleanup2: 282 io_tlb_end = NULL; 283 free_pages((unsigned long)io_tlb_start, order); 284 io_tlb_start = NULL; 285cleanup1: 286 io_tlb_nslabs = req_nslabs; 287 return -ENOMEM; 288} 289 290void __init swiotlb_free(void) 291{ 292 if (!io_tlb_overflow_buffer) 293 return; 294 295 if (late_alloc) { 296 free_pages((unsigned long)io_tlb_overflow_buffer, 297 get_order(io_tlb_overflow)); 298 free_pages((unsigned long)io_tlb_orig_addr, 299 get_order(io_tlb_nslabs * sizeof(phys_addr_t))); 300 free_pages((unsigned long)io_tlb_list, get_order(io_tlb_nslabs * 301 sizeof(int))); 302 free_pages((unsigned long)io_tlb_start, 303 get_order(io_tlb_nslabs << IO_TLB_SHIFT)); 304 } else { 305 free_bootmem_late(__pa(io_tlb_overflow_buffer), 306 io_tlb_overflow); 307 free_bootmem_late(__pa(io_tlb_orig_addr), 308 io_tlb_nslabs * sizeof(phys_addr_t)); 309 free_bootmem_late(__pa(io_tlb_list), 310 io_tlb_nslabs * sizeof(int)); 311 free_bootmem_late(__pa(io_tlb_start), 312 io_tlb_nslabs << IO_TLB_SHIFT); 313 } 314} 315 316static int is_swiotlb_buffer(phys_addr_t paddr) 317{ 318 return paddr >= virt_to_phys(io_tlb_start) && 319 paddr < virt_to_phys(io_tlb_end); 320} 321 322/* 323 * Bounce: copy the swiotlb buffer back to the original dma location 324 */ 325static void swiotlb_bounce(phys_addr_t phys, char *dma_addr, size_t size, 326 enum dma_data_direction dir) 327{ 328 unsigned long pfn = PFN_DOWN(phys); 329 330 if (PageHighMem(pfn_to_page(pfn))) { 331 /* The buffer does not have a mapping. Map it in and copy */ 332 unsigned int offset = phys & ~PAGE_MASK; 333 char *buffer; 334 unsigned int sz = 0; 335 unsigned long flags; 336 337 while (size) { 338 sz = min_t(size_t, PAGE_SIZE - offset, size); 339 340 local_irq_save(flags); 341 buffer = kmap_atomic(pfn_to_page(pfn), 342 KM_BOUNCE_READ); 343 if (dir == DMA_TO_DEVICE) 344 memcpy(dma_addr, buffer + offset, sz); 345 else 346 memcpy(buffer + offset, dma_addr, sz); 347 kunmap_atomic(buffer, KM_BOUNCE_READ); 348 local_irq_restore(flags); 349 350 size -= sz; 351 pfn++; 352 dma_addr += sz; 353 offset = 0; 354 } 355 } else { 356 if (dir == DMA_TO_DEVICE) 357 memcpy(dma_addr, phys_to_virt(phys), size); 358 else 359 memcpy(phys_to_virt(phys), dma_addr, size); 360 } 361} 362 363/* 364 * Allocates bounce buffer and returns its kernel virtual address. 365 */ 366static void * 367map_single(struct device *hwdev, phys_addr_t phys, size_t size, int dir) 368{ 369 unsigned long flags; 370 char *dma_addr; 371 unsigned int nslots, stride, index, wrap; 372 int i; 373 unsigned long start_dma_addr; 374 unsigned long mask; 375 unsigned long offset_slots; 376 unsigned long max_slots; 377 378 mask = dma_get_seg_boundary(hwdev); 379 start_dma_addr = swiotlb_virt_to_bus(hwdev, io_tlb_start) & mask; 380 381 offset_slots = ALIGN(start_dma_addr, 1 << IO_TLB_SHIFT) >> IO_TLB_SHIFT; 382 383 /* 384 * Carefully handle integer overflow which can occur when mask == ~0UL. 385 */ 386 max_slots = mask + 1 387 ? ALIGN(mask + 1, 1 << IO_TLB_SHIFT) >> IO_TLB_SHIFT 388 : 1UL << (BITS_PER_LONG - IO_TLB_SHIFT); 389 390 /* 391 * For mappings greater than a page, we limit the stride (and 392 * hence alignment) to a page size. 393 */ 394 nslots = ALIGN(size, 1 << IO_TLB_SHIFT) >> IO_TLB_SHIFT; 395 if (size > PAGE_SIZE) 396 stride = (1 << (PAGE_SHIFT - IO_TLB_SHIFT)); 397 else 398 stride = 1; 399 400 BUG_ON(!nslots); 401 402 /* 403 * Find suitable number of IO TLB entries size that will fit this 404 * request and allocate a buffer from that IO TLB pool. 405 */ 406 spin_lock_irqsave(&io_tlb_lock, flags); 407 index = ALIGN(io_tlb_index, stride); 408 if (index >= io_tlb_nslabs) 409 index = 0; 410 wrap = index; 411 412 do { 413 while (iommu_is_span_boundary(index, nslots, offset_slots, 414 max_slots)) { 415 index += stride; 416 if (index >= io_tlb_nslabs) 417 index = 0; 418 if (index == wrap) 419 goto not_found; 420 } 421 422 /* 423 * If we find a slot that indicates we have 'nslots' number of 424 * contiguous buffers, we allocate the buffers from that slot 425 * and mark the entries as '0' indicating unavailable. 426 */ 427 if (io_tlb_list[index] >= nslots) { 428 int count = 0; 429 430 for (i = index; i < (int) (index + nslots); i++) 431 io_tlb_list[i] = 0; 432 for (i = index - 1; (OFFSET(i, IO_TLB_SEGSIZE) != IO_TLB_SEGSIZE - 1) && io_tlb_list[i]; i--) 433 io_tlb_list[i] = ++count; 434 dma_addr = io_tlb_start + (index << IO_TLB_SHIFT); 435 436 /* 437 * Update the indices to avoid searching in the next 438 * round. 439 */ 440 io_tlb_index = ((index + nslots) < io_tlb_nslabs 441 ? (index + nslots) : 0); 442 443 goto found; 444 } 445 index += stride; 446 if (index >= io_tlb_nslabs) 447 index = 0; 448 } while (index != wrap); 449 450not_found: 451 spin_unlock_irqrestore(&io_tlb_lock, flags); 452 return NULL; 453found: 454 spin_unlock_irqrestore(&io_tlb_lock, flags); 455 456 /* 457 * Save away the mapping from the original address to the DMA address. 458 * This is needed when we sync the memory. Then we sync the buffer if 459 * needed. 460 */ 461 for (i = 0; i < nslots; i++) 462 io_tlb_orig_addr[index+i] = phys + (i << IO_TLB_SHIFT); 463 if (dir == DMA_TO_DEVICE || dir == DMA_BIDIRECTIONAL) 464 swiotlb_bounce(phys, dma_addr, size, DMA_TO_DEVICE); 465 466 return dma_addr; 467} 468 469/* 470 * dma_addr is the kernel virtual address of the bounce buffer to unmap. 471 */ 472static void 473do_unmap_single(struct device *hwdev, char *dma_addr, size_t size, int dir) 474{ 475 unsigned long flags; 476 int i, count, nslots = ALIGN(size, 1 << IO_TLB_SHIFT) >> IO_TLB_SHIFT; 477 int index = (dma_addr - io_tlb_start) >> IO_TLB_SHIFT; 478 phys_addr_t phys = io_tlb_orig_addr[index]; 479 480 /* 481 * First, sync the memory before unmapping the entry 482 */ 483 if (phys && ((dir == DMA_FROM_DEVICE) || (dir == DMA_BIDIRECTIONAL))) 484 swiotlb_bounce(phys, dma_addr, size, DMA_FROM_DEVICE); 485 486 /* 487 * Return the buffer to the free list by setting the corresponding 488 * entries to indicate the number of contiguous entries available. 489 * While returning the entries to the free list, we merge the entries 490 * with slots below and above the pool being returned. 491 */ 492 spin_lock_irqsave(&io_tlb_lock, flags); 493 { 494 count = ((index + nslots) < ALIGN(index + 1, IO_TLB_SEGSIZE) ? 495 io_tlb_list[index + nslots] : 0); 496 /* 497 * Step 1: return the slots to the free list, merging the 498 * slots with superceeding slots 499 */ 500 for (i = index + nslots - 1; i >= index; i--) 501 io_tlb_list[i] = ++count; 502 /* 503 * Step 2: merge the returned slots with the preceding slots, 504 * if available (non zero) 505 */ 506 for (i = index - 1; (OFFSET(i, IO_TLB_SEGSIZE) != IO_TLB_SEGSIZE -1) && io_tlb_list[i]; i--) 507 io_tlb_list[i] = ++count; 508 } 509 spin_unlock_irqrestore(&io_tlb_lock, flags); 510} 511 512static void 513sync_single(struct device *hwdev, char *dma_addr, size_t size, 514 int dir, int target) 515{ 516 int index = (dma_addr - io_tlb_start) >> IO_TLB_SHIFT; 517 phys_addr_t phys = io_tlb_orig_addr[index]; 518 519 phys += ((unsigned long)dma_addr & ((1 << IO_TLB_SHIFT) - 1)); 520 521 switch (target) { 522 case SYNC_FOR_CPU: 523 if (likely(dir == DMA_FROM_DEVICE || dir == DMA_BIDIRECTIONAL)) 524 swiotlb_bounce(phys, dma_addr, size, DMA_FROM_DEVICE); 525 else 526 BUG_ON(dir != DMA_TO_DEVICE); 527 break; 528 case SYNC_FOR_DEVICE: 529 if (likely(dir == DMA_TO_DEVICE || dir == DMA_BIDIRECTIONAL)) 530 swiotlb_bounce(phys, dma_addr, size, DMA_TO_DEVICE); 531 else 532 BUG_ON(dir != DMA_FROM_DEVICE); 533 break; 534 default: 535 BUG(); 536 } 537} 538 539void * 540swiotlb_alloc_coherent(struct device *hwdev, size_t size, 541 dma_addr_t *dma_handle, gfp_t flags) 542{ 543 dma_addr_t dev_addr; 544 void *ret; 545 int order = get_order(size); 546 u64 dma_mask = DMA_BIT_MASK(32); 547 548 if (hwdev && hwdev->coherent_dma_mask) 549 dma_mask = hwdev->coherent_dma_mask; 550 551 ret = (void *)__get_free_pages(flags, order); 552 if (ret && swiotlb_virt_to_bus(hwdev, ret) + size - 1 > dma_mask) { 553 /* 554 * The allocated memory isn't reachable by the device. 555 */ 556 free_pages((unsigned long) ret, order); 557 ret = NULL; 558 } 559 if (!ret) { 560 /* 561 * We are either out of memory or the device can't DMA 562 * to GFP_DMA memory; fall back on map_single(), which 563 * will grab memory from the lowest available address range. 564 */ 565 ret = map_single(hwdev, 0, size, DMA_FROM_DEVICE); 566 if (!ret) 567 return NULL; 568 } 569 570 memset(ret, 0, size); 571 dev_addr = swiotlb_virt_to_bus(hwdev, ret); 572 573 /* Confirm address can be DMA'd by device */ 574 if (dev_addr + size - 1 > dma_mask) { 575 printk("hwdev DMA mask = 0x%016Lx, dev_addr = 0x%016Lx\n", 576 (unsigned long long)dma_mask, 577 (unsigned long long)dev_addr); 578 579 /* DMA_TO_DEVICE to avoid memcpy in unmap_single */ 580 do_unmap_single(hwdev, ret, size, DMA_TO_DEVICE); 581 return NULL; 582 } 583 *dma_handle = dev_addr; 584 return ret; 585} 586EXPORT_SYMBOL(swiotlb_alloc_coherent); 587 588void 589swiotlb_free_coherent(struct device *hwdev, size_t size, void *vaddr, 590 dma_addr_t dev_addr) 591{ 592 phys_addr_t paddr = dma_to_phys(hwdev, dev_addr); 593 594 WARN_ON(irqs_disabled()); 595 if (!is_swiotlb_buffer(paddr)) 596 free_pages((unsigned long)vaddr, get_order(size)); 597 else 598 /* DMA_TO_DEVICE to avoid memcpy in unmap_single */ 599 do_unmap_single(hwdev, vaddr, size, DMA_TO_DEVICE); 600} 601EXPORT_SYMBOL(swiotlb_free_coherent); 602 603static void 604swiotlb_full(struct device *dev, size_t size, int dir, int do_panic) 605{ 606 /* 607 * Ran out of IOMMU space for this operation. This is very bad. 608 * Unfortunately the drivers cannot handle this operation properly. 609 * unless they check for dma_mapping_error (most don't) 610 * When the mapping is small enough return a static buffer to limit 611 * the damage, or panic when the transfer is too big. 612 */ 613 printk(KERN_ERR "DMA: Out of SW-IOMMU space for %zu bytes at " 614 "device %s\n", size, dev ? dev_name(dev) : "?"); 615 616 if (size <= io_tlb_overflow || !do_panic) 617 return; 618 619 if (dir == DMA_BIDIRECTIONAL) 620 panic("DMA: Random memory could be DMA accessed\n"); 621 if (dir == DMA_FROM_DEVICE) 622 panic("DMA: Random memory could be DMA written\n"); 623 if (dir == DMA_TO_DEVICE) 624 panic("DMA: Random memory could be DMA read\n"); 625} 626 627/* 628 * Map a single buffer of the indicated size for DMA in streaming mode. The 629 * physical address to use is returned. 630 * 631 * Once the device is given the dma address, the device owns this memory until 632 * either swiotlb_unmap_page or swiotlb_dma_sync_single is performed. 633 */ 634dma_addr_t swiotlb_map_page(struct device *dev, struct page *page, 635 unsigned long offset, size_t size, 636 enum dma_data_direction dir, 637 struct dma_attrs *attrs) 638{ 639 phys_addr_t phys = page_to_phys(page) + offset; 640 dma_addr_t dev_addr = phys_to_dma(dev, phys); 641 void *map; 642 643 BUG_ON(dir == DMA_NONE); 644 /* 645 * If the address happens to be in the device's DMA window, 646 * we can safely return the device addr and not worry about bounce 647 * buffering it. 648 */ 649 if (dma_capable(dev, dev_addr, size) && !swiotlb_force) 650 return dev_addr; 651 652 /* 653 * Oh well, have to allocate and map a bounce buffer. 654 */ 655 map = map_single(dev, phys, size, dir); 656 if (!map) { 657 swiotlb_full(dev, size, dir, 1); 658 map = io_tlb_overflow_buffer; 659 } 660 661 dev_addr = swiotlb_virt_to_bus(dev, map); 662 663 /* 664 * Ensure that the address returned is DMA'ble 665 */ 666 if (!dma_capable(dev, dev_addr, size)) 667 panic("map_single: bounce buffer is not DMA'ble"); 668 669 return dev_addr; 670} 671EXPORT_SYMBOL_GPL(swiotlb_map_page); 672 673/* 674 * Unmap a single streaming mode DMA translation. The dma_addr and size must 675 * match what was provided for in a previous swiotlb_map_page call. All 676 * other usages are undefined. 677 * 678 * After this call, reads by the cpu to the buffer are guaranteed to see 679 * whatever the device wrote there. 680 */ 681static void unmap_single(struct device *hwdev, dma_addr_t dev_addr, 682 size_t size, int dir) 683{ 684 phys_addr_t paddr = dma_to_phys(hwdev, dev_addr); 685 686 BUG_ON(dir == DMA_NONE); 687 688 if (is_swiotlb_buffer(paddr)) { 689 do_unmap_single(hwdev, phys_to_virt(paddr), size, dir); 690 return; 691 } 692 693 if (dir != DMA_FROM_DEVICE) 694 return; 695 696 /* 697 * phys_to_virt doesn't work with hihgmem page but we could 698 * call dma_mark_clean() with hihgmem page here. However, we 699 * are fine since dma_mark_clean() is null on POWERPC. We can 700 * make dma_mark_clean() take a physical address if necessary. 701 */ 702 dma_mark_clean(phys_to_virt(paddr), size); 703} 704 705void swiotlb_unmap_page(struct device *hwdev, dma_addr_t dev_addr, 706 size_t size, enum dma_data_direction dir, 707 struct dma_attrs *attrs) 708{ 709 unmap_single(hwdev, dev_addr, size, dir); 710} 711EXPORT_SYMBOL_GPL(swiotlb_unmap_page); 712 713/* 714 * Make physical memory consistent for a single streaming mode DMA translation 715 * after a transfer. 716 * 717 * If you perform a swiotlb_map_page() but wish to interrogate the buffer 718 * using the cpu, yet do not wish to teardown the dma mapping, you must 719 * call this function before doing so. At the next point you give the dma 720 * address back to the card, you must first perform a 721 * swiotlb_dma_sync_for_device, and then the device again owns the buffer 722 */ 723static void 724swiotlb_sync_single(struct device *hwdev, dma_addr_t dev_addr, 725 size_t size, int dir, int target) 726{ 727 phys_addr_t paddr = dma_to_phys(hwdev, dev_addr); 728 729 BUG_ON(dir == DMA_NONE); 730 731 if (is_swiotlb_buffer(paddr)) { 732 sync_single(hwdev, phys_to_virt(paddr), size, dir, target); 733 return; 734 } 735 736 if (dir != DMA_FROM_DEVICE) 737 return; 738 739 dma_mark_clean(phys_to_virt(paddr), size); 740} 741 742void 743swiotlb_sync_single_for_cpu(struct device *hwdev, dma_addr_t dev_addr, 744 size_t size, enum dma_data_direction dir) 745{ 746 swiotlb_sync_single(hwdev, dev_addr, size, dir, SYNC_FOR_CPU); 747} 748EXPORT_SYMBOL(swiotlb_sync_single_for_cpu); 749 750void 751swiotlb_sync_single_for_device(struct device *hwdev, dma_addr_t dev_addr, 752 size_t size, enum dma_data_direction dir) 753{ 754 swiotlb_sync_single(hwdev, dev_addr, size, dir, SYNC_FOR_DEVICE); 755} 756EXPORT_SYMBOL(swiotlb_sync_single_for_device); 757 758/* 759 * Same as above, but for a sub-range of the mapping. 760 */ 761static void 762swiotlb_sync_single_range(struct device *hwdev, dma_addr_t dev_addr, 763 unsigned long offset, size_t size, 764 int dir, int target) 765{ 766 swiotlb_sync_single(hwdev, dev_addr + offset, size, dir, target); 767} 768 769void 770swiotlb_sync_single_range_for_cpu(struct device *hwdev, dma_addr_t dev_addr, 771 unsigned long offset, size_t size, 772 enum dma_data_direction dir) 773{ 774 swiotlb_sync_single_range(hwdev, dev_addr, offset, size, dir, 775 SYNC_FOR_CPU); 776} 777EXPORT_SYMBOL_GPL(swiotlb_sync_single_range_for_cpu); 778 779void 780swiotlb_sync_single_range_for_device(struct device *hwdev, dma_addr_t dev_addr, 781 unsigned long offset, size_t size, 782 enum dma_data_direction dir) 783{ 784 swiotlb_sync_single_range(hwdev, dev_addr, offset, size, dir, 785 SYNC_FOR_DEVICE); 786} 787EXPORT_SYMBOL_GPL(swiotlb_sync_single_range_for_device); 788 789/* 790 * Map a set of buffers described by scatterlist in streaming mode for DMA. 791 * This is the scatter-gather version of the above swiotlb_map_page 792 * interface. Here the scatter gather list elements are each tagged with the 793 * appropriate dma address and length. They are obtained via 794 * sg_dma_{address,length}(SG). 795 * 796 * NOTE: An implementation may be able to use a smaller number of 797 * DMA address/length pairs than there are SG table elements. 798 * (for example via virtual mapping capabilities) 799 * The routine returns the number of addr/length pairs actually 800 * used, at most nents. 801 * 802 * Device ownership issues as mentioned above for swiotlb_map_page are the 803 * same here. 804 */ 805int 806swiotlb_map_sg_attrs(struct device *hwdev, struct scatterlist *sgl, int nelems, 807 enum dma_data_direction dir, struct dma_attrs *attrs) 808{ 809 struct scatterlist *sg; 810 int i; 811 812 BUG_ON(dir == DMA_NONE); 813 814 for_each_sg(sgl, sg, nelems, i) { 815 phys_addr_t paddr = sg_phys(sg); 816 dma_addr_t dev_addr = phys_to_dma(hwdev, paddr); 817 818 if (swiotlb_force || 819 !dma_capable(hwdev, dev_addr, sg->length)) { 820 void *map = map_single(hwdev, sg_phys(sg), 821 sg->length, dir); 822 if (!map) { 823 /* Don't panic here, we expect map_sg users 824 to do proper error handling. */ 825 swiotlb_full(hwdev, sg->length, dir, 0); 826 swiotlb_unmap_sg_attrs(hwdev, sgl, i, dir, 827 attrs); 828 sgl[0].dma_length = 0; 829 return 0; 830 } 831 sg->dma_address = swiotlb_virt_to_bus(hwdev, map); 832 } else 833 sg->dma_address = dev_addr; 834 sg->dma_length = sg->length; 835 } 836 return nelems; 837} 838EXPORT_SYMBOL(swiotlb_map_sg_attrs); 839 840int 841swiotlb_map_sg(struct device *hwdev, struct scatterlist *sgl, int nelems, 842 int dir) 843{ 844 return swiotlb_map_sg_attrs(hwdev, sgl, nelems, dir, NULL); 845} 846EXPORT_SYMBOL(swiotlb_map_sg); 847 848/* 849 * Unmap a set of streaming mode DMA translations. Again, cpu read rules 850 * concerning calls here are the same as for swiotlb_unmap_page() above. 851 */ 852void 853swiotlb_unmap_sg_attrs(struct device *hwdev, struct scatterlist *sgl, 854 int nelems, enum dma_data_direction dir, struct dma_attrs *attrs) 855{ 856 struct scatterlist *sg; 857 int i; 858 859 BUG_ON(dir == DMA_NONE); 860 861 for_each_sg(sgl, sg, nelems, i) 862 unmap_single(hwdev, sg->dma_address, sg->dma_length, dir); 863 864} 865EXPORT_SYMBOL(swiotlb_unmap_sg_attrs); 866 867void 868swiotlb_unmap_sg(struct device *hwdev, struct scatterlist *sgl, int nelems, 869 int dir) 870{ 871 return swiotlb_unmap_sg_attrs(hwdev, sgl, nelems, dir, NULL); 872} 873EXPORT_SYMBOL(swiotlb_unmap_sg); 874 875/* 876 * Make physical memory consistent for a set of streaming mode DMA translations 877 * after a transfer. 878 * 879 * The same as swiotlb_sync_single_* but for a scatter-gather list, same rules 880 * and usage. 881 */ 882static void 883swiotlb_sync_sg(struct device *hwdev, struct scatterlist *sgl, 884 int nelems, int dir, int target) 885{ 886 struct scatterlist *sg; 887 int i; 888 889 for_each_sg(sgl, sg, nelems, i) 890 swiotlb_sync_single(hwdev, sg->dma_address, 891 sg->dma_length, dir, target); 892} 893 894void 895swiotlb_sync_sg_for_cpu(struct device *hwdev, struct scatterlist *sg, 896 int nelems, enum dma_data_direction dir) 897{ 898 swiotlb_sync_sg(hwdev, sg, nelems, dir, SYNC_FOR_CPU); 899} 900EXPORT_SYMBOL(swiotlb_sync_sg_for_cpu); 901 902void 903swiotlb_sync_sg_for_device(struct device *hwdev, struct scatterlist *sg, 904 int nelems, enum dma_data_direction dir) 905{ 906 swiotlb_sync_sg(hwdev, sg, nelems, dir, SYNC_FOR_DEVICE); 907} 908EXPORT_SYMBOL(swiotlb_sync_sg_for_device); 909 910int 911swiotlb_dma_mapping_error(struct device *hwdev, dma_addr_t dma_addr) 912{ 913 return (dma_addr == swiotlb_virt_to_bus(hwdev, io_tlb_overflow_buffer)); 914} 915EXPORT_SYMBOL(swiotlb_dma_mapping_error); 916 917/* 918 * Return whether the given device DMA address mask can be supported 919 * properly. For example, if your device can only drive the low 24-bits 920 * during bus mastering, then you would pass 0x00ffffff as the mask to 921 * this function. 922 */ 923int 924swiotlb_dma_supported(struct device *hwdev, u64 mask) 925{ 926 return swiotlb_virt_to_bus(hwdev, io_tlb_end - 1) <= mask; 927} 928EXPORT_SYMBOL(swiotlb_dma_supported);