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1/* 2 * linux/drivers/char/serial_core.h 3 * 4 * Copyright (C) 2000 Deep Blue Solutions Ltd. 5 * 6 * This program is free software; you can redistribute it and/or modify 7 * it under the terms of the GNU General Public License as published by 8 * the Free Software Foundation; either version 2 of the License, or 9 * (at your option) any later version. 10 * 11 * This program is distributed in the hope that it will be useful, 12 * but WITHOUT ANY WARRANTY; without even the implied warranty of 13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 14 * GNU General Public License for more details. 15 * 16 * You should have received a copy of the GNU General Public License 17 * along with this program; if not, write to the Free Software 18 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA 19 */ 20#ifndef LINUX_SERIAL_CORE_H 21#define LINUX_SERIAL_CORE_H 22 23#include <linux/serial.h> 24 25/* 26 * The type definitions. These are from Ted Ts'o's serial.h 27 */ 28#define PORT_UNKNOWN 0 29#define PORT_8250 1 30#define PORT_16450 2 31#define PORT_16550 3 32#define PORT_16550A 4 33#define PORT_CIRRUS 5 34#define PORT_16650 6 35#define PORT_16650V2 7 36#define PORT_16750 8 37#define PORT_STARTECH 9 38#define PORT_16C950 10 39#define PORT_16654 11 40#define PORT_16850 12 41#define PORT_RSA 13 42#define PORT_NS16550A 14 43#define PORT_XSCALE 15 44#define PORT_RM9000 16 /* PMC-Sierra RM9xxx internal UART */ 45#define PORT_OCTEON 17 /* Cavium OCTEON internal UART */ 46#define PORT_AR7 18 /* Texas Instruments AR7 internal UART */ 47#define PORT_MAX_8250 18 /* max port ID */ 48 49/* 50 * ARM specific type numbers. These are not currently guaranteed 51 * to be implemented, and will change in the future. These are 52 * separate so any additions to the old serial.c that occur before 53 * we are merged can be easily merged here. 54 */ 55#define PORT_PXA 31 56#define PORT_AMBA 32 57#define PORT_CLPS711X 33 58#define PORT_SA1100 34 59#define PORT_UART00 35 60#define PORT_21285 37 61 62/* Sparc type numbers. */ 63#define PORT_SUNZILOG 38 64#define PORT_SUNSAB 39 65 66/* DEC */ 67#define PORT_DZ 46 68#define PORT_ZS 47 69 70/* Parisc type numbers. */ 71#define PORT_MUX 48 72 73/* Atmel AT91 / AT32 SoC */ 74#define PORT_ATMEL 49 75 76/* Macintosh Zilog type numbers */ 77#define PORT_MAC_ZILOG 50 /* m68k : not yet implemented */ 78#define PORT_PMAC_ZILOG 51 79 80/* SH-SCI */ 81#define PORT_SCI 52 82#define PORT_SCIF 53 83#define PORT_IRDA 54 84 85/* Samsung S3C2410 SoC and derivatives thereof */ 86#define PORT_S3C2410 55 87 88/* SGI IP22 aka Indy / Challenge S / Indigo 2 */ 89#define PORT_IP22ZILOG 56 90 91/* Sharp LH7a40x -- an ARM9 SoC series */ 92#define PORT_LH7A40X 57 93 94/* PPC CPM type number */ 95#define PORT_CPM 58 96 97/* MPC52xx type numbers */ 98#define PORT_MPC52xx 59 99 100/* IBM icom */ 101#define PORT_ICOM 60 102 103/* Samsung S3C2440 SoC */ 104#define PORT_S3C2440 61 105 106/* Motorola i.MX SoC */ 107#define PORT_IMX 62 108 109/* Marvell MPSC */ 110#define PORT_MPSC 63 111 112/* TXX9 type number */ 113#define PORT_TXX9 64 114 115/* NEC VR4100 series SIU/DSIU */ 116#define PORT_VR41XX_SIU 65 117#define PORT_VR41XX_DSIU 66 118 119/* Samsung S3C2400 SoC */ 120#define PORT_S3C2400 67 121 122/* M32R SIO */ 123#define PORT_M32R_SIO 68 124 125/*Digi jsm */ 126#define PORT_JSM 69 127 128#define PORT_PNX8XXX 70 129 130/* Hilscher netx */ 131#define PORT_NETX 71 132 133/* SUN4V Hypervisor Console */ 134#define PORT_SUNHV 72 135 136#define PORT_S3C2412 73 137 138/* Xilinx uartlite */ 139#define PORT_UARTLITE 74 140 141/* Blackfin bf5xx */ 142#define PORT_BFIN 75 143 144/* Micrel KS8695 */ 145#define PORT_KS8695 76 146 147/* Broadcom SB1250, etc. SOC */ 148#define PORT_SB1250_DUART 77 149 150/* Freescale ColdFire */ 151#define PORT_MCF 78 152 153/* Blackfin SPORT */ 154#define PORT_BFIN_SPORT 79 155 156/* MN10300 on-chip UART numbers */ 157#define PORT_MN10300 80 158#define PORT_MN10300_CTS 81 159 160#define PORT_SC26XX 82 161 162/* SH-SCI */ 163#define PORT_SCIFA 83 164 165#define PORT_S3C6400 84 166 167/* NWPSERIAL */ 168#define PORT_NWPSERIAL 85 169 170/* MAX3100 */ 171#define PORT_MAX3100 86 172 173/* Timberdale UART */ 174#define PORT_TIMBUART 87 175 176/* Qualcomm MSM SoCs */ 177#define PORT_MSM 88 178 179/* BCM63xx family SoCs */ 180#define PORT_BCM63XX 89 181 182#ifdef __KERNEL__ 183 184#include <linux/compiler.h> 185#include <linux/interrupt.h> 186#include <linux/circ_buf.h> 187#include <linux/spinlock.h> 188#include <linux/sched.h> 189#include <linux/tty.h> 190#include <linux/mutex.h> 191#include <linux/sysrq.h> 192 193struct uart_port; 194struct serial_struct; 195struct device; 196 197/* 198 * This structure describes all the operations that can be 199 * done on the physical hardware. 200 */ 201struct uart_ops { 202 unsigned int (*tx_empty)(struct uart_port *); 203 void (*set_mctrl)(struct uart_port *, unsigned int mctrl); 204 unsigned int (*get_mctrl)(struct uart_port *); 205 void (*stop_tx)(struct uart_port *); 206 void (*start_tx)(struct uart_port *); 207 void (*send_xchar)(struct uart_port *, char ch); 208 void (*stop_rx)(struct uart_port *); 209 void (*enable_ms)(struct uart_port *); 210 void (*break_ctl)(struct uart_port *, int ctl); 211 int (*startup)(struct uart_port *); 212 void (*shutdown)(struct uart_port *); 213 void (*flush_buffer)(struct uart_port *); 214 void (*set_termios)(struct uart_port *, struct ktermios *new, 215 struct ktermios *old); 216 void (*set_ldisc)(struct uart_port *); 217 void (*pm)(struct uart_port *, unsigned int state, 218 unsigned int oldstate); 219 int (*set_wake)(struct uart_port *, unsigned int state); 220 221 /* 222 * Return a string describing the type of the port 223 */ 224 const char *(*type)(struct uart_port *); 225 226 /* 227 * Release IO and memory resources used by the port. 228 * This includes iounmap if necessary. 229 */ 230 void (*release_port)(struct uart_port *); 231 232 /* 233 * Request IO and memory resources used by the port. 234 * This includes iomapping the port if necessary. 235 */ 236 int (*request_port)(struct uart_port *); 237 void (*config_port)(struct uart_port *, int); 238 int (*verify_port)(struct uart_port *, struct serial_struct *); 239 int (*ioctl)(struct uart_port *, unsigned int, unsigned long); 240#ifdef CONFIG_CONSOLE_POLL 241 void (*poll_put_char)(struct uart_port *, unsigned char); 242 int (*poll_get_char)(struct uart_port *); 243#endif 244}; 245 246#define UART_CONFIG_TYPE (1 << 0) 247#define UART_CONFIG_IRQ (1 << 1) 248 249struct uart_icount { 250 __u32 cts; 251 __u32 dsr; 252 __u32 rng; 253 __u32 dcd; 254 __u32 rx; 255 __u32 tx; 256 __u32 frame; 257 __u32 overrun; 258 __u32 parity; 259 __u32 brk; 260 __u32 buf_overrun; 261}; 262 263typedef unsigned int __bitwise__ upf_t; 264 265struct uart_port { 266 spinlock_t lock; /* port lock */ 267 unsigned long iobase; /* in/out[bwl] */ 268 unsigned char __iomem *membase; /* read/write[bwl] */ 269 unsigned int (*serial_in)(struct uart_port *, int); 270 void (*serial_out)(struct uart_port *, int, int); 271 unsigned int irq; /* irq number */ 272 unsigned long irqflags; /* irq flags */ 273 unsigned int uartclk; /* base uart clock */ 274 unsigned int fifosize; /* tx fifo size */ 275 unsigned char x_char; /* xon/xoff char */ 276 unsigned char regshift; /* reg offset shift */ 277 unsigned char iotype; /* io access style */ 278 unsigned char unused1; 279 280#define UPIO_PORT (0) 281#define UPIO_HUB6 (1) 282#define UPIO_MEM (2) 283#define UPIO_MEM32 (3) 284#define UPIO_AU (4) /* Au1x00 type IO */ 285#define UPIO_TSI (5) /* Tsi108/109 type IO */ 286#define UPIO_DWAPB (6) /* DesignWare APB UART */ 287#define UPIO_RM9000 (7) /* RM9000 type IO */ 288 289 unsigned int read_status_mask; /* driver specific */ 290 unsigned int ignore_status_mask; /* driver specific */ 291 struct uart_state *state; /* pointer to parent state */ 292 struct uart_icount icount; /* statistics */ 293 294 struct console *cons; /* struct console, if any */ 295#if defined(CONFIG_SERIAL_CORE_CONSOLE) || defined(SUPPORT_SYSRQ) 296 unsigned long sysrq; /* sysrq timeout */ 297#endif 298 299 upf_t flags; 300 301#define UPF_FOURPORT ((__force upf_t) (1 << 1)) 302#define UPF_SAK ((__force upf_t) (1 << 2)) 303#define UPF_SPD_MASK ((__force upf_t) (0x1030)) 304#define UPF_SPD_HI ((__force upf_t) (0x0010)) 305#define UPF_SPD_VHI ((__force upf_t) (0x0020)) 306#define UPF_SPD_CUST ((__force upf_t) (0x0030)) 307#define UPF_SPD_SHI ((__force upf_t) (0x1000)) 308#define UPF_SPD_WARP ((__force upf_t) (0x1010)) 309#define UPF_SKIP_TEST ((__force upf_t) (1 << 6)) 310#define UPF_AUTO_IRQ ((__force upf_t) (1 << 7)) 311#define UPF_HARDPPS_CD ((__force upf_t) (1 << 11)) 312#define UPF_LOW_LATENCY ((__force upf_t) (1 << 13)) 313#define UPF_BUGGY_UART ((__force upf_t) (1 << 14)) 314#define UPF_NO_TXEN_TEST ((__force upf_t) (1 << 15)) 315#define UPF_MAGIC_MULTIPLIER ((__force upf_t) (1 << 16)) 316#define UPF_CONS_FLOW ((__force upf_t) (1 << 23)) 317#define UPF_SHARE_IRQ ((__force upf_t) (1 << 24)) 318/* The exact UART type is known and should not be probed. */ 319#define UPF_FIXED_TYPE ((__force upf_t) (1 << 27)) 320#define UPF_BOOT_AUTOCONF ((__force upf_t) (1 << 28)) 321#define UPF_FIXED_PORT ((__force upf_t) (1 << 29)) 322#define UPF_DEAD ((__force upf_t) (1 << 30)) 323#define UPF_IOREMAP ((__force upf_t) (1 << 31)) 324 325#define UPF_CHANGE_MASK ((__force upf_t) (0x17fff)) 326#define UPF_USR_MASK ((__force upf_t) (UPF_SPD_MASK|UPF_LOW_LATENCY)) 327 328 unsigned int mctrl; /* current modem ctrl settings */ 329 unsigned int timeout; /* character-based timeout */ 330 unsigned int type; /* port type */ 331 const struct uart_ops *ops; 332 unsigned int custom_divisor; 333 unsigned int line; /* port index */ 334 resource_size_t mapbase; /* for ioremap */ 335 struct device *dev; /* parent device */ 336 unsigned char hub6; /* this should be in the 8250 driver */ 337 unsigned char suspended; 338 unsigned char unused[2]; 339 void *private_data; /* generic platform data pointer */ 340}; 341 342/* 343 * This is the state information which is persistent across opens. 344 */ 345struct uart_state { 346 struct tty_port port; 347 348 int pm_state; 349 struct circ_buf xmit; 350 351 struct tasklet_struct tlet; 352 struct uart_port *uart_port; 353}; 354 355#define UART_XMIT_SIZE PAGE_SIZE 356 357 358/* number of characters left in xmit buffer before we ask for more */ 359#define WAKEUP_CHARS 256 360 361struct module; 362struct tty_driver; 363 364struct uart_driver { 365 struct module *owner; 366 const char *driver_name; 367 const char *dev_name; 368 int major; 369 int minor; 370 int nr; 371 struct console *cons; 372 373 /* 374 * these are private; the low level driver should not 375 * touch these; they should be initialised to NULL 376 */ 377 struct uart_state *state; 378 struct tty_driver *tty_driver; 379}; 380 381void uart_write_wakeup(struct uart_port *port); 382 383/* 384 * Baud rate helpers. 385 */ 386void uart_update_timeout(struct uart_port *port, unsigned int cflag, 387 unsigned int baud); 388unsigned int uart_get_baud_rate(struct uart_port *port, struct ktermios *termios, 389 struct ktermios *old, unsigned int min, 390 unsigned int max); 391unsigned int uart_get_divisor(struct uart_port *port, unsigned int baud); 392 393/* 394 * Console helpers. 395 */ 396struct uart_port *uart_get_console(struct uart_port *ports, int nr, 397 struct console *c); 398void uart_parse_options(char *options, int *baud, int *parity, int *bits, 399 int *flow); 400int uart_set_options(struct uart_port *port, struct console *co, int baud, 401 int parity, int bits, int flow); 402struct tty_driver *uart_console_device(struct console *co, int *index); 403void uart_console_write(struct uart_port *port, const char *s, 404 unsigned int count, 405 void (*putchar)(struct uart_port *, int)); 406 407/* 408 * Port/driver registration/removal 409 */ 410int uart_register_driver(struct uart_driver *uart); 411void uart_unregister_driver(struct uart_driver *uart); 412int uart_add_one_port(struct uart_driver *reg, struct uart_port *port); 413int uart_remove_one_port(struct uart_driver *reg, struct uart_port *port); 414int uart_match_port(struct uart_port *port1, struct uart_port *port2); 415 416/* 417 * Power Management 418 */ 419int uart_suspend_port(struct uart_driver *reg, struct uart_port *port); 420int uart_resume_port(struct uart_driver *reg, struct uart_port *port); 421 422#define uart_circ_empty(circ) ((circ)->head == (circ)->tail) 423#define uart_circ_clear(circ) ((circ)->head = (circ)->tail = 0) 424 425#define uart_circ_chars_pending(circ) \ 426 (CIRC_CNT((circ)->head, (circ)->tail, UART_XMIT_SIZE)) 427 428#define uart_circ_chars_free(circ) \ 429 (CIRC_SPACE((circ)->head, (circ)->tail, UART_XMIT_SIZE)) 430 431static inline int uart_tx_stopped(struct uart_port *port) 432{ 433 struct tty_struct *tty = port->state->port.tty; 434 if(tty->stopped || tty->hw_stopped) 435 return 1; 436 return 0; 437} 438 439/* 440 * The following are helper functions for the low level drivers. 441 */ 442static inline int 443uart_handle_sysrq_char(struct uart_port *port, unsigned int ch) 444{ 445#ifdef SUPPORT_SYSRQ 446 if (port->sysrq) { 447 if (ch && time_before(jiffies, port->sysrq)) { 448 handle_sysrq(ch, port->state->port.tty); 449 port->sysrq = 0; 450 return 1; 451 } 452 port->sysrq = 0; 453 } 454#endif 455 return 0; 456} 457#ifndef SUPPORT_SYSRQ 458#define uart_handle_sysrq_char(port,ch) uart_handle_sysrq_char(port, 0) 459#endif 460 461/* 462 * We do the SysRQ and SAK checking like this... 463 */ 464static inline int uart_handle_break(struct uart_port *port) 465{ 466 struct uart_state *state = port->state; 467#ifdef SUPPORT_SYSRQ 468 if (port->cons && port->cons->index == port->line) { 469 if (!port->sysrq) { 470 port->sysrq = jiffies + HZ*5; 471 return 1; 472 } 473 port->sysrq = 0; 474 } 475#endif 476 if (port->flags & UPF_SAK) 477 do_SAK(state->port.tty); 478 return 0; 479} 480 481/** 482 * uart_handle_dcd_change - handle a change of carrier detect state 483 * @uport: uart_port structure for the open port 484 * @status: new carrier detect status, nonzero if active 485 */ 486static inline void 487uart_handle_dcd_change(struct uart_port *uport, unsigned int status) 488{ 489 struct uart_state *state = uport->state; 490 struct tty_port *port = &state->port; 491 492 uport->icount.dcd++; 493 494#ifdef CONFIG_HARD_PPS 495 if ((uport->flags & UPF_HARDPPS_CD) && status) 496 hardpps(); 497#endif 498 499 if (port->flags & ASYNC_CHECK_CD) { 500 if (status) 501 wake_up_interruptible(&port->open_wait); 502 else if (port->tty) 503 tty_hangup(port->tty); 504 } 505} 506 507/** 508 * uart_handle_cts_change - handle a change of clear-to-send state 509 * @uport: uart_port structure for the open port 510 * @status: new clear to send status, nonzero if active 511 */ 512static inline void 513uart_handle_cts_change(struct uart_port *uport, unsigned int status) 514{ 515 struct tty_port *port = &uport->state->port; 516 struct tty_struct *tty = port->tty; 517 518 uport->icount.cts++; 519 520 if (port->flags & ASYNC_CTS_FLOW) { 521 if (tty->hw_stopped) { 522 if (status) { 523 tty->hw_stopped = 0; 524 uport->ops->start_tx(uport); 525 uart_write_wakeup(uport); 526 } 527 } else { 528 if (!status) { 529 tty->hw_stopped = 1; 530 uport->ops->stop_tx(uport); 531 } 532 } 533 } 534} 535 536#include <linux/tty_flip.h> 537 538static inline void 539uart_insert_char(struct uart_port *port, unsigned int status, 540 unsigned int overrun, unsigned int ch, unsigned int flag) 541{ 542 struct tty_struct *tty = port->state->port.tty; 543 544 if ((status & port->ignore_status_mask & ~overrun) == 0) 545 tty_insert_flip_char(tty, ch, flag); 546 547 /* 548 * Overrun is special. Since it's reported immediately, 549 * it doesn't affect the current character. 550 */ 551 if (status & ~port->ignore_status_mask & overrun) 552 tty_insert_flip_char(tty, 0, TTY_OVERRUN); 553} 554 555/* 556 * UART_ENABLE_MS - determine if port should enable modem status irqs 557 */ 558#define UART_ENABLE_MS(port,cflag) ((port)->flags & UPF_HARDPPS_CD || \ 559 (cflag) & CRTSCTS || \ 560 !((cflag) & CLOCAL)) 561 562#endif 563 564#endif /* LINUX_SERIAL_CORE_H */