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1/*
2 * Copyright (c) 2007 Dave Airlie <airlied@linux.ie>
3 * Copyright (c) 2007 Jakob Bornecrantz <wallbraker@gmail.com>
4 * Copyright (c) 2008 Red Hat Inc.
5 * Copyright (c) 2007-2008 Tungsten Graphics, Inc., Cedar Park, TX., USA
6 * Copyright (c) 2007-2008 Intel Corporation
7 *
8 * Permission is hereby granted, free of charge, to any person obtaining a
9 * copy of this software and associated documentation files (the "Software"),
10 * to deal in the Software without restriction, including without limitation
11 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
12 * and/or sell copies of the Software, and to permit persons to whom the
13 * Software is furnished to do so, subject to the following conditions:
14 *
15 * The above copyright notice and this permission notice shall be included in
16 * all copies or substantial portions of the Software.
17 *
18 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
19 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
20 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
21 * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
22 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
23 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
24 * IN THE SOFTWARE.
25 */
26
27#ifndef _DRM_MODE_H
28#define _DRM_MODE_H
29
30#include <linux/kernel.h>
31#include <linux/types.h>
32
33#define DRM_DISPLAY_INFO_LEN 32
34#define DRM_CONNECTOR_NAME_LEN 32
35#define DRM_DISPLAY_MODE_LEN 32
36#define DRM_PROP_NAME_LEN 32
37
38#define DRM_MODE_TYPE_BUILTIN (1<<0)
39#define DRM_MODE_TYPE_CLOCK_C ((1<<1) | DRM_MODE_TYPE_BUILTIN)
40#define DRM_MODE_TYPE_CRTC_C ((1<<2) | DRM_MODE_TYPE_BUILTIN)
41#define DRM_MODE_TYPE_PREFERRED (1<<3)
42#define DRM_MODE_TYPE_DEFAULT (1<<4)
43#define DRM_MODE_TYPE_USERDEF (1<<5)
44#define DRM_MODE_TYPE_DRIVER (1<<6)
45
46/* Video mode flags */
47/* bit compatible with the xorg definitions. */
48#define DRM_MODE_FLAG_PHSYNC (1<<0)
49#define DRM_MODE_FLAG_NHSYNC (1<<1)
50#define DRM_MODE_FLAG_PVSYNC (1<<2)
51#define DRM_MODE_FLAG_NVSYNC (1<<3)
52#define DRM_MODE_FLAG_INTERLACE (1<<4)
53#define DRM_MODE_FLAG_DBLSCAN (1<<5)
54#define DRM_MODE_FLAG_CSYNC (1<<6)
55#define DRM_MODE_FLAG_PCSYNC (1<<7)
56#define DRM_MODE_FLAG_NCSYNC (1<<8)
57#define DRM_MODE_FLAG_HSKEW (1<<9) /* hskew provided */
58#define DRM_MODE_FLAG_BCAST (1<<10)
59#define DRM_MODE_FLAG_PIXMUX (1<<11)
60#define DRM_MODE_FLAG_DBLCLK (1<<12)
61#define DRM_MODE_FLAG_CLKDIV2 (1<<13)
62
63/* DPMS flags */
64/* bit compatible with the xorg definitions. */
65#define DRM_MODE_DPMS_ON 0
66#define DRM_MODE_DPMS_STANDBY 1
67#define DRM_MODE_DPMS_SUSPEND 2
68#define DRM_MODE_DPMS_OFF 3
69
70/* Scaling mode options */
71#define DRM_MODE_SCALE_NONE 0 /* Unmodified timing (display or
72 software can still scale) */
73#define DRM_MODE_SCALE_FULLSCREEN 1 /* Full screen, ignore aspect */
74#define DRM_MODE_SCALE_CENTER 2 /* Centered, no scaling */
75#define DRM_MODE_SCALE_ASPECT 3 /* Full screen, preserve aspect */
76
77/* Dithering mode options */
78#define DRM_MODE_DITHERING_OFF 0
79#define DRM_MODE_DITHERING_ON 1
80
81struct drm_mode_modeinfo {
82 __u32 clock;
83 __u16 hdisplay, hsync_start, hsync_end, htotal, hskew;
84 __u16 vdisplay, vsync_start, vsync_end, vtotal, vscan;
85
86 __u32 vrefresh; /* vertical refresh * 1000 */
87
88 __u32 flags;
89 __u32 type;
90 char name[DRM_DISPLAY_MODE_LEN];
91};
92
93struct drm_mode_card_res {
94 __u64 fb_id_ptr;
95 __u64 crtc_id_ptr;
96 __u64 connector_id_ptr;
97 __u64 encoder_id_ptr;
98 __u32 count_fbs;
99 __u32 count_crtcs;
100 __u32 count_connectors;
101 __u32 count_encoders;
102 __u32 min_width, max_width;
103 __u32 min_height, max_height;
104};
105
106struct drm_mode_crtc {
107 __u64 set_connectors_ptr;
108 __u32 count_connectors;
109
110 __u32 crtc_id; /**< Id */
111 __u32 fb_id; /**< Id of framebuffer */
112
113 __u32 x, y; /**< Position on the frameuffer */
114
115 __u32 gamma_size;
116 __u32 mode_valid;
117 struct drm_mode_modeinfo mode;
118};
119
120#define DRM_MODE_ENCODER_NONE 0
121#define DRM_MODE_ENCODER_DAC 1
122#define DRM_MODE_ENCODER_TMDS 2
123#define DRM_MODE_ENCODER_LVDS 3
124#define DRM_MODE_ENCODER_TVDAC 4
125
126struct drm_mode_get_encoder {
127 __u32 encoder_id;
128 __u32 encoder_type;
129
130 __u32 crtc_id; /**< Id of crtc */
131
132 __u32 possible_crtcs;
133 __u32 possible_clones;
134};
135
136/* This is for connectors with multiple signal types. */
137/* Try to match DRM_MODE_CONNECTOR_X as closely as possible. */
138#define DRM_MODE_SUBCONNECTOR_Automatic 0
139#define DRM_MODE_SUBCONNECTOR_Unknown 0
140#define DRM_MODE_SUBCONNECTOR_DVID 3
141#define DRM_MODE_SUBCONNECTOR_DVIA 4
142#define DRM_MODE_SUBCONNECTOR_Composite 5
143#define DRM_MODE_SUBCONNECTOR_SVIDEO 6
144#define DRM_MODE_SUBCONNECTOR_Component 8
145#define DRM_MODE_SUBCONNECTOR_SCART 9
146
147#define DRM_MODE_CONNECTOR_Unknown 0
148#define DRM_MODE_CONNECTOR_VGA 1
149#define DRM_MODE_CONNECTOR_DVII 2
150#define DRM_MODE_CONNECTOR_DVID 3
151#define DRM_MODE_CONNECTOR_DVIA 4
152#define DRM_MODE_CONNECTOR_Composite 5
153#define DRM_MODE_CONNECTOR_SVIDEO 6
154#define DRM_MODE_CONNECTOR_LVDS 7
155#define DRM_MODE_CONNECTOR_Component 8
156#define DRM_MODE_CONNECTOR_9PinDIN 9
157#define DRM_MODE_CONNECTOR_DisplayPort 10
158#define DRM_MODE_CONNECTOR_HDMIA 11
159#define DRM_MODE_CONNECTOR_HDMIB 12
160#define DRM_MODE_CONNECTOR_TV 13
161
162struct drm_mode_get_connector {
163
164 __u64 encoders_ptr;
165 __u64 modes_ptr;
166 __u64 props_ptr;
167 __u64 prop_values_ptr;
168
169 __u32 count_modes;
170 __u32 count_props;
171 __u32 count_encoders;
172
173 __u32 encoder_id; /**< Current Encoder */
174 __u32 connector_id; /**< Id */
175 __u32 connector_type;
176 __u32 connector_type_id;
177
178 __u32 connection;
179 __u32 mm_width, mm_height; /**< HxW in millimeters */
180 __u32 subpixel;
181};
182
183#define DRM_MODE_PROP_PENDING (1<<0)
184#define DRM_MODE_PROP_RANGE (1<<1)
185#define DRM_MODE_PROP_IMMUTABLE (1<<2)
186#define DRM_MODE_PROP_ENUM (1<<3) /* enumerated type with text strings */
187#define DRM_MODE_PROP_BLOB (1<<4)
188
189struct drm_mode_property_enum {
190 __u64 value;
191 char name[DRM_PROP_NAME_LEN];
192};
193
194struct drm_mode_get_property {
195 __u64 values_ptr; /* values and blob lengths */
196 __u64 enum_blob_ptr; /* enum and blob id ptrs */
197
198 __u32 prop_id;
199 __u32 flags;
200 char name[DRM_PROP_NAME_LEN];
201
202 __u32 count_values;
203 __u32 count_enum_blobs;
204};
205
206struct drm_mode_connector_set_property {
207 __u64 value;
208 __u32 prop_id;
209 __u32 connector_id;
210};
211
212struct drm_mode_get_blob {
213 __u32 blob_id;
214 __u32 length;
215 __u64 data;
216};
217
218struct drm_mode_fb_cmd {
219 __u32 fb_id;
220 __u32 width, height;
221 __u32 pitch;
222 __u32 bpp;
223 __u32 depth;
224 /* driver specific handle */
225 __u32 handle;
226};
227
228struct drm_mode_mode_cmd {
229 __u32 connector_id;
230 struct drm_mode_modeinfo mode;
231};
232
233#define DRM_MODE_CURSOR_BO (1<<0)
234#define DRM_MODE_CURSOR_MOVE (1<<1)
235
236/*
237 * depending on the value in flags diffrent members are used.
238 *
239 * CURSOR_BO uses
240 * crtc
241 * width
242 * height
243 * handle - if 0 turns the cursor of
244 *
245 * CURSOR_MOVE uses
246 * crtc
247 * x
248 * y
249 */
250struct drm_mode_cursor {
251 __u32 flags;
252 __u32 crtc_id;
253 __s32 x;
254 __s32 y;
255 __u32 width;
256 __u32 height;
257 /* driver specific handle */
258 __u32 handle;
259};
260
261struct drm_mode_crtc_lut {
262 __u32 crtc_id;
263 __u32 gamma_size;
264
265 /* pointers to arrays */
266 __u64 red;
267 __u64 green;
268 __u64 blue;
269};
270
271#endif