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1/* 2 * linux/drivers/mtd/onenand/onenand_base.c 3 * 4 * Copyright (C) 2005-2007 Samsung Electronics 5 * Kyungmin Park <kyungmin.park@samsung.com> 6 * 7 * Credits: 8 * Adrian Hunter <ext-adrian.hunter@nokia.com>: 9 * auto-placement support, read-while load support, various fixes 10 * Copyright (C) Nokia Corporation, 2007 11 * 12 * Vishak G <vishak.g at samsung.com>, Rohit Hagargundgi <h.rohit at samsung.com> 13 * Flex-OneNAND support 14 * Copyright (C) Samsung Electronics, 2008 15 * 16 * This program is free software; you can redistribute it and/or modify 17 * it under the terms of the GNU General Public License version 2 as 18 * published by the Free Software Foundation. 19 */ 20 21#include <linux/kernel.h> 22#include <linux/module.h> 23#include <linux/moduleparam.h> 24#include <linux/init.h> 25#include <linux/sched.h> 26#include <linux/delay.h> 27#include <linux/interrupt.h> 28#include <linux/jiffies.h> 29#include <linux/mtd/mtd.h> 30#include <linux/mtd/onenand.h> 31#include <linux/mtd/partitions.h> 32 33#include <asm/io.h> 34 35/* Default Flex-OneNAND boundary and lock respectively */ 36static int flex_bdry[MAX_DIES * 2] = { -1, 0, -1, 0 }; 37 38module_param_array(flex_bdry, int, NULL, 0400); 39MODULE_PARM_DESC(flex_bdry, "SLC Boundary information for Flex-OneNAND" 40 "Syntax:flex_bdry=DIE_BDRY,LOCK,..." 41 "DIE_BDRY: SLC boundary of the die" 42 "LOCK: Locking information for SLC boundary" 43 " : 0->Set boundary in unlocked status" 44 " : 1->Set boundary in locked status"); 45 46/** 47 * onenand_oob_128 - oob info for Flex-Onenand with 4KB page 48 * For now, we expose only 64 out of 80 ecc bytes 49 */ 50static struct nand_ecclayout onenand_oob_128 = { 51 .eccbytes = 64, 52 .eccpos = { 53 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 54 22, 23, 24, 25, 26, 27, 28, 29, 30, 31, 55 38, 39, 40, 41, 42, 43, 44, 45, 46, 47, 56 54, 55, 56, 57, 58, 59, 60, 61, 62, 63, 57 70, 71, 72, 73, 74, 75, 76, 77, 78, 79, 58 86, 87, 88, 89, 90, 91, 92, 93, 94, 95, 59 102, 103, 104, 105 60 }, 61 .oobfree = { 62 {2, 4}, {18, 4}, {34, 4}, {50, 4}, 63 {66, 4}, {82, 4}, {98, 4}, {114, 4} 64 } 65}; 66 67/** 68 * onenand_oob_64 - oob info for large (2KB) page 69 */ 70static struct nand_ecclayout onenand_oob_64 = { 71 .eccbytes = 20, 72 .eccpos = { 73 8, 9, 10, 11, 12, 74 24, 25, 26, 27, 28, 75 40, 41, 42, 43, 44, 76 56, 57, 58, 59, 60, 77 }, 78 .oobfree = { 79 {2, 3}, {14, 2}, {18, 3}, {30, 2}, 80 {34, 3}, {46, 2}, {50, 3}, {62, 2} 81 } 82}; 83 84/** 85 * onenand_oob_32 - oob info for middle (1KB) page 86 */ 87static struct nand_ecclayout onenand_oob_32 = { 88 .eccbytes = 10, 89 .eccpos = { 90 8, 9, 10, 11, 12, 91 24, 25, 26, 27, 28, 92 }, 93 .oobfree = { {2, 3}, {14, 2}, {18, 3}, {30, 2} } 94}; 95 96static const unsigned char ffchars[] = { 97 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 98 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, /* 16 */ 99 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 100 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, /* 32 */ 101 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 102 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, /* 48 */ 103 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 104 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, /* 64 */ 105 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 106 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, /* 80 */ 107 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 108 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, /* 96 */ 109 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 110 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, /* 112 */ 111 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 112 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, /* 128 */ 113}; 114 115/** 116 * onenand_readw - [OneNAND Interface] Read OneNAND register 117 * @param addr address to read 118 * 119 * Read OneNAND register 120 */ 121static unsigned short onenand_readw(void __iomem *addr) 122{ 123 return readw(addr); 124} 125 126/** 127 * onenand_writew - [OneNAND Interface] Write OneNAND register with value 128 * @param value value to write 129 * @param addr address to write 130 * 131 * Write OneNAND register with value 132 */ 133static void onenand_writew(unsigned short value, void __iomem *addr) 134{ 135 writew(value, addr); 136} 137 138/** 139 * onenand_block_address - [DEFAULT] Get block address 140 * @param this onenand chip data structure 141 * @param block the block 142 * @return translated block address if DDP, otherwise same 143 * 144 * Setup Start Address 1 Register (F100h) 145 */ 146static int onenand_block_address(struct onenand_chip *this, int block) 147{ 148 /* Device Flash Core select, NAND Flash Block Address */ 149 if (block & this->density_mask) 150 return ONENAND_DDP_CHIP1 | (block ^ this->density_mask); 151 152 return block; 153} 154 155/** 156 * onenand_bufferram_address - [DEFAULT] Get bufferram address 157 * @param this onenand chip data structure 158 * @param block the block 159 * @return set DBS value if DDP, otherwise 0 160 * 161 * Setup Start Address 2 Register (F101h) for DDP 162 */ 163static int onenand_bufferram_address(struct onenand_chip *this, int block) 164{ 165 /* Device BufferRAM Select */ 166 if (block & this->density_mask) 167 return ONENAND_DDP_CHIP1; 168 169 return ONENAND_DDP_CHIP0; 170} 171 172/** 173 * onenand_page_address - [DEFAULT] Get page address 174 * @param page the page address 175 * @param sector the sector address 176 * @return combined page and sector address 177 * 178 * Setup Start Address 8 Register (F107h) 179 */ 180static int onenand_page_address(int page, int sector) 181{ 182 /* Flash Page Address, Flash Sector Address */ 183 int fpa, fsa; 184 185 fpa = page & ONENAND_FPA_MASK; 186 fsa = sector & ONENAND_FSA_MASK; 187 188 return ((fpa << ONENAND_FPA_SHIFT) | fsa); 189} 190 191/** 192 * onenand_buffer_address - [DEFAULT] Get buffer address 193 * @param dataram1 DataRAM index 194 * @param sectors the sector address 195 * @param count the number of sectors 196 * @return the start buffer value 197 * 198 * Setup Start Buffer Register (F200h) 199 */ 200static int onenand_buffer_address(int dataram1, int sectors, int count) 201{ 202 int bsa, bsc; 203 204 /* BufferRAM Sector Address */ 205 bsa = sectors & ONENAND_BSA_MASK; 206 207 if (dataram1) 208 bsa |= ONENAND_BSA_DATARAM1; /* DataRAM1 */ 209 else 210 bsa |= ONENAND_BSA_DATARAM0; /* DataRAM0 */ 211 212 /* BufferRAM Sector Count */ 213 bsc = count & ONENAND_BSC_MASK; 214 215 return ((bsa << ONENAND_BSA_SHIFT) | bsc); 216} 217 218/** 219 * flexonenand_block- For given address return block number 220 * @param this - OneNAND device structure 221 * @param addr - Address for which block number is needed 222 */ 223static unsigned flexonenand_block(struct onenand_chip *this, loff_t addr) 224{ 225 unsigned boundary, blk, die = 0; 226 227 if (ONENAND_IS_DDP(this) && addr >= this->diesize[0]) { 228 die = 1; 229 addr -= this->diesize[0]; 230 } 231 232 boundary = this->boundary[die]; 233 234 blk = addr >> (this->erase_shift - 1); 235 if (blk > boundary) 236 blk = (blk + boundary + 1) >> 1; 237 238 blk += die ? this->density_mask : 0; 239 return blk; 240} 241 242inline unsigned onenand_block(struct onenand_chip *this, loff_t addr) 243{ 244 if (!FLEXONENAND(this)) 245 return addr >> this->erase_shift; 246 return flexonenand_block(this, addr); 247} 248 249/** 250 * flexonenand_addr - Return address of the block 251 * @this: OneNAND device structure 252 * @block: Block number on Flex-OneNAND 253 * 254 * Return address of the block 255 */ 256static loff_t flexonenand_addr(struct onenand_chip *this, int block) 257{ 258 loff_t ofs = 0; 259 int die = 0, boundary; 260 261 if (ONENAND_IS_DDP(this) && block >= this->density_mask) { 262 block -= this->density_mask; 263 die = 1; 264 ofs = this->diesize[0]; 265 } 266 267 boundary = this->boundary[die]; 268 ofs += (loff_t)block << (this->erase_shift - 1); 269 if (block > (boundary + 1)) 270 ofs += (loff_t)(block - boundary - 1) << (this->erase_shift - 1); 271 return ofs; 272} 273 274loff_t onenand_addr(struct onenand_chip *this, int block) 275{ 276 if (!FLEXONENAND(this)) 277 return (loff_t)block << this->erase_shift; 278 return flexonenand_addr(this, block); 279} 280EXPORT_SYMBOL(onenand_addr); 281 282/** 283 * onenand_get_density - [DEFAULT] Get OneNAND density 284 * @param dev_id OneNAND device ID 285 * 286 * Get OneNAND density from device ID 287 */ 288static inline int onenand_get_density(int dev_id) 289{ 290 int density = dev_id >> ONENAND_DEVICE_DENSITY_SHIFT; 291 return (density & ONENAND_DEVICE_DENSITY_MASK); 292} 293 294/** 295 * flexonenand_region - [Flex-OneNAND] Return erase region of addr 296 * @param mtd MTD device structure 297 * @param addr address whose erase region needs to be identified 298 */ 299int flexonenand_region(struct mtd_info *mtd, loff_t addr) 300{ 301 int i; 302 303 for (i = 0; i < mtd->numeraseregions; i++) 304 if (addr < mtd->eraseregions[i].offset) 305 break; 306 return i - 1; 307} 308EXPORT_SYMBOL(flexonenand_region); 309 310/** 311 * onenand_command - [DEFAULT] Send command to OneNAND device 312 * @param mtd MTD device structure 313 * @param cmd the command to be sent 314 * @param addr offset to read from or write to 315 * @param len number of bytes to read or write 316 * 317 * Send command to OneNAND device. This function is used for middle/large page 318 * devices (1KB/2KB Bytes per page) 319 */ 320static int onenand_command(struct mtd_info *mtd, int cmd, loff_t addr, size_t len) 321{ 322 struct onenand_chip *this = mtd->priv; 323 int value, block, page; 324 325 /* Address translation */ 326 switch (cmd) { 327 case ONENAND_CMD_UNLOCK: 328 case ONENAND_CMD_LOCK: 329 case ONENAND_CMD_LOCK_TIGHT: 330 case ONENAND_CMD_UNLOCK_ALL: 331 block = -1; 332 page = -1; 333 break; 334 335 case FLEXONENAND_CMD_PI_ACCESS: 336 /* addr contains die index */ 337 block = addr * this->density_mask; 338 page = -1; 339 break; 340 341 case ONENAND_CMD_ERASE: 342 case ONENAND_CMD_BUFFERRAM: 343 case ONENAND_CMD_OTP_ACCESS: 344 block = onenand_block(this, addr); 345 page = -1; 346 break; 347 348 case FLEXONENAND_CMD_READ_PI: 349 cmd = ONENAND_CMD_READ; 350 block = addr * this->density_mask; 351 page = 0; 352 break; 353 354 default: 355 block = onenand_block(this, addr); 356 page = (int) (addr - onenand_addr(this, block)) >> this->page_shift; 357 358 if (ONENAND_IS_2PLANE(this)) { 359 /* Make the even block number */ 360 block &= ~1; 361 /* Is it the odd plane? */ 362 if (addr & this->writesize) 363 block++; 364 page >>= 1; 365 } 366 page &= this->page_mask; 367 break; 368 } 369 370 /* NOTE: The setting order of the registers is very important! */ 371 if (cmd == ONENAND_CMD_BUFFERRAM) { 372 /* Select DataRAM for DDP */ 373 value = onenand_bufferram_address(this, block); 374 this->write_word(value, this->base + ONENAND_REG_START_ADDRESS2); 375 376 if (ONENAND_IS_MLC(this) || ONENAND_IS_2PLANE(this)) 377 /* It is always BufferRAM0 */ 378 ONENAND_SET_BUFFERRAM0(this); 379 else 380 /* Switch to the next data buffer */ 381 ONENAND_SET_NEXT_BUFFERRAM(this); 382 383 return 0; 384 } 385 386 if (block != -1) { 387 /* Write 'DFS, FBA' of Flash */ 388 value = onenand_block_address(this, block); 389 this->write_word(value, this->base + ONENAND_REG_START_ADDRESS1); 390 391 /* Select DataRAM for DDP */ 392 value = onenand_bufferram_address(this, block); 393 this->write_word(value, this->base + ONENAND_REG_START_ADDRESS2); 394 } 395 396 if (page != -1) { 397 /* Now we use page size operation */ 398 int sectors = 0, count = 0; 399 int dataram; 400 401 switch (cmd) { 402 case FLEXONENAND_CMD_RECOVER_LSB: 403 case ONENAND_CMD_READ: 404 case ONENAND_CMD_READOOB: 405 if (ONENAND_IS_MLC(this)) 406 /* It is always BufferRAM0 */ 407 dataram = ONENAND_SET_BUFFERRAM0(this); 408 else 409 dataram = ONENAND_SET_NEXT_BUFFERRAM(this); 410 break; 411 412 default: 413 if (ONENAND_IS_2PLANE(this) && cmd == ONENAND_CMD_PROG) 414 cmd = ONENAND_CMD_2X_PROG; 415 dataram = ONENAND_CURRENT_BUFFERRAM(this); 416 break; 417 } 418 419 /* Write 'FPA, FSA' of Flash */ 420 value = onenand_page_address(page, sectors); 421 this->write_word(value, this->base + ONENAND_REG_START_ADDRESS8); 422 423 /* Write 'BSA, BSC' of DataRAM */ 424 value = onenand_buffer_address(dataram, sectors, count); 425 this->write_word(value, this->base + ONENAND_REG_START_BUFFER); 426 } 427 428 /* Interrupt clear */ 429 this->write_word(ONENAND_INT_CLEAR, this->base + ONENAND_REG_INTERRUPT); 430 431 /* Write command */ 432 this->write_word(cmd, this->base + ONENAND_REG_COMMAND); 433 434 return 0; 435} 436 437/** 438 * onenand_read_ecc - return ecc status 439 * @param this onenand chip structure 440 */ 441static inline int onenand_read_ecc(struct onenand_chip *this) 442{ 443 int ecc, i, result = 0; 444 445 if (!FLEXONENAND(this)) 446 return this->read_word(this->base + ONENAND_REG_ECC_STATUS); 447 448 for (i = 0; i < 4; i++) { 449 ecc = this->read_word(this->base + ONENAND_REG_ECC_STATUS + i); 450 if (likely(!ecc)) 451 continue; 452 if (ecc & FLEXONENAND_UNCORRECTABLE_ERROR) 453 return ONENAND_ECC_2BIT_ALL; 454 else 455 result = ONENAND_ECC_1BIT_ALL; 456 } 457 458 return result; 459} 460 461/** 462 * onenand_wait - [DEFAULT] wait until the command is done 463 * @param mtd MTD device structure 464 * @param state state to select the max. timeout value 465 * 466 * Wait for command done. This applies to all OneNAND command 467 * Read can take up to 30us, erase up to 2ms and program up to 350us 468 * according to general OneNAND specs 469 */ 470static int onenand_wait(struct mtd_info *mtd, int state) 471{ 472 struct onenand_chip * this = mtd->priv; 473 unsigned long timeout; 474 unsigned int flags = ONENAND_INT_MASTER; 475 unsigned int interrupt = 0; 476 unsigned int ctrl; 477 478 /* The 20 msec is enough */ 479 timeout = jiffies + msecs_to_jiffies(20); 480 while (time_before(jiffies, timeout)) { 481 interrupt = this->read_word(this->base + ONENAND_REG_INTERRUPT); 482 483 if (interrupt & flags) 484 break; 485 486 if (state != FL_READING) 487 cond_resched(); 488 } 489 /* To get correct interrupt status in timeout case */ 490 interrupt = this->read_word(this->base + ONENAND_REG_INTERRUPT); 491 492 ctrl = this->read_word(this->base + ONENAND_REG_CTRL_STATUS); 493 494 /* 495 * In the Spec. it checks the controller status first 496 * However if you get the correct information in case of 497 * power off recovery (POR) test, it should read ECC status first 498 */ 499 if (interrupt & ONENAND_INT_READ) { 500 int ecc = onenand_read_ecc(this); 501 if (ecc) { 502 if (ecc & ONENAND_ECC_2BIT_ALL) { 503 printk(KERN_ERR "onenand_wait: ECC error = 0x%04x\n", ecc); 504 mtd->ecc_stats.failed++; 505 return -EBADMSG; 506 } else if (ecc & ONENAND_ECC_1BIT_ALL) { 507 printk(KERN_DEBUG "onenand_wait: correctable ECC error = 0x%04x\n", ecc); 508 mtd->ecc_stats.corrected++; 509 } 510 } 511 } else if (state == FL_READING) { 512 printk(KERN_ERR "onenand_wait: read timeout! ctrl=0x%04x intr=0x%04x\n", ctrl, interrupt); 513 return -EIO; 514 } 515 516 /* If there's controller error, it's a real error */ 517 if (ctrl & ONENAND_CTRL_ERROR) { 518 printk(KERN_ERR "onenand_wait: controller error = 0x%04x\n", 519 ctrl); 520 if (ctrl & ONENAND_CTRL_LOCK) 521 printk(KERN_ERR "onenand_wait: it's locked error.\n"); 522 return -EIO; 523 } 524 525 return 0; 526} 527 528/* 529 * onenand_interrupt - [DEFAULT] onenand interrupt handler 530 * @param irq onenand interrupt number 531 * @param dev_id interrupt data 532 * 533 * complete the work 534 */ 535static irqreturn_t onenand_interrupt(int irq, void *data) 536{ 537 struct onenand_chip *this = data; 538 539 /* To handle shared interrupt */ 540 if (!this->complete.done) 541 complete(&this->complete); 542 543 return IRQ_HANDLED; 544} 545 546/* 547 * onenand_interrupt_wait - [DEFAULT] wait until the command is done 548 * @param mtd MTD device structure 549 * @param state state to select the max. timeout value 550 * 551 * Wait for command done. 552 */ 553static int onenand_interrupt_wait(struct mtd_info *mtd, int state) 554{ 555 struct onenand_chip *this = mtd->priv; 556 557 wait_for_completion(&this->complete); 558 559 return onenand_wait(mtd, state); 560} 561 562/* 563 * onenand_try_interrupt_wait - [DEFAULT] try interrupt wait 564 * @param mtd MTD device structure 565 * @param state state to select the max. timeout value 566 * 567 * Try interrupt based wait (It is used one-time) 568 */ 569static int onenand_try_interrupt_wait(struct mtd_info *mtd, int state) 570{ 571 struct onenand_chip *this = mtd->priv; 572 unsigned long remain, timeout; 573 574 /* We use interrupt wait first */ 575 this->wait = onenand_interrupt_wait; 576 577 timeout = msecs_to_jiffies(100); 578 remain = wait_for_completion_timeout(&this->complete, timeout); 579 if (!remain) { 580 printk(KERN_INFO "OneNAND: There's no interrupt. " 581 "We use the normal wait\n"); 582 583 /* Release the irq */ 584 free_irq(this->irq, this); 585 586 this->wait = onenand_wait; 587 } 588 589 return onenand_wait(mtd, state); 590} 591 592/* 593 * onenand_setup_wait - [OneNAND Interface] setup onenand wait method 594 * @param mtd MTD device structure 595 * 596 * There's two method to wait onenand work 597 * 1. polling - read interrupt status register 598 * 2. interrupt - use the kernel interrupt method 599 */ 600static void onenand_setup_wait(struct mtd_info *mtd) 601{ 602 struct onenand_chip *this = mtd->priv; 603 int syscfg; 604 605 init_completion(&this->complete); 606 607 if (this->irq <= 0) { 608 this->wait = onenand_wait; 609 return; 610 } 611 612 if (request_irq(this->irq, &onenand_interrupt, 613 IRQF_SHARED, "onenand", this)) { 614 /* If we can't get irq, use the normal wait */ 615 this->wait = onenand_wait; 616 return; 617 } 618 619 /* Enable interrupt */ 620 syscfg = this->read_word(this->base + ONENAND_REG_SYS_CFG1); 621 syscfg |= ONENAND_SYS_CFG1_IOBE; 622 this->write_word(syscfg, this->base + ONENAND_REG_SYS_CFG1); 623 624 this->wait = onenand_try_interrupt_wait; 625} 626 627/** 628 * onenand_bufferram_offset - [DEFAULT] BufferRAM offset 629 * @param mtd MTD data structure 630 * @param area BufferRAM area 631 * @return offset given area 632 * 633 * Return BufferRAM offset given area 634 */ 635static inline int onenand_bufferram_offset(struct mtd_info *mtd, int area) 636{ 637 struct onenand_chip *this = mtd->priv; 638 639 if (ONENAND_CURRENT_BUFFERRAM(this)) { 640 /* Note: the 'this->writesize' is a real page size */ 641 if (area == ONENAND_DATARAM) 642 return this->writesize; 643 if (area == ONENAND_SPARERAM) 644 return mtd->oobsize; 645 } 646 647 return 0; 648} 649 650/** 651 * onenand_read_bufferram - [OneNAND Interface] Read the bufferram area 652 * @param mtd MTD data structure 653 * @param area BufferRAM area 654 * @param buffer the databuffer to put/get data 655 * @param offset offset to read from or write to 656 * @param count number of bytes to read/write 657 * 658 * Read the BufferRAM area 659 */ 660static int onenand_read_bufferram(struct mtd_info *mtd, int area, 661 unsigned char *buffer, int offset, size_t count) 662{ 663 struct onenand_chip *this = mtd->priv; 664 void __iomem *bufferram; 665 666 bufferram = this->base + area; 667 668 bufferram += onenand_bufferram_offset(mtd, area); 669 670 if (ONENAND_CHECK_BYTE_ACCESS(count)) { 671 unsigned short word; 672 673 /* Align with word(16-bit) size */ 674 count--; 675 676 /* Read word and save byte */ 677 word = this->read_word(bufferram + offset + count); 678 buffer[count] = (word & 0xff); 679 } 680 681 memcpy(buffer, bufferram + offset, count); 682 683 return 0; 684} 685 686/** 687 * onenand_sync_read_bufferram - [OneNAND Interface] Read the bufferram area with Sync. Burst mode 688 * @param mtd MTD data structure 689 * @param area BufferRAM area 690 * @param buffer the databuffer to put/get data 691 * @param offset offset to read from or write to 692 * @param count number of bytes to read/write 693 * 694 * Read the BufferRAM area with Sync. Burst Mode 695 */ 696static int onenand_sync_read_bufferram(struct mtd_info *mtd, int area, 697 unsigned char *buffer, int offset, size_t count) 698{ 699 struct onenand_chip *this = mtd->priv; 700 void __iomem *bufferram; 701 702 bufferram = this->base + area; 703 704 bufferram += onenand_bufferram_offset(mtd, area); 705 706 this->mmcontrol(mtd, ONENAND_SYS_CFG1_SYNC_READ); 707 708 if (ONENAND_CHECK_BYTE_ACCESS(count)) { 709 unsigned short word; 710 711 /* Align with word(16-bit) size */ 712 count--; 713 714 /* Read word and save byte */ 715 word = this->read_word(bufferram + offset + count); 716 buffer[count] = (word & 0xff); 717 } 718 719 memcpy(buffer, bufferram + offset, count); 720 721 this->mmcontrol(mtd, 0); 722 723 return 0; 724} 725 726/** 727 * onenand_write_bufferram - [OneNAND Interface] Write the bufferram area 728 * @param mtd MTD data structure 729 * @param area BufferRAM area 730 * @param buffer the databuffer to put/get data 731 * @param offset offset to read from or write to 732 * @param count number of bytes to read/write 733 * 734 * Write the BufferRAM area 735 */ 736static int onenand_write_bufferram(struct mtd_info *mtd, int area, 737 const unsigned char *buffer, int offset, size_t count) 738{ 739 struct onenand_chip *this = mtd->priv; 740 void __iomem *bufferram; 741 742 bufferram = this->base + area; 743 744 bufferram += onenand_bufferram_offset(mtd, area); 745 746 if (ONENAND_CHECK_BYTE_ACCESS(count)) { 747 unsigned short word; 748 int byte_offset; 749 750 /* Align with word(16-bit) size */ 751 count--; 752 753 /* Calculate byte access offset */ 754 byte_offset = offset + count; 755 756 /* Read word and save byte */ 757 word = this->read_word(bufferram + byte_offset); 758 word = (word & ~0xff) | buffer[count]; 759 this->write_word(word, bufferram + byte_offset); 760 } 761 762 memcpy(bufferram + offset, buffer, count); 763 764 return 0; 765} 766 767/** 768 * onenand_get_2x_blockpage - [GENERIC] Get blockpage at 2x program mode 769 * @param mtd MTD data structure 770 * @param addr address to check 771 * @return blockpage address 772 * 773 * Get blockpage address at 2x program mode 774 */ 775static int onenand_get_2x_blockpage(struct mtd_info *mtd, loff_t addr) 776{ 777 struct onenand_chip *this = mtd->priv; 778 int blockpage, block, page; 779 780 /* Calculate the even block number */ 781 block = (int) (addr >> this->erase_shift) & ~1; 782 /* Is it the odd plane? */ 783 if (addr & this->writesize) 784 block++; 785 page = (int) (addr >> (this->page_shift + 1)) & this->page_mask; 786 blockpage = (block << 7) | page; 787 788 return blockpage; 789} 790 791/** 792 * onenand_check_bufferram - [GENERIC] Check BufferRAM information 793 * @param mtd MTD data structure 794 * @param addr address to check 795 * @return 1 if there are valid data, otherwise 0 796 * 797 * Check bufferram if there is data we required 798 */ 799static int onenand_check_bufferram(struct mtd_info *mtd, loff_t addr) 800{ 801 struct onenand_chip *this = mtd->priv; 802 int blockpage, found = 0; 803 unsigned int i; 804 805 if (ONENAND_IS_2PLANE(this)) 806 blockpage = onenand_get_2x_blockpage(mtd, addr); 807 else 808 blockpage = (int) (addr >> this->page_shift); 809 810 /* Is there valid data? */ 811 i = ONENAND_CURRENT_BUFFERRAM(this); 812 if (this->bufferram[i].blockpage == blockpage) 813 found = 1; 814 else { 815 /* Check another BufferRAM */ 816 i = ONENAND_NEXT_BUFFERRAM(this); 817 if (this->bufferram[i].blockpage == blockpage) { 818 ONENAND_SET_NEXT_BUFFERRAM(this); 819 found = 1; 820 } 821 } 822 823 if (found && ONENAND_IS_DDP(this)) { 824 /* Select DataRAM for DDP */ 825 int block = onenand_block(this, addr); 826 int value = onenand_bufferram_address(this, block); 827 this->write_word(value, this->base + ONENAND_REG_START_ADDRESS2); 828 } 829 830 return found; 831} 832 833/** 834 * onenand_update_bufferram - [GENERIC] Update BufferRAM information 835 * @param mtd MTD data structure 836 * @param addr address to update 837 * @param valid valid flag 838 * 839 * Update BufferRAM information 840 */ 841static void onenand_update_bufferram(struct mtd_info *mtd, loff_t addr, 842 int valid) 843{ 844 struct onenand_chip *this = mtd->priv; 845 int blockpage; 846 unsigned int i; 847 848 if (ONENAND_IS_2PLANE(this)) 849 blockpage = onenand_get_2x_blockpage(mtd, addr); 850 else 851 blockpage = (int) (addr >> this->page_shift); 852 853 /* Invalidate another BufferRAM */ 854 i = ONENAND_NEXT_BUFFERRAM(this); 855 if (this->bufferram[i].blockpage == blockpage) 856 this->bufferram[i].blockpage = -1; 857 858 /* Update BufferRAM */ 859 i = ONENAND_CURRENT_BUFFERRAM(this); 860 if (valid) 861 this->bufferram[i].blockpage = blockpage; 862 else 863 this->bufferram[i].blockpage = -1; 864} 865 866/** 867 * onenand_invalidate_bufferram - [GENERIC] Invalidate BufferRAM information 868 * @param mtd MTD data structure 869 * @param addr start address to invalidate 870 * @param len length to invalidate 871 * 872 * Invalidate BufferRAM information 873 */ 874static void onenand_invalidate_bufferram(struct mtd_info *mtd, loff_t addr, 875 unsigned int len) 876{ 877 struct onenand_chip *this = mtd->priv; 878 int i; 879 loff_t end_addr = addr + len; 880 881 /* Invalidate BufferRAM */ 882 for (i = 0; i < MAX_BUFFERRAM; i++) { 883 loff_t buf_addr = this->bufferram[i].blockpage << this->page_shift; 884 if (buf_addr >= addr && buf_addr < end_addr) 885 this->bufferram[i].blockpage = -1; 886 } 887} 888 889/** 890 * onenand_get_device - [GENERIC] Get chip for selected access 891 * @param mtd MTD device structure 892 * @param new_state the state which is requested 893 * 894 * Get the device and lock it for exclusive access 895 */ 896static int onenand_get_device(struct mtd_info *mtd, int new_state) 897{ 898 struct onenand_chip *this = mtd->priv; 899 DECLARE_WAITQUEUE(wait, current); 900 901 /* 902 * Grab the lock and see if the device is available 903 */ 904 while (1) { 905 spin_lock(&this->chip_lock); 906 if (this->state == FL_READY) { 907 this->state = new_state; 908 spin_unlock(&this->chip_lock); 909 break; 910 } 911 if (new_state == FL_PM_SUSPENDED) { 912 spin_unlock(&this->chip_lock); 913 return (this->state == FL_PM_SUSPENDED) ? 0 : -EAGAIN; 914 } 915 set_current_state(TASK_UNINTERRUPTIBLE); 916 add_wait_queue(&this->wq, &wait); 917 spin_unlock(&this->chip_lock); 918 schedule(); 919 remove_wait_queue(&this->wq, &wait); 920 } 921 922 return 0; 923} 924 925/** 926 * onenand_release_device - [GENERIC] release chip 927 * @param mtd MTD device structure 928 * 929 * Deselect, release chip lock and wake up anyone waiting on the device 930 */ 931static void onenand_release_device(struct mtd_info *mtd) 932{ 933 struct onenand_chip *this = mtd->priv; 934 935 /* Release the chip */ 936 spin_lock(&this->chip_lock); 937 this->state = FL_READY; 938 wake_up(&this->wq); 939 spin_unlock(&this->chip_lock); 940} 941 942/** 943 * onenand_transfer_auto_oob - [Internal] oob auto-placement transfer 944 * @param mtd MTD device structure 945 * @param buf destination address 946 * @param column oob offset to read from 947 * @param thislen oob length to read 948 */ 949static int onenand_transfer_auto_oob(struct mtd_info *mtd, uint8_t *buf, int column, 950 int thislen) 951{ 952 struct onenand_chip *this = mtd->priv; 953 struct nand_oobfree *free; 954 int readcol = column; 955 int readend = column + thislen; 956 int lastgap = 0; 957 unsigned int i; 958 uint8_t *oob_buf = this->oob_buf; 959 960 free = this->ecclayout->oobfree; 961 for (i = 0; i < MTD_MAX_OOBFREE_ENTRIES && free->length; i++, free++) { 962 if (readcol >= lastgap) 963 readcol += free->offset - lastgap; 964 if (readend >= lastgap) 965 readend += free->offset - lastgap; 966 lastgap = free->offset + free->length; 967 } 968 this->read_bufferram(mtd, ONENAND_SPARERAM, oob_buf, 0, mtd->oobsize); 969 free = this->ecclayout->oobfree; 970 for (i = 0; i < MTD_MAX_OOBFREE_ENTRIES && free->length; i++, free++) { 971 int free_end = free->offset + free->length; 972 if (free->offset < readend && free_end > readcol) { 973 int st = max_t(int,free->offset,readcol); 974 int ed = min_t(int,free_end,readend); 975 int n = ed - st; 976 memcpy(buf, oob_buf + st, n); 977 buf += n; 978 } else if (column == 0) 979 break; 980 } 981 return 0; 982} 983 984/** 985 * onenand_recover_lsb - [Flex-OneNAND] Recover LSB page data 986 * @param mtd MTD device structure 987 * @param addr address to recover 988 * @param status return value from onenand_wait / onenand_bbt_wait 989 * 990 * MLC NAND Flash cell has paired pages - LSB page and MSB page. LSB page has 991 * lower page address and MSB page has higher page address in paired pages. 992 * If power off occurs during MSB page program, the paired LSB page data can 993 * become corrupt. LSB page recovery read is a way to read LSB page though page 994 * data are corrupted. When uncorrectable error occurs as a result of LSB page 995 * read after power up, issue LSB page recovery read. 996 */ 997static int onenand_recover_lsb(struct mtd_info *mtd, loff_t addr, int status) 998{ 999 struct onenand_chip *this = mtd->priv; 1000 int i; 1001 1002 /* Recovery is only for Flex-OneNAND */ 1003 if (!FLEXONENAND(this)) 1004 return status; 1005 1006 /* check if we failed due to uncorrectable error */ 1007 if (status != -EBADMSG && status != ONENAND_BBT_READ_ECC_ERROR) 1008 return status; 1009 1010 /* check if address lies in MLC region */ 1011 i = flexonenand_region(mtd, addr); 1012 if (mtd->eraseregions[i].erasesize < (1 << this->erase_shift)) 1013 return status; 1014 1015 /* We are attempting to reread, so decrement stats.failed 1016 * which was incremented by onenand_wait due to read failure 1017 */ 1018 printk(KERN_INFO "onenand_recover_lsb: Attempting to recover from uncorrectable read\n"); 1019 mtd->ecc_stats.failed--; 1020 1021 /* Issue the LSB page recovery command */ 1022 this->command(mtd, FLEXONENAND_CMD_RECOVER_LSB, addr, this->writesize); 1023 return this->wait(mtd, FL_READING); 1024} 1025 1026/** 1027 * onenand_mlc_read_ops_nolock - MLC OneNAND read main and/or out-of-band 1028 * @param mtd MTD device structure 1029 * @param from offset to read from 1030 * @param ops: oob operation description structure 1031 * 1032 * MLC OneNAND / Flex-OneNAND has 4KB page size and 4KB dataram. 1033 * So, read-while-load is not present. 1034 */ 1035static int onenand_mlc_read_ops_nolock(struct mtd_info *mtd, loff_t from, 1036 struct mtd_oob_ops *ops) 1037{ 1038 struct onenand_chip *this = mtd->priv; 1039 struct mtd_ecc_stats stats; 1040 size_t len = ops->len; 1041 size_t ooblen = ops->ooblen; 1042 u_char *buf = ops->datbuf; 1043 u_char *oobbuf = ops->oobbuf; 1044 int read = 0, column, thislen; 1045 int oobread = 0, oobcolumn, thisooblen, oobsize; 1046 int ret = 0; 1047 int writesize = this->writesize; 1048 1049 DEBUG(MTD_DEBUG_LEVEL3, "onenand_mlc_read_ops_nolock: from = 0x%08x, len = %i\n", (unsigned int) from, (int) len); 1050 1051 if (ops->mode == MTD_OOB_AUTO) 1052 oobsize = this->ecclayout->oobavail; 1053 else 1054 oobsize = mtd->oobsize; 1055 1056 oobcolumn = from & (mtd->oobsize - 1); 1057 1058 /* Do not allow reads past end of device */ 1059 if (from + len > mtd->size) { 1060 printk(KERN_ERR "onenand_mlc_read_ops_nolock: Attempt read beyond end of device\n"); 1061 ops->retlen = 0; 1062 ops->oobretlen = 0; 1063 return -EINVAL; 1064 } 1065 1066 stats = mtd->ecc_stats; 1067 1068 while (read < len) { 1069 cond_resched(); 1070 1071 thislen = min_t(int, writesize, len - read); 1072 1073 column = from & (writesize - 1); 1074 if (column + thislen > writesize) 1075 thislen = writesize - column; 1076 1077 if (!onenand_check_bufferram(mtd, from)) { 1078 this->command(mtd, ONENAND_CMD_READ, from, writesize); 1079 1080 ret = this->wait(mtd, FL_READING); 1081 if (unlikely(ret)) 1082 ret = onenand_recover_lsb(mtd, from, ret); 1083 onenand_update_bufferram(mtd, from, !ret); 1084 if (ret == -EBADMSG) 1085 ret = 0; 1086 } 1087 1088 this->read_bufferram(mtd, ONENAND_DATARAM, buf, column, thislen); 1089 if (oobbuf) { 1090 thisooblen = oobsize - oobcolumn; 1091 thisooblen = min_t(int, thisooblen, ooblen - oobread); 1092 1093 if (ops->mode == MTD_OOB_AUTO) 1094 onenand_transfer_auto_oob(mtd, oobbuf, oobcolumn, thisooblen); 1095 else 1096 this->read_bufferram(mtd, ONENAND_SPARERAM, oobbuf, oobcolumn, thisooblen); 1097 oobread += thisooblen; 1098 oobbuf += thisooblen; 1099 oobcolumn = 0; 1100 } 1101 1102 read += thislen; 1103 if (read == len) 1104 break; 1105 1106 from += thislen; 1107 buf += thislen; 1108 } 1109 1110 /* 1111 * Return success, if no ECC failures, else -EBADMSG 1112 * fs driver will take care of that, because 1113 * retlen == desired len and result == -EBADMSG 1114 */ 1115 ops->retlen = read; 1116 ops->oobretlen = oobread; 1117 1118 if (ret) 1119 return ret; 1120 1121 if (mtd->ecc_stats.failed - stats.failed) 1122 return -EBADMSG; 1123 1124 return mtd->ecc_stats.corrected - stats.corrected ? -EUCLEAN : 0; 1125} 1126 1127/** 1128 * onenand_read_ops_nolock - [OneNAND Interface] OneNAND read main and/or out-of-band 1129 * @param mtd MTD device structure 1130 * @param from offset to read from 1131 * @param ops: oob operation description structure 1132 * 1133 * OneNAND read main and/or out-of-band data 1134 */ 1135static int onenand_read_ops_nolock(struct mtd_info *mtd, loff_t from, 1136 struct mtd_oob_ops *ops) 1137{ 1138 struct onenand_chip *this = mtd->priv; 1139 struct mtd_ecc_stats stats; 1140 size_t len = ops->len; 1141 size_t ooblen = ops->ooblen; 1142 u_char *buf = ops->datbuf; 1143 u_char *oobbuf = ops->oobbuf; 1144 int read = 0, column, thislen; 1145 int oobread = 0, oobcolumn, thisooblen, oobsize; 1146 int ret = 0, boundary = 0; 1147 int writesize = this->writesize; 1148 1149 DEBUG(MTD_DEBUG_LEVEL3, "onenand_read_ops_nolock: from = 0x%08x, len = %i\n", (unsigned int) from, (int) len); 1150 1151 if (ops->mode == MTD_OOB_AUTO) 1152 oobsize = this->ecclayout->oobavail; 1153 else 1154 oobsize = mtd->oobsize; 1155 1156 oobcolumn = from & (mtd->oobsize - 1); 1157 1158 /* Do not allow reads past end of device */ 1159 if ((from + len) > mtd->size) { 1160 printk(KERN_ERR "onenand_read_ops_nolock: Attempt read beyond end of device\n"); 1161 ops->retlen = 0; 1162 ops->oobretlen = 0; 1163 return -EINVAL; 1164 } 1165 1166 stats = mtd->ecc_stats; 1167 1168 /* Read-while-load method */ 1169 1170 /* Do first load to bufferRAM */ 1171 if (read < len) { 1172 if (!onenand_check_bufferram(mtd, from)) { 1173 this->command(mtd, ONENAND_CMD_READ, from, writesize); 1174 ret = this->wait(mtd, FL_READING); 1175 onenand_update_bufferram(mtd, from, !ret); 1176 if (ret == -EBADMSG) 1177 ret = 0; 1178 } 1179 } 1180 1181 thislen = min_t(int, writesize, len - read); 1182 column = from & (writesize - 1); 1183 if (column + thislen > writesize) 1184 thislen = writesize - column; 1185 1186 while (!ret) { 1187 /* If there is more to load then start next load */ 1188 from += thislen; 1189 if (read + thislen < len) { 1190 this->command(mtd, ONENAND_CMD_READ, from, writesize); 1191 /* 1192 * Chip boundary handling in DDP 1193 * Now we issued chip 1 read and pointed chip 1 1194 * bufferram so we have to point chip 0 bufferram. 1195 */ 1196 if (ONENAND_IS_DDP(this) && 1197 unlikely(from == (this->chipsize >> 1))) { 1198 this->write_word(ONENAND_DDP_CHIP0, this->base + ONENAND_REG_START_ADDRESS2); 1199 boundary = 1; 1200 } else 1201 boundary = 0; 1202 ONENAND_SET_PREV_BUFFERRAM(this); 1203 } 1204 /* While load is going, read from last bufferRAM */ 1205 this->read_bufferram(mtd, ONENAND_DATARAM, buf, column, thislen); 1206 1207 /* Read oob area if needed */ 1208 if (oobbuf) { 1209 thisooblen = oobsize - oobcolumn; 1210 thisooblen = min_t(int, thisooblen, ooblen - oobread); 1211 1212 if (ops->mode == MTD_OOB_AUTO) 1213 onenand_transfer_auto_oob(mtd, oobbuf, oobcolumn, thisooblen); 1214 else 1215 this->read_bufferram(mtd, ONENAND_SPARERAM, oobbuf, oobcolumn, thisooblen); 1216 oobread += thisooblen; 1217 oobbuf += thisooblen; 1218 oobcolumn = 0; 1219 } 1220 1221 /* See if we are done */ 1222 read += thislen; 1223 if (read == len) 1224 break; 1225 /* Set up for next read from bufferRAM */ 1226 if (unlikely(boundary)) 1227 this->write_word(ONENAND_DDP_CHIP1, this->base + ONENAND_REG_START_ADDRESS2); 1228 ONENAND_SET_NEXT_BUFFERRAM(this); 1229 buf += thislen; 1230 thislen = min_t(int, writesize, len - read); 1231 column = 0; 1232 cond_resched(); 1233 /* Now wait for load */ 1234 ret = this->wait(mtd, FL_READING); 1235 onenand_update_bufferram(mtd, from, !ret); 1236 if (ret == -EBADMSG) 1237 ret = 0; 1238 } 1239 1240 /* 1241 * Return success, if no ECC failures, else -EBADMSG 1242 * fs driver will take care of that, because 1243 * retlen == desired len and result == -EBADMSG 1244 */ 1245 ops->retlen = read; 1246 ops->oobretlen = oobread; 1247 1248 if (ret) 1249 return ret; 1250 1251 if (mtd->ecc_stats.failed - stats.failed) 1252 return -EBADMSG; 1253 1254 return mtd->ecc_stats.corrected - stats.corrected ? -EUCLEAN : 0; 1255} 1256 1257/** 1258 * onenand_read_oob_nolock - [MTD Interface] OneNAND read out-of-band 1259 * @param mtd MTD device structure 1260 * @param from offset to read from 1261 * @param ops: oob operation description structure 1262 * 1263 * OneNAND read out-of-band data from the spare area 1264 */ 1265static int onenand_read_oob_nolock(struct mtd_info *mtd, loff_t from, 1266 struct mtd_oob_ops *ops) 1267{ 1268 struct onenand_chip *this = mtd->priv; 1269 struct mtd_ecc_stats stats; 1270 int read = 0, thislen, column, oobsize; 1271 size_t len = ops->ooblen; 1272 mtd_oob_mode_t mode = ops->mode; 1273 u_char *buf = ops->oobbuf; 1274 int ret = 0, readcmd; 1275 1276 from += ops->ooboffs; 1277 1278 DEBUG(MTD_DEBUG_LEVEL3, "onenand_read_oob_nolock: from = 0x%08x, len = %i\n", (unsigned int) from, (int) len); 1279 1280 /* Initialize return length value */ 1281 ops->oobretlen = 0; 1282 1283 if (mode == MTD_OOB_AUTO) 1284 oobsize = this->ecclayout->oobavail; 1285 else 1286 oobsize = mtd->oobsize; 1287 1288 column = from & (mtd->oobsize - 1); 1289 1290 if (unlikely(column >= oobsize)) { 1291 printk(KERN_ERR "onenand_read_oob_nolock: Attempted to start read outside oob\n"); 1292 return -EINVAL; 1293 } 1294 1295 /* Do not allow reads past end of device */ 1296 if (unlikely(from >= mtd->size || 1297 column + len > ((mtd->size >> this->page_shift) - 1298 (from >> this->page_shift)) * oobsize)) { 1299 printk(KERN_ERR "onenand_read_oob_nolock: Attempted to read beyond end of device\n"); 1300 return -EINVAL; 1301 } 1302 1303 stats = mtd->ecc_stats; 1304 1305 readcmd = ONENAND_IS_MLC(this) ? ONENAND_CMD_READ : ONENAND_CMD_READOOB; 1306 1307 while (read < len) { 1308 cond_resched(); 1309 1310 thislen = oobsize - column; 1311 thislen = min_t(int, thislen, len); 1312 1313 this->command(mtd, readcmd, from, mtd->oobsize); 1314 1315 onenand_update_bufferram(mtd, from, 0); 1316 1317 ret = this->wait(mtd, FL_READING); 1318 if (unlikely(ret)) 1319 ret = onenand_recover_lsb(mtd, from, ret); 1320 1321 if (ret && ret != -EBADMSG) { 1322 printk(KERN_ERR "onenand_read_oob_nolock: read failed = 0x%x\n", ret); 1323 break; 1324 } 1325 1326 if (mode == MTD_OOB_AUTO) 1327 onenand_transfer_auto_oob(mtd, buf, column, thislen); 1328 else 1329 this->read_bufferram(mtd, ONENAND_SPARERAM, buf, column, thislen); 1330 1331 read += thislen; 1332 1333 if (read == len) 1334 break; 1335 1336 buf += thislen; 1337 1338 /* Read more? */ 1339 if (read < len) { 1340 /* Page size */ 1341 from += mtd->writesize; 1342 column = 0; 1343 } 1344 } 1345 1346 ops->oobretlen = read; 1347 1348 if (ret) 1349 return ret; 1350 1351 if (mtd->ecc_stats.failed - stats.failed) 1352 return -EBADMSG; 1353 1354 return 0; 1355} 1356 1357/** 1358 * onenand_read - [MTD Interface] Read data from flash 1359 * @param mtd MTD device structure 1360 * @param from offset to read from 1361 * @param len number of bytes to read 1362 * @param retlen pointer to variable to store the number of read bytes 1363 * @param buf the databuffer to put data 1364 * 1365 * Read with ecc 1366*/ 1367static int onenand_read(struct mtd_info *mtd, loff_t from, size_t len, 1368 size_t *retlen, u_char *buf) 1369{ 1370 struct onenand_chip *this = mtd->priv; 1371 struct mtd_oob_ops ops = { 1372 .len = len, 1373 .ooblen = 0, 1374 .datbuf = buf, 1375 .oobbuf = NULL, 1376 }; 1377 int ret; 1378 1379 onenand_get_device(mtd, FL_READING); 1380 ret = ONENAND_IS_MLC(this) ? 1381 onenand_mlc_read_ops_nolock(mtd, from, &ops) : 1382 onenand_read_ops_nolock(mtd, from, &ops); 1383 onenand_release_device(mtd); 1384 1385 *retlen = ops.retlen; 1386 return ret; 1387} 1388 1389/** 1390 * onenand_read_oob - [MTD Interface] Read main and/or out-of-band 1391 * @param mtd: MTD device structure 1392 * @param from: offset to read from 1393 * @param ops: oob operation description structure 1394 1395 * Read main and/or out-of-band 1396 */ 1397static int onenand_read_oob(struct mtd_info *mtd, loff_t from, 1398 struct mtd_oob_ops *ops) 1399{ 1400 struct onenand_chip *this = mtd->priv; 1401 int ret; 1402 1403 switch (ops->mode) { 1404 case MTD_OOB_PLACE: 1405 case MTD_OOB_AUTO: 1406 break; 1407 case MTD_OOB_RAW: 1408 /* Not implemented yet */ 1409 default: 1410 return -EINVAL; 1411 } 1412 1413 onenand_get_device(mtd, FL_READING); 1414 if (ops->datbuf) 1415 ret = ONENAND_IS_MLC(this) ? 1416 onenand_mlc_read_ops_nolock(mtd, from, ops) : 1417 onenand_read_ops_nolock(mtd, from, ops); 1418 else 1419 ret = onenand_read_oob_nolock(mtd, from, ops); 1420 onenand_release_device(mtd); 1421 1422 return ret; 1423} 1424 1425/** 1426 * onenand_bbt_wait - [DEFAULT] wait until the command is done 1427 * @param mtd MTD device structure 1428 * @param state state to select the max. timeout value 1429 * 1430 * Wait for command done. 1431 */ 1432static int onenand_bbt_wait(struct mtd_info *mtd, int state) 1433{ 1434 struct onenand_chip *this = mtd->priv; 1435 unsigned long timeout; 1436 unsigned int interrupt; 1437 unsigned int ctrl; 1438 1439 /* The 20 msec is enough */ 1440 timeout = jiffies + msecs_to_jiffies(20); 1441 while (time_before(jiffies, timeout)) { 1442 interrupt = this->read_word(this->base + ONENAND_REG_INTERRUPT); 1443 if (interrupt & ONENAND_INT_MASTER) 1444 break; 1445 } 1446 /* To get correct interrupt status in timeout case */ 1447 interrupt = this->read_word(this->base + ONENAND_REG_INTERRUPT); 1448 ctrl = this->read_word(this->base + ONENAND_REG_CTRL_STATUS); 1449 1450 if (interrupt & ONENAND_INT_READ) { 1451 int ecc = onenand_read_ecc(this); 1452 if (ecc & ONENAND_ECC_2BIT_ALL) { 1453 printk(KERN_INFO "onenand_bbt_wait: ecc error = 0x%04x" 1454 ", controller error 0x%04x\n", ecc, ctrl); 1455 return ONENAND_BBT_READ_ECC_ERROR; 1456 } 1457 } else { 1458 printk(KERN_ERR "onenand_bbt_wait: read timeout!" 1459 "ctrl=0x%04x intr=0x%04x\n", ctrl, interrupt); 1460 return ONENAND_BBT_READ_FATAL_ERROR; 1461 } 1462 1463 /* Initial bad block case: 0x2400 or 0x0400 */ 1464 if (ctrl & ONENAND_CTRL_ERROR) { 1465 printk(KERN_DEBUG "onenand_bbt_wait: " 1466 "controller error = 0x%04x\n", ctrl); 1467 return ONENAND_BBT_READ_ERROR; 1468 } 1469 1470 return 0; 1471} 1472 1473/** 1474 * onenand_bbt_read_oob - [MTD Interface] OneNAND read out-of-band for bbt scan 1475 * @param mtd MTD device structure 1476 * @param from offset to read from 1477 * @param ops oob operation description structure 1478 * 1479 * OneNAND read out-of-band data from the spare area for bbt scan 1480 */ 1481int onenand_bbt_read_oob(struct mtd_info *mtd, loff_t from, 1482 struct mtd_oob_ops *ops) 1483{ 1484 struct onenand_chip *this = mtd->priv; 1485 int read = 0, thislen, column; 1486 int ret = 0, readcmd; 1487 size_t len = ops->ooblen; 1488 u_char *buf = ops->oobbuf; 1489 1490 DEBUG(MTD_DEBUG_LEVEL3, "onenand_bbt_read_oob: from = 0x%08x, len = %zi\n", (unsigned int) from, len); 1491 1492 /* Initialize return value */ 1493 ops->oobretlen = 0; 1494 1495 /* Do not allow reads past end of device */ 1496 if (unlikely((from + len) > mtd->size)) { 1497 printk(KERN_ERR "onenand_bbt_read_oob: Attempt read beyond end of device\n"); 1498 return ONENAND_BBT_READ_FATAL_ERROR; 1499 } 1500 1501 /* Grab the lock and see if the device is available */ 1502 onenand_get_device(mtd, FL_READING); 1503 1504 column = from & (mtd->oobsize - 1); 1505 1506 readcmd = ONENAND_IS_MLC(this) ? ONENAND_CMD_READ : ONENAND_CMD_READOOB; 1507 1508 while (read < len) { 1509 cond_resched(); 1510 1511 thislen = mtd->oobsize - column; 1512 thislen = min_t(int, thislen, len); 1513 1514 this->command(mtd, readcmd, from, mtd->oobsize); 1515 1516 onenand_update_bufferram(mtd, from, 0); 1517 1518 ret = this->bbt_wait(mtd, FL_READING); 1519 if (unlikely(ret)) 1520 ret = onenand_recover_lsb(mtd, from, ret); 1521 1522 if (ret) 1523 break; 1524 1525 this->read_bufferram(mtd, ONENAND_SPARERAM, buf, column, thislen); 1526 read += thislen; 1527 if (read == len) 1528 break; 1529 1530 buf += thislen; 1531 1532 /* Read more? */ 1533 if (read < len) { 1534 /* Update Page size */ 1535 from += this->writesize; 1536 column = 0; 1537 } 1538 } 1539 1540 /* Deselect and wake up anyone waiting on the device */ 1541 onenand_release_device(mtd); 1542 1543 ops->oobretlen = read; 1544 return ret; 1545} 1546 1547#ifdef CONFIG_MTD_ONENAND_VERIFY_WRITE 1548/** 1549 * onenand_verify_oob - [GENERIC] verify the oob contents after a write 1550 * @param mtd MTD device structure 1551 * @param buf the databuffer to verify 1552 * @param to offset to read from 1553 */ 1554static int onenand_verify_oob(struct mtd_info *mtd, const u_char *buf, loff_t to) 1555{ 1556 struct onenand_chip *this = mtd->priv; 1557 u_char *oob_buf = this->oob_buf; 1558 int status, i, readcmd; 1559 1560 readcmd = ONENAND_IS_MLC(this) ? ONENAND_CMD_READ : ONENAND_CMD_READOOB; 1561 1562 this->command(mtd, readcmd, to, mtd->oobsize); 1563 onenand_update_bufferram(mtd, to, 0); 1564 status = this->wait(mtd, FL_READING); 1565 if (status) 1566 return status; 1567 1568 this->read_bufferram(mtd, ONENAND_SPARERAM, oob_buf, 0, mtd->oobsize); 1569 for (i = 0; i < mtd->oobsize; i++) 1570 if (buf[i] != 0xFF && buf[i] != oob_buf[i]) 1571 return -EBADMSG; 1572 1573 return 0; 1574} 1575 1576/** 1577 * onenand_verify - [GENERIC] verify the chip contents after a write 1578 * @param mtd MTD device structure 1579 * @param buf the databuffer to verify 1580 * @param addr offset to read from 1581 * @param len number of bytes to read and compare 1582 */ 1583static int onenand_verify(struct mtd_info *mtd, const u_char *buf, loff_t addr, size_t len) 1584{ 1585 struct onenand_chip *this = mtd->priv; 1586 void __iomem *dataram; 1587 int ret = 0; 1588 int thislen, column; 1589 1590 while (len != 0) { 1591 thislen = min_t(int, this->writesize, len); 1592 column = addr & (this->writesize - 1); 1593 if (column + thislen > this->writesize) 1594 thislen = this->writesize - column; 1595 1596 this->command(mtd, ONENAND_CMD_READ, addr, this->writesize); 1597 1598 onenand_update_bufferram(mtd, addr, 0); 1599 1600 ret = this->wait(mtd, FL_READING); 1601 if (ret) 1602 return ret; 1603 1604 onenand_update_bufferram(mtd, addr, 1); 1605 1606 dataram = this->base + ONENAND_DATARAM; 1607 dataram += onenand_bufferram_offset(mtd, ONENAND_DATARAM); 1608 1609 if (memcmp(buf, dataram + column, thislen)) 1610 return -EBADMSG; 1611 1612 len -= thislen; 1613 buf += thislen; 1614 addr += thislen; 1615 } 1616 1617 return 0; 1618} 1619#else 1620#define onenand_verify(...) (0) 1621#define onenand_verify_oob(...) (0) 1622#endif 1623 1624#define NOTALIGNED(x) ((x & (this->subpagesize - 1)) != 0) 1625 1626static void onenand_panic_wait(struct mtd_info *mtd) 1627{ 1628 struct onenand_chip *this = mtd->priv; 1629 unsigned int interrupt; 1630 int i; 1631 1632 for (i = 0; i < 2000; i++) { 1633 interrupt = this->read_word(this->base + ONENAND_REG_INTERRUPT); 1634 if (interrupt & ONENAND_INT_MASTER) 1635 break; 1636 udelay(10); 1637 } 1638} 1639 1640/** 1641 * onenand_panic_write - [MTD Interface] write buffer to FLASH in a panic context 1642 * @param mtd MTD device structure 1643 * @param to offset to write to 1644 * @param len number of bytes to write 1645 * @param retlen pointer to variable to store the number of written bytes 1646 * @param buf the data to write 1647 * 1648 * Write with ECC 1649 */ 1650static int onenand_panic_write(struct mtd_info *mtd, loff_t to, size_t len, 1651 size_t *retlen, const u_char *buf) 1652{ 1653 struct onenand_chip *this = mtd->priv; 1654 int column, subpage; 1655 int written = 0; 1656 int ret = 0; 1657 1658 if (this->state == FL_PM_SUSPENDED) 1659 return -EBUSY; 1660 1661 /* Wait for any existing operation to clear */ 1662 onenand_panic_wait(mtd); 1663 1664 DEBUG(MTD_DEBUG_LEVEL3, "onenand_panic_write: to = 0x%08x, len = %i\n", 1665 (unsigned int) to, (int) len); 1666 1667 /* Initialize retlen, in case of early exit */ 1668 *retlen = 0; 1669 1670 /* Do not allow writes past end of device */ 1671 if (unlikely((to + len) > mtd->size)) { 1672 printk(KERN_ERR "onenand_panic_write: Attempt write to past end of device\n"); 1673 return -EINVAL; 1674 } 1675 1676 /* Reject writes, which are not page aligned */ 1677 if (unlikely(NOTALIGNED(to) || NOTALIGNED(len))) { 1678 printk(KERN_ERR "onenand_panic_write: Attempt to write not page aligned data\n"); 1679 return -EINVAL; 1680 } 1681 1682 column = to & (mtd->writesize - 1); 1683 1684 /* Loop until all data write */ 1685 while (written < len) { 1686 int thislen = min_t(int, mtd->writesize - column, len - written); 1687 u_char *wbuf = (u_char *) buf; 1688 1689 this->command(mtd, ONENAND_CMD_BUFFERRAM, to, thislen); 1690 1691 /* Partial page write */ 1692 subpage = thislen < mtd->writesize; 1693 if (subpage) { 1694 memset(this->page_buf, 0xff, mtd->writesize); 1695 memcpy(this->page_buf + column, buf, thislen); 1696 wbuf = this->page_buf; 1697 } 1698 1699 this->write_bufferram(mtd, ONENAND_DATARAM, wbuf, 0, mtd->writesize); 1700 this->write_bufferram(mtd, ONENAND_SPARERAM, ffchars, 0, mtd->oobsize); 1701 1702 this->command(mtd, ONENAND_CMD_PROG, to, mtd->writesize); 1703 1704 onenand_panic_wait(mtd); 1705 1706 /* In partial page write we don't update bufferram */ 1707 onenand_update_bufferram(mtd, to, !ret && !subpage); 1708 if (ONENAND_IS_2PLANE(this)) { 1709 ONENAND_SET_BUFFERRAM1(this); 1710 onenand_update_bufferram(mtd, to + this->writesize, !ret && !subpage); 1711 } 1712 1713 if (ret) { 1714 printk(KERN_ERR "onenand_panic_write: write failed %d\n", ret); 1715 break; 1716 } 1717 1718 written += thislen; 1719 1720 if (written == len) 1721 break; 1722 1723 column = 0; 1724 to += thislen; 1725 buf += thislen; 1726 } 1727 1728 *retlen = written; 1729 return ret; 1730} 1731 1732/** 1733 * onenand_fill_auto_oob - [Internal] oob auto-placement transfer 1734 * @param mtd MTD device structure 1735 * @param oob_buf oob buffer 1736 * @param buf source address 1737 * @param column oob offset to write to 1738 * @param thislen oob length to write 1739 */ 1740static int onenand_fill_auto_oob(struct mtd_info *mtd, u_char *oob_buf, 1741 const u_char *buf, int column, int thislen) 1742{ 1743 struct onenand_chip *this = mtd->priv; 1744 struct nand_oobfree *free; 1745 int writecol = column; 1746 int writeend = column + thislen; 1747 int lastgap = 0; 1748 unsigned int i; 1749 1750 free = this->ecclayout->oobfree; 1751 for (i = 0; i < MTD_MAX_OOBFREE_ENTRIES && free->length; i++, free++) { 1752 if (writecol >= lastgap) 1753 writecol += free->offset - lastgap; 1754 if (writeend >= lastgap) 1755 writeend += free->offset - lastgap; 1756 lastgap = free->offset + free->length; 1757 } 1758 free = this->ecclayout->oobfree; 1759 for (i = 0; i < MTD_MAX_OOBFREE_ENTRIES && free->length; i++, free++) { 1760 int free_end = free->offset + free->length; 1761 if (free->offset < writeend && free_end > writecol) { 1762 int st = max_t(int,free->offset,writecol); 1763 int ed = min_t(int,free_end,writeend); 1764 int n = ed - st; 1765 memcpy(oob_buf + st, buf, n); 1766 buf += n; 1767 } else if (column == 0) 1768 break; 1769 } 1770 return 0; 1771} 1772 1773/** 1774 * onenand_write_ops_nolock - [OneNAND Interface] write main and/or out-of-band 1775 * @param mtd MTD device structure 1776 * @param to offset to write to 1777 * @param ops oob operation description structure 1778 * 1779 * Write main and/or oob with ECC 1780 */ 1781static int onenand_write_ops_nolock(struct mtd_info *mtd, loff_t to, 1782 struct mtd_oob_ops *ops) 1783{ 1784 struct onenand_chip *this = mtd->priv; 1785 int written = 0, column, thislen = 0, subpage = 0; 1786 int prev = 0, prevlen = 0, prev_subpage = 0, first = 1; 1787 int oobwritten = 0, oobcolumn, thisooblen, oobsize; 1788 size_t len = ops->len; 1789 size_t ooblen = ops->ooblen; 1790 const u_char *buf = ops->datbuf; 1791 const u_char *oob = ops->oobbuf; 1792 u_char *oobbuf; 1793 int ret = 0; 1794 1795 DEBUG(MTD_DEBUG_LEVEL3, "onenand_write_ops_nolock: to = 0x%08x, len = %i\n", (unsigned int) to, (int) len); 1796 1797 /* Initialize retlen, in case of early exit */ 1798 ops->retlen = 0; 1799 ops->oobretlen = 0; 1800 1801 /* Do not allow writes past end of device */ 1802 if (unlikely((to + len) > mtd->size)) { 1803 printk(KERN_ERR "onenand_write_ops_nolock: Attempt write to past end of device\n"); 1804 return -EINVAL; 1805 } 1806 1807 /* Reject writes, which are not page aligned */ 1808 if (unlikely(NOTALIGNED(to) || NOTALIGNED(len))) { 1809 printk(KERN_ERR "onenand_write_ops_nolock: Attempt to write not page aligned data\n"); 1810 return -EINVAL; 1811 } 1812 1813 /* Check zero length */ 1814 if (!len) 1815 return 0; 1816 1817 if (ops->mode == MTD_OOB_AUTO) 1818 oobsize = this->ecclayout->oobavail; 1819 else 1820 oobsize = mtd->oobsize; 1821 1822 oobcolumn = to & (mtd->oobsize - 1); 1823 1824 column = to & (mtd->writesize - 1); 1825 1826 /* Loop until all data write */ 1827 while (1) { 1828 if (written < len) { 1829 u_char *wbuf = (u_char *) buf; 1830 1831 thislen = min_t(int, mtd->writesize - column, len - written); 1832 thisooblen = min_t(int, oobsize - oobcolumn, ooblen - oobwritten); 1833 1834 cond_resched(); 1835 1836 this->command(mtd, ONENAND_CMD_BUFFERRAM, to, thislen); 1837 1838 /* Partial page write */ 1839 subpage = thislen < mtd->writesize; 1840 if (subpage) { 1841 memset(this->page_buf, 0xff, mtd->writesize); 1842 memcpy(this->page_buf + column, buf, thislen); 1843 wbuf = this->page_buf; 1844 } 1845 1846 this->write_bufferram(mtd, ONENAND_DATARAM, wbuf, 0, mtd->writesize); 1847 1848 if (oob) { 1849 oobbuf = this->oob_buf; 1850 1851 /* We send data to spare ram with oobsize 1852 * to prevent byte access */ 1853 memset(oobbuf, 0xff, mtd->oobsize); 1854 if (ops->mode == MTD_OOB_AUTO) 1855 onenand_fill_auto_oob(mtd, oobbuf, oob, oobcolumn, thisooblen); 1856 else 1857 memcpy(oobbuf + oobcolumn, oob, thisooblen); 1858 1859 oobwritten += thisooblen; 1860 oob += thisooblen; 1861 oobcolumn = 0; 1862 } else 1863 oobbuf = (u_char *) ffchars; 1864 1865 this->write_bufferram(mtd, ONENAND_SPARERAM, oobbuf, 0, mtd->oobsize); 1866 } else 1867 ONENAND_SET_NEXT_BUFFERRAM(this); 1868 1869 /* 1870 * 2 PLANE, MLC, and Flex-OneNAND do not support 1871 * write-while-program feature. 1872 */ 1873 if (!ONENAND_IS_2PLANE(this) && !first) { 1874 ONENAND_SET_PREV_BUFFERRAM(this); 1875 1876 ret = this->wait(mtd, FL_WRITING); 1877 1878 /* In partial page write we don't update bufferram */ 1879 onenand_update_bufferram(mtd, prev, !ret && !prev_subpage); 1880 if (ret) { 1881 written -= prevlen; 1882 printk(KERN_ERR "onenand_write_ops_nolock: write failed %d\n", ret); 1883 break; 1884 } 1885 1886 if (written == len) { 1887 /* Only check verify write turn on */ 1888 ret = onenand_verify(mtd, buf - len, to - len, len); 1889 if (ret) 1890 printk(KERN_ERR "onenand_write_ops_nolock: verify failed %d\n", ret); 1891 break; 1892 } 1893 1894 ONENAND_SET_NEXT_BUFFERRAM(this); 1895 } 1896 1897 this->command(mtd, ONENAND_CMD_PROG, to, mtd->writesize); 1898 1899 /* 1900 * 2 PLANE, MLC, and Flex-OneNAND wait here 1901 */ 1902 if (ONENAND_IS_2PLANE(this)) { 1903 ret = this->wait(mtd, FL_WRITING); 1904 1905 /* In partial page write we don't update bufferram */ 1906 onenand_update_bufferram(mtd, to, !ret && !subpage); 1907 if (ret) { 1908 printk(KERN_ERR "onenand_write_ops_nolock: write failed %d\n", ret); 1909 break; 1910 } 1911 1912 /* Only check verify write turn on */ 1913 ret = onenand_verify(mtd, buf, to, thislen); 1914 if (ret) { 1915 printk(KERN_ERR "onenand_write_ops_nolock: verify failed %d\n", ret); 1916 break; 1917 } 1918 1919 written += thislen; 1920 1921 if (written == len) 1922 break; 1923 1924 } else 1925 written += thislen; 1926 1927 column = 0; 1928 prev_subpage = subpage; 1929 prev = to; 1930 prevlen = thislen; 1931 to += thislen; 1932 buf += thislen; 1933 first = 0; 1934 } 1935 1936 /* In error case, clear all bufferrams */ 1937 if (written != len) 1938 onenand_invalidate_bufferram(mtd, 0, -1); 1939 1940 ops->retlen = written; 1941 ops->oobretlen = oobwritten; 1942 1943 return ret; 1944} 1945 1946 1947/** 1948 * onenand_write_oob_nolock - [Internal] OneNAND write out-of-band 1949 * @param mtd MTD device structure 1950 * @param to offset to write to 1951 * @param len number of bytes to write 1952 * @param retlen pointer to variable to store the number of written bytes 1953 * @param buf the data to write 1954 * @param mode operation mode 1955 * 1956 * OneNAND write out-of-band 1957 */ 1958static int onenand_write_oob_nolock(struct mtd_info *mtd, loff_t to, 1959 struct mtd_oob_ops *ops) 1960{ 1961 struct onenand_chip *this = mtd->priv; 1962 int column, ret = 0, oobsize; 1963 int written = 0, oobcmd; 1964 u_char *oobbuf; 1965 size_t len = ops->ooblen; 1966 const u_char *buf = ops->oobbuf; 1967 mtd_oob_mode_t mode = ops->mode; 1968 1969 to += ops->ooboffs; 1970 1971 DEBUG(MTD_DEBUG_LEVEL3, "onenand_write_oob_nolock: to = 0x%08x, len = %i\n", (unsigned int) to, (int) len); 1972 1973 /* Initialize retlen, in case of early exit */ 1974 ops->oobretlen = 0; 1975 1976 if (mode == MTD_OOB_AUTO) 1977 oobsize = this->ecclayout->oobavail; 1978 else 1979 oobsize = mtd->oobsize; 1980 1981 column = to & (mtd->oobsize - 1); 1982 1983 if (unlikely(column >= oobsize)) { 1984 printk(KERN_ERR "onenand_write_oob_nolock: Attempted to start write outside oob\n"); 1985 return -EINVAL; 1986 } 1987 1988 /* For compatibility with NAND: Do not allow write past end of page */ 1989 if (unlikely(column + len > oobsize)) { 1990 printk(KERN_ERR "onenand_write_oob_nolock: " 1991 "Attempt to write past end of page\n"); 1992 return -EINVAL; 1993 } 1994 1995 /* Do not allow reads past end of device */ 1996 if (unlikely(to >= mtd->size || 1997 column + len > ((mtd->size >> this->page_shift) - 1998 (to >> this->page_shift)) * oobsize)) { 1999 printk(KERN_ERR "onenand_write_oob_nolock: Attempted to write past end of device\n"); 2000 return -EINVAL; 2001 } 2002 2003 oobbuf = this->oob_buf; 2004 2005 oobcmd = ONENAND_IS_MLC(this) ? ONENAND_CMD_PROG : ONENAND_CMD_PROGOOB; 2006 2007 /* Loop until all data write */ 2008 while (written < len) { 2009 int thislen = min_t(int, oobsize, len - written); 2010 2011 cond_resched(); 2012 2013 this->command(mtd, ONENAND_CMD_BUFFERRAM, to, mtd->oobsize); 2014 2015 /* We send data to spare ram with oobsize 2016 * to prevent byte access */ 2017 memset(oobbuf, 0xff, mtd->oobsize); 2018 if (mode == MTD_OOB_AUTO) 2019 onenand_fill_auto_oob(mtd, oobbuf, buf, column, thislen); 2020 else 2021 memcpy(oobbuf + column, buf, thislen); 2022 this->write_bufferram(mtd, ONENAND_SPARERAM, oobbuf, 0, mtd->oobsize); 2023 2024 if (ONENAND_IS_MLC(this)) { 2025 /* Set main area of DataRAM to 0xff*/ 2026 memset(this->page_buf, 0xff, mtd->writesize); 2027 this->write_bufferram(mtd, ONENAND_DATARAM, 2028 this->page_buf, 0, mtd->writesize); 2029 } 2030 2031 this->command(mtd, oobcmd, to, mtd->oobsize); 2032 2033 onenand_update_bufferram(mtd, to, 0); 2034 if (ONENAND_IS_2PLANE(this)) { 2035 ONENAND_SET_BUFFERRAM1(this); 2036 onenand_update_bufferram(mtd, to + this->writesize, 0); 2037 } 2038 2039 ret = this->wait(mtd, FL_WRITING); 2040 if (ret) { 2041 printk(KERN_ERR "onenand_write_oob_nolock: write failed %d\n", ret); 2042 break; 2043 } 2044 2045 ret = onenand_verify_oob(mtd, oobbuf, to); 2046 if (ret) { 2047 printk(KERN_ERR "onenand_write_oob_nolock: verify failed %d\n", ret); 2048 break; 2049 } 2050 2051 written += thislen; 2052 if (written == len) 2053 break; 2054 2055 to += mtd->writesize; 2056 buf += thislen; 2057 column = 0; 2058 } 2059 2060 ops->oobretlen = written; 2061 2062 return ret; 2063} 2064 2065/** 2066 * onenand_write - [MTD Interface] write buffer to FLASH 2067 * @param mtd MTD device structure 2068 * @param to offset to write to 2069 * @param len number of bytes to write 2070 * @param retlen pointer to variable to store the number of written bytes 2071 * @param buf the data to write 2072 * 2073 * Write with ECC 2074 */ 2075static int onenand_write(struct mtd_info *mtd, loff_t to, size_t len, 2076 size_t *retlen, const u_char *buf) 2077{ 2078 struct mtd_oob_ops ops = { 2079 .len = len, 2080 .ooblen = 0, 2081 .datbuf = (u_char *) buf, 2082 .oobbuf = NULL, 2083 }; 2084 int ret; 2085 2086 onenand_get_device(mtd, FL_WRITING); 2087 ret = onenand_write_ops_nolock(mtd, to, &ops); 2088 onenand_release_device(mtd); 2089 2090 *retlen = ops.retlen; 2091 return ret; 2092} 2093 2094/** 2095 * onenand_write_oob - [MTD Interface] NAND write data and/or out-of-band 2096 * @param mtd: MTD device structure 2097 * @param to: offset to write 2098 * @param ops: oob operation description structure 2099 */ 2100static int onenand_write_oob(struct mtd_info *mtd, loff_t to, 2101 struct mtd_oob_ops *ops) 2102{ 2103 int ret; 2104 2105 switch (ops->mode) { 2106 case MTD_OOB_PLACE: 2107 case MTD_OOB_AUTO: 2108 break; 2109 case MTD_OOB_RAW: 2110 /* Not implemented yet */ 2111 default: 2112 return -EINVAL; 2113 } 2114 2115 onenand_get_device(mtd, FL_WRITING); 2116 if (ops->datbuf) 2117 ret = onenand_write_ops_nolock(mtd, to, ops); 2118 else 2119 ret = onenand_write_oob_nolock(mtd, to, ops); 2120 onenand_release_device(mtd); 2121 2122 return ret; 2123} 2124 2125/** 2126 * onenand_block_isbad_nolock - [GENERIC] Check if a block is marked bad 2127 * @param mtd MTD device structure 2128 * @param ofs offset from device start 2129 * @param allowbbt 1, if its allowed to access the bbt area 2130 * 2131 * Check, if the block is bad. Either by reading the bad block table or 2132 * calling of the scan function. 2133 */ 2134static int onenand_block_isbad_nolock(struct mtd_info *mtd, loff_t ofs, int allowbbt) 2135{ 2136 struct onenand_chip *this = mtd->priv; 2137 struct bbm_info *bbm = this->bbm; 2138 2139 /* Return info from the table */ 2140 return bbm->isbad_bbt(mtd, ofs, allowbbt); 2141} 2142 2143/** 2144 * onenand_erase - [MTD Interface] erase block(s) 2145 * @param mtd MTD device structure 2146 * @param instr erase instruction 2147 * 2148 * Erase one ore more blocks 2149 */ 2150static int onenand_erase(struct mtd_info *mtd, struct erase_info *instr) 2151{ 2152 struct onenand_chip *this = mtd->priv; 2153 unsigned int block_size; 2154 loff_t addr = instr->addr; 2155 loff_t len = instr->len; 2156 int ret = 0, i; 2157 struct mtd_erase_region_info *region = NULL; 2158 loff_t region_end = 0; 2159 2160 DEBUG(MTD_DEBUG_LEVEL3, "onenand_erase: start = 0x%012llx, len = %llu\n", (unsigned long long) instr->addr, (unsigned long long) instr->len); 2161 2162 /* Do not allow erase past end of device */ 2163 if (unlikely((len + addr) > mtd->size)) { 2164 printk(KERN_ERR "onenand_erase: Erase past end of device\n"); 2165 return -EINVAL; 2166 } 2167 2168 if (FLEXONENAND(this)) { 2169 /* Find the eraseregion of this address */ 2170 i = flexonenand_region(mtd, addr); 2171 region = &mtd->eraseregions[i]; 2172 2173 block_size = region->erasesize; 2174 region_end = region->offset + region->erasesize * region->numblocks; 2175 2176 /* Start address within region must align on block boundary. 2177 * Erase region's start offset is always block start address. 2178 */ 2179 if (unlikely((addr - region->offset) & (block_size - 1))) { 2180 printk(KERN_ERR "onenand_erase: Unaligned address\n"); 2181 return -EINVAL; 2182 } 2183 } else { 2184 block_size = 1 << this->erase_shift; 2185 2186 /* Start address must align on block boundary */ 2187 if (unlikely(addr & (block_size - 1))) { 2188 printk(KERN_ERR "onenand_erase: Unaligned address\n"); 2189 return -EINVAL; 2190 } 2191 } 2192 2193 /* Length must align on block boundary */ 2194 if (unlikely(len & (block_size - 1))) { 2195 printk(KERN_ERR "onenand_erase: Length not block aligned\n"); 2196 return -EINVAL; 2197 } 2198 2199 instr->fail_addr = MTD_FAIL_ADDR_UNKNOWN; 2200 2201 /* Grab the lock and see if the device is available */ 2202 onenand_get_device(mtd, FL_ERASING); 2203 2204 /* Loop through the blocks */ 2205 instr->state = MTD_ERASING; 2206 2207 while (len) { 2208 cond_resched(); 2209 2210 /* Check if we have a bad block, we do not erase bad blocks */ 2211 if (onenand_block_isbad_nolock(mtd, addr, 0)) { 2212 printk (KERN_WARNING "onenand_erase: attempt to erase a bad block at addr 0x%012llx\n", (unsigned long long) addr); 2213 instr->state = MTD_ERASE_FAILED; 2214 goto erase_exit; 2215 } 2216 2217 this->command(mtd, ONENAND_CMD_ERASE, addr, block_size); 2218 2219 onenand_invalidate_bufferram(mtd, addr, block_size); 2220 2221 ret = this->wait(mtd, FL_ERASING); 2222 /* Check, if it is write protected */ 2223 if (ret) { 2224 printk(KERN_ERR "onenand_erase: Failed erase, block %d\n", 2225 onenand_block(this, addr)); 2226 instr->state = MTD_ERASE_FAILED; 2227 instr->fail_addr = addr; 2228 goto erase_exit; 2229 } 2230 2231 len -= block_size; 2232 addr += block_size; 2233 2234 if (addr == region_end) { 2235 if (!len) 2236 break; 2237 region++; 2238 2239 block_size = region->erasesize; 2240 region_end = region->offset + region->erasesize * region->numblocks; 2241 2242 if (len & (block_size - 1)) { 2243 /* FIXME: This should be handled at MTD partitioning level. */ 2244 printk(KERN_ERR "onenand_erase: Unaligned address\n"); 2245 goto erase_exit; 2246 } 2247 } 2248 2249 } 2250 2251 instr->state = MTD_ERASE_DONE; 2252 2253erase_exit: 2254 2255 ret = instr->state == MTD_ERASE_DONE ? 0 : -EIO; 2256 2257 /* Deselect and wake up anyone waiting on the device */ 2258 onenand_release_device(mtd); 2259 2260 /* Do call back function */ 2261 if (!ret) 2262 mtd_erase_callback(instr); 2263 2264 return ret; 2265} 2266 2267/** 2268 * onenand_sync - [MTD Interface] sync 2269 * @param mtd MTD device structure 2270 * 2271 * Sync is actually a wait for chip ready function 2272 */ 2273static void onenand_sync(struct mtd_info *mtd) 2274{ 2275 DEBUG(MTD_DEBUG_LEVEL3, "onenand_sync: called\n"); 2276 2277 /* Grab the lock and see if the device is available */ 2278 onenand_get_device(mtd, FL_SYNCING); 2279 2280 /* Release it and go back */ 2281 onenand_release_device(mtd); 2282} 2283 2284/** 2285 * onenand_block_isbad - [MTD Interface] Check whether the block at the given offset is bad 2286 * @param mtd MTD device structure 2287 * @param ofs offset relative to mtd start 2288 * 2289 * Check whether the block is bad 2290 */ 2291static int onenand_block_isbad(struct mtd_info *mtd, loff_t ofs) 2292{ 2293 int ret; 2294 2295 /* Check for invalid offset */ 2296 if (ofs > mtd->size) 2297 return -EINVAL; 2298 2299 onenand_get_device(mtd, FL_READING); 2300 ret = onenand_block_isbad_nolock(mtd, ofs, 0); 2301 onenand_release_device(mtd); 2302 return ret; 2303} 2304 2305/** 2306 * onenand_default_block_markbad - [DEFAULT] mark a block bad 2307 * @param mtd MTD device structure 2308 * @param ofs offset from device start 2309 * 2310 * This is the default implementation, which can be overridden by 2311 * a hardware specific driver. 2312 */ 2313static int onenand_default_block_markbad(struct mtd_info *mtd, loff_t ofs) 2314{ 2315 struct onenand_chip *this = mtd->priv; 2316 struct bbm_info *bbm = this->bbm; 2317 u_char buf[2] = {0, 0}; 2318 struct mtd_oob_ops ops = { 2319 .mode = MTD_OOB_PLACE, 2320 .ooblen = 2, 2321 .oobbuf = buf, 2322 .ooboffs = 0, 2323 }; 2324 int block; 2325 2326 /* Get block number */ 2327 block = onenand_block(this, ofs); 2328 if (bbm->bbt) 2329 bbm->bbt[block >> 2] |= 0x01 << ((block & 0x03) << 1); 2330 2331 /* We write two bytes, so we don't have to mess with 16-bit access */ 2332 ofs += mtd->oobsize + (bbm->badblockpos & ~0x01); 2333 /* FIXME : What to do when marking SLC block in partition 2334 * with MLC erasesize? For now, it is not advisable to 2335 * create partitions containing both SLC and MLC regions. 2336 */ 2337 return onenand_write_oob_nolock(mtd, ofs, &ops); 2338} 2339 2340/** 2341 * onenand_block_markbad - [MTD Interface] Mark the block at the given offset as bad 2342 * @param mtd MTD device structure 2343 * @param ofs offset relative to mtd start 2344 * 2345 * Mark the block as bad 2346 */ 2347static int onenand_block_markbad(struct mtd_info *mtd, loff_t ofs) 2348{ 2349 struct onenand_chip *this = mtd->priv; 2350 int ret; 2351 2352 ret = onenand_block_isbad(mtd, ofs); 2353 if (ret) { 2354 /* If it was bad already, return success and do nothing */ 2355 if (ret > 0) 2356 return 0; 2357 return ret; 2358 } 2359 2360 onenand_get_device(mtd, FL_WRITING); 2361 ret = this->block_markbad(mtd, ofs); 2362 onenand_release_device(mtd); 2363 return ret; 2364} 2365 2366/** 2367 * onenand_do_lock_cmd - [OneNAND Interface] Lock or unlock block(s) 2368 * @param mtd MTD device structure 2369 * @param ofs offset relative to mtd start 2370 * @param len number of bytes to lock or unlock 2371 * @param cmd lock or unlock command 2372 * 2373 * Lock or unlock one or more blocks 2374 */ 2375static int onenand_do_lock_cmd(struct mtd_info *mtd, loff_t ofs, size_t len, int cmd) 2376{ 2377 struct onenand_chip *this = mtd->priv; 2378 int start, end, block, value, status; 2379 int wp_status_mask; 2380 2381 start = onenand_block(this, ofs); 2382 end = onenand_block(this, ofs + len) - 1; 2383 2384 if (cmd == ONENAND_CMD_LOCK) 2385 wp_status_mask = ONENAND_WP_LS; 2386 else 2387 wp_status_mask = ONENAND_WP_US; 2388 2389 /* Continuous lock scheme */ 2390 if (this->options & ONENAND_HAS_CONT_LOCK) { 2391 /* Set start block address */ 2392 this->write_word(start, this->base + ONENAND_REG_START_BLOCK_ADDRESS); 2393 /* Set end block address */ 2394 this->write_word(end, this->base + ONENAND_REG_END_BLOCK_ADDRESS); 2395 /* Write lock command */ 2396 this->command(mtd, cmd, 0, 0); 2397 2398 /* There's no return value */ 2399 this->wait(mtd, FL_LOCKING); 2400 2401 /* Sanity check */ 2402 while (this->read_word(this->base + ONENAND_REG_CTRL_STATUS) 2403 & ONENAND_CTRL_ONGO) 2404 continue; 2405 2406 /* Check lock status */ 2407 status = this->read_word(this->base + ONENAND_REG_WP_STATUS); 2408 if (!(status & wp_status_mask)) 2409 printk(KERN_ERR "wp status = 0x%x\n", status); 2410 2411 return 0; 2412 } 2413 2414 /* Block lock scheme */ 2415 for (block = start; block < end + 1; block++) { 2416 /* Set block address */ 2417 value = onenand_block_address(this, block); 2418 this->write_word(value, this->base + ONENAND_REG_START_ADDRESS1); 2419 /* Select DataRAM for DDP */ 2420 value = onenand_bufferram_address(this, block); 2421 this->write_word(value, this->base + ONENAND_REG_START_ADDRESS2); 2422 /* Set start block address */ 2423 this->write_word(block, this->base + ONENAND_REG_START_BLOCK_ADDRESS); 2424 /* Write lock command */ 2425 this->command(mtd, cmd, 0, 0); 2426 2427 /* There's no return value */ 2428 this->wait(mtd, FL_LOCKING); 2429 2430 /* Sanity check */ 2431 while (this->read_word(this->base + ONENAND_REG_CTRL_STATUS) 2432 & ONENAND_CTRL_ONGO) 2433 continue; 2434 2435 /* Check lock status */ 2436 status = this->read_word(this->base + ONENAND_REG_WP_STATUS); 2437 if (!(status & wp_status_mask)) 2438 printk(KERN_ERR "block = %d, wp status = 0x%x\n", block, status); 2439 } 2440 2441 return 0; 2442} 2443 2444/** 2445 * onenand_lock - [MTD Interface] Lock block(s) 2446 * @param mtd MTD device structure 2447 * @param ofs offset relative to mtd start 2448 * @param len number of bytes to unlock 2449 * 2450 * Lock one or more blocks 2451 */ 2452static int onenand_lock(struct mtd_info *mtd, loff_t ofs, uint64_t len) 2453{ 2454 int ret; 2455 2456 onenand_get_device(mtd, FL_LOCKING); 2457 ret = onenand_do_lock_cmd(mtd, ofs, len, ONENAND_CMD_LOCK); 2458 onenand_release_device(mtd); 2459 return ret; 2460} 2461 2462/** 2463 * onenand_unlock - [MTD Interface] Unlock block(s) 2464 * @param mtd MTD device structure 2465 * @param ofs offset relative to mtd start 2466 * @param len number of bytes to unlock 2467 * 2468 * Unlock one or more blocks 2469 */ 2470static int onenand_unlock(struct mtd_info *mtd, loff_t ofs, uint64_t len) 2471{ 2472 int ret; 2473 2474 onenand_get_device(mtd, FL_LOCKING); 2475 ret = onenand_do_lock_cmd(mtd, ofs, len, ONENAND_CMD_UNLOCK); 2476 onenand_release_device(mtd); 2477 return ret; 2478} 2479 2480/** 2481 * onenand_check_lock_status - [OneNAND Interface] Check lock status 2482 * @param this onenand chip data structure 2483 * 2484 * Check lock status 2485 */ 2486static int onenand_check_lock_status(struct onenand_chip *this) 2487{ 2488 unsigned int value, block, status; 2489 unsigned int end; 2490 2491 end = this->chipsize >> this->erase_shift; 2492 for (block = 0; block < end; block++) { 2493 /* Set block address */ 2494 value = onenand_block_address(this, block); 2495 this->write_word(value, this->base + ONENAND_REG_START_ADDRESS1); 2496 /* Select DataRAM for DDP */ 2497 value = onenand_bufferram_address(this, block); 2498 this->write_word(value, this->base + ONENAND_REG_START_ADDRESS2); 2499 /* Set start block address */ 2500 this->write_word(block, this->base + ONENAND_REG_START_BLOCK_ADDRESS); 2501 2502 /* Check lock status */ 2503 status = this->read_word(this->base + ONENAND_REG_WP_STATUS); 2504 if (!(status & ONENAND_WP_US)) { 2505 printk(KERN_ERR "block = %d, wp status = 0x%x\n", block, status); 2506 return 0; 2507 } 2508 } 2509 2510 return 1; 2511} 2512 2513/** 2514 * onenand_unlock_all - [OneNAND Interface] unlock all blocks 2515 * @param mtd MTD device structure 2516 * 2517 * Unlock all blocks 2518 */ 2519static void onenand_unlock_all(struct mtd_info *mtd) 2520{ 2521 struct onenand_chip *this = mtd->priv; 2522 loff_t ofs = 0; 2523 loff_t len = mtd->size; 2524 2525 if (this->options & ONENAND_HAS_UNLOCK_ALL) { 2526 /* Set start block address */ 2527 this->write_word(0, this->base + ONENAND_REG_START_BLOCK_ADDRESS); 2528 /* Write unlock command */ 2529 this->command(mtd, ONENAND_CMD_UNLOCK_ALL, 0, 0); 2530 2531 /* There's no return value */ 2532 this->wait(mtd, FL_LOCKING); 2533 2534 /* Sanity check */ 2535 while (this->read_word(this->base + ONENAND_REG_CTRL_STATUS) 2536 & ONENAND_CTRL_ONGO) 2537 continue; 2538 2539 /* Don't check lock status */ 2540 if (this->options & ONENAND_SKIP_UNLOCK_CHECK) 2541 return; 2542 2543 /* Check lock status */ 2544 if (onenand_check_lock_status(this)) 2545 return; 2546 2547 /* Workaround for all block unlock in DDP */ 2548 if (ONENAND_IS_DDP(this) && !FLEXONENAND(this)) { 2549 /* All blocks on another chip */ 2550 ofs = this->chipsize >> 1; 2551 len = this->chipsize >> 1; 2552 } 2553 } 2554 2555 onenand_do_lock_cmd(mtd, ofs, len, ONENAND_CMD_UNLOCK); 2556} 2557 2558#ifdef CONFIG_MTD_ONENAND_OTP 2559 2560/* Internal OTP operation */ 2561typedef int (*otp_op_t)(struct mtd_info *mtd, loff_t form, size_t len, 2562 size_t *retlen, u_char *buf); 2563 2564/** 2565 * do_otp_read - [DEFAULT] Read OTP block area 2566 * @param mtd MTD device structure 2567 * @param from The offset to read 2568 * @param len number of bytes to read 2569 * @param retlen pointer to variable to store the number of readbytes 2570 * @param buf the databuffer to put/get data 2571 * 2572 * Read OTP block area. 2573 */ 2574static int do_otp_read(struct mtd_info *mtd, loff_t from, size_t len, 2575 size_t *retlen, u_char *buf) 2576{ 2577 struct onenand_chip *this = mtd->priv; 2578 struct mtd_oob_ops ops = { 2579 .len = len, 2580 .ooblen = 0, 2581 .datbuf = buf, 2582 .oobbuf = NULL, 2583 }; 2584 int ret; 2585 2586 /* Enter OTP access mode */ 2587 this->command(mtd, ONENAND_CMD_OTP_ACCESS, 0, 0); 2588 this->wait(mtd, FL_OTPING); 2589 2590 ret = ONENAND_IS_MLC(this) ? 2591 onenand_mlc_read_ops_nolock(mtd, from, &ops) : 2592 onenand_read_ops_nolock(mtd, from, &ops); 2593 2594 /* Exit OTP access mode */ 2595 this->command(mtd, ONENAND_CMD_RESET, 0, 0); 2596 this->wait(mtd, FL_RESETING); 2597 2598 return ret; 2599} 2600 2601/** 2602 * do_otp_write - [DEFAULT] Write OTP block area 2603 * @param mtd MTD device structure 2604 * @param to The offset to write 2605 * @param len number of bytes to write 2606 * @param retlen pointer to variable to store the number of write bytes 2607 * @param buf the databuffer to put/get data 2608 * 2609 * Write OTP block area. 2610 */ 2611static int do_otp_write(struct mtd_info *mtd, loff_t to, size_t len, 2612 size_t *retlen, u_char *buf) 2613{ 2614 struct onenand_chip *this = mtd->priv; 2615 unsigned char *pbuf = buf; 2616 int ret; 2617 struct mtd_oob_ops ops; 2618 2619 /* Force buffer page aligned */ 2620 if (len < mtd->writesize) { 2621 memcpy(this->page_buf, buf, len); 2622 memset(this->page_buf + len, 0xff, mtd->writesize - len); 2623 pbuf = this->page_buf; 2624 len = mtd->writesize; 2625 } 2626 2627 /* Enter OTP access mode */ 2628 this->command(mtd, ONENAND_CMD_OTP_ACCESS, 0, 0); 2629 this->wait(mtd, FL_OTPING); 2630 2631 ops.len = len; 2632 ops.ooblen = 0; 2633 ops.datbuf = pbuf; 2634 ops.oobbuf = NULL; 2635 ret = onenand_write_ops_nolock(mtd, to, &ops); 2636 *retlen = ops.retlen; 2637 2638 /* Exit OTP access mode */ 2639 this->command(mtd, ONENAND_CMD_RESET, 0, 0); 2640 this->wait(mtd, FL_RESETING); 2641 2642 return ret; 2643} 2644 2645/** 2646 * do_otp_lock - [DEFAULT] Lock OTP block area 2647 * @param mtd MTD device structure 2648 * @param from The offset to lock 2649 * @param len number of bytes to lock 2650 * @param retlen pointer to variable to store the number of lock bytes 2651 * @param buf the databuffer to put/get data 2652 * 2653 * Lock OTP block area. 2654 */ 2655static int do_otp_lock(struct mtd_info *mtd, loff_t from, size_t len, 2656 size_t *retlen, u_char *buf) 2657{ 2658 struct onenand_chip *this = mtd->priv; 2659 struct mtd_oob_ops ops; 2660 int ret; 2661 2662 /* Enter OTP access mode */ 2663 this->command(mtd, ONENAND_CMD_OTP_ACCESS, 0, 0); 2664 this->wait(mtd, FL_OTPING); 2665 2666 if (FLEXONENAND(this)) { 2667 /* 2668 * For Flex-OneNAND, we write lock mark to 1st word of sector 4 of 2669 * main area of page 49. 2670 */ 2671 ops.len = mtd->writesize; 2672 ops.ooblen = 0; 2673 ops.datbuf = buf; 2674 ops.oobbuf = NULL; 2675 ret = onenand_write_ops_nolock(mtd, mtd->writesize * 49, &ops); 2676 *retlen = ops.retlen; 2677 } else { 2678 ops.mode = MTD_OOB_PLACE; 2679 ops.ooblen = len; 2680 ops.oobbuf = buf; 2681 ops.ooboffs = 0; 2682 ret = onenand_write_oob_nolock(mtd, from, &ops); 2683 *retlen = ops.oobretlen; 2684 } 2685 2686 /* Exit OTP access mode */ 2687 this->command(mtd, ONENAND_CMD_RESET, 0, 0); 2688 this->wait(mtd, FL_RESETING); 2689 2690 return ret; 2691} 2692 2693/** 2694 * onenand_otp_walk - [DEFAULT] Handle OTP operation 2695 * @param mtd MTD device structure 2696 * @param from The offset to read/write 2697 * @param len number of bytes to read/write 2698 * @param retlen pointer to variable to store the number of read bytes 2699 * @param buf the databuffer to put/get data 2700 * @param action do given action 2701 * @param mode specify user and factory 2702 * 2703 * Handle OTP operation. 2704 */ 2705static int onenand_otp_walk(struct mtd_info *mtd, loff_t from, size_t len, 2706 size_t *retlen, u_char *buf, 2707 otp_op_t action, int mode) 2708{ 2709 struct onenand_chip *this = mtd->priv; 2710 int otp_pages; 2711 int density; 2712 int ret = 0; 2713 2714 *retlen = 0; 2715 2716 density = onenand_get_density(this->device_id); 2717 if (density < ONENAND_DEVICE_DENSITY_512Mb) 2718 otp_pages = 20; 2719 else 2720 otp_pages = 10; 2721 2722 if (mode == MTD_OTP_FACTORY) { 2723 from += mtd->writesize * otp_pages; 2724 otp_pages = 64 - otp_pages; 2725 } 2726 2727 /* Check User/Factory boundary */ 2728 if (((mtd->writesize * otp_pages) - (from + len)) < 0) 2729 return 0; 2730 2731 onenand_get_device(mtd, FL_OTPING); 2732 while (len > 0 && otp_pages > 0) { 2733 if (!action) { /* OTP Info functions */ 2734 struct otp_info *otpinfo; 2735 2736 len -= sizeof(struct otp_info); 2737 if (len <= 0) { 2738 ret = -ENOSPC; 2739 break; 2740 } 2741 2742 otpinfo = (struct otp_info *) buf; 2743 otpinfo->start = from; 2744 otpinfo->length = mtd->writesize; 2745 otpinfo->locked = 0; 2746 2747 from += mtd->writesize; 2748 buf += sizeof(struct otp_info); 2749 *retlen += sizeof(struct otp_info); 2750 } else { 2751 size_t tmp_retlen; 2752 int size = len; 2753 2754 ret = action(mtd, from, len, &tmp_retlen, buf); 2755 2756 buf += size; 2757 len -= size; 2758 *retlen += size; 2759 2760 if (ret) 2761 break; 2762 } 2763 otp_pages--; 2764 } 2765 onenand_release_device(mtd); 2766 2767 return ret; 2768} 2769 2770/** 2771 * onenand_get_fact_prot_info - [MTD Interface] Read factory OTP info 2772 * @param mtd MTD device structure 2773 * @param buf the databuffer to put/get data 2774 * @param len number of bytes to read 2775 * 2776 * Read factory OTP info. 2777 */ 2778static int onenand_get_fact_prot_info(struct mtd_info *mtd, 2779 struct otp_info *buf, size_t len) 2780{ 2781 size_t retlen; 2782 int ret; 2783 2784 ret = onenand_otp_walk(mtd, 0, len, &retlen, (u_char *) buf, NULL, MTD_OTP_FACTORY); 2785 2786 return ret ? : retlen; 2787} 2788 2789/** 2790 * onenand_read_fact_prot_reg - [MTD Interface] Read factory OTP area 2791 * @param mtd MTD device structure 2792 * @param from The offset to read 2793 * @param len number of bytes to read 2794 * @param retlen pointer to variable to store the number of read bytes 2795 * @param buf the databuffer to put/get data 2796 * 2797 * Read factory OTP area. 2798 */ 2799static int onenand_read_fact_prot_reg(struct mtd_info *mtd, loff_t from, 2800 size_t len, size_t *retlen, u_char *buf) 2801{ 2802 return onenand_otp_walk(mtd, from, len, retlen, buf, do_otp_read, MTD_OTP_FACTORY); 2803} 2804 2805/** 2806 * onenand_get_user_prot_info - [MTD Interface] Read user OTP info 2807 * @param mtd MTD device structure 2808 * @param buf the databuffer to put/get data 2809 * @param len number of bytes to read 2810 * 2811 * Read user OTP info. 2812 */ 2813static int onenand_get_user_prot_info(struct mtd_info *mtd, 2814 struct otp_info *buf, size_t len) 2815{ 2816 size_t retlen; 2817 int ret; 2818 2819 ret = onenand_otp_walk(mtd, 0, len, &retlen, (u_char *) buf, NULL, MTD_OTP_USER); 2820 2821 return ret ? : retlen; 2822} 2823 2824/** 2825 * onenand_read_user_prot_reg - [MTD Interface] Read user OTP area 2826 * @param mtd MTD device structure 2827 * @param from The offset to read 2828 * @param len number of bytes to read 2829 * @param retlen pointer to variable to store the number of read bytes 2830 * @param buf the databuffer to put/get data 2831 * 2832 * Read user OTP area. 2833 */ 2834static int onenand_read_user_prot_reg(struct mtd_info *mtd, loff_t from, 2835 size_t len, size_t *retlen, u_char *buf) 2836{ 2837 return onenand_otp_walk(mtd, from, len, retlen, buf, do_otp_read, MTD_OTP_USER); 2838} 2839 2840/** 2841 * onenand_write_user_prot_reg - [MTD Interface] Write user OTP area 2842 * @param mtd MTD device structure 2843 * @param from The offset to write 2844 * @param len number of bytes to write 2845 * @param retlen pointer to variable to store the number of write bytes 2846 * @param buf the databuffer to put/get data 2847 * 2848 * Write user OTP area. 2849 */ 2850static int onenand_write_user_prot_reg(struct mtd_info *mtd, loff_t from, 2851 size_t len, size_t *retlen, u_char *buf) 2852{ 2853 return onenand_otp_walk(mtd, from, len, retlen, buf, do_otp_write, MTD_OTP_USER); 2854} 2855 2856/** 2857 * onenand_lock_user_prot_reg - [MTD Interface] Lock user OTP area 2858 * @param mtd MTD device structure 2859 * @param from The offset to lock 2860 * @param len number of bytes to unlock 2861 * 2862 * Write lock mark on spare area in page 0 in OTP block 2863 */ 2864static int onenand_lock_user_prot_reg(struct mtd_info *mtd, loff_t from, 2865 size_t len) 2866{ 2867 struct onenand_chip *this = mtd->priv; 2868 u_char *buf = FLEXONENAND(this) ? this->page_buf : this->oob_buf; 2869 size_t retlen; 2870 int ret; 2871 2872 memset(buf, 0xff, FLEXONENAND(this) ? this->writesize 2873 : mtd->oobsize); 2874 /* 2875 * Note: OTP lock operation 2876 * OTP block : 0xXXFC 2877 * 1st block : 0xXXF3 (If chip support) 2878 * Both : 0xXXF0 (If chip support) 2879 */ 2880 if (FLEXONENAND(this)) 2881 buf[FLEXONENAND_OTP_LOCK_OFFSET] = 0xFC; 2882 else 2883 buf[ONENAND_OTP_LOCK_OFFSET] = 0xFC; 2884 2885 /* 2886 * Write lock mark to 8th word of sector0 of page0 of the spare0. 2887 * We write 16 bytes spare area instead of 2 bytes. 2888 * For Flex-OneNAND, we write lock mark to 1st word of sector 4 of 2889 * main area of page 49. 2890 */ 2891 2892 from = 0; 2893 len = FLEXONENAND(this) ? mtd->writesize : 16; 2894 2895 ret = onenand_otp_walk(mtd, from, len, &retlen, buf, do_otp_lock, MTD_OTP_USER); 2896 2897 return ret ? : retlen; 2898} 2899#endif /* CONFIG_MTD_ONENAND_OTP */ 2900 2901/** 2902 * onenand_check_features - Check and set OneNAND features 2903 * @param mtd MTD data structure 2904 * 2905 * Check and set OneNAND features 2906 * - lock scheme 2907 * - two plane 2908 */ 2909static void onenand_check_features(struct mtd_info *mtd) 2910{ 2911 struct onenand_chip *this = mtd->priv; 2912 unsigned int density, process; 2913 2914 /* Lock scheme depends on density and process */ 2915 density = onenand_get_density(this->device_id); 2916 process = this->version_id >> ONENAND_VERSION_PROCESS_SHIFT; 2917 2918 /* Lock scheme */ 2919 switch (density) { 2920 case ONENAND_DEVICE_DENSITY_4Gb: 2921 this->options |= ONENAND_HAS_2PLANE; 2922 2923 case ONENAND_DEVICE_DENSITY_2Gb: 2924 /* 2Gb DDP does not have 2 plane */ 2925 if (!ONENAND_IS_DDP(this)) 2926 this->options |= ONENAND_HAS_2PLANE; 2927 this->options |= ONENAND_HAS_UNLOCK_ALL; 2928 2929 case ONENAND_DEVICE_DENSITY_1Gb: 2930 /* A-Die has all block unlock */ 2931 if (process) 2932 this->options |= ONENAND_HAS_UNLOCK_ALL; 2933 break; 2934 2935 default: 2936 /* Some OneNAND has continuous lock scheme */ 2937 if (!process) 2938 this->options |= ONENAND_HAS_CONT_LOCK; 2939 break; 2940 } 2941 2942 if (ONENAND_IS_MLC(this)) 2943 this->options &= ~ONENAND_HAS_2PLANE; 2944 2945 if (FLEXONENAND(this)) { 2946 this->options &= ~ONENAND_HAS_CONT_LOCK; 2947 this->options |= ONENAND_HAS_UNLOCK_ALL; 2948 } 2949 2950 if (this->options & ONENAND_HAS_CONT_LOCK) 2951 printk(KERN_DEBUG "Lock scheme is Continuous Lock\n"); 2952 if (this->options & ONENAND_HAS_UNLOCK_ALL) 2953 printk(KERN_DEBUG "Chip support all block unlock\n"); 2954 if (this->options & ONENAND_HAS_2PLANE) 2955 printk(KERN_DEBUG "Chip has 2 plane\n"); 2956} 2957 2958/** 2959 * onenand_print_device_info - Print device & version ID 2960 * @param device device ID 2961 * @param version version ID 2962 * 2963 * Print device & version ID 2964 */ 2965static void onenand_print_device_info(int device, int version) 2966{ 2967 int vcc, demuxed, ddp, density, flexonenand; 2968 2969 vcc = device & ONENAND_DEVICE_VCC_MASK; 2970 demuxed = device & ONENAND_DEVICE_IS_DEMUX; 2971 ddp = device & ONENAND_DEVICE_IS_DDP; 2972 density = onenand_get_density(device); 2973 flexonenand = device & DEVICE_IS_FLEXONENAND; 2974 printk(KERN_INFO "%s%sOneNAND%s %dMB %sV 16-bit (0x%02x)\n", 2975 demuxed ? "" : "Muxed ", 2976 flexonenand ? "Flex-" : "", 2977 ddp ? "(DDP)" : "", 2978 (16 << density), 2979 vcc ? "2.65/3.3" : "1.8", 2980 device); 2981 printk(KERN_INFO "OneNAND version = 0x%04x\n", version); 2982} 2983 2984static const struct onenand_manufacturers onenand_manuf_ids[] = { 2985 {ONENAND_MFR_SAMSUNG, "Samsung"}, 2986 {ONENAND_MFR_NUMONYX, "Numonyx"}, 2987}; 2988 2989/** 2990 * onenand_check_maf - Check manufacturer ID 2991 * @param manuf manufacturer ID 2992 * 2993 * Check manufacturer ID 2994 */ 2995static int onenand_check_maf(int manuf) 2996{ 2997 int size = ARRAY_SIZE(onenand_manuf_ids); 2998 char *name; 2999 int i; 3000 3001 for (i = 0; i < size; i++) 3002 if (manuf == onenand_manuf_ids[i].id) 3003 break; 3004 3005 if (i < size) 3006 name = onenand_manuf_ids[i].name; 3007 else 3008 name = "Unknown"; 3009 3010 printk(KERN_DEBUG "OneNAND Manufacturer: %s (0x%0x)\n", name, manuf); 3011 3012 return (i == size); 3013} 3014 3015/** 3016* flexonenand_get_boundary - Reads the SLC boundary 3017* @param onenand_info - onenand info structure 3018**/ 3019static int flexonenand_get_boundary(struct mtd_info *mtd) 3020{ 3021 struct onenand_chip *this = mtd->priv; 3022 unsigned die, bdry; 3023 int ret, syscfg, locked; 3024 3025 /* Disable ECC */ 3026 syscfg = this->read_word(this->base + ONENAND_REG_SYS_CFG1); 3027 this->write_word((syscfg | 0x0100), this->base + ONENAND_REG_SYS_CFG1); 3028 3029 for (die = 0; die < this->dies; die++) { 3030 this->command(mtd, FLEXONENAND_CMD_PI_ACCESS, die, 0); 3031 this->wait(mtd, FL_SYNCING); 3032 3033 this->command(mtd, FLEXONENAND_CMD_READ_PI, die, 0); 3034 ret = this->wait(mtd, FL_READING); 3035 3036 bdry = this->read_word(this->base + ONENAND_DATARAM); 3037 if ((bdry >> FLEXONENAND_PI_UNLOCK_SHIFT) == 3) 3038 locked = 0; 3039 else 3040 locked = 1; 3041 this->boundary[die] = bdry & FLEXONENAND_PI_MASK; 3042 3043 this->command(mtd, ONENAND_CMD_RESET, 0, 0); 3044 ret = this->wait(mtd, FL_RESETING); 3045 3046 printk(KERN_INFO "Die %d boundary: %d%s\n", die, 3047 this->boundary[die], locked ? "(Locked)" : "(Unlocked)"); 3048 } 3049 3050 /* Enable ECC */ 3051 this->write_word(syscfg, this->base + ONENAND_REG_SYS_CFG1); 3052 return 0; 3053} 3054 3055/** 3056 * flexonenand_get_size - Fill up fields in onenand_chip and mtd_info 3057 * boundary[], diesize[], mtd->size, mtd->erasesize 3058 * @param mtd - MTD device structure 3059 */ 3060static void flexonenand_get_size(struct mtd_info *mtd) 3061{ 3062 struct onenand_chip *this = mtd->priv; 3063 int die, i, eraseshift, density; 3064 int blksperdie, maxbdry; 3065 loff_t ofs; 3066 3067 density = onenand_get_density(this->device_id); 3068 blksperdie = ((loff_t)(16 << density) << 20) >> (this->erase_shift); 3069 blksperdie >>= ONENAND_IS_DDP(this) ? 1 : 0; 3070 maxbdry = blksperdie - 1; 3071 eraseshift = this->erase_shift - 1; 3072 3073 mtd->numeraseregions = this->dies << 1; 3074 3075 /* This fills up the device boundary */ 3076 flexonenand_get_boundary(mtd); 3077 die = ofs = 0; 3078 i = -1; 3079 for (; die < this->dies; die++) { 3080 if (!die || this->boundary[die-1] != maxbdry) { 3081 i++; 3082 mtd->eraseregions[i].offset = ofs; 3083 mtd->eraseregions[i].erasesize = 1 << eraseshift; 3084 mtd->eraseregions[i].numblocks = 3085 this->boundary[die] + 1; 3086 ofs += mtd->eraseregions[i].numblocks << eraseshift; 3087 eraseshift++; 3088 } else { 3089 mtd->numeraseregions -= 1; 3090 mtd->eraseregions[i].numblocks += 3091 this->boundary[die] + 1; 3092 ofs += (this->boundary[die] + 1) << (eraseshift - 1); 3093 } 3094 if (this->boundary[die] != maxbdry) { 3095 i++; 3096 mtd->eraseregions[i].offset = ofs; 3097 mtd->eraseregions[i].erasesize = 1 << eraseshift; 3098 mtd->eraseregions[i].numblocks = maxbdry ^ 3099 this->boundary[die]; 3100 ofs += mtd->eraseregions[i].numblocks << eraseshift; 3101 eraseshift--; 3102 } else 3103 mtd->numeraseregions -= 1; 3104 } 3105 3106 /* Expose MLC erase size except when all blocks are SLC */ 3107 mtd->erasesize = 1 << this->erase_shift; 3108 if (mtd->numeraseregions == 1) 3109 mtd->erasesize >>= 1; 3110 3111 printk(KERN_INFO "Device has %d eraseregions\n", mtd->numeraseregions); 3112 for (i = 0; i < mtd->numeraseregions; i++) 3113 printk(KERN_INFO "[offset: 0x%08x, erasesize: 0x%05x," 3114 " numblocks: %04u]\n", 3115 (unsigned int) mtd->eraseregions[i].offset, 3116 mtd->eraseregions[i].erasesize, 3117 mtd->eraseregions[i].numblocks); 3118 3119 for (die = 0, mtd->size = 0; die < this->dies; die++) { 3120 this->diesize[die] = (loff_t)blksperdie << this->erase_shift; 3121 this->diesize[die] -= (loff_t)(this->boundary[die] + 1) 3122 << (this->erase_shift - 1); 3123 mtd->size += this->diesize[die]; 3124 } 3125} 3126 3127/** 3128 * flexonenand_check_blocks_erased - Check if blocks are erased 3129 * @param mtd_info - mtd info structure 3130 * @param start - first erase block to check 3131 * @param end - last erase block to check 3132 * 3133 * Converting an unerased block from MLC to SLC 3134 * causes byte values to change. Since both data and its ECC 3135 * have changed, reads on the block give uncorrectable error. 3136 * This might lead to the block being detected as bad. 3137 * 3138 * Avoid this by ensuring that the block to be converted is 3139 * erased. 3140 */ 3141static int flexonenand_check_blocks_erased(struct mtd_info *mtd, int start, int end) 3142{ 3143 struct onenand_chip *this = mtd->priv; 3144 int i, ret; 3145 int block; 3146 struct mtd_oob_ops ops = { 3147 .mode = MTD_OOB_PLACE, 3148 .ooboffs = 0, 3149 .ooblen = mtd->oobsize, 3150 .datbuf = NULL, 3151 .oobbuf = this->oob_buf, 3152 }; 3153 loff_t addr; 3154 3155 printk(KERN_DEBUG "Check blocks from %d to %d\n", start, end); 3156 3157 for (block = start; block <= end; block++) { 3158 addr = flexonenand_addr(this, block); 3159 if (onenand_block_isbad_nolock(mtd, addr, 0)) 3160 continue; 3161 3162 /* 3163 * Since main area write results in ECC write to spare, 3164 * it is sufficient to check only ECC bytes for change. 3165 */ 3166 ret = onenand_read_oob_nolock(mtd, addr, &ops); 3167 if (ret) 3168 return ret; 3169 3170 for (i = 0; i < mtd->oobsize; i++) 3171 if (this->oob_buf[i] != 0xff) 3172 break; 3173 3174 if (i != mtd->oobsize) { 3175 printk(KERN_WARNING "Block %d not erased.\n", block); 3176 return 1; 3177 } 3178 } 3179 3180 return 0; 3181} 3182 3183/** 3184 * flexonenand_set_boundary - Writes the SLC boundary 3185 * @param mtd - mtd info structure 3186 */ 3187int flexonenand_set_boundary(struct mtd_info *mtd, int die, 3188 int boundary, int lock) 3189{ 3190 struct onenand_chip *this = mtd->priv; 3191 int ret, density, blksperdie, old, new, thisboundary; 3192 loff_t addr; 3193 3194 /* Change only once for SDP Flex-OneNAND */ 3195 if (die && (!ONENAND_IS_DDP(this))) 3196 return 0; 3197 3198 /* boundary value of -1 indicates no required change */ 3199 if (boundary < 0 || boundary == this->boundary[die]) 3200 return 0; 3201 3202 density = onenand_get_density(this->device_id); 3203 blksperdie = ((16 << density) << 20) >> this->erase_shift; 3204 blksperdie >>= ONENAND_IS_DDP(this) ? 1 : 0; 3205 3206 if (boundary >= blksperdie) { 3207 printk(KERN_ERR "flexonenand_set_boundary: Invalid boundary value. " 3208 "Boundary not changed.\n"); 3209 return -EINVAL; 3210 } 3211 3212 /* Check if converting blocks are erased */ 3213 old = this->boundary[die] + (die * this->density_mask); 3214 new = boundary + (die * this->density_mask); 3215 ret = flexonenand_check_blocks_erased(mtd, min(old, new) + 1, max(old, new)); 3216 if (ret) { 3217 printk(KERN_ERR "flexonenand_set_boundary: Please erase blocks before boundary change\n"); 3218 return ret; 3219 } 3220 3221 this->command(mtd, FLEXONENAND_CMD_PI_ACCESS, die, 0); 3222 this->wait(mtd, FL_SYNCING); 3223 3224 /* Check is boundary is locked */ 3225 this->command(mtd, FLEXONENAND_CMD_READ_PI, die, 0); 3226 ret = this->wait(mtd, FL_READING); 3227 3228 thisboundary = this->read_word(this->base + ONENAND_DATARAM); 3229 if ((thisboundary >> FLEXONENAND_PI_UNLOCK_SHIFT) != 3) { 3230 printk(KERN_ERR "flexonenand_set_boundary: boundary locked\n"); 3231 ret = 1; 3232 goto out; 3233 } 3234 3235 printk(KERN_INFO "flexonenand_set_boundary: Changing die %d boundary: %d%s\n", 3236 die, boundary, lock ? "(Locked)" : "(Unlocked)"); 3237 3238 addr = die ? this->diesize[0] : 0; 3239 3240 boundary &= FLEXONENAND_PI_MASK; 3241 boundary |= lock ? 0 : (3 << FLEXONENAND_PI_UNLOCK_SHIFT); 3242 3243 this->command(mtd, ONENAND_CMD_ERASE, addr, 0); 3244 ret = this->wait(mtd, FL_ERASING); 3245 if (ret) { 3246 printk(KERN_ERR "flexonenand_set_boundary: Failed PI erase for Die %d\n", die); 3247 goto out; 3248 } 3249 3250 this->write_word(boundary, this->base + ONENAND_DATARAM); 3251 this->command(mtd, ONENAND_CMD_PROG, addr, 0); 3252 ret = this->wait(mtd, FL_WRITING); 3253 if (ret) { 3254 printk(KERN_ERR "flexonenand_set_boundary: Failed PI write for Die %d\n", die); 3255 goto out; 3256 } 3257 3258 this->command(mtd, FLEXONENAND_CMD_PI_UPDATE, die, 0); 3259 ret = this->wait(mtd, FL_WRITING); 3260out: 3261 this->write_word(ONENAND_CMD_RESET, this->base + ONENAND_REG_COMMAND); 3262 this->wait(mtd, FL_RESETING); 3263 if (!ret) 3264 /* Recalculate device size on boundary change*/ 3265 flexonenand_get_size(mtd); 3266 3267 return ret; 3268} 3269 3270/** 3271 * onenand_probe - [OneNAND Interface] Probe the OneNAND device 3272 * @param mtd MTD device structure 3273 * 3274 * OneNAND detection method: 3275 * Compare the values from command with ones from register 3276 */ 3277static int onenand_probe(struct mtd_info *mtd) 3278{ 3279 struct onenand_chip *this = mtd->priv; 3280 int bram_maf_id, bram_dev_id, maf_id, dev_id, ver_id; 3281 int density; 3282 int syscfg; 3283 3284 /* Save system configuration 1 */ 3285 syscfg = this->read_word(this->base + ONENAND_REG_SYS_CFG1); 3286 /* Clear Sync. Burst Read mode to read BootRAM */ 3287 this->write_word((syscfg & ~ONENAND_SYS_CFG1_SYNC_READ & ~ONENAND_SYS_CFG1_SYNC_WRITE), this->base + ONENAND_REG_SYS_CFG1); 3288 3289 /* Send the command for reading device ID from BootRAM */ 3290 this->write_word(ONENAND_CMD_READID, this->base + ONENAND_BOOTRAM); 3291 3292 /* Read manufacturer and device IDs from BootRAM */ 3293 bram_maf_id = this->read_word(this->base + ONENAND_BOOTRAM + 0x0); 3294 bram_dev_id = this->read_word(this->base + ONENAND_BOOTRAM + 0x2); 3295 3296 /* Reset OneNAND to read default register values */ 3297 this->write_word(ONENAND_CMD_RESET, this->base + ONENAND_BOOTRAM); 3298 /* Wait reset */ 3299 this->wait(mtd, FL_RESETING); 3300 3301 /* Restore system configuration 1 */ 3302 this->write_word(syscfg, this->base + ONENAND_REG_SYS_CFG1); 3303 3304 /* Check manufacturer ID */ 3305 if (onenand_check_maf(bram_maf_id)) 3306 return -ENXIO; 3307 3308 /* Read manufacturer and device IDs from Register */ 3309 maf_id = this->read_word(this->base + ONENAND_REG_MANUFACTURER_ID); 3310 dev_id = this->read_word(this->base + ONENAND_REG_DEVICE_ID); 3311 ver_id = this->read_word(this->base + ONENAND_REG_VERSION_ID); 3312 this->technology = this->read_word(this->base + ONENAND_REG_TECHNOLOGY); 3313 3314 /* Check OneNAND device */ 3315 if (maf_id != bram_maf_id || dev_id != bram_dev_id) 3316 return -ENXIO; 3317 3318 /* Flash device information */ 3319 onenand_print_device_info(dev_id, ver_id); 3320 this->device_id = dev_id; 3321 this->version_id = ver_id; 3322 3323 density = onenand_get_density(dev_id); 3324 if (FLEXONENAND(this)) { 3325 this->dies = ONENAND_IS_DDP(this) ? 2 : 1; 3326 /* Maximum possible erase regions */ 3327 mtd->numeraseregions = this->dies << 1; 3328 mtd->eraseregions = kzalloc(sizeof(struct mtd_erase_region_info) 3329 * (this->dies << 1), GFP_KERNEL); 3330 if (!mtd->eraseregions) 3331 return -ENOMEM; 3332 } 3333 3334 /* 3335 * For Flex-OneNAND, chipsize represents maximum possible device size. 3336 * mtd->size represents the actual device size. 3337 */ 3338 this->chipsize = (16 << density) << 20; 3339 3340 /* OneNAND page size & block size */ 3341 /* The data buffer size is equal to page size */ 3342 mtd->writesize = this->read_word(this->base + ONENAND_REG_DATA_BUFFER_SIZE); 3343 /* We use the full BufferRAM */ 3344 if (ONENAND_IS_MLC(this)) 3345 mtd->writesize <<= 1; 3346 3347 mtd->oobsize = mtd->writesize >> 5; 3348 /* Pages per a block are always 64 in OneNAND */ 3349 mtd->erasesize = mtd->writesize << 6; 3350 /* 3351 * Flex-OneNAND SLC area has 64 pages per block. 3352 * Flex-OneNAND MLC area has 128 pages per block. 3353 * Expose MLC erase size to find erase_shift and page_mask. 3354 */ 3355 if (FLEXONENAND(this)) 3356 mtd->erasesize <<= 1; 3357 3358 this->erase_shift = ffs(mtd->erasesize) - 1; 3359 this->page_shift = ffs(mtd->writesize) - 1; 3360 this->page_mask = (1 << (this->erase_shift - this->page_shift)) - 1; 3361 /* Set density mask. it is used for DDP */ 3362 if (ONENAND_IS_DDP(this)) 3363 this->density_mask = this->chipsize >> (this->erase_shift + 1); 3364 /* It's real page size */ 3365 this->writesize = mtd->writesize; 3366 3367 /* REVISIT: Multichip handling */ 3368 3369 if (FLEXONENAND(this)) 3370 flexonenand_get_size(mtd); 3371 else 3372 mtd->size = this->chipsize; 3373 3374 /* Check OneNAND features */ 3375 onenand_check_features(mtd); 3376 3377 /* 3378 * We emulate the 4KiB page and 256KiB erase block size 3379 * But oobsize is still 64 bytes. 3380 * It is only valid if you turn on 2X program support, 3381 * Otherwise it will be ignored by compiler. 3382 */ 3383 if (ONENAND_IS_2PLANE(this)) { 3384 mtd->writesize <<= 1; 3385 mtd->erasesize <<= 1; 3386 } 3387 3388 return 0; 3389} 3390 3391/** 3392 * onenand_suspend - [MTD Interface] Suspend the OneNAND flash 3393 * @param mtd MTD device structure 3394 */ 3395static int onenand_suspend(struct mtd_info *mtd) 3396{ 3397 return onenand_get_device(mtd, FL_PM_SUSPENDED); 3398} 3399 3400/** 3401 * onenand_resume - [MTD Interface] Resume the OneNAND flash 3402 * @param mtd MTD device structure 3403 */ 3404static void onenand_resume(struct mtd_info *mtd) 3405{ 3406 struct onenand_chip *this = mtd->priv; 3407 3408 if (this->state == FL_PM_SUSPENDED) 3409 onenand_release_device(mtd); 3410 else 3411 printk(KERN_ERR "resume() called for the chip which is not" 3412 "in suspended state\n"); 3413} 3414 3415/** 3416 * onenand_scan - [OneNAND Interface] Scan for the OneNAND device 3417 * @param mtd MTD device structure 3418 * @param maxchips Number of chips to scan for 3419 * 3420 * This fills out all the not initialized function pointers 3421 * with the defaults. 3422 * The flash ID is read and the mtd/chip structures are 3423 * filled with the appropriate values. 3424 */ 3425int onenand_scan(struct mtd_info *mtd, int maxchips) 3426{ 3427 int i, ret; 3428 struct onenand_chip *this = mtd->priv; 3429 3430 if (!this->read_word) 3431 this->read_word = onenand_readw; 3432 if (!this->write_word) 3433 this->write_word = onenand_writew; 3434 3435 if (!this->command) 3436 this->command = onenand_command; 3437 if (!this->wait) 3438 onenand_setup_wait(mtd); 3439 if (!this->bbt_wait) 3440 this->bbt_wait = onenand_bbt_wait; 3441 if (!this->unlock_all) 3442 this->unlock_all = onenand_unlock_all; 3443 3444 if (!this->read_bufferram) 3445 this->read_bufferram = onenand_read_bufferram; 3446 if (!this->write_bufferram) 3447 this->write_bufferram = onenand_write_bufferram; 3448 3449 if (!this->block_markbad) 3450 this->block_markbad = onenand_default_block_markbad; 3451 if (!this->scan_bbt) 3452 this->scan_bbt = onenand_default_bbt; 3453 3454 if (onenand_probe(mtd)) 3455 return -ENXIO; 3456 3457 /* Set Sync. Burst Read after probing */ 3458 if (this->mmcontrol) { 3459 printk(KERN_INFO "OneNAND Sync. Burst Read support\n"); 3460 this->read_bufferram = onenand_sync_read_bufferram; 3461 } 3462 3463 /* Allocate buffers, if necessary */ 3464 if (!this->page_buf) { 3465 this->page_buf = kzalloc(mtd->writesize, GFP_KERNEL); 3466 if (!this->page_buf) { 3467 printk(KERN_ERR "onenand_scan(): Can't allocate page_buf\n"); 3468 return -ENOMEM; 3469 } 3470 this->options |= ONENAND_PAGEBUF_ALLOC; 3471 } 3472 if (!this->oob_buf) { 3473 this->oob_buf = kzalloc(mtd->oobsize, GFP_KERNEL); 3474 if (!this->oob_buf) { 3475 printk(KERN_ERR "onenand_scan(): Can't allocate oob_buf\n"); 3476 if (this->options & ONENAND_PAGEBUF_ALLOC) { 3477 this->options &= ~ONENAND_PAGEBUF_ALLOC; 3478 kfree(this->page_buf); 3479 } 3480 return -ENOMEM; 3481 } 3482 this->options |= ONENAND_OOBBUF_ALLOC; 3483 } 3484 3485 this->state = FL_READY; 3486 init_waitqueue_head(&this->wq); 3487 spin_lock_init(&this->chip_lock); 3488 3489 /* 3490 * Allow subpage writes up to oobsize. 3491 */ 3492 switch (mtd->oobsize) { 3493 case 128: 3494 this->ecclayout = &onenand_oob_128; 3495 mtd->subpage_sft = 0; 3496 break; 3497 case 64: 3498 this->ecclayout = &onenand_oob_64; 3499 mtd->subpage_sft = 2; 3500 break; 3501 3502 case 32: 3503 this->ecclayout = &onenand_oob_32; 3504 mtd->subpage_sft = 1; 3505 break; 3506 3507 default: 3508 printk(KERN_WARNING "No OOB scheme defined for oobsize %d\n", 3509 mtd->oobsize); 3510 mtd->subpage_sft = 0; 3511 /* To prevent kernel oops */ 3512 this->ecclayout = &onenand_oob_32; 3513 break; 3514 } 3515 3516 this->subpagesize = mtd->writesize >> mtd->subpage_sft; 3517 3518 /* 3519 * The number of bytes available for a client to place data into 3520 * the out of band area 3521 */ 3522 this->ecclayout->oobavail = 0; 3523 for (i = 0; i < MTD_MAX_OOBFREE_ENTRIES && 3524 this->ecclayout->oobfree[i].length; i++) 3525 this->ecclayout->oobavail += 3526 this->ecclayout->oobfree[i].length; 3527 mtd->oobavail = this->ecclayout->oobavail; 3528 3529 mtd->ecclayout = this->ecclayout; 3530 3531 /* Fill in remaining MTD driver data */ 3532 mtd->type = MTD_NANDFLASH; 3533 mtd->flags = MTD_CAP_NANDFLASH; 3534 mtd->erase = onenand_erase; 3535 mtd->point = NULL; 3536 mtd->unpoint = NULL; 3537 mtd->read = onenand_read; 3538 mtd->write = onenand_write; 3539 mtd->read_oob = onenand_read_oob; 3540 mtd->write_oob = onenand_write_oob; 3541 mtd->panic_write = onenand_panic_write; 3542#ifdef CONFIG_MTD_ONENAND_OTP 3543 mtd->get_fact_prot_info = onenand_get_fact_prot_info; 3544 mtd->read_fact_prot_reg = onenand_read_fact_prot_reg; 3545 mtd->get_user_prot_info = onenand_get_user_prot_info; 3546 mtd->read_user_prot_reg = onenand_read_user_prot_reg; 3547 mtd->write_user_prot_reg = onenand_write_user_prot_reg; 3548 mtd->lock_user_prot_reg = onenand_lock_user_prot_reg; 3549#endif 3550 mtd->sync = onenand_sync; 3551 mtd->lock = onenand_lock; 3552 mtd->unlock = onenand_unlock; 3553 mtd->suspend = onenand_suspend; 3554 mtd->resume = onenand_resume; 3555 mtd->block_isbad = onenand_block_isbad; 3556 mtd->block_markbad = onenand_block_markbad; 3557 mtd->owner = THIS_MODULE; 3558 3559 /* Unlock whole block */ 3560 this->unlock_all(mtd); 3561 3562 ret = this->scan_bbt(mtd); 3563 if ((!FLEXONENAND(this)) || ret) 3564 return ret; 3565 3566 /* Change Flex-OneNAND boundaries if required */ 3567 for (i = 0; i < MAX_DIES; i++) 3568 flexonenand_set_boundary(mtd, i, flex_bdry[2 * i], 3569 flex_bdry[(2 * i) + 1]); 3570 3571 return 0; 3572} 3573 3574/** 3575 * onenand_release - [OneNAND Interface] Free resources held by the OneNAND device 3576 * @param mtd MTD device structure 3577 */ 3578void onenand_release(struct mtd_info *mtd) 3579{ 3580 struct onenand_chip *this = mtd->priv; 3581 3582#ifdef CONFIG_MTD_PARTITIONS 3583 /* Deregister partitions */ 3584 del_mtd_partitions (mtd); 3585#endif 3586 /* Deregister the device */ 3587 del_mtd_device (mtd); 3588 3589 /* Free bad block table memory, if allocated */ 3590 if (this->bbm) { 3591 struct bbm_info *bbm = this->bbm; 3592 kfree(bbm->bbt); 3593 kfree(this->bbm); 3594 } 3595 /* Buffers allocated by onenand_scan */ 3596 if (this->options & ONENAND_PAGEBUF_ALLOC) 3597 kfree(this->page_buf); 3598 if (this->options & ONENAND_OOBBUF_ALLOC) 3599 kfree(this->oob_buf); 3600 kfree(mtd->eraseregions); 3601} 3602 3603EXPORT_SYMBOL_GPL(onenand_scan); 3604EXPORT_SYMBOL_GPL(onenand_release); 3605 3606MODULE_LICENSE("GPL"); 3607MODULE_AUTHOR("Kyungmin Park <kyungmin.park@samsung.com>"); 3608MODULE_DESCRIPTION("Generic OneNAND flash driver code");