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1/* sis900.c: A SiS 900/7016 PCI Fast Ethernet driver for Linux. 2 Copyright 1999 Silicon Integrated System Corporation 3 Revision: 1.08.10 Apr. 2 2006 4 5 Modified from the driver which is originally written by Donald Becker. 6 7 This software may be used and distributed according to the terms 8 of the GNU General Public License (GPL), incorporated herein by reference. 9 Drivers based on this skeleton fall under the GPL and must retain 10 the authorship (implicit copyright) notice. 11 12 References: 13 SiS 7016 Fast Ethernet PCI Bus 10/100 Mbps LAN Controller with OnNow Support, 14 preliminary Rev. 1.0 Jan. 14, 1998 15 SiS 900 Fast Ethernet PCI Bus 10/100 Mbps LAN Single Chip with OnNow Support, 16 preliminary Rev. 1.0 Nov. 10, 1998 17 SiS 7014 Single Chip 100BASE-TX/10BASE-T Physical Layer Solution, 18 preliminary Rev. 1.0 Jan. 18, 1998 19 20 Rev 1.08.10 Apr. 2 2006 Daniele Venzano add vlan (jumbo packets) support 21 Rev 1.08.09 Sep. 19 2005 Daniele Venzano add Wake on LAN support 22 Rev 1.08.08 Jan. 22 2005 Daniele Venzano use netif_msg for debugging messages 23 Rev 1.08.07 Nov. 2 2003 Daniele Venzano <venza@brownhat.org> add suspend/resume support 24 Rev 1.08.06 Sep. 24 2002 Mufasa Yang bug fix for Tx timeout & add SiS963 support 25 Rev 1.08.05 Jun. 6 2002 Mufasa Yang bug fix for read_eeprom & Tx descriptor over-boundary 26 Rev 1.08.04 Apr. 25 2002 Mufasa Yang <mufasa@sis.com.tw> added SiS962 support 27 Rev 1.08.03 Feb. 1 2002 Matt Domsch <Matt_Domsch@dell.com> update to use library crc32 function 28 Rev 1.08.02 Nov. 30 2001 Hui-Fen Hsu workaround for EDB & bug fix for dhcp problem 29 Rev 1.08.01 Aug. 25 2001 Hui-Fen Hsu update for 630ET & workaround for ICS1893 PHY 30 Rev 1.08.00 Jun. 11 2001 Hui-Fen Hsu workaround for RTL8201 PHY and some bug fix 31 Rev 1.07.11 Apr. 2 2001 Hui-Fen Hsu updates PCI drivers to use the new pci_set_dma_mask for kernel 2.4.3 32 Rev 1.07.10 Mar. 1 2001 Hui-Fen Hsu <hfhsu@sis.com.tw> some bug fix & 635M/B support 33 Rev 1.07.09 Feb. 9 2001 Dave Jones <davej@suse.de> PCI enable cleanup 34 Rev 1.07.08 Jan. 8 2001 Lei-Chun Chang added RTL8201 PHY support 35 Rev 1.07.07 Nov. 29 2000 Lei-Chun Chang added kernel-doc extractable documentation and 630 workaround fix 36 Rev 1.07.06 Nov. 7 2000 Jeff Garzik <jgarzik@pobox.com> some bug fix and cleaning 37 Rev 1.07.05 Nov. 6 2000 metapirat<metapirat@gmx.de> contribute media type select by ifconfig 38 Rev 1.07.04 Sep. 6 2000 Lei-Chun Chang added ICS1893 PHY support 39 Rev 1.07.03 Aug. 24 2000 Lei-Chun Chang (lcchang@sis.com.tw) modified 630E eqaulizer workaround rule 40 Rev 1.07.01 Aug. 08 2000 Ollie Lho minor update for SiS 630E and SiS 630E A1 41 Rev 1.07 Mar. 07 2000 Ollie Lho bug fix in Rx buffer ring 42 Rev 1.06.04 Feb. 11 2000 Jeff Garzik <jgarzik@pobox.com> softnet and init for kernel 2.4 43 Rev 1.06.03 Dec. 23 1999 Ollie Lho Third release 44 Rev 1.06.02 Nov. 23 1999 Ollie Lho bug in mac probing fixed 45 Rev 1.06.01 Nov. 16 1999 Ollie Lho CRC calculation provide by Joseph Zbiciak (im14u2c@primenet.com) 46 Rev 1.06 Nov. 4 1999 Ollie Lho (ollie@sis.com.tw) Second release 47 Rev 1.05.05 Oct. 29 1999 Ollie Lho (ollie@sis.com.tw) Single buffer Tx/Rx 48 Chin-Shan Li (lcs@sis.com.tw) Added AMD Am79c901 HomePNA PHY support 49 Rev 1.05 Aug. 7 1999 Jim Huang (cmhuang@sis.com.tw) Initial release 50*/ 51 52#include <linux/module.h> 53#include <linux/moduleparam.h> 54#include <linux/kernel.h> 55#include <linux/string.h> 56#include <linux/timer.h> 57#include <linux/errno.h> 58#include <linux/ioport.h> 59#include <linux/slab.h> 60#include <linux/interrupt.h> 61#include <linux/pci.h> 62#include <linux/netdevice.h> 63#include <linux/init.h> 64#include <linux/mii.h> 65#include <linux/etherdevice.h> 66#include <linux/skbuff.h> 67#include <linux/delay.h> 68#include <linux/ethtool.h> 69#include <linux/crc32.h> 70#include <linux/bitops.h> 71#include <linux/dma-mapping.h> 72 73#include <asm/processor.h> /* Processor type for cache alignment. */ 74#include <asm/io.h> 75#include <asm/irq.h> 76#include <asm/uaccess.h> /* User space memory access functions */ 77 78#include "sis900.h" 79 80#define SIS900_MODULE_NAME "sis900" 81#define SIS900_DRV_VERSION "v1.08.10 Apr. 2 2006" 82 83static const char version[] __devinitconst = 84 KERN_INFO "sis900.c: " SIS900_DRV_VERSION "\n"; 85 86static int max_interrupt_work = 40; 87static int multicast_filter_limit = 128; 88 89static int sis900_debug = -1; /* Use SIS900_DEF_MSG as value */ 90 91#define SIS900_DEF_MSG \ 92 (NETIF_MSG_DRV | \ 93 NETIF_MSG_LINK | \ 94 NETIF_MSG_RX_ERR | \ 95 NETIF_MSG_TX_ERR) 96 97/* Time in jiffies before concluding the transmitter is hung. */ 98#define TX_TIMEOUT (4*HZ) 99 100enum { 101 SIS_900 = 0, 102 SIS_7016 103}; 104static const char * card_names[] = { 105 "SiS 900 PCI Fast Ethernet", 106 "SiS 7016 PCI Fast Ethernet" 107}; 108static struct pci_device_id sis900_pci_tbl [] = { 109 {PCI_VENDOR_ID_SI, PCI_DEVICE_ID_SI_900, 110 PCI_ANY_ID, PCI_ANY_ID, 0, 0, SIS_900}, 111 {PCI_VENDOR_ID_SI, PCI_DEVICE_ID_SI_7016, 112 PCI_ANY_ID, PCI_ANY_ID, 0, 0, SIS_7016}, 113 {0,} 114}; 115MODULE_DEVICE_TABLE (pci, sis900_pci_tbl); 116 117static void sis900_read_mode(struct net_device *net_dev, int *speed, int *duplex); 118 119static const struct mii_chip_info { 120 const char * name; 121 u16 phy_id0; 122 u16 phy_id1; 123 u8 phy_types; 124#define HOME 0x0001 125#define LAN 0x0002 126#define MIX 0x0003 127#define UNKNOWN 0x0 128} mii_chip_table[] = { 129 { "SiS 900 Internal MII PHY", 0x001d, 0x8000, LAN }, 130 { "SiS 7014 Physical Layer Solution", 0x0016, 0xf830, LAN }, 131 { "SiS 900 on Foxconn 661 7MI", 0x0143, 0xBC70, LAN }, 132 { "Altimata AC101LF PHY", 0x0022, 0x5520, LAN }, 133 { "ADM 7001 LAN PHY", 0x002e, 0xcc60, LAN }, 134 { "AMD 79C901 10BASE-T PHY", 0x0000, 0x6B70, LAN }, 135 { "AMD 79C901 HomePNA PHY", 0x0000, 0x6B90, HOME}, 136 { "ICS LAN PHY", 0x0015, 0xF440, LAN }, 137 { "ICS LAN PHY", 0x0143, 0xBC70, LAN }, 138 { "NS 83851 PHY", 0x2000, 0x5C20, MIX }, 139 { "NS 83847 PHY", 0x2000, 0x5C30, MIX }, 140 { "Realtek RTL8201 PHY", 0x0000, 0x8200, LAN }, 141 { "VIA 6103 PHY", 0x0101, 0x8f20, LAN }, 142 {NULL,}, 143}; 144 145struct mii_phy { 146 struct mii_phy * next; 147 int phy_addr; 148 u16 phy_id0; 149 u16 phy_id1; 150 u16 status; 151 u8 phy_types; 152}; 153 154typedef struct _BufferDesc { 155 u32 link; 156 u32 cmdsts; 157 u32 bufptr; 158} BufferDesc; 159 160struct sis900_private { 161 struct pci_dev * pci_dev; 162 163 spinlock_t lock; 164 165 struct mii_phy * mii; 166 struct mii_phy * first_mii; /* record the first mii structure */ 167 unsigned int cur_phy; 168 struct mii_if_info mii_info; 169 170 struct timer_list timer; /* Link status detection timer. */ 171 u8 autong_complete; /* 1: auto-negotiate complete */ 172 173 u32 msg_enable; 174 175 unsigned int cur_rx, dirty_rx; /* producer/comsumer pointers for Tx/Rx ring */ 176 unsigned int cur_tx, dirty_tx; 177 178 /* The saved address of a sent/receive-in-place packet buffer */ 179 struct sk_buff *tx_skbuff[NUM_TX_DESC]; 180 struct sk_buff *rx_skbuff[NUM_RX_DESC]; 181 BufferDesc *tx_ring; 182 BufferDesc *rx_ring; 183 184 dma_addr_t tx_ring_dma; 185 dma_addr_t rx_ring_dma; 186 187 unsigned int tx_full; /* The Tx queue is full. */ 188 u8 host_bridge_rev; 189 u8 chipset_rev; 190}; 191 192MODULE_AUTHOR("Jim Huang <cmhuang@sis.com.tw>, Ollie Lho <ollie@sis.com.tw>"); 193MODULE_DESCRIPTION("SiS 900 PCI Fast Ethernet driver"); 194MODULE_LICENSE("GPL"); 195 196module_param(multicast_filter_limit, int, 0444); 197module_param(max_interrupt_work, int, 0444); 198module_param(sis900_debug, int, 0444); 199MODULE_PARM_DESC(multicast_filter_limit, "SiS 900/7016 maximum number of filtered multicast addresses"); 200MODULE_PARM_DESC(max_interrupt_work, "SiS 900/7016 maximum events handled per interrupt"); 201MODULE_PARM_DESC(sis900_debug, "SiS 900/7016 bitmapped debugging message level"); 202 203#ifdef CONFIG_NET_POLL_CONTROLLER 204static void sis900_poll(struct net_device *dev); 205#endif 206static int sis900_open(struct net_device *net_dev); 207static int sis900_mii_probe (struct net_device * net_dev); 208static void sis900_init_rxfilter (struct net_device * net_dev); 209static u16 read_eeprom(long ioaddr, int location); 210static int mdio_read(struct net_device *net_dev, int phy_id, int location); 211static void mdio_write(struct net_device *net_dev, int phy_id, int location, int val); 212static void sis900_timer(unsigned long data); 213static void sis900_check_mode (struct net_device *net_dev, struct mii_phy *mii_phy); 214static void sis900_tx_timeout(struct net_device *net_dev); 215static void sis900_init_tx_ring(struct net_device *net_dev); 216static void sis900_init_rx_ring(struct net_device *net_dev); 217static netdev_tx_t sis900_start_xmit(struct sk_buff *skb, 218 struct net_device *net_dev); 219static int sis900_rx(struct net_device *net_dev); 220static void sis900_finish_xmit (struct net_device *net_dev); 221static irqreturn_t sis900_interrupt(int irq, void *dev_instance); 222static int sis900_close(struct net_device *net_dev); 223static int mii_ioctl(struct net_device *net_dev, struct ifreq *rq, int cmd); 224static u16 sis900_mcast_bitnr(u8 *addr, u8 revision); 225static void set_rx_mode(struct net_device *net_dev); 226static void sis900_reset(struct net_device *net_dev); 227static void sis630_set_eq(struct net_device *net_dev, u8 revision); 228static int sis900_set_config(struct net_device *dev, struct ifmap *map); 229static u16 sis900_default_phy(struct net_device * net_dev); 230static void sis900_set_capability( struct net_device *net_dev ,struct mii_phy *phy); 231static u16 sis900_reset_phy(struct net_device *net_dev, int phy_addr); 232static void sis900_auto_negotiate(struct net_device *net_dev, int phy_addr); 233static void sis900_set_mode (long ioaddr, int speed, int duplex); 234static const struct ethtool_ops sis900_ethtool_ops; 235 236/** 237 * sis900_get_mac_addr - Get MAC address for stand alone SiS900 model 238 * @pci_dev: the sis900 pci device 239 * @net_dev: the net device to get address for 240 * 241 * Older SiS900 and friends, use EEPROM to store MAC address. 242 * MAC address is read from read_eeprom() into @net_dev->dev_addr. 243 */ 244 245static int __devinit sis900_get_mac_addr(struct pci_dev * pci_dev, struct net_device *net_dev) 246{ 247 long ioaddr = pci_resource_start(pci_dev, 0); 248 u16 signature; 249 int i; 250 251 /* check to see if we have sane EEPROM */ 252 signature = (u16) read_eeprom(ioaddr, EEPROMSignature); 253 if (signature == 0xffff || signature == 0x0000) { 254 printk (KERN_WARNING "%s: Error EERPOM read %x\n", 255 pci_name(pci_dev), signature); 256 return 0; 257 } 258 259 /* get MAC address from EEPROM */ 260 for (i = 0; i < 3; i++) 261 ((u16 *)(net_dev->dev_addr))[i] = read_eeprom(ioaddr, i+EEPROMMACAddr); 262 263 return 1; 264} 265 266/** 267 * sis630e_get_mac_addr - Get MAC address for SiS630E model 268 * @pci_dev: the sis900 pci device 269 * @net_dev: the net device to get address for 270 * 271 * SiS630E model, use APC CMOS RAM to store MAC address. 272 * APC CMOS RAM is accessed through ISA bridge. 273 * MAC address is read into @net_dev->dev_addr. 274 */ 275 276static int __devinit sis630e_get_mac_addr(struct pci_dev * pci_dev, 277 struct net_device *net_dev) 278{ 279 struct pci_dev *isa_bridge = NULL; 280 u8 reg; 281 int i; 282 283 isa_bridge = pci_get_device(PCI_VENDOR_ID_SI, 0x0008, isa_bridge); 284 if (!isa_bridge) 285 isa_bridge = pci_get_device(PCI_VENDOR_ID_SI, 0x0018, isa_bridge); 286 if (!isa_bridge) { 287 printk(KERN_WARNING "%s: Can not find ISA bridge\n", 288 pci_name(pci_dev)); 289 return 0; 290 } 291 pci_read_config_byte(isa_bridge, 0x48, &reg); 292 pci_write_config_byte(isa_bridge, 0x48, reg | 0x40); 293 294 for (i = 0; i < 6; i++) { 295 outb(0x09 + i, 0x70); 296 ((u8 *)(net_dev->dev_addr))[i] = inb(0x71); 297 } 298 pci_write_config_byte(isa_bridge, 0x48, reg & ~0x40); 299 pci_dev_put(isa_bridge); 300 301 return 1; 302} 303 304 305/** 306 * sis635_get_mac_addr - Get MAC address for SIS635 model 307 * @pci_dev: the sis900 pci device 308 * @net_dev: the net device to get address for 309 * 310 * SiS635 model, set MAC Reload Bit to load Mac address from APC 311 * to rfdr. rfdr is accessed through rfcr. MAC address is read into 312 * @net_dev->dev_addr. 313 */ 314 315static int __devinit sis635_get_mac_addr(struct pci_dev * pci_dev, 316 struct net_device *net_dev) 317{ 318 long ioaddr = net_dev->base_addr; 319 u32 rfcrSave; 320 u32 i; 321 322 rfcrSave = inl(rfcr + ioaddr); 323 324 outl(rfcrSave | RELOAD, ioaddr + cr); 325 outl(0, ioaddr + cr); 326 327 /* disable packet filtering before setting filter */ 328 outl(rfcrSave & ~RFEN, rfcr + ioaddr); 329 330 /* load MAC addr to filter data register */ 331 for (i = 0 ; i < 3 ; i++) { 332 outl((i << RFADDR_shift), ioaddr + rfcr); 333 *( ((u16 *)net_dev->dev_addr) + i) = inw(ioaddr + rfdr); 334 } 335 336 /* enable packet filtering */ 337 outl(rfcrSave | RFEN, rfcr + ioaddr); 338 339 return 1; 340} 341 342/** 343 * sis96x_get_mac_addr - Get MAC address for SiS962 or SiS963 model 344 * @pci_dev: the sis900 pci device 345 * @net_dev: the net device to get address for 346 * 347 * SiS962 or SiS963 model, use EEPROM to store MAC address. And EEPROM 348 * is shared by 349 * LAN and 1394. When access EEPROM, send EEREQ signal to hardware first 350 * and wait for EEGNT. If EEGNT is ON, EEPROM is permitted to be access 351 * by LAN, otherwise is not. After MAC address is read from EEPROM, send 352 * EEDONE signal to refuse EEPROM access by LAN. 353 * The EEPROM map of SiS962 or SiS963 is different to SiS900. 354 * The signature field in SiS962 or SiS963 spec is meaningless. 355 * MAC address is read into @net_dev->dev_addr. 356 */ 357 358static int __devinit sis96x_get_mac_addr(struct pci_dev * pci_dev, 359 struct net_device *net_dev) 360{ 361 long ioaddr = net_dev->base_addr; 362 long ee_addr = ioaddr + mear; 363 u32 waittime = 0; 364 int i; 365 366 outl(EEREQ, ee_addr); 367 while(waittime < 2000) { 368 if(inl(ee_addr) & EEGNT) { 369 370 /* get MAC address from EEPROM */ 371 for (i = 0; i < 3; i++) 372 ((u16 *)(net_dev->dev_addr))[i] = read_eeprom(ioaddr, i+EEPROMMACAddr); 373 374 outl(EEDONE, ee_addr); 375 return 1; 376 } else { 377 udelay(1); 378 waittime ++; 379 } 380 } 381 outl(EEDONE, ee_addr); 382 return 0; 383} 384 385static const struct net_device_ops sis900_netdev_ops = { 386 .ndo_open = sis900_open, 387 .ndo_stop = sis900_close, 388 .ndo_start_xmit = sis900_start_xmit, 389 .ndo_set_config = sis900_set_config, 390 .ndo_set_multicast_list = set_rx_mode, 391 .ndo_change_mtu = eth_change_mtu, 392 .ndo_validate_addr = eth_validate_addr, 393 .ndo_set_mac_address = eth_mac_addr, 394 .ndo_do_ioctl = mii_ioctl, 395 .ndo_tx_timeout = sis900_tx_timeout, 396#ifdef CONFIG_NET_POLL_CONTROLLER 397 .ndo_poll_controller = sis900_poll, 398#endif 399}; 400 401/** 402 * sis900_probe - Probe for sis900 device 403 * @pci_dev: the sis900 pci device 404 * @pci_id: the pci device ID 405 * 406 * Check and probe sis900 net device for @pci_dev. 407 * Get mac address according to the chip revision, 408 * and assign SiS900-specific entries in the device structure. 409 * ie: sis900_open(), sis900_start_xmit(), sis900_close(), etc. 410 */ 411 412static int __devinit sis900_probe(struct pci_dev *pci_dev, 413 const struct pci_device_id *pci_id) 414{ 415 struct sis900_private *sis_priv; 416 struct net_device *net_dev; 417 struct pci_dev *dev; 418 dma_addr_t ring_dma; 419 void *ring_space; 420 long ioaddr; 421 int i, ret; 422 const char *card_name = card_names[pci_id->driver_data]; 423 const char *dev_name = pci_name(pci_dev); 424 425/* when built into the kernel, we only print version if device is found */ 426#ifndef MODULE 427 static int printed_version; 428 if (!printed_version++) 429 printk(version); 430#endif 431 432 /* setup various bits in PCI command register */ 433 ret = pci_enable_device(pci_dev); 434 if(ret) return ret; 435 436 i = pci_set_dma_mask(pci_dev, DMA_BIT_MASK(32)); 437 if(i){ 438 printk(KERN_ERR "sis900.c: architecture does not support " 439 "32bit PCI busmaster DMA\n"); 440 return i; 441 } 442 443 pci_set_master(pci_dev); 444 445 net_dev = alloc_etherdev(sizeof(struct sis900_private)); 446 if (!net_dev) 447 return -ENOMEM; 448 SET_NETDEV_DEV(net_dev, &pci_dev->dev); 449 450 /* We do a request_region() to register /proc/ioports info. */ 451 ioaddr = pci_resource_start(pci_dev, 0); 452 ret = pci_request_regions(pci_dev, "sis900"); 453 if (ret) 454 goto err_out; 455 456 sis_priv = netdev_priv(net_dev); 457 net_dev->base_addr = ioaddr; 458 net_dev->irq = pci_dev->irq; 459 sis_priv->pci_dev = pci_dev; 460 spin_lock_init(&sis_priv->lock); 461 462 pci_set_drvdata(pci_dev, net_dev); 463 464 ring_space = pci_alloc_consistent(pci_dev, TX_TOTAL_SIZE, &ring_dma); 465 if (!ring_space) { 466 ret = -ENOMEM; 467 goto err_out_cleardev; 468 } 469 sis_priv->tx_ring = (BufferDesc *)ring_space; 470 sis_priv->tx_ring_dma = ring_dma; 471 472 ring_space = pci_alloc_consistent(pci_dev, RX_TOTAL_SIZE, &ring_dma); 473 if (!ring_space) { 474 ret = -ENOMEM; 475 goto err_unmap_tx; 476 } 477 sis_priv->rx_ring = (BufferDesc *)ring_space; 478 sis_priv->rx_ring_dma = ring_dma; 479 480 /* The SiS900-specific entries in the device structure. */ 481 net_dev->netdev_ops = &sis900_netdev_ops; 482 net_dev->watchdog_timeo = TX_TIMEOUT; 483 net_dev->ethtool_ops = &sis900_ethtool_ops; 484 485 if (sis900_debug > 0) 486 sis_priv->msg_enable = sis900_debug; 487 else 488 sis_priv->msg_enable = SIS900_DEF_MSG; 489 490 sis_priv->mii_info.dev = net_dev; 491 sis_priv->mii_info.mdio_read = mdio_read; 492 sis_priv->mii_info.mdio_write = mdio_write; 493 sis_priv->mii_info.phy_id_mask = 0x1f; 494 sis_priv->mii_info.reg_num_mask = 0x1f; 495 496 /* Get Mac address according to the chip revision */ 497 pci_read_config_byte(pci_dev, PCI_CLASS_REVISION, &(sis_priv->chipset_rev)); 498 if(netif_msg_probe(sis_priv)) 499 printk(KERN_DEBUG "%s: detected revision %2.2x, " 500 "trying to get MAC address...\n", 501 dev_name, sis_priv->chipset_rev); 502 503 ret = 0; 504 if (sis_priv->chipset_rev == SIS630E_900_REV) 505 ret = sis630e_get_mac_addr(pci_dev, net_dev); 506 else if ((sis_priv->chipset_rev > 0x81) && (sis_priv->chipset_rev <= 0x90) ) 507 ret = sis635_get_mac_addr(pci_dev, net_dev); 508 else if (sis_priv->chipset_rev == SIS96x_900_REV) 509 ret = sis96x_get_mac_addr(pci_dev, net_dev); 510 else 511 ret = sis900_get_mac_addr(pci_dev, net_dev); 512 513 if (!ret || !is_valid_ether_addr(net_dev->dev_addr)) { 514 random_ether_addr(net_dev->dev_addr); 515 printk(KERN_WARNING "%s: Unreadable or invalid MAC address," 516 "using random generated one\n", dev_name); 517 } 518 519 /* 630ET : set the mii access mode as software-mode */ 520 if (sis_priv->chipset_rev == SIS630ET_900_REV) 521 outl(ACCESSMODE | inl(ioaddr + cr), ioaddr + cr); 522 523 /* probe for mii transceiver */ 524 if (sis900_mii_probe(net_dev) == 0) { 525 printk(KERN_WARNING "%s: Error probing MII device.\n", 526 dev_name); 527 ret = -ENODEV; 528 goto err_unmap_rx; 529 } 530 531 /* save our host bridge revision */ 532 dev = pci_get_device(PCI_VENDOR_ID_SI, PCI_DEVICE_ID_SI_630, NULL); 533 if (dev) { 534 pci_read_config_byte(dev, PCI_CLASS_REVISION, &sis_priv->host_bridge_rev); 535 pci_dev_put(dev); 536 } 537 538 ret = register_netdev(net_dev); 539 if (ret) 540 goto err_unmap_rx; 541 542 /* print some information about our NIC */ 543 printk(KERN_INFO "%s: %s at %#lx, IRQ %d, %pM\n", 544 net_dev->name, card_name, ioaddr, net_dev->irq, 545 net_dev->dev_addr); 546 547 /* Detect Wake on Lan support */ 548 ret = (inl(net_dev->base_addr + CFGPMC) & PMESP) >> 27; 549 if (netif_msg_probe(sis_priv) && (ret & PME_D3C) == 0) 550 printk(KERN_INFO "%s: Wake on LAN only available from suspend to RAM.", net_dev->name); 551 552 return 0; 553 554 err_unmap_rx: 555 pci_free_consistent(pci_dev, RX_TOTAL_SIZE, sis_priv->rx_ring, 556 sis_priv->rx_ring_dma); 557 err_unmap_tx: 558 pci_free_consistent(pci_dev, TX_TOTAL_SIZE, sis_priv->tx_ring, 559 sis_priv->tx_ring_dma); 560 err_out_cleardev: 561 pci_set_drvdata(pci_dev, NULL); 562 pci_release_regions(pci_dev); 563 err_out: 564 free_netdev(net_dev); 565 return ret; 566} 567 568/** 569 * sis900_mii_probe - Probe MII PHY for sis900 570 * @net_dev: the net device to probe for 571 * 572 * Search for total of 32 possible mii phy addresses. 573 * Identify and set current phy if found one, 574 * return error if it failed to found. 575 */ 576 577static int __devinit sis900_mii_probe(struct net_device * net_dev) 578{ 579 struct sis900_private *sis_priv = netdev_priv(net_dev); 580 const char *dev_name = pci_name(sis_priv->pci_dev); 581 u16 poll_bit = MII_STAT_LINK, status = 0; 582 unsigned long timeout = jiffies + 5 * HZ; 583 int phy_addr; 584 585 sis_priv->mii = NULL; 586 587 /* search for total of 32 possible mii phy addresses */ 588 for (phy_addr = 0; phy_addr < 32; phy_addr++) { 589 struct mii_phy * mii_phy = NULL; 590 u16 mii_status; 591 int i; 592 593 mii_phy = NULL; 594 for(i = 0; i < 2; i++) 595 mii_status = mdio_read(net_dev, phy_addr, MII_STATUS); 596 597 if (mii_status == 0xffff || mii_status == 0x0000) { 598 if (netif_msg_probe(sis_priv)) 599 printk(KERN_DEBUG "%s: MII at address %d" 600 " not accessible\n", 601 dev_name, phy_addr); 602 continue; 603 } 604 605 if ((mii_phy = kmalloc(sizeof(struct mii_phy), GFP_KERNEL)) == NULL) { 606 printk(KERN_WARNING "Cannot allocate mem for struct mii_phy\n"); 607 mii_phy = sis_priv->first_mii; 608 while (mii_phy) { 609 struct mii_phy *phy; 610 phy = mii_phy; 611 mii_phy = mii_phy->next; 612 kfree(phy); 613 } 614 return 0; 615 } 616 617 mii_phy->phy_id0 = mdio_read(net_dev, phy_addr, MII_PHY_ID0); 618 mii_phy->phy_id1 = mdio_read(net_dev, phy_addr, MII_PHY_ID1); 619 mii_phy->phy_addr = phy_addr; 620 mii_phy->status = mii_status; 621 mii_phy->next = sis_priv->mii; 622 sis_priv->mii = mii_phy; 623 sis_priv->first_mii = mii_phy; 624 625 for (i = 0; mii_chip_table[i].phy_id1; i++) 626 if ((mii_phy->phy_id0 == mii_chip_table[i].phy_id0 ) && 627 ((mii_phy->phy_id1 & 0xFFF0) == mii_chip_table[i].phy_id1)){ 628 mii_phy->phy_types = mii_chip_table[i].phy_types; 629 if (mii_chip_table[i].phy_types == MIX) 630 mii_phy->phy_types = 631 (mii_status & (MII_STAT_CAN_TX_FDX | MII_STAT_CAN_TX)) ? LAN : HOME; 632 printk(KERN_INFO "%s: %s transceiver found " 633 "at address %d.\n", 634 dev_name, 635 mii_chip_table[i].name, 636 phy_addr); 637 break; 638 } 639 640 if( !mii_chip_table[i].phy_id1 ) { 641 printk(KERN_INFO "%s: Unknown PHY transceiver found at address %d.\n", 642 dev_name, phy_addr); 643 mii_phy->phy_types = UNKNOWN; 644 } 645 } 646 647 if (sis_priv->mii == NULL) { 648 printk(KERN_INFO "%s: No MII transceivers found!\n", dev_name); 649 return 0; 650 } 651 652 /* select default PHY for mac */ 653 sis_priv->mii = NULL; 654 sis900_default_phy( net_dev ); 655 656 /* Reset phy if default phy is internal sis900 */ 657 if ((sis_priv->mii->phy_id0 == 0x001D) && 658 ((sis_priv->mii->phy_id1&0xFFF0) == 0x8000)) 659 status = sis900_reset_phy(net_dev, sis_priv->cur_phy); 660 661 /* workaround for ICS1893 PHY */ 662 if ((sis_priv->mii->phy_id0 == 0x0015) && 663 ((sis_priv->mii->phy_id1&0xFFF0) == 0xF440)) 664 mdio_write(net_dev, sis_priv->cur_phy, 0x0018, 0xD200); 665 666 if(status & MII_STAT_LINK){ 667 while (poll_bit) { 668 yield(); 669 670 poll_bit ^= (mdio_read(net_dev, sis_priv->cur_phy, MII_STATUS) & poll_bit); 671 if (time_after_eq(jiffies, timeout)) { 672 printk(KERN_WARNING "%s: reset phy and link down now\n", 673 dev_name); 674 return -ETIME; 675 } 676 } 677 } 678 679 if (sis_priv->chipset_rev == SIS630E_900_REV) { 680 /* SiS 630E has some bugs on default value of PHY registers */ 681 mdio_write(net_dev, sis_priv->cur_phy, MII_ANADV, 0x05e1); 682 mdio_write(net_dev, sis_priv->cur_phy, MII_CONFIG1, 0x22); 683 mdio_write(net_dev, sis_priv->cur_phy, MII_CONFIG2, 0xff00); 684 mdio_write(net_dev, sis_priv->cur_phy, MII_MASK, 0xffc0); 685 //mdio_write(net_dev, sis_priv->cur_phy, MII_CONTROL, 0x1000); 686 } 687 688 if (sis_priv->mii->status & MII_STAT_LINK) 689 netif_carrier_on(net_dev); 690 else 691 netif_carrier_off(net_dev); 692 693 return 1; 694} 695 696/** 697 * sis900_default_phy - Select default PHY for sis900 mac. 698 * @net_dev: the net device to probe for 699 * 700 * Select first detected PHY with link as default. 701 * If no one is link on, select PHY whose types is HOME as default. 702 * If HOME doesn't exist, select LAN. 703 */ 704 705static u16 sis900_default_phy(struct net_device * net_dev) 706{ 707 struct sis900_private *sis_priv = netdev_priv(net_dev); 708 struct mii_phy *phy = NULL, *phy_home = NULL, 709 *default_phy = NULL, *phy_lan = NULL; 710 u16 status; 711 712 for (phy=sis_priv->first_mii; phy; phy=phy->next) { 713 status = mdio_read(net_dev, phy->phy_addr, MII_STATUS); 714 status = mdio_read(net_dev, phy->phy_addr, MII_STATUS); 715 716 /* Link ON & Not select default PHY & not ghost PHY */ 717 if ((status & MII_STAT_LINK) && !default_phy && 718 (phy->phy_types != UNKNOWN)) 719 default_phy = phy; 720 else { 721 status = mdio_read(net_dev, phy->phy_addr, MII_CONTROL); 722 mdio_write(net_dev, phy->phy_addr, MII_CONTROL, 723 status | MII_CNTL_AUTO | MII_CNTL_ISOLATE); 724 if (phy->phy_types == HOME) 725 phy_home = phy; 726 else if(phy->phy_types == LAN) 727 phy_lan = phy; 728 } 729 } 730 731 if (!default_phy && phy_home) 732 default_phy = phy_home; 733 else if (!default_phy && phy_lan) 734 default_phy = phy_lan; 735 else if (!default_phy) 736 default_phy = sis_priv->first_mii; 737 738 if (sis_priv->mii != default_phy) { 739 sis_priv->mii = default_phy; 740 sis_priv->cur_phy = default_phy->phy_addr; 741 printk(KERN_INFO "%s: Using transceiver found at address %d as default\n", 742 pci_name(sis_priv->pci_dev), sis_priv->cur_phy); 743 } 744 745 sis_priv->mii_info.phy_id = sis_priv->cur_phy; 746 747 status = mdio_read(net_dev, sis_priv->cur_phy, MII_CONTROL); 748 status &= (~MII_CNTL_ISOLATE); 749 750 mdio_write(net_dev, sis_priv->cur_phy, MII_CONTROL, status); 751 status = mdio_read(net_dev, sis_priv->cur_phy, MII_STATUS); 752 status = mdio_read(net_dev, sis_priv->cur_phy, MII_STATUS); 753 754 return status; 755} 756 757 758/** 759 * sis900_set_capability - set the media capability of network adapter. 760 * @net_dev : the net device to probe for 761 * @phy : default PHY 762 * 763 * Set the media capability of network adapter according to 764 * mii status register. It's necessary before auto-negotiate. 765 */ 766 767static void sis900_set_capability(struct net_device *net_dev, struct mii_phy *phy) 768{ 769 u16 cap; 770 u16 status; 771 772 status = mdio_read(net_dev, phy->phy_addr, MII_STATUS); 773 status = mdio_read(net_dev, phy->phy_addr, MII_STATUS); 774 775 cap = MII_NWAY_CSMA_CD | 776 ((phy->status & MII_STAT_CAN_TX_FDX)? MII_NWAY_TX_FDX:0) | 777 ((phy->status & MII_STAT_CAN_TX) ? MII_NWAY_TX:0) | 778 ((phy->status & MII_STAT_CAN_T_FDX) ? MII_NWAY_T_FDX:0)| 779 ((phy->status & MII_STAT_CAN_T) ? MII_NWAY_T:0); 780 781 mdio_write(net_dev, phy->phy_addr, MII_ANADV, cap); 782} 783 784 785/* Delay between EEPROM clock transitions. */ 786#define eeprom_delay() inl(ee_addr) 787 788/** 789 * read_eeprom - Read Serial EEPROM 790 * @ioaddr: base i/o address 791 * @location: the EEPROM location to read 792 * 793 * Read Serial EEPROM through EEPROM Access Register. 794 * Note that location is in word (16 bits) unit 795 */ 796 797static u16 __devinit read_eeprom(long ioaddr, int location) 798{ 799 int i; 800 u16 retval = 0; 801 long ee_addr = ioaddr + mear; 802 u32 read_cmd = location | EEread; 803 804 outl(0, ee_addr); 805 eeprom_delay(); 806 outl(EECS, ee_addr); 807 eeprom_delay(); 808 809 /* Shift the read command (9) bits out. */ 810 for (i = 8; i >= 0; i--) { 811 u32 dataval = (read_cmd & (1 << i)) ? EEDI | EECS : EECS; 812 outl(dataval, ee_addr); 813 eeprom_delay(); 814 outl(dataval | EECLK, ee_addr); 815 eeprom_delay(); 816 } 817 outl(EECS, ee_addr); 818 eeprom_delay(); 819 820 /* read the 16-bits data in */ 821 for (i = 16; i > 0; i--) { 822 outl(EECS, ee_addr); 823 eeprom_delay(); 824 outl(EECS | EECLK, ee_addr); 825 eeprom_delay(); 826 retval = (retval << 1) | ((inl(ee_addr) & EEDO) ? 1 : 0); 827 eeprom_delay(); 828 } 829 830 /* Terminate the EEPROM access. */ 831 outl(0, ee_addr); 832 eeprom_delay(); 833 834 return (retval); 835} 836 837/* Read and write the MII management registers using software-generated 838 serial MDIO protocol. Note that the command bits and data bits are 839 send out separately */ 840#define mdio_delay() inl(mdio_addr) 841 842static void mdio_idle(long mdio_addr) 843{ 844 outl(MDIO | MDDIR, mdio_addr); 845 mdio_delay(); 846 outl(MDIO | MDDIR | MDC, mdio_addr); 847} 848 849/* Syncronize the MII management interface by shifting 32 one bits out. */ 850static void mdio_reset(long mdio_addr) 851{ 852 int i; 853 854 for (i = 31; i >= 0; i--) { 855 outl(MDDIR | MDIO, mdio_addr); 856 mdio_delay(); 857 outl(MDDIR | MDIO | MDC, mdio_addr); 858 mdio_delay(); 859 } 860 return; 861} 862 863/** 864 * mdio_read - read MII PHY register 865 * @net_dev: the net device to read 866 * @phy_id: the phy address to read 867 * @location: the phy regiester id to read 868 * 869 * Read MII registers through MDIO and MDC 870 * using MDIO management frame structure and protocol(defined by ISO/IEC). 871 * Please see SiS7014 or ICS spec 872 */ 873 874static int mdio_read(struct net_device *net_dev, int phy_id, int location) 875{ 876 long mdio_addr = net_dev->base_addr + mear; 877 int mii_cmd = MIIread|(phy_id<<MIIpmdShift)|(location<<MIIregShift); 878 u16 retval = 0; 879 int i; 880 881 mdio_reset(mdio_addr); 882 mdio_idle(mdio_addr); 883 884 for (i = 15; i >= 0; i--) { 885 int dataval = (mii_cmd & (1 << i)) ? MDDIR | MDIO : MDDIR; 886 outl(dataval, mdio_addr); 887 mdio_delay(); 888 outl(dataval | MDC, mdio_addr); 889 mdio_delay(); 890 } 891 892 /* Read the 16 data bits. */ 893 for (i = 16; i > 0; i--) { 894 outl(0, mdio_addr); 895 mdio_delay(); 896 retval = (retval << 1) | ((inl(mdio_addr) & MDIO) ? 1 : 0); 897 outl(MDC, mdio_addr); 898 mdio_delay(); 899 } 900 outl(0x00, mdio_addr); 901 902 return retval; 903} 904 905/** 906 * mdio_write - write MII PHY register 907 * @net_dev: the net device to write 908 * @phy_id: the phy address to write 909 * @location: the phy regiester id to write 910 * @value: the register value to write with 911 * 912 * Write MII registers with @value through MDIO and MDC 913 * using MDIO management frame structure and protocol(defined by ISO/IEC) 914 * please see SiS7014 or ICS spec 915 */ 916 917static void mdio_write(struct net_device *net_dev, int phy_id, int location, 918 int value) 919{ 920 long mdio_addr = net_dev->base_addr + mear; 921 int mii_cmd = MIIwrite|(phy_id<<MIIpmdShift)|(location<<MIIregShift); 922 int i; 923 924 mdio_reset(mdio_addr); 925 mdio_idle(mdio_addr); 926 927 /* Shift the command bits out. */ 928 for (i = 15; i >= 0; i--) { 929 int dataval = (mii_cmd & (1 << i)) ? MDDIR | MDIO : MDDIR; 930 outb(dataval, mdio_addr); 931 mdio_delay(); 932 outb(dataval | MDC, mdio_addr); 933 mdio_delay(); 934 } 935 mdio_delay(); 936 937 /* Shift the value bits out. */ 938 for (i = 15; i >= 0; i--) { 939 int dataval = (value & (1 << i)) ? MDDIR | MDIO : MDDIR; 940 outl(dataval, mdio_addr); 941 mdio_delay(); 942 outl(dataval | MDC, mdio_addr); 943 mdio_delay(); 944 } 945 mdio_delay(); 946 947 /* Clear out extra bits. */ 948 for (i = 2; i > 0; i--) { 949 outb(0, mdio_addr); 950 mdio_delay(); 951 outb(MDC, mdio_addr); 952 mdio_delay(); 953 } 954 outl(0x00, mdio_addr); 955 956 return; 957} 958 959 960/** 961 * sis900_reset_phy - reset sis900 mii phy. 962 * @net_dev: the net device to write 963 * @phy_addr: default phy address 964 * 965 * Some specific phy can't work properly without reset. 966 * This function will be called during initialization and 967 * link status change from ON to DOWN. 968 */ 969 970static u16 sis900_reset_phy(struct net_device *net_dev, int phy_addr) 971{ 972 int i; 973 u16 status; 974 975 for (i = 0; i < 2; i++) 976 status = mdio_read(net_dev, phy_addr, MII_STATUS); 977 978 mdio_write( net_dev, phy_addr, MII_CONTROL, MII_CNTL_RESET ); 979 980 return status; 981} 982 983#ifdef CONFIG_NET_POLL_CONTROLLER 984/* 985 * Polling 'interrupt' - used by things like netconsole to send skbs 986 * without having to re-enable interrupts. It's not called while 987 * the interrupt routine is executing. 988*/ 989static void sis900_poll(struct net_device *dev) 990{ 991 disable_irq(dev->irq); 992 sis900_interrupt(dev->irq, dev); 993 enable_irq(dev->irq); 994} 995#endif 996 997/** 998 * sis900_open - open sis900 device 999 * @net_dev: the net device to open 1000 * 1001 * Do some initialization and start net interface. 1002 * enable interrupts and set sis900 timer. 1003 */ 1004 1005static int 1006sis900_open(struct net_device *net_dev) 1007{ 1008 struct sis900_private *sis_priv = netdev_priv(net_dev); 1009 long ioaddr = net_dev->base_addr; 1010 int ret; 1011 1012 /* Soft reset the chip. */ 1013 sis900_reset(net_dev); 1014 1015 /* Equalizer workaround Rule */ 1016 sis630_set_eq(net_dev, sis_priv->chipset_rev); 1017 1018 ret = request_irq(net_dev->irq, &sis900_interrupt, IRQF_SHARED, 1019 net_dev->name, net_dev); 1020 if (ret) 1021 return ret; 1022 1023 sis900_init_rxfilter(net_dev); 1024 1025 sis900_init_tx_ring(net_dev); 1026 sis900_init_rx_ring(net_dev); 1027 1028 set_rx_mode(net_dev); 1029 1030 netif_start_queue(net_dev); 1031 1032 /* Workaround for EDB */ 1033 sis900_set_mode(ioaddr, HW_SPEED_10_MBPS, FDX_CAPABLE_HALF_SELECTED); 1034 1035 /* Enable all known interrupts by setting the interrupt mask. */ 1036 outl((RxSOVR|RxORN|RxERR|RxOK|TxURN|TxERR|TxIDLE), ioaddr + imr); 1037 outl(RxENA | inl(ioaddr + cr), ioaddr + cr); 1038 outl(IE, ioaddr + ier); 1039 1040 sis900_check_mode(net_dev, sis_priv->mii); 1041 1042 /* Set the timer to switch to check for link beat and perhaps switch 1043 to an alternate media type. */ 1044 init_timer(&sis_priv->timer); 1045 sis_priv->timer.expires = jiffies + HZ; 1046 sis_priv->timer.data = (unsigned long)net_dev; 1047 sis_priv->timer.function = &sis900_timer; 1048 add_timer(&sis_priv->timer); 1049 1050 return 0; 1051} 1052 1053/** 1054 * sis900_init_rxfilter - Initialize the Rx filter 1055 * @net_dev: the net device to initialize for 1056 * 1057 * Set receive filter address to our MAC address 1058 * and enable packet filtering. 1059 */ 1060 1061static void 1062sis900_init_rxfilter (struct net_device * net_dev) 1063{ 1064 struct sis900_private *sis_priv = netdev_priv(net_dev); 1065 long ioaddr = net_dev->base_addr; 1066 u32 rfcrSave; 1067 u32 i; 1068 1069 rfcrSave = inl(rfcr + ioaddr); 1070 1071 /* disable packet filtering before setting filter */ 1072 outl(rfcrSave & ~RFEN, rfcr + ioaddr); 1073 1074 /* load MAC addr to filter data register */ 1075 for (i = 0 ; i < 3 ; i++) { 1076 u32 w; 1077 1078 w = (u32) *((u16 *)(net_dev->dev_addr)+i); 1079 outl((i << RFADDR_shift), ioaddr + rfcr); 1080 outl(w, ioaddr + rfdr); 1081 1082 if (netif_msg_hw(sis_priv)) { 1083 printk(KERN_DEBUG "%s: Receive Filter Addrss[%d]=%x\n", 1084 net_dev->name, i, inl(ioaddr + rfdr)); 1085 } 1086 } 1087 1088 /* enable packet filtering */ 1089 outl(rfcrSave | RFEN, rfcr + ioaddr); 1090} 1091 1092/** 1093 * sis900_init_tx_ring - Initialize the Tx descriptor ring 1094 * @net_dev: the net device to initialize for 1095 * 1096 * Initialize the Tx descriptor ring, 1097 */ 1098 1099static void 1100sis900_init_tx_ring(struct net_device *net_dev) 1101{ 1102 struct sis900_private *sis_priv = netdev_priv(net_dev); 1103 long ioaddr = net_dev->base_addr; 1104 int i; 1105 1106 sis_priv->tx_full = 0; 1107 sis_priv->dirty_tx = sis_priv->cur_tx = 0; 1108 1109 for (i = 0; i < NUM_TX_DESC; i++) { 1110 sis_priv->tx_skbuff[i] = NULL; 1111 1112 sis_priv->tx_ring[i].link = sis_priv->tx_ring_dma + 1113 ((i+1)%NUM_TX_DESC)*sizeof(BufferDesc); 1114 sis_priv->tx_ring[i].cmdsts = 0; 1115 sis_priv->tx_ring[i].bufptr = 0; 1116 } 1117 1118 /* load Transmit Descriptor Register */ 1119 outl(sis_priv->tx_ring_dma, ioaddr + txdp); 1120 if (netif_msg_hw(sis_priv)) 1121 printk(KERN_DEBUG "%s: TX descriptor register loaded with: %8.8x\n", 1122 net_dev->name, inl(ioaddr + txdp)); 1123} 1124 1125/** 1126 * sis900_init_rx_ring - Initialize the Rx descriptor ring 1127 * @net_dev: the net device to initialize for 1128 * 1129 * Initialize the Rx descriptor ring, 1130 * and pre-allocate recevie buffers (socket buffer) 1131 */ 1132 1133static void 1134sis900_init_rx_ring(struct net_device *net_dev) 1135{ 1136 struct sis900_private *sis_priv = netdev_priv(net_dev); 1137 long ioaddr = net_dev->base_addr; 1138 int i; 1139 1140 sis_priv->cur_rx = 0; 1141 sis_priv->dirty_rx = 0; 1142 1143 /* init RX descriptor */ 1144 for (i = 0; i < NUM_RX_DESC; i++) { 1145 sis_priv->rx_skbuff[i] = NULL; 1146 1147 sis_priv->rx_ring[i].link = sis_priv->rx_ring_dma + 1148 ((i+1)%NUM_RX_DESC)*sizeof(BufferDesc); 1149 sis_priv->rx_ring[i].cmdsts = 0; 1150 sis_priv->rx_ring[i].bufptr = 0; 1151 } 1152 1153 /* allocate sock buffers */ 1154 for (i = 0; i < NUM_RX_DESC; i++) { 1155 struct sk_buff *skb; 1156 1157 if ((skb = dev_alloc_skb(RX_BUF_SIZE)) == NULL) { 1158 /* not enough memory for skbuff, this makes a "hole" 1159 on the buffer ring, it is not clear how the 1160 hardware will react to this kind of degenerated 1161 buffer */ 1162 break; 1163 } 1164 sis_priv->rx_skbuff[i] = skb; 1165 sis_priv->rx_ring[i].cmdsts = RX_BUF_SIZE; 1166 sis_priv->rx_ring[i].bufptr = pci_map_single(sis_priv->pci_dev, 1167 skb->data, RX_BUF_SIZE, PCI_DMA_FROMDEVICE); 1168 } 1169 sis_priv->dirty_rx = (unsigned int) (i - NUM_RX_DESC); 1170 1171 /* load Receive Descriptor Register */ 1172 outl(sis_priv->rx_ring_dma, ioaddr + rxdp); 1173 if (netif_msg_hw(sis_priv)) 1174 printk(KERN_DEBUG "%s: RX descriptor register loaded with: %8.8x\n", 1175 net_dev->name, inl(ioaddr + rxdp)); 1176} 1177 1178/** 1179 * sis630_set_eq - set phy equalizer value for 630 LAN 1180 * @net_dev: the net device to set equalizer value 1181 * @revision: 630 LAN revision number 1182 * 1183 * 630E equalizer workaround rule(Cyrus Huang 08/15) 1184 * PHY register 14h(Test) 1185 * Bit 14: 0 -- Automatically dectect (default) 1186 * 1 -- Manually set Equalizer filter 1187 * Bit 13: 0 -- (Default) 1188 * 1 -- Speed up convergence of equalizer setting 1189 * Bit 9 : 0 -- (Default) 1190 * 1 -- Disable Baseline Wander 1191 * Bit 3~7 -- Equalizer filter setting 1192 * Link ON: Set Bit 9, 13 to 1, Bit 14 to 0 1193 * Then calculate equalizer value 1194 * Then set equalizer value, and set Bit 14 to 1, Bit 9 to 0 1195 * Link Off:Set Bit 13 to 1, Bit 14 to 0 1196 * Calculate Equalizer value: 1197 * When Link is ON and Bit 14 is 0, SIS900PHY will auto-dectect proper equalizer value. 1198 * When the equalizer is stable, this value is not a fixed value. It will be within 1199 * a small range(eg. 7~9). Then we get a minimum and a maximum value(eg. min=7, max=9) 1200 * 0 <= max <= 4 --> set equalizer to max 1201 * 5 <= max <= 14 --> set equalizer to max+1 or set equalizer to max+2 if max == min 1202 * max >= 15 --> set equalizer to max+5 or set equalizer to max+6 if max == min 1203 */ 1204 1205static void sis630_set_eq(struct net_device *net_dev, u8 revision) 1206{ 1207 struct sis900_private *sis_priv = netdev_priv(net_dev); 1208 u16 reg14h, eq_value=0, max_value=0, min_value=0; 1209 int i, maxcount=10; 1210 1211 if ( !(revision == SIS630E_900_REV || revision == SIS630EA1_900_REV || 1212 revision == SIS630A_900_REV || revision == SIS630ET_900_REV) ) 1213 return; 1214 1215 if (netif_carrier_ok(net_dev)) { 1216 reg14h = mdio_read(net_dev, sis_priv->cur_phy, MII_RESV); 1217 mdio_write(net_dev, sis_priv->cur_phy, MII_RESV, 1218 (0x2200 | reg14h) & 0xBFFF); 1219 for (i=0; i < maxcount; i++) { 1220 eq_value = (0x00F8 & mdio_read(net_dev, 1221 sis_priv->cur_phy, MII_RESV)) >> 3; 1222 if (i == 0) 1223 max_value=min_value=eq_value; 1224 max_value = (eq_value > max_value) ? 1225 eq_value : max_value; 1226 min_value = (eq_value < min_value) ? 1227 eq_value : min_value; 1228 } 1229 /* 630E rule to determine the equalizer value */ 1230 if (revision == SIS630E_900_REV || revision == SIS630EA1_900_REV || 1231 revision == SIS630ET_900_REV) { 1232 if (max_value < 5) 1233 eq_value = max_value; 1234 else if (max_value >= 5 && max_value < 15) 1235 eq_value = (max_value == min_value) ? 1236 max_value+2 : max_value+1; 1237 else if (max_value >= 15) 1238 eq_value=(max_value == min_value) ? 1239 max_value+6 : max_value+5; 1240 } 1241 /* 630B0&B1 rule to determine the equalizer value */ 1242 if (revision == SIS630A_900_REV && 1243 (sis_priv->host_bridge_rev == SIS630B0 || 1244 sis_priv->host_bridge_rev == SIS630B1)) { 1245 if (max_value == 0) 1246 eq_value = 3; 1247 else 1248 eq_value = (max_value + min_value + 1)/2; 1249 } 1250 /* write equalizer value and setting */ 1251 reg14h = mdio_read(net_dev, sis_priv->cur_phy, MII_RESV); 1252 reg14h = (reg14h & 0xFF07) | ((eq_value << 3) & 0x00F8); 1253 reg14h = (reg14h | 0x6000) & 0xFDFF; 1254 mdio_write(net_dev, sis_priv->cur_phy, MII_RESV, reg14h); 1255 } else { 1256 reg14h = mdio_read(net_dev, sis_priv->cur_phy, MII_RESV); 1257 if (revision == SIS630A_900_REV && 1258 (sis_priv->host_bridge_rev == SIS630B0 || 1259 sis_priv->host_bridge_rev == SIS630B1)) 1260 mdio_write(net_dev, sis_priv->cur_phy, MII_RESV, 1261 (reg14h | 0x2200) & 0xBFFF); 1262 else 1263 mdio_write(net_dev, sis_priv->cur_phy, MII_RESV, 1264 (reg14h | 0x2000) & 0xBFFF); 1265 } 1266 return; 1267} 1268 1269/** 1270 * sis900_timer - sis900 timer routine 1271 * @data: pointer to sis900 net device 1272 * 1273 * On each timer ticks we check two things, 1274 * link status (ON/OFF) and link mode (10/100/Full/Half) 1275 */ 1276 1277static void sis900_timer(unsigned long data) 1278{ 1279 struct net_device *net_dev = (struct net_device *)data; 1280 struct sis900_private *sis_priv = netdev_priv(net_dev); 1281 struct mii_phy *mii_phy = sis_priv->mii; 1282 static const int next_tick = 5*HZ; 1283 u16 status; 1284 1285 if (!sis_priv->autong_complete){ 1286 int uninitialized_var(speed), duplex = 0; 1287 1288 sis900_read_mode(net_dev, &speed, &duplex); 1289 if (duplex){ 1290 sis900_set_mode(net_dev->base_addr, speed, duplex); 1291 sis630_set_eq(net_dev, sis_priv->chipset_rev); 1292 netif_start_queue(net_dev); 1293 } 1294 1295 sis_priv->timer.expires = jiffies + HZ; 1296 add_timer(&sis_priv->timer); 1297 return; 1298 } 1299 1300 status = mdio_read(net_dev, sis_priv->cur_phy, MII_STATUS); 1301 status = mdio_read(net_dev, sis_priv->cur_phy, MII_STATUS); 1302 1303 /* Link OFF -> ON */ 1304 if (!netif_carrier_ok(net_dev)) { 1305 LookForLink: 1306 /* Search for new PHY */ 1307 status = sis900_default_phy(net_dev); 1308 mii_phy = sis_priv->mii; 1309 1310 if (status & MII_STAT_LINK){ 1311 sis900_check_mode(net_dev, mii_phy); 1312 netif_carrier_on(net_dev); 1313 } 1314 } else { 1315 /* Link ON -> OFF */ 1316 if (!(status & MII_STAT_LINK)){ 1317 netif_carrier_off(net_dev); 1318 if(netif_msg_link(sis_priv)) 1319 printk(KERN_INFO "%s: Media Link Off\n", net_dev->name); 1320 1321 /* Change mode issue */ 1322 if ((mii_phy->phy_id0 == 0x001D) && 1323 ((mii_phy->phy_id1 & 0xFFF0) == 0x8000)) 1324 sis900_reset_phy(net_dev, sis_priv->cur_phy); 1325 1326 sis630_set_eq(net_dev, sis_priv->chipset_rev); 1327 1328 goto LookForLink; 1329 } 1330 } 1331 1332 sis_priv->timer.expires = jiffies + next_tick; 1333 add_timer(&sis_priv->timer); 1334} 1335 1336/** 1337 * sis900_check_mode - check the media mode for sis900 1338 * @net_dev: the net device to be checked 1339 * @mii_phy: the mii phy 1340 * 1341 * Older driver gets the media mode from mii status output 1342 * register. Now we set our media capability and auto-negotiate 1343 * to get the upper bound of speed and duplex between two ends. 1344 * If the types of mii phy is HOME, it doesn't need to auto-negotiate 1345 * and autong_complete should be set to 1. 1346 */ 1347 1348static void sis900_check_mode(struct net_device *net_dev, struct mii_phy *mii_phy) 1349{ 1350 struct sis900_private *sis_priv = netdev_priv(net_dev); 1351 long ioaddr = net_dev->base_addr; 1352 int speed, duplex; 1353 1354 if (mii_phy->phy_types == LAN) { 1355 outl(~EXD & inl(ioaddr + cfg), ioaddr + cfg); 1356 sis900_set_capability(net_dev , mii_phy); 1357 sis900_auto_negotiate(net_dev, sis_priv->cur_phy); 1358 } else { 1359 outl(EXD | inl(ioaddr + cfg), ioaddr + cfg); 1360 speed = HW_SPEED_HOME; 1361 duplex = FDX_CAPABLE_HALF_SELECTED; 1362 sis900_set_mode(ioaddr, speed, duplex); 1363 sis_priv->autong_complete = 1; 1364 } 1365} 1366 1367/** 1368 * sis900_set_mode - Set the media mode of mac register. 1369 * @ioaddr: the address of the device 1370 * @speed : the transmit speed to be determined 1371 * @duplex: the duplex mode to be determined 1372 * 1373 * Set the media mode of mac register txcfg/rxcfg according to 1374 * speed and duplex of phy. Bit EDB_MASTER_EN indicates the EDB 1375 * bus is used instead of PCI bus. When this bit is set 1, the 1376 * Max DMA Burst Size for TX/RX DMA should be no larger than 16 1377 * double words. 1378 */ 1379 1380static void sis900_set_mode (long ioaddr, int speed, int duplex) 1381{ 1382 u32 tx_flags = 0, rx_flags = 0; 1383 1384 if (inl(ioaddr + cfg) & EDB_MASTER_EN) { 1385 tx_flags = TxATP | (DMA_BURST_64 << TxMXDMA_shift) | 1386 (TX_FILL_THRESH << TxFILLT_shift); 1387 rx_flags = DMA_BURST_64 << RxMXDMA_shift; 1388 } else { 1389 tx_flags = TxATP | (DMA_BURST_512 << TxMXDMA_shift) | 1390 (TX_FILL_THRESH << TxFILLT_shift); 1391 rx_flags = DMA_BURST_512 << RxMXDMA_shift; 1392 } 1393 1394 if (speed == HW_SPEED_HOME || speed == HW_SPEED_10_MBPS) { 1395 rx_flags |= (RxDRNT_10 << RxDRNT_shift); 1396 tx_flags |= (TxDRNT_10 << TxDRNT_shift); 1397 } else { 1398 rx_flags |= (RxDRNT_100 << RxDRNT_shift); 1399 tx_flags |= (TxDRNT_100 << TxDRNT_shift); 1400 } 1401 1402 if (duplex == FDX_CAPABLE_FULL_SELECTED) { 1403 tx_flags |= (TxCSI | TxHBI); 1404 rx_flags |= RxATX; 1405 } 1406 1407#if defined(CONFIG_VLAN_8021Q) || defined(CONFIG_VLAN_8021Q_MODULE) 1408 /* Can accept Jumbo packet */ 1409 rx_flags |= RxAJAB; 1410#endif 1411 1412 outl (tx_flags, ioaddr + txcfg); 1413 outl (rx_flags, ioaddr + rxcfg); 1414} 1415 1416/** 1417 * sis900_auto_negotiate - Set the Auto-Negotiation Enable/Reset bit. 1418 * @net_dev: the net device to read mode for 1419 * @phy_addr: mii phy address 1420 * 1421 * If the adapter is link-on, set the auto-negotiate enable/reset bit. 1422 * autong_complete should be set to 0 when starting auto-negotiation. 1423 * autong_complete should be set to 1 if we didn't start auto-negotiation. 1424 * sis900_timer will wait for link on again if autong_complete = 0. 1425 */ 1426 1427static void sis900_auto_negotiate(struct net_device *net_dev, int phy_addr) 1428{ 1429 struct sis900_private *sis_priv = netdev_priv(net_dev); 1430 int i = 0; 1431 u32 status; 1432 1433 for (i = 0; i < 2; i++) 1434 status = mdio_read(net_dev, phy_addr, MII_STATUS); 1435 1436 if (!(status & MII_STAT_LINK)){ 1437 if(netif_msg_link(sis_priv)) 1438 printk(KERN_INFO "%s: Media Link Off\n", net_dev->name); 1439 sis_priv->autong_complete = 1; 1440 netif_carrier_off(net_dev); 1441 return; 1442 } 1443 1444 /* (Re)start AutoNegotiate */ 1445 mdio_write(net_dev, phy_addr, MII_CONTROL, 1446 MII_CNTL_AUTO | MII_CNTL_RST_AUTO); 1447 sis_priv->autong_complete = 0; 1448} 1449 1450 1451/** 1452 * sis900_read_mode - read media mode for sis900 internal phy 1453 * @net_dev: the net device to read mode for 1454 * @speed : the transmit speed to be determined 1455 * @duplex : the duplex mode to be determined 1456 * 1457 * The capability of remote end will be put in mii register autorec 1458 * after auto-negotiation. Use AND operation to get the upper bound 1459 * of speed and duplex between two ends. 1460 */ 1461 1462static void sis900_read_mode(struct net_device *net_dev, int *speed, int *duplex) 1463{ 1464 struct sis900_private *sis_priv = netdev_priv(net_dev); 1465 struct mii_phy *phy = sis_priv->mii; 1466 int phy_addr = sis_priv->cur_phy; 1467 u32 status; 1468 u16 autoadv, autorec; 1469 int i; 1470 1471 for (i = 0; i < 2; i++) 1472 status = mdio_read(net_dev, phy_addr, MII_STATUS); 1473 1474 if (!(status & MII_STAT_LINK)) 1475 return; 1476 1477 /* AutoNegotiate completed */ 1478 autoadv = mdio_read(net_dev, phy_addr, MII_ANADV); 1479 autorec = mdio_read(net_dev, phy_addr, MII_ANLPAR); 1480 status = autoadv & autorec; 1481 1482 *speed = HW_SPEED_10_MBPS; 1483 *duplex = FDX_CAPABLE_HALF_SELECTED; 1484 1485 if (status & (MII_NWAY_TX | MII_NWAY_TX_FDX)) 1486 *speed = HW_SPEED_100_MBPS; 1487 if (status & ( MII_NWAY_TX_FDX | MII_NWAY_T_FDX)) 1488 *duplex = FDX_CAPABLE_FULL_SELECTED; 1489 1490 sis_priv->autong_complete = 1; 1491 1492 /* Workaround for Realtek RTL8201 PHY issue */ 1493 if ((phy->phy_id0 == 0x0000) && ((phy->phy_id1 & 0xFFF0) == 0x8200)) { 1494 if (mdio_read(net_dev, phy_addr, MII_CONTROL) & MII_CNTL_FDX) 1495 *duplex = FDX_CAPABLE_FULL_SELECTED; 1496 if (mdio_read(net_dev, phy_addr, 0x0019) & 0x01) 1497 *speed = HW_SPEED_100_MBPS; 1498 } 1499 1500 if(netif_msg_link(sis_priv)) 1501 printk(KERN_INFO "%s: Media Link On %s %s-duplex \n", 1502 net_dev->name, 1503 *speed == HW_SPEED_100_MBPS ? 1504 "100mbps" : "10mbps", 1505 *duplex == FDX_CAPABLE_FULL_SELECTED ? 1506 "full" : "half"); 1507} 1508 1509/** 1510 * sis900_tx_timeout - sis900 transmit timeout routine 1511 * @net_dev: the net device to transmit 1512 * 1513 * print transmit timeout status 1514 * disable interrupts and do some tasks 1515 */ 1516 1517static void sis900_tx_timeout(struct net_device *net_dev) 1518{ 1519 struct sis900_private *sis_priv = netdev_priv(net_dev); 1520 long ioaddr = net_dev->base_addr; 1521 unsigned long flags; 1522 int i; 1523 1524 if(netif_msg_tx_err(sis_priv)) 1525 printk(KERN_INFO "%s: Transmit timeout, status %8.8x %8.8x \n", 1526 net_dev->name, inl(ioaddr + cr), inl(ioaddr + isr)); 1527 1528 /* Disable interrupts by clearing the interrupt mask. */ 1529 outl(0x0000, ioaddr + imr); 1530 1531 /* use spinlock to prevent interrupt handler accessing buffer ring */ 1532 spin_lock_irqsave(&sis_priv->lock, flags); 1533 1534 /* discard unsent packets */ 1535 sis_priv->dirty_tx = sis_priv->cur_tx = 0; 1536 for (i = 0; i < NUM_TX_DESC; i++) { 1537 struct sk_buff *skb = sis_priv->tx_skbuff[i]; 1538 1539 if (skb) { 1540 pci_unmap_single(sis_priv->pci_dev, 1541 sis_priv->tx_ring[i].bufptr, skb->len, 1542 PCI_DMA_TODEVICE); 1543 dev_kfree_skb_irq(skb); 1544 sis_priv->tx_skbuff[i] = NULL; 1545 sis_priv->tx_ring[i].cmdsts = 0; 1546 sis_priv->tx_ring[i].bufptr = 0; 1547 net_dev->stats.tx_dropped++; 1548 } 1549 } 1550 sis_priv->tx_full = 0; 1551 netif_wake_queue(net_dev); 1552 1553 spin_unlock_irqrestore(&sis_priv->lock, flags); 1554 1555 net_dev->trans_start = jiffies; 1556 1557 /* load Transmit Descriptor Register */ 1558 outl(sis_priv->tx_ring_dma, ioaddr + txdp); 1559 1560 /* Enable all known interrupts by setting the interrupt mask. */ 1561 outl((RxSOVR|RxORN|RxERR|RxOK|TxURN|TxERR|TxIDLE), ioaddr + imr); 1562 return; 1563} 1564 1565/** 1566 * sis900_start_xmit - sis900 start transmit routine 1567 * @skb: socket buffer pointer to put the data being transmitted 1568 * @net_dev: the net device to transmit with 1569 * 1570 * Set the transmit buffer descriptor, 1571 * and write TxENA to enable transmit state machine. 1572 * tell upper layer if the buffer is full 1573 */ 1574 1575static netdev_tx_t 1576sis900_start_xmit(struct sk_buff *skb, struct net_device *net_dev) 1577{ 1578 struct sis900_private *sis_priv = netdev_priv(net_dev); 1579 long ioaddr = net_dev->base_addr; 1580 unsigned int entry; 1581 unsigned long flags; 1582 unsigned int index_cur_tx, index_dirty_tx; 1583 unsigned int count_dirty_tx; 1584 1585 /* Don't transmit data before the complete of auto-negotiation */ 1586 if(!sis_priv->autong_complete){ 1587 netif_stop_queue(net_dev); 1588 return NETDEV_TX_BUSY; 1589 } 1590 1591 spin_lock_irqsave(&sis_priv->lock, flags); 1592 1593 /* Calculate the next Tx descriptor entry. */ 1594 entry = sis_priv->cur_tx % NUM_TX_DESC; 1595 sis_priv->tx_skbuff[entry] = skb; 1596 1597 /* set the transmit buffer descriptor and enable Transmit State Machine */ 1598 sis_priv->tx_ring[entry].bufptr = pci_map_single(sis_priv->pci_dev, 1599 skb->data, skb->len, PCI_DMA_TODEVICE); 1600 sis_priv->tx_ring[entry].cmdsts = (OWN | skb->len); 1601 outl(TxENA | inl(ioaddr + cr), ioaddr + cr); 1602 1603 sis_priv->cur_tx ++; 1604 index_cur_tx = sis_priv->cur_tx; 1605 index_dirty_tx = sis_priv->dirty_tx; 1606 1607 for (count_dirty_tx = 0; index_cur_tx != index_dirty_tx; index_dirty_tx++) 1608 count_dirty_tx ++; 1609 1610 if (index_cur_tx == index_dirty_tx) { 1611 /* dirty_tx is met in the cycle of cur_tx, buffer full */ 1612 sis_priv->tx_full = 1; 1613 netif_stop_queue(net_dev); 1614 } else if (count_dirty_tx < NUM_TX_DESC) { 1615 /* Typical path, tell upper layer that more transmission is possible */ 1616 netif_start_queue(net_dev); 1617 } else { 1618 /* buffer full, tell upper layer no more transmission */ 1619 sis_priv->tx_full = 1; 1620 netif_stop_queue(net_dev); 1621 } 1622 1623 spin_unlock_irqrestore(&sis_priv->lock, flags); 1624 1625 net_dev->trans_start = jiffies; 1626 1627 if (netif_msg_tx_queued(sis_priv)) 1628 printk(KERN_DEBUG "%s: Queued Tx packet at %p size %d " 1629 "to slot %d.\n", 1630 net_dev->name, skb->data, (int)skb->len, entry); 1631 1632 return NETDEV_TX_OK; 1633} 1634 1635/** 1636 * sis900_interrupt - sis900 interrupt handler 1637 * @irq: the irq number 1638 * @dev_instance: the client data object 1639 * 1640 * The interrupt handler does all of the Rx thread work, 1641 * and cleans up after the Tx thread 1642 */ 1643 1644static irqreturn_t sis900_interrupt(int irq, void *dev_instance) 1645{ 1646 struct net_device *net_dev = dev_instance; 1647 struct sis900_private *sis_priv = netdev_priv(net_dev); 1648 int boguscnt = max_interrupt_work; 1649 long ioaddr = net_dev->base_addr; 1650 u32 status; 1651 unsigned int handled = 0; 1652 1653 spin_lock (&sis_priv->lock); 1654 1655 do { 1656 status = inl(ioaddr + isr); 1657 1658 if ((status & (HIBERR|TxURN|TxERR|TxIDLE|RxORN|RxERR|RxOK)) == 0) 1659 /* nothing intresting happened */ 1660 break; 1661 handled = 1; 1662 1663 /* why dow't we break after Tx/Rx case ?? keyword: full-duplex */ 1664 if (status & (RxORN | RxERR | RxOK)) 1665 /* Rx interrupt */ 1666 sis900_rx(net_dev); 1667 1668 if (status & (TxURN | TxERR | TxIDLE)) 1669 /* Tx interrupt */ 1670 sis900_finish_xmit(net_dev); 1671 1672 /* something strange happened !!! */ 1673 if (status & HIBERR) { 1674 if(netif_msg_intr(sis_priv)) 1675 printk(KERN_INFO "%s: Abnormal interrupt, " 1676 "status %#8.8x.\n", net_dev->name, status); 1677 break; 1678 } 1679 if (--boguscnt < 0) { 1680 if(netif_msg_intr(sis_priv)) 1681 printk(KERN_INFO "%s: Too much work at interrupt, " 1682 "interrupt status = %#8.8x.\n", 1683 net_dev->name, status); 1684 break; 1685 } 1686 } while (1); 1687 1688 if(netif_msg_intr(sis_priv)) 1689 printk(KERN_DEBUG "%s: exiting interrupt, " 1690 "interrupt status = 0x%#8.8x.\n", 1691 net_dev->name, inl(ioaddr + isr)); 1692 1693 spin_unlock (&sis_priv->lock); 1694 return IRQ_RETVAL(handled); 1695} 1696 1697/** 1698 * sis900_rx - sis900 receive routine 1699 * @net_dev: the net device which receives data 1700 * 1701 * Process receive interrupt events, 1702 * put buffer to higher layer and refill buffer pool 1703 * Note: This function is called by interrupt handler, 1704 * don't do "too much" work here 1705 */ 1706 1707static int sis900_rx(struct net_device *net_dev) 1708{ 1709 struct sis900_private *sis_priv = netdev_priv(net_dev); 1710 long ioaddr = net_dev->base_addr; 1711 unsigned int entry = sis_priv->cur_rx % NUM_RX_DESC; 1712 u32 rx_status = sis_priv->rx_ring[entry].cmdsts; 1713 int rx_work_limit; 1714 1715 if (netif_msg_rx_status(sis_priv)) 1716 printk(KERN_DEBUG "sis900_rx, cur_rx:%4.4d, dirty_rx:%4.4d " 1717 "status:0x%8.8x\n", 1718 sis_priv->cur_rx, sis_priv->dirty_rx, rx_status); 1719 rx_work_limit = sis_priv->dirty_rx + NUM_RX_DESC - sis_priv->cur_rx; 1720 1721 while (rx_status & OWN) { 1722 unsigned int rx_size; 1723 unsigned int data_size; 1724 1725 if (--rx_work_limit < 0) 1726 break; 1727 1728 data_size = rx_status & DSIZE; 1729 rx_size = data_size - CRC_SIZE; 1730 1731#if defined(CONFIG_VLAN_8021Q) || defined(CONFIG_VLAN_8021Q_MODULE) 1732 /* ``TOOLONG'' flag means jumbo packet recived. */ 1733 if ((rx_status & TOOLONG) && data_size <= MAX_FRAME_SIZE) 1734 rx_status &= (~ ((unsigned int)TOOLONG)); 1735#endif 1736 1737 if (rx_status & (ABORT|OVERRUN|TOOLONG|RUNT|RXISERR|CRCERR|FAERR)) { 1738 /* corrupted packet received */ 1739 if (netif_msg_rx_err(sis_priv)) 1740 printk(KERN_DEBUG "%s: Corrupted packet " 1741 "received, buffer status = 0x%8.8x/%d.\n", 1742 net_dev->name, rx_status, data_size); 1743 net_dev->stats.rx_errors++; 1744 if (rx_status & OVERRUN) 1745 net_dev->stats.rx_over_errors++; 1746 if (rx_status & (TOOLONG|RUNT)) 1747 net_dev->stats.rx_length_errors++; 1748 if (rx_status & (RXISERR | FAERR)) 1749 net_dev->stats.rx_frame_errors++; 1750 if (rx_status & CRCERR) 1751 net_dev->stats.rx_crc_errors++; 1752 /* reset buffer descriptor state */ 1753 sis_priv->rx_ring[entry].cmdsts = RX_BUF_SIZE; 1754 } else { 1755 struct sk_buff * skb; 1756 struct sk_buff * rx_skb; 1757 1758 pci_unmap_single(sis_priv->pci_dev, 1759 sis_priv->rx_ring[entry].bufptr, RX_BUF_SIZE, 1760 PCI_DMA_FROMDEVICE); 1761 1762 /* refill the Rx buffer, what if there is not enought 1763 * memory for new socket buffer ?? */ 1764 if ((skb = dev_alloc_skb(RX_BUF_SIZE)) == NULL) { 1765 /* 1766 * Not enough memory to refill the buffer 1767 * so we need to recycle the old one so 1768 * as to avoid creating a memory hole 1769 * in the rx ring 1770 */ 1771 skb = sis_priv->rx_skbuff[entry]; 1772 net_dev->stats.rx_dropped++; 1773 goto refill_rx_ring; 1774 } 1775 1776 /* This situation should never happen, but due to 1777 some unknow bugs, it is possible that 1778 we are working on NULL sk_buff :-( */ 1779 if (sis_priv->rx_skbuff[entry] == NULL) { 1780 if (netif_msg_rx_err(sis_priv)) 1781 printk(KERN_WARNING "%s: NULL pointer " 1782 "encountered in Rx ring\n" 1783 "cur_rx:%4.4d, dirty_rx:%4.4d\n", 1784 net_dev->name, sis_priv->cur_rx, 1785 sis_priv->dirty_rx); 1786 break; 1787 } 1788 1789 /* give the socket buffer to upper layers */ 1790 rx_skb = sis_priv->rx_skbuff[entry]; 1791 skb_put(rx_skb, rx_size); 1792 rx_skb->protocol = eth_type_trans(rx_skb, net_dev); 1793 netif_rx(rx_skb); 1794 1795 /* some network statistics */ 1796 if ((rx_status & BCAST) == MCAST) 1797 net_dev->stats.multicast++; 1798 net_dev->stats.rx_bytes += rx_size; 1799 net_dev->stats.rx_packets++; 1800 sis_priv->dirty_rx++; 1801refill_rx_ring: 1802 sis_priv->rx_skbuff[entry] = skb; 1803 sis_priv->rx_ring[entry].cmdsts = RX_BUF_SIZE; 1804 sis_priv->rx_ring[entry].bufptr = 1805 pci_map_single(sis_priv->pci_dev, skb->data, 1806 RX_BUF_SIZE, PCI_DMA_FROMDEVICE); 1807 } 1808 sis_priv->cur_rx++; 1809 entry = sis_priv->cur_rx % NUM_RX_DESC; 1810 rx_status = sis_priv->rx_ring[entry].cmdsts; 1811 } // while 1812 1813 /* refill the Rx buffer, what if the rate of refilling is slower 1814 * than consuming ?? */ 1815 for (; sis_priv->cur_rx != sis_priv->dirty_rx; sis_priv->dirty_rx++) { 1816 struct sk_buff *skb; 1817 1818 entry = sis_priv->dirty_rx % NUM_RX_DESC; 1819 1820 if (sis_priv->rx_skbuff[entry] == NULL) { 1821 if ((skb = dev_alloc_skb(RX_BUF_SIZE)) == NULL) { 1822 /* not enough memory for skbuff, this makes a 1823 * "hole" on the buffer ring, it is not clear 1824 * how the hardware will react to this kind 1825 * of degenerated buffer */ 1826 if (netif_msg_rx_err(sis_priv)) 1827 printk(KERN_INFO "%s: Memory squeeze, " 1828 "deferring packet.\n", 1829 net_dev->name); 1830 net_dev->stats.rx_dropped++; 1831 break; 1832 } 1833 sis_priv->rx_skbuff[entry] = skb; 1834 sis_priv->rx_ring[entry].cmdsts = RX_BUF_SIZE; 1835 sis_priv->rx_ring[entry].bufptr = 1836 pci_map_single(sis_priv->pci_dev, skb->data, 1837 RX_BUF_SIZE, PCI_DMA_FROMDEVICE); 1838 } 1839 } 1840 /* re-enable the potentially idle receive state matchine */ 1841 outl(RxENA | inl(ioaddr + cr), ioaddr + cr ); 1842 1843 return 0; 1844} 1845 1846/** 1847 * sis900_finish_xmit - finish up transmission of packets 1848 * @net_dev: the net device to be transmitted on 1849 * 1850 * Check for error condition and free socket buffer etc 1851 * schedule for more transmission as needed 1852 * Note: This function is called by interrupt handler, 1853 * don't do "too much" work here 1854 */ 1855 1856static void sis900_finish_xmit (struct net_device *net_dev) 1857{ 1858 struct sis900_private *sis_priv = netdev_priv(net_dev); 1859 1860 for (; sis_priv->dirty_tx != sis_priv->cur_tx; sis_priv->dirty_tx++) { 1861 struct sk_buff *skb; 1862 unsigned int entry; 1863 u32 tx_status; 1864 1865 entry = sis_priv->dirty_tx % NUM_TX_DESC; 1866 tx_status = sis_priv->tx_ring[entry].cmdsts; 1867 1868 if (tx_status & OWN) { 1869 /* The packet is not transmitted yet (owned by hardware) ! 1870 * Note: the interrupt is generated only when Tx Machine 1871 * is idle, so this is an almost impossible case */ 1872 break; 1873 } 1874 1875 if (tx_status & (ABORT | UNDERRUN | OWCOLL)) { 1876 /* packet unsuccessfully transmitted */ 1877 if (netif_msg_tx_err(sis_priv)) 1878 printk(KERN_DEBUG "%s: Transmit " 1879 "error, Tx status %8.8x.\n", 1880 net_dev->name, tx_status); 1881 net_dev->stats.tx_errors++; 1882 if (tx_status & UNDERRUN) 1883 net_dev->stats.tx_fifo_errors++; 1884 if (tx_status & ABORT) 1885 net_dev->stats.tx_aborted_errors++; 1886 if (tx_status & NOCARRIER) 1887 net_dev->stats.tx_carrier_errors++; 1888 if (tx_status & OWCOLL) 1889 net_dev->stats.tx_window_errors++; 1890 } else { 1891 /* packet successfully transmitted */ 1892 net_dev->stats.collisions += (tx_status & COLCNT) >> 16; 1893 net_dev->stats.tx_bytes += tx_status & DSIZE; 1894 net_dev->stats.tx_packets++; 1895 } 1896 /* Free the original skb. */ 1897 skb = sis_priv->tx_skbuff[entry]; 1898 pci_unmap_single(sis_priv->pci_dev, 1899 sis_priv->tx_ring[entry].bufptr, skb->len, 1900 PCI_DMA_TODEVICE); 1901 dev_kfree_skb_irq(skb); 1902 sis_priv->tx_skbuff[entry] = NULL; 1903 sis_priv->tx_ring[entry].bufptr = 0; 1904 sis_priv->tx_ring[entry].cmdsts = 0; 1905 } 1906 1907 if (sis_priv->tx_full && netif_queue_stopped(net_dev) && 1908 sis_priv->cur_tx - sis_priv->dirty_tx < NUM_TX_DESC - 4) { 1909 /* The ring is no longer full, clear tx_full and schedule 1910 * more transmission by netif_wake_queue(net_dev) */ 1911 sis_priv->tx_full = 0; 1912 netif_wake_queue (net_dev); 1913 } 1914} 1915 1916/** 1917 * sis900_close - close sis900 device 1918 * @net_dev: the net device to be closed 1919 * 1920 * Disable interrupts, stop the Tx and Rx Status Machine 1921 * free Tx and RX socket buffer 1922 */ 1923 1924static int sis900_close(struct net_device *net_dev) 1925{ 1926 long ioaddr = net_dev->base_addr; 1927 struct sis900_private *sis_priv = netdev_priv(net_dev); 1928 struct sk_buff *skb; 1929 int i; 1930 1931 netif_stop_queue(net_dev); 1932 1933 /* Disable interrupts by clearing the interrupt mask. */ 1934 outl(0x0000, ioaddr + imr); 1935 outl(0x0000, ioaddr + ier); 1936 1937 /* Stop the chip's Tx and Rx Status Machine */ 1938 outl(RxDIS | TxDIS | inl(ioaddr + cr), ioaddr + cr); 1939 1940 del_timer(&sis_priv->timer); 1941 1942 free_irq(net_dev->irq, net_dev); 1943 1944 /* Free Tx and RX skbuff */ 1945 for (i = 0; i < NUM_RX_DESC; i++) { 1946 skb = sis_priv->rx_skbuff[i]; 1947 if (skb) { 1948 pci_unmap_single(sis_priv->pci_dev, 1949 sis_priv->rx_ring[i].bufptr, 1950 RX_BUF_SIZE, PCI_DMA_FROMDEVICE); 1951 dev_kfree_skb(skb); 1952 sis_priv->rx_skbuff[i] = NULL; 1953 } 1954 } 1955 for (i = 0; i < NUM_TX_DESC; i++) { 1956 skb = sis_priv->tx_skbuff[i]; 1957 if (skb) { 1958 pci_unmap_single(sis_priv->pci_dev, 1959 sis_priv->tx_ring[i].bufptr, skb->len, 1960 PCI_DMA_TODEVICE); 1961 dev_kfree_skb(skb); 1962 sis_priv->tx_skbuff[i] = NULL; 1963 } 1964 } 1965 1966 /* Green! Put the chip in low-power mode. */ 1967 1968 return 0; 1969} 1970 1971/** 1972 * sis900_get_drvinfo - Return information about driver 1973 * @net_dev: the net device to probe 1974 * @info: container for info returned 1975 * 1976 * Process ethtool command such as "ehtool -i" to show information 1977 */ 1978 1979static void sis900_get_drvinfo(struct net_device *net_dev, 1980 struct ethtool_drvinfo *info) 1981{ 1982 struct sis900_private *sis_priv = netdev_priv(net_dev); 1983 1984 strcpy (info->driver, SIS900_MODULE_NAME); 1985 strcpy (info->version, SIS900_DRV_VERSION); 1986 strcpy (info->bus_info, pci_name(sis_priv->pci_dev)); 1987} 1988 1989static u32 sis900_get_msglevel(struct net_device *net_dev) 1990{ 1991 struct sis900_private *sis_priv = netdev_priv(net_dev); 1992 return sis_priv->msg_enable; 1993} 1994 1995static void sis900_set_msglevel(struct net_device *net_dev, u32 value) 1996{ 1997 struct sis900_private *sis_priv = netdev_priv(net_dev); 1998 sis_priv->msg_enable = value; 1999} 2000 2001static u32 sis900_get_link(struct net_device *net_dev) 2002{ 2003 struct sis900_private *sis_priv = netdev_priv(net_dev); 2004 return mii_link_ok(&sis_priv->mii_info); 2005} 2006 2007static int sis900_get_settings(struct net_device *net_dev, 2008 struct ethtool_cmd *cmd) 2009{ 2010 struct sis900_private *sis_priv = netdev_priv(net_dev); 2011 spin_lock_irq(&sis_priv->lock); 2012 mii_ethtool_gset(&sis_priv->mii_info, cmd); 2013 spin_unlock_irq(&sis_priv->lock); 2014 return 0; 2015} 2016 2017static int sis900_set_settings(struct net_device *net_dev, 2018 struct ethtool_cmd *cmd) 2019{ 2020 struct sis900_private *sis_priv = netdev_priv(net_dev); 2021 int rt; 2022 spin_lock_irq(&sis_priv->lock); 2023 rt = mii_ethtool_sset(&sis_priv->mii_info, cmd); 2024 spin_unlock_irq(&sis_priv->lock); 2025 return rt; 2026} 2027 2028static int sis900_nway_reset(struct net_device *net_dev) 2029{ 2030 struct sis900_private *sis_priv = netdev_priv(net_dev); 2031 return mii_nway_restart(&sis_priv->mii_info); 2032} 2033 2034/** 2035 * sis900_set_wol - Set up Wake on Lan registers 2036 * @net_dev: the net device to probe 2037 * @wol: container for info passed to the driver 2038 * 2039 * Process ethtool command "wol" to setup wake on lan features. 2040 * SiS900 supports sending WoL events if a correct packet is received, 2041 * but there is no simple way to filter them to only a subset (broadcast, 2042 * multicast, unicast or arp). 2043 */ 2044 2045static int sis900_set_wol(struct net_device *net_dev, struct ethtool_wolinfo *wol) 2046{ 2047 struct sis900_private *sis_priv = netdev_priv(net_dev); 2048 long pmctrl_addr = net_dev->base_addr + pmctrl; 2049 u32 cfgpmcsr = 0, pmctrl_bits = 0; 2050 2051 if (wol->wolopts == 0) { 2052 pci_read_config_dword(sis_priv->pci_dev, CFGPMCSR, &cfgpmcsr); 2053 cfgpmcsr &= ~PME_EN; 2054 pci_write_config_dword(sis_priv->pci_dev, CFGPMCSR, cfgpmcsr); 2055 outl(pmctrl_bits, pmctrl_addr); 2056 if (netif_msg_wol(sis_priv)) 2057 printk(KERN_DEBUG "%s: Wake on LAN disabled\n", net_dev->name); 2058 return 0; 2059 } 2060 2061 if (wol->wolopts & (WAKE_MAGICSECURE | WAKE_UCAST | WAKE_MCAST 2062 | WAKE_BCAST | WAKE_ARP)) 2063 return -EINVAL; 2064 2065 if (wol->wolopts & WAKE_MAGIC) 2066 pmctrl_bits |= MAGICPKT; 2067 if (wol->wolopts & WAKE_PHY) 2068 pmctrl_bits |= LINKON; 2069 2070 outl(pmctrl_bits, pmctrl_addr); 2071 2072 pci_read_config_dword(sis_priv->pci_dev, CFGPMCSR, &cfgpmcsr); 2073 cfgpmcsr |= PME_EN; 2074 pci_write_config_dword(sis_priv->pci_dev, CFGPMCSR, cfgpmcsr); 2075 if (netif_msg_wol(sis_priv)) 2076 printk(KERN_DEBUG "%s: Wake on LAN enabled\n", net_dev->name); 2077 2078 return 0; 2079} 2080 2081static void sis900_get_wol(struct net_device *net_dev, struct ethtool_wolinfo *wol) 2082{ 2083 long pmctrl_addr = net_dev->base_addr + pmctrl; 2084 u32 pmctrl_bits; 2085 2086 pmctrl_bits = inl(pmctrl_addr); 2087 if (pmctrl_bits & MAGICPKT) 2088 wol->wolopts |= WAKE_MAGIC; 2089 if (pmctrl_bits & LINKON) 2090 wol->wolopts |= WAKE_PHY; 2091 2092 wol->supported = (WAKE_PHY | WAKE_MAGIC); 2093} 2094 2095static const struct ethtool_ops sis900_ethtool_ops = { 2096 .get_drvinfo = sis900_get_drvinfo, 2097 .get_msglevel = sis900_get_msglevel, 2098 .set_msglevel = sis900_set_msglevel, 2099 .get_link = sis900_get_link, 2100 .get_settings = sis900_get_settings, 2101 .set_settings = sis900_set_settings, 2102 .nway_reset = sis900_nway_reset, 2103 .get_wol = sis900_get_wol, 2104 .set_wol = sis900_set_wol 2105}; 2106 2107/** 2108 * mii_ioctl - process MII i/o control command 2109 * @net_dev: the net device to command for 2110 * @rq: parameter for command 2111 * @cmd: the i/o command 2112 * 2113 * Process MII command like read/write MII register 2114 */ 2115 2116static int mii_ioctl(struct net_device *net_dev, struct ifreq *rq, int cmd) 2117{ 2118 struct sis900_private *sis_priv = netdev_priv(net_dev); 2119 struct mii_ioctl_data *data = if_mii(rq); 2120 2121 switch(cmd) { 2122 case SIOCGMIIPHY: /* Get address of MII PHY in use. */ 2123 data->phy_id = sis_priv->mii->phy_addr; 2124 /* Fall Through */ 2125 2126 case SIOCGMIIREG: /* Read MII PHY register. */ 2127 data->val_out = mdio_read(net_dev, data->phy_id & 0x1f, data->reg_num & 0x1f); 2128 return 0; 2129 2130 case SIOCSMIIREG: /* Write MII PHY register. */ 2131 mdio_write(net_dev, data->phy_id & 0x1f, data->reg_num & 0x1f, data->val_in); 2132 return 0; 2133 default: 2134 return -EOPNOTSUPP; 2135 } 2136} 2137 2138/** 2139 * sis900_set_config - Set media type by net_device.set_config 2140 * @dev: the net device for media type change 2141 * @map: ifmap passed by ifconfig 2142 * 2143 * Set media type to 10baseT, 100baseT or 0(for auto) by ifconfig 2144 * we support only port changes. All other runtime configuration 2145 * changes will be ignored 2146 */ 2147 2148static int sis900_set_config(struct net_device *dev, struct ifmap *map) 2149{ 2150 struct sis900_private *sis_priv = netdev_priv(dev); 2151 struct mii_phy *mii_phy = sis_priv->mii; 2152 2153 u16 status; 2154 2155 if ((map->port != (u_char)(-1)) && (map->port != dev->if_port)) { 2156 /* we switch on the ifmap->port field. I couldn't find anything 2157 * like a definition or standard for the values of that field. 2158 * I think the meaning of those values is device specific. But 2159 * since I would like to change the media type via the ifconfig 2160 * command I use the definition from linux/netdevice.h 2161 * (which seems to be different from the ifport(pcmcia) definition) */ 2162 switch(map->port){ 2163 case IF_PORT_UNKNOWN: /* use auto here */ 2164 dev->if_port = map->port; 2165 /* we are going to change the media type, so the Link 2166 * will be temporary down and we need to reflect that 2167 * here. When the Link comes up again, it will be 2168 * sensed by the sis_timer procedure, which also does 2169 * all the rest for us */ 2170 netif_carrier_off(dev); 2171 2172 /* read current state */ 2173 status = mdio_read(dev, mii_phy->phy_addr, MII_CONTROL); 2174 2175 /* enable auto negotiation and reset the negotioation 2176 * (I don't really know what the auto negatiotiation 2177 * reset really means, but it sounds for me right to 2178 * do one here) */ 2179 mdio_write(dev, mii_phy->phy_addr, 2180 MII_CONTROL, status | MII_CNTL_AUTO | MII_CNTL_RST_AUTO); 2181 2182 break; 2183 2184 case IF_PORT_10BASET: /* 10BaseT */ 2185 dev->if_port = map->port; 2186 2187 /* we are going to change the media type, so the Link 2188 * will be temporary down and we need to reflect that 2189 * here. When the Link comes up again, it will be 2190 * sensed by the sis_timer procedure, which also does 2191 * all the rest for us */ 2192 netif_carrier_off(dev); 2193 2194 /* set Speed to 10Mbps */ 2195 /* read current state */ 2196 status = mdio_read(dev, mii_phy->phy_addr, MII_CONTROL); 2197 2198 /* disable auto negotiation and force 10MBit mode*/ 2199 mdio_write(dev, mii_phy->phy_addr, 2200 MII_CONTROL, status & ~(MII_CNTL_SPEED | 2201 MII_CNTL_AUTO)); 2202 break; 2203 2204 case IF_PORT_100BASET: /* 100BaseT */ 2205 case IF_PORT_100BASETX: /* 100BaseTx */ 2206 dev->if_port = map->port; 2207 2208 /* we are going to change the media type, so the Link 2209 * will be temporary down and we need to reflect that 2210 * here. When the Link comes up again, it will be 2211 * sensed by the sis_timer procedure, which also does 2212 * all the rest for us */ 2213 netif_carrier_off(dev); 2214 2215 /* set Speed to 100Mbps */ 2216 /* disable auto negotiation and enable 100MBit Mode */ 2217 status = mdio_read(dev, mii_phy->phy_addr, MII_CONTROL); 2218 mdio_write(dev, mii_phy->phy_addr, 2219 MII_CONTROL, (status & ~MII_CNTL_SPEED) | 2220 MII_CNTL_SPEED); 2221 2222 break; 2223 2224 case IF_PORT_10BASE2: /* 10Base2 */ 2225 case IF_PORT_AUI: /* AUI */ 2226 case IF_PORT_100BASEFX: /* 100BaseFx */ 2227 /* These Modes are not supported (are they?)*/ 2228 return -EOPNOTSUPP; 2229 break; 2230 2231 default: 2232 return -EINVAL; 2233 } 2234 } 2235 return 0; 2236} 2237 2238/** 2239 * sis900_mcast_bitnr - compute hashtable index 2240 * @addr: multicast address 2241 * @revision: revision id of chip 2242 * 2243 * SiS 900 uses the most sigificant 7 bits to index a 128 bits multicast 2244 * hash table, which makes this function a little bit different from other drivers 2245 * SiS 900 B0 & 635 M/B uses the most significat 8 bits to index 256 bits 2246 * multicast hash table. 2247 */ 2248 2249static inline u16 sis900_mcast_bitnr(u8 *addr, u8 revision) 2250{ 2251 2252 u32 crc = ether_crc(6, addr); 2253 2254 /* leave 8 or 7 most siginifant bits */ 2255 if ((revision >= SIS635A_900_REV) || (revision == SIS900B_900_REV)) 2256 return ((int)(crc >> 24)); 2257 else 2258 return ((int)(crc >> 25)); 2259} 2260 2261/** 2262 * set_rx_mode - Set SiS900 receive mode 2263 * @net_dev: the net device to be set 2264 * 2265 * Set SiS900 receive mode for promiscuous, multicast, or broadcast mode. 2266 * And set the appropriate multicast filter. 2267 * Multicast hash table changes from 128 to 256 bits for 635M/B & 900B0. 2268 */ 2269 2270static void set_rx_mode(struct net_device *net_dev) 2271{ 2272 long ioaddr = net_dev->base_addr; 2273 struct sis900_private *sis_priv = netdev_priv(net_dev); 2274 u16 mc_filter[16] = {0}; /* 256/128 bits multicast hash table */ 2275 int i, table_entries; 2276 u32 rx_mode; 2277 2278 /* 635 Hash Table entries = 256(2^16) */ 2279 if((sis_priv->chipset_rev >= SIS635A_900_REV) || 2280 (sis_priv->chipset_rev == SIS900B_900_REV)) 2281 table_entries = 16; 2282 else 2283 table_entries = 8; 2284 2285 if (net_dev->flags & IFF_PROMISC) { 2286 /* Accept any kinds of packets */ 2287 rx_mode = RFPromiscuous; 2288 for (i = 0; i < table_entries; i++) 2289 mc_filter[i] = 0xffff; 2290 } else if ((net_dev->mc_count > multicast_filter_limit) || 2291 (net_dev->flags & IFF_ALLMULTI)) { 2292 /* too many multicast addresses or accept all multicast packet */ 2293 rx_mode = RFAAB | RFAAM; 2294 for (i = 0; i < table_entries; i++) 2295 mc_filter[i] = 0xffff; 2296 } else { 2297 /* Accept Broadcast packet, destination address matchs our 2298 * MAC address, use Receive Filter to reject unwanted MCAST 2299 * packets */ 2300 struct dev_mc_list *mclist; 2301 rx_mode = RFAAB; 2302 for (i = 0, mclist = net_dev->mc_list; 2303 mclist && i < net_dev->mc_count; 2304 i++, mclist = mclist->next) { 2305 unsigned int bit_nr = 2306 sis900_mcast_bitnr(mclist->dmi_addr, sis_priv->chipset_rev); 2307 mc_filter[bit_nr >> 4] |= (1 << (bit_nr & 0xf)); 2308 } 2309 } 2310 2311 /* update Multicast Hash Table in Receive Filter */ 2312 for (i = 0; i < table_entries; i++) { 2313 /* why plus 0x04 ??, That makes the correct value for hash table. */ 2314 outl((u32)(0x00000004+i) << RFADDR_shift, ioaddr + rfcr); 2315 outl(mc_filter[i], ioaddr + rfdr); 2316 } 2317 2318 outl(RFEN | rx_mode, ioaddr + rfcr); 2319 2320 /* sis900 is capable of looping back packets at MAC level for 2321 * debugging purpose */ 2322 if (net_dev->flags & IFF_LOOPBACK) { 2323 u32 cr_saved; 2324 /* We must disable Tx/Rx before setting loopback mode */ 2325 cr_saved = inl(ioaddr + cr); 2326 outl(cr_saved | TxDIS | RxDIS, ioaddr + cr); 2327 /* enable loopback */ 2328 outl(inl(ioaddr + txcfg) | TxMLB, ioaddr + txcfg); 2329 outl(inl(ioaddr + rxcfg) | RxATX, ioaddr + rxcfg); 2330 /* restore cr */ 2331 outl(cr_saved, ioaddr + cr); 2332 } 2333 2334 return; 2335} 2336 2337/** 2338 * sis900_reset - Reset sis900 MAC 2339 * @net_dev: the net device to reset 2340 * 2341 * reset sis900 MAC and wait until finished 2342 * reset through command register 2343 * change backoff algorithm for 900B0 & 635 M/B 2344 */ 2345 2346static void sis900_reset(struct net_device *net_dev) 2347{ 2348 struct sis900_private *sis_priv = netdev_priv(net_dev); 2349 long ioaddr = net_dev->base_addr; 2350 int i = 0; 2351 u32 status = TxRCMP | RxRCMP; 2352 2353 outl(0, ioaddr + ier); 2354 outl(0, ioaddr + imr); 2355 outl(0, ioaddr + rfcr); 2356 2357 outl(RxRESET | TxRESET | RESET | inl(ioaddr + cr), ioaddr + cr); 2358 2359 /* Check that the chip has finished the reset. */ 2360 while (status && (i++ < 1000)) { 2361 status ^= (inl(isr + ioaddr) & status); 2362 } 2363 2364 if( (sis_priv->chipset_rev >= SIS635A_900_REV) || 2365 (sis_priv->chipset_rev == SIS900B_900_REV) ) 2366 outl(PESEL | RND_CNT, ioaddr + cfg); 2367 else 2368 outl(PESEL, ioaddr + cfg); 2369} 2370 2371/** 2372 * sis900_remove - Remove sis900 device 2373 * @pci_dev: the pci device to be removed 2374 * 2375 * remove and release SiS900 net device 2376 */ 2377 2378static void __devexit sis900_remove(struct pci_dev *pci_dev) 2379{ 2380 struct net_device *net_dev = pci_get_drvdata(pci_dev); 2381 struct sis900_private *sis_priv = netdev_priv(net_dev); 2382 struct mii_phy *phy = NULL; 2383 2384 while (sis_priv->first_mii) { 2385 phy = sis_priv->first_mii; 2386 sis_priv->first_mii = phy->next; 2387 kfree(phy); 2388 } 2389 2390 pci_free_consistent(pci_dev, RX_TOTAL_SIZE, sis_priv->rx_ring, 2391 sis_priv->rx_ring_dma); 2392 pci_free_consistent(pci_dev, TX_TOTAL_SIZE, sis_priv->tx_ring, 2393 sis_priv->tx_ring_dma); 2394 unregister_netdev(net_dev); 2395 free_netdev(net_dev); 2396 pci_release_regions(pci_dev); 2397 pci_set_drvdata(pci_dev, NULL); 2398} 2399 2400#ifdef CONFIG_PM 2401 2402static int sis900_suspend(struct pci_dev *pci_dev, pm_message_t state) 2403{ 2404 struct net_device *net_dev = pci_get_drvdata(pci_dev); 2405 long ioaddr = net_dev->base_addr; 2406 2407 if(!netif_running(net_dev)) 2408 return 0; 2409 2410 netif_stop_queue(net_dev); 2411 netif_device_detach(net_dev); 2412 2413 /* Stop the chip's Tx and Rx Status Machine */ 2414 outl(RxDIS | TxDIS | inl(ioaddr + cr), ioaddr + cr); 2415 2416 pci_set_power_state(pci_dev, PCI_D3hot); 2417 pci_save_state(pci_dev); 2418 2419 return 0; 2420} 2421 2422static int sis900_resume(struct pci_dev *pci_dev) 2423{ 2424 struct net_device *net_dev = pci_get_drvdata(pci_dev); 2425 struct sis900_private *sis_priv = netdev_priv(net_dev); 2426 long ioaddr = net_dev->base_addr; 2427 2428 if(!netif_running(net_dev)) 2429 return 0; 2430 pci_restore_state(pci_dev); 2431 pci_set_power_state(pci_dev, PCI_D0); 2432 2433 sis900_init_rxfilter(net_dev); 2434 2435 sis900_init_tx_ring(net_dev); 2436 sis900_init_rx_ring(net_dev); 2437 2438 set_rx_mode(net_dev); 2439 2440 netif_device_attach(net_dev); 2441 netif_start_queue(net_dev); 2442 2443 /* Workaround for EDB */ 2444 sis900_set_mode(ioaddr, HW_SPEED_10_MBPS, FDX_CAPABLE_HALF_SELECTED); 2445 2446 /* Enable all known interrupts by setting the interrupt mask. */ 2447 outl((RxSOVR|RxORN|RxERR|RxOK|TxURN|TxERR|TxIDLE), ioaddr + imr); 2448 outl(RxENA | inl(ioaddr + cr), ioaddr + cr); 2449 outl(IE, ioaddr + ier); 2450 2451 sis900_check_mode(net_dev, sis_priv->mii); 2452 2453 return 0; 2454} 2455#endif /* CONFIG_PM */ 2456 2457static struct pci_driver sis900_pci_driver = { 2458 .name = SIS900_MODULE_NAME, 2459 .id_table = sis900_pci_tbl, 2460 .probe = sis900_probe, 2461 .remove = __devexit_p(sis900_remove), 2462#ifdef CONFIG_PM 2463 .suspend = sis900_suspend, 2464 .resume = sis900_resume, 2465#endif /* CONFIG_PM */ 2466}; 2467 2468static int __init sis900_init_module(void) 2469{ 2470/* when a module, this is printed whether or not devices are found in probe */ 2471#ifdef MODULE 2472 printk(version); 2473#endif 2474 2475 return pci_register_driver(&sis900_pci_driver); 2476} 2477 2478static void __exit sis900_cleanup_module(void) 2479{ 2480 pci_unregister_driver(&sis900_pci_driver); 2481} 2482 2483module_init(sis900_init_module); 2484module_exit(sis900_cleanup_module); 2485