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1/* 2 * linux/drivers/char/serial_core.h 3 * 4 * Copyright (C) 2000 Deep Blue Solutions Ltd. 5 * 6 * This program is free software; you can redistribute it and/or modify 7 * it under the terms of the GNU General Public License as published by 8 * the Free Software Foundation; either version 2 of the License, or 9 * (at your option) any later version. 10 * 11 * This program is distributed in the hope that it will be useful, 12 * but WITHOUT ANY WARRANTY; without even the implied warranty of 13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 14 * GNU General Public License for more details. 15 * 16 * You should have received a copy of the GNU General Public License 17 * along with this program; if not, write to the Free Software 18 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA 19 */ 20#ifndef LINUX_SERIAL_CORE_H 21#define LINUX_SERIAL_CORE_H 22 23/* 24 * The type definitions. These are from Ted Ts'o's serial.h 25 */ 26#define PORT_UNKNOWN 0 27#define PORT_8250 1 28#define PORT_16450 2 29#define PORT_16550 3 30#define PORT_16550A 4 31#define PORT_CIRRUS 5 32#define PORT_16650 6 33#define PORT_16650V2 7 34#define PORT_16750 8 35#define PORT_STARTECH 9 36#define PORT_16C950 10 37#define PORT_16654 11 38#define PORT_16850 12 39#define PORT_RSA 13 40#define PORT_NS16550A 14 41#define PORT_XSCALE 15 42#define PORT_RM9000 16 /* PMC-Sierra RM9xxx internal UART */ 43#define PORT_OCTEON 17 /* Cavium OCTEON internal UART */ 44#define PORT_AR7 18 /* Texas Instruments AR7 internal UART */ 45#define PORT_MAX_8250 18 /* max port ID */ 46 47/* 48 * ARM specific type numbers. These are not currently guaranteed 49 * to be implemented, and will change in the future. These are 50 * separate so any additions to the old serial.c that occur before 51 * we are merged can be easily merged here. 52 */ 53#define PORT_PXA 31 54#define PORT_AMBA 32 55#define PORT_CLPS711X 33 56#define PORT_SA1100 34 57#define PORT_UART00 35 58#define PORT_21285 37 59 60/* Sparc type numbers. */ 61#define PORT_SUNZILOG 38 62#define PORT_SUNSAB 39 63 64/* DEC */ 65#define PORT_DZ 46 66#define PORT_ZS 47 67 68/* Parisc type numbers. */ 69#define PORT_MUX 48 70 71/* Atmel AT91 / AT32 SoC */ 72#define PORT_ATMEL 49 73 74/* Macintosh Zilog type numbers */ 75#define PORT_MAC_ZILOG 50 /* m68k : not yet implemented */ 76#define PORT_PMAC_ZILOG 51 77 78/* SH-SCI */ 79#define PORT_SCI 52 80#define PORT_SCIF 53 81#define PORT_IRDA 54 82 83/* Samsung S3C2410 SoC and derivatives thereof */ 84#define PORT_S3C2410 55 85 86/* SGI IP22 aka Indy / Challenge S / Indigo 2 */ 87#define PORT_IP22ZILOG 56 88 89/* Sharp LH7a40x -- an ARM9 SoC series */ 90#define PORT_LH7A40X 57 91 92/* PPC CPM type number */ 93#define PORT_CPM 58 94 95/* MPC52xx type numbers */ 96#define PORT_MPC52xx 59 97 98/* IBM icom */ 99#define PORT_ICOM 60 100 101/* Samsung S3C2440 SoC */ 102#define PORT_S3C2440 61 103 104/* Motorola i.MX SoC */ 105#define PORT_IMX 62 106 107/* Marvell MPSC */ 108#define PORT_MPSC 63 109 110/* TXX9 type number */ 111#define PORT_TXX9 64 112 113/* NEC VR4100 series SIU/DSIU */ 114#define PORT_VR41XX_SIU 65 115#define PORT_VR41XX_DSIU 66 116 117/* Samsung S3C2400 SoC */ 118#define PORT_S3C2400 67 119 120/* M32R SIO */ 121#define PORT_M32R_SIO 68 122 123/*Digi jsm */ 124#define PORT_JSM 69 125 126#define PORT_PNX8XXX 70 127 128/* Hilscher netx */ 129#define PORT_NETX 71 130 131/* SUN4V Hypervisor Console */ 132#define PORT_SUNHV 72 133 134#define PORT_S3C2412 73 135 136/* Xilinx uartlite */ 137#define PORT_UARTLITE 74 138 139/* Blackfin bf5xx */ 140#define PORT_BFIN 75 141 142/* Micrel KS8695 */ 143#define PORT_KS8695 76 144 145/* Broadcom SB1250, etc. SOC */ 146#define PORT_SB1250_DUART 77 147 148/* Freescale ColdFire */ 149#define PORT_MCF 78 150 151/* Blackfin SPORT */ 152#define PORT_BFIN_SPORT 79 153 154/* MN10300 on-chip UART numbers */ 155#define PORT_MN10300 80 156#define PORT_MN10300_CTS 81 157 158#define PORT_SC26XX 82 159 160/* SH-SCI */ 161#define PORT_SCIFA 83 162 163#define PORT_S3C6400 84 164 165/* NWPSERIAL */ 166#define PORT_NWPSERIAL 85 167 168/* MAX3100 */ 169#define PORT_MAX3100 86 170 171/* Timberdale UART */ 172#define PORT_TIMBUART 87 173 174/* Qualcomm MSM SoCs */ 175#define PORT_MSM 88 176 177#ifdef __KERNEL__ 178 179#include <linux/compiler.h> 180#include <linux/interrupt.h> 181#include <linux/circ_buf.h> 182#include <linux/spinlock.h> 183#include <linux/sched.h> 184#include <linux/tty.h> 185#include <linux/mutex.h> 186#include <linux/sysrq.h> 187 188struct uart_port; 189struct uart_info; 190struct serial_struct; 191struct device; 192 193/* 194 * This structure describes all the operations that can be 195 * done on the physical hardware. 196 */ 197struct uart_ops { 198 unsigned int (*tx_empty)(struct uart_port *); 199 void (*set_mctrl)(struct uart_port *, unsigned int mctrl); 200 unsigned int (*get_mctrl)(struct uart_port *); 201 void (*stop_tx)(struct uart_port *); 202 void (*start_tx)(struct uart_port *); 203 void (*send_xchar)(struct uart_port *, char ch); 204 void (*stop_rx)(struct uart_port *); 205 void (*enable_ms)(struct uart_port *); 206 void (*break_ctl)(struct uart_port *, int ctl); 207 int (*startup)(struct uart_port *); 208 void (*shutdown)(struct uart_port *); 209 void (*flush_buffer)(struct uart_port *); 210 void (*set_termios)(struct uart_port *, struct ktermios *new, 211 struct ktermios *old); 212 void (*set_ldisc)(struct uart_port *); 213 void (*pm)(struct uart_port *, unsigned int state, 214 unsigned int oldstate); 215 int (*set_wake)(struct uart_port *, unsigned int state); 216 217 /* 218 * Return a string describing the type of the port 219 */ 220 const char *(*type)(struct uart_port *); 221 222 /* 223 * Release IO and memory resources used by the port. 224 * This includes iounmap if necessary. 225 */ 226 void (*release_port)(struct uart_port *); 227 228 /* 229 * Request IO and memory resources used by the port. 230 * This includes iomapping the port if necessary. 231 */ 232 int (*request_port)(struct uart_port *); 233 void (*config_port)(struct uart_port *, int); 234 int (*verify_port)(struct uart_port *, struct serial_struct *); 235 int (*ioctl)(struct uart_port *, unsigned int, unsigned long); 236#ifdef CONFIG_CONSOLE_POLL 237 void (*poll_put_char)(struct uart_port *, unsigned char); 238 int (*poll_get_char)(struct uart_port *); 239#endif 240}; 241 242#define UART_CONFIG_TYPE (1 << 0) 243#define UART_CONFIG_IRQ (1 << 1) 244 245struct uart_icount { 246 __u32 cts; 247 __u32 dsr; 248 __u32 rng; 249 __u32 dcd; 250 __u32 rx; 251 __u32 tx; 252 __u32 frame; 253 __u32 overrun; 254 __u32 parity; 255 __u32 brk; 256 __u32 buf_overrun; 257}; 258 259typedef unsigned int __bitwise__ upf_t; 260 261struct uart_port { 262 spinlock_t lock; /* port lock */ 263 unsigned long iobase; /* in/out[bwl] */ 264 unsigned char __iomem *membase; /* read/write[bwl] */ 265 unsigned int (*serial_in)(struct uart_port *, int); 266 void (*serial_out)(struct uart_port *, int, int); 267 unsigned int irq; /* irq number */ 268 unsigned int uartclk; /* base uart clock */ 269 unsigned int fifosize; /* tx fifo size */ 270 unsigned char x_char; /* xon/xoff char */ 271 unsigned char regshift; /* reg offset shift */ 272 unsigned char iotype; /* io access style */ 273 unsigned char unused1; 274 275#define UPIO_PORT (0) 276#define UPIO_HUB6 (1) 277#define UPIO_MEM (2) 278#define UPIO_MEM32 (3) 279#define UPIO_AU (4) /* Au1x00 type IO */ 280#define UPIO_TSI (5) /* Tsi108/109 type IO */ 281#define UPIO_DWAPB (6) /* DesignWare APB UART */ 282#define UPIO_RM9000 (7) /* RM9000 type IO */ 283 284 unsigned int read_status_mask; /* driver specific */ 285 unsigned int ignore_status_mask; /* driver specific */ 286 struct uart_info *info; /* pointer to parent info */ 287 struct uart_icount icount; /* statistics */ 288 289 struct console *cons; /* struct console, if any */ 290#if defined(CONFIG_SERIAL_CORE_CONSOLE) || defined(SUPPORT_SYSRQ) 291 unsigned long sysrq; /* sysrq timeout */ 292#endif 293 294 upf_t flags; 295 296#define UPF_FOURPORT ((__force upf_t) (1 << 1)) 297#define UPF_SAK ((__force upf_t) (1 << 2)) 298#define UPF_SPD_MASK ((__force upf_t) (0x1030)) 299#define UPF_SPD_HI ((__force upf_t) (0x0010)) 300#define UPF_SPD_VHI ((__force upf_t) (0x0020)) 301#define UPF_SPD_CUST ((__force upf_t) (0x0030)) 302#define UPF_SPD_SHI ((__force upf_t) (0x1000)) 303#define UPF_SPD_WARP ((__force upf_t) (0x1010)) 304#define UPF_SKIP_TEST ((__force upf_t) (1 << 6)) 305#define UPF_AUTO_IRQ ((__force upf_t) (1 << 7)) 306#define UPF_HARDPPS_CD ((__force upf_t) (1 << 11)) 307#define UPF_LOW_LATENCY ((__force upf_t) (1 << 13)) 308#define UPF_BUGGY_UART ((__force upf_t) (1 << 14)) 309#define UPF_NO_TXEN_TEST ((__force upf_t) (1 << 15)) 310#define UPF_MAGIC_MULTIPLIER ((__force upf_t) (1 << 16)) 311#define UPF_CONS_FLOW ((__force upf_t) (1 << 23)) 312#define UPF_SHARE_IRQ ((__force upf_t) (1 << 24)) 313/* The exact UART type is known and should not be probed. */ 314#define UPF_FIXED_TYPE ((__force upf_t) (1 << 27)) 315#define UPF_BOOT_AUTOCONF ((__force upf_t) (1 << 28)) 316#define UPF_FIXED_PORT ((__force upf_t) (1 << 29)) 317#define UPF_DEAD ((__force upf_t) (1 << 30)) 318#define UPF_IOREMAP ((__force upf_t) (1 << 31)) 319 320#define UPF_CHANGE_MASK ((__force upf_t) (0x17fff)) 321#define UPF_USR_MASK ((__force upf_t) (UPF_SPD_MASK|UPF_LOW_LATENCY)) 322 323 unsigned int mctrl; /* current modem ctrl settings */ 324 unsigned int timeout; /* character-based timeout */ 325 unsigned int type; /* port type */ 326 const struct uart_ops *ops; 327 unsigned int custom_divisor; 328 unsigned int line; /* port index */ 329 resource_size_t mapbase; /* for ioremap */ 330 struct device *dev; /* parent device */ 331 unsigned char hub6; /* this should be in the 8250 driver */ 332 unsigned char suspended; 333 unsigned char unused[2]; 334 void *private_data; /* generic platform data pointer */ 335}; 336 337/* 338 * This is the state information which is only valid when the port 339 * is open; it may be cleared the core driver once the device has 340 * been closed. Either the low level driver or the core can modify 341 * stuff here. 342 */ 343typedef unsigned int __bitwise__ uif_t; 344 345struct uart_info { 346 struct tty_port port; 347 struct circ_buf xmit; 348 uif_t flags; 349 350/* 351 * Definitions for info->flags. These are _private_ to serial_core, and 352 * are specific to this structure. They may be queried by low level drivers. 353 * 354 * FIXME: use the ASY_ definitions 355 */ 356#define UIF_CHECK_CD ((__force uif_t) (1 << 25)) 357#define UIF_CTS_FLOW ((__force uif_t) (1 << 26)) 358#define UIF_NORMAL_ACTIVE ((__force uif_t) (1 << 29)) 359#define UIF_INITIALIZED ((__force uif_t) (1 << 31)) 360#define UIF_SUSPENDED ((__force uif_t) (1 << 30)) 361 362 struct tasklet_struct tlet; 363 wait_queue_head_t delta_msr_wait; 364}; 365 366/* 367 * This is the state information which is persistent across opens. 368 * The low level driver must not to touch any elements contained 369 * within. 370 */ 371struct uart_state { 372 unsigned int close_delay; /* msec */ 373 unsigned int closing_wait; /* msec */ 374 375#define USF_CLOSING_WAIT_INF (0) 376#define USF_CLOSING_WAIT_NONE (~0U) 377 378 int count; 379 int pm_state; 380 struct uart_info info; 381 struct uart_port *port; 382 383 struct mutex mutex; 384}; 385 386#define UART_XMIT_SIZE PAGE_SIZE 387 388 389/* number of characters left in xmit buffer before we ask for more */ 390#define WAKEUP_CHARS 256 391 392struct module; 393struct tty_driver; 394 395struct uart_driver { 396 struct module *owner; 397 const char *driver_name; 398 const char *dev_name; 399 int major; 400 int minor; 401 int nr; 402 struct console *cons; 403 404 /* 405 * these are private; the low level driver should not 406 * touch these; they should be initialised to NULL 407 */ 408 struct uart_state *state; 409 struct tty_driver *tty_driver; 410}; 411 412void uart_write_wakeup(struct uart_port *port); 413 414/* 415 * Baud rate helpers. 416 */ 417void uart_update_timeout(struct uart_port *port, unsigned int cflag, 418 unsigned int baud); 419unsigned int uart_get_baud_rate(struct uart_port *port, struct ktermios *termios, 420 struct ktermios *old, unsigned int min, 421 unsigned int max); 422unsigned int uart_get_divisor(struct uart_port *port, unsigned int baud); 423 424/* 425 * Console helpers. 426 */ 427struct uart_port *uart_get_console(struct uart_port *ports, int nr, 428 struct console *c); 429void uart_parse_options(char *options, int *baud, int *parity, int *bits, 430 int *flow); 431int uart_set_options(struct uart_port *port, struct console *co, int baud, 432 int parity, int bits, int flow); 433struct tty_driver *uart_console_device(struct console *co, int *index); 434void uart_console_write(struct uart_port *port, const char *s, 435 unsigned int count, 436 void (*putchar)(struct uart_port *, int)); 437 438/* 439 * Port/driver registration/removal 440 */ 441int uart_register_driver(struct uart_driver *uart); 442void uart_unregister_driver(struct uart_driver *uart); 443int uart_add_one_port(struct uart_driver *reg, struct uart_port *port); 444int uart_remove_one_port(struct uart_driver *reg, struct uart_port *port); 445int uart_match_port(struct uart_port *port1, struct uart_port *port2); 446 447/* 448 * Power Management 449 */ 450int uart_suspend_port(struct uart_driver *reg, struct uart_port *port); 451int uart_resume_port(struct uart_driver *reg, struct uart_port *port); 452 453#define uart_circ_empty(circ) ((circ)->head == (circ)->tail) 454#define uart_circ_clear(circ) ((circ)->head = (circ)->tail = 0) 455 456#define uart_circ_chars_pending(circ) \ 457 (CIRC_CNT((circ)->head, (circ)->tail, UART_XMIT_SIZE)) 458 459#define uart_circ_chars_free(circ) \ 460 (CIRC_SPACE((circ)->head, (circ)->tail, UART_XMIT_SIZE)) 461 462static inline int uart_tx_stopped(struct uart_port *port) 463{ 464 struct tty_struct *tty = port->info->port.tty; 465 if(tty->stopped || tty->hw_stopped) 466 return 1; 467 return 0; 468} 469 470/* 471 * The following are helper functions for the low level drivers. 472 */ 473static inline int 474uart_handle_sysrq_char(struct uart_port *port, unsigned int ch) 475{ 476#ifdef SUPPORT_SYSRQ 477 if (port->sysrq) { 478 if (ch && time_before(jiffies, port->sysrq)) { 479 handle_sysrq(ch, port->info->port.tty); 480 port->sysrq = 0; 481 return 1; 482 } 483 port->sysrq = 0; 484 } 485#endif 486 return 0; 487} 488#ifndef SUPPORT_SYSRQ 489#define uart_handle_sysrq_char(port,ch) uart_handle_sysrq_char(port, 0) 490#endif 491 492/* 493 * We do the SysRQ and SAK checking like this... 494 */ 495static inline int uart_handle_break(struct uart_port *port) 496{ 497 struct uart_info *info = port->info; 498#ifdef SUPPORT_SYSRQ 499 if (port->cons && port->cons->index == port->line) { 500 if (!port->sysrq) { 501 port->sysrq = jiffies + HZ*5; 502 return 1; 503 } 504 port->sysrq = 0; 505 } 506#endif 507 if (port->flags & UPF_SAK) 508 do_SAK(info->port.tty); 509 return 0; 510} 511 512/** 513 * uart_handle_dcd_change - handle a change of carrier detect state 514 * @port: uart_port structure for the open port 515 * @status: new carrier detect status, nonzero if active 516 */ 517static inline void 518uart_handle_dcd_change(struct uart_port *port, unsigned int status) 519{ 520 struct uart_info *info = port->info; 521 522 port->icount.dcd++; 523 524#ifdef CONFIG_HARD_PPS 525 if ((port->flags & UPF_HARDPPS_CD) && status) 526 hardpps(); 527#endif 528 529 if (info->flags & UIF_CHECK_CD) { 530 if (status) 531 wake_up_interruptible(&info->port.open_wait); 532 else if (info->port.tty) 533 tty_hangup(info->port.tty); 534 } 535} 536 537/** 538 * uart_handle_cts_change - handle a change of clear-to-send state 539 * @port: uart_port structure for the open port 540 * @status: new clear to send status, nonzero if active 541 */ 542static inline void 543uart_handle_cts_change(struct uart_port *port, unsigned int status) 544{ 545 struct uart_info *info = port->info; 546 struct tty_struct *tty = info->port.tty; 547 548 port->icount.cts++; 549 550 if (info->flags & UIF_CTS_FLOW) { 551 if (tty->hw_stopped) { 552 if (status) { 553 tty->hw_stopped = 0; 554 port->ops->start_tx(port); 555 uart_write_wakeup(port); 556 } 557 } else { 558 if (!status) { 559 tty->hw_stopped = 1; 560 port->ops->stop_tx(port); 561 } 562 } 563 } 564} 565 566#include <linux/tty_flip.h> 567 568static inline void 569uart_insert_char(struct uart_port *port, unsigned int status, 570 unsigned int overrun, unsigned int ch, unsigned int flag) 571{ 572 struct tty_struct *tty = port->info->port.tty; 573 574 if ((status & port->ignore_status_mask & ~overrun) == 0) 575 tty_insert_flip_char(tty, ch, flag); 576 577 /* 578 * Overrun is special. Since it's reported immediately, 579 * it doesn't affect the current character. 580 */ 581 if (status & ~port->ignore_status_mask & overrun) 582 tty_insert_flip_char(tty, 0, TTY_OVERRUN); 583} 584 585/* 586 * UART_ENABLE_MS - determine if port should enable modem status irqs 587 */ 588#define UART_ENABLE_MS(port,cflag) ((port)->flags & UPF_HARDPPS_CD || \ 589 (cflag) & CRTSCTS || \ 590 !((cflag) & CLOCAL)) 591 592#endif 593 594#endif /* LINUX_SERIAL_CORE_H */