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linux
1/*
2 * core.h -- Core driver for NXP PCF50633
3 *
4 * (C) 2006-2008 by Openmoko, Inc.
5 * All rights reserved.
6 *
7 * This program is free software; you can redistribute it and/or modify it
8 * under the terms of the GNU General Public License as published by the
9 * Free Software Foundation; either version 2 of the License, or (at your
10 * option) any later version.
11 */
12
13#ifndef __LINUX_MFD_PCF50633_CORE_H
14#define __LINUX_MFD_PCF50633_CORE_H
15
16#include <linux/i2c.h>
17#include <linux/workqueue.h>
18#include <linux/regulator/driver.h>
19#include <linux/regulator/machine.h>
20#include <linux/power_supply.h>
21
22struct pcf50633;
23
24#define PCF50633_NUM_REGULATORS 11
25
26struct pcf50633_platform_data {
27 struct regulator_init_data reg_init_data[PCF50633_NUM_REGULATORS];
28
29 char **batteries;
30 int num_batteries;
31
32 int charging_restart_interval;
33
34 /* Callbacks */
35 void (*probe_done)(struct pcf50633 *);
36 void (*mbc_event_callback)(struct pcf50633 *, int);
37 void (*regulator_registered)(struct pcf50633 *, int);
38 void (*force_shutdown)(struct pcf50633 *);
39
40 u8 resumers[5];
41};
42
43struct pcf50633_subdev_pdata {
44 struct pcf50633 *pcf;
45};
46
47struct pcf50633_irq {
48 void (*handler) (int, void *);
49 void *data;
50};
51
52int pcf50633_register_irq(struct pcf50633 *pcf, int irq,
53 void (*handler) (int, void *), void *data);
54int pcf50633_free_irq(struct pcf50633 *pcf, int irq);
55
56int pcf50633_irq_mask(struct pcf50633 *pcf, int irq);
57int pcf50633_irq_unmask(struct pcf50633 *pcf, int irq);
58int pcf50633_irq_mask_get(struct pcf50633 *pcf, int irq);
59
60int pcf50633_read_block(struct pcf50633 *, u8 reg,
61 int nr_regs, u8 *data);
62int pcf50633_write_block(struct pcf50633 *pcf, u8 reg,
63 int nr_regs, u8 *data);
64u8 pcf50633_reg_read(struct pcf50633 *, u8 reg);
65int pcf50633_reg_write(struct pcf50633 *pcf, u8 reg, u8 val);
66
67int pcf50633_reg_set_bit_mask(struct pcf50633 *pcf, u8 reg, u8 mask, u8 val);
68int pcf50633_reg_clear_bits(struct pcf50633 *pcf, u8 reg, u8 bits);
69
70/* Interrupt registers */
71
72#define PCF50633_REG_INT1 0x02
73#define PCF50633_REG_INT2 0x03
74#define PCF50633_REG_INT3 0x04
75#define PCF50633_REG_INT4 0x05
76#define PCF50633_REG_INT5 0x06
77
78#define PCF50633_REG_INT1M 0x07
79#define PCF50633_REG_INT2M 0x08
80#define PCF50633_REG_INT3M 0x09
81#define PCF50633_REG_INT4M 0x0a
82#define PCF50633_REG_INT5M 0x0b
83
84enum {
85 /* Chip IRQs */
86 PCF50633_IRQ_ADPINS,
87 PCF50633_IRQ_ADPREM,
88 PCF50633_IRQ_USBINS,
89 PCF50633_IRQ_USBREM,
90 PCF50633_IRQ_RESERVED1,
91 PCF50633_IRQ_RESERVED2,
92 PCF50633_IRQ_ALARM,
93 PCF50633_IRQ_SECOND,
94 PCF50633_IRQ_ONKEYR,
95 PCF50633_IRQ_ONKEYF,
96 PCF50633_IRQ_EXTON1R,
97 PCF50633_IRQ_EXTON1F,
98 PCF50633_IRQ_EXTON2R,
99 PCF50633_IRQ_EXTON2F,
100 PCF50633_IRQ_EXTON3R,
101 PCF50633_IRQ_EXTON3F,
102 PCF50633_IRQ_BATFULL,
103 PCF50633_IRQ_CHGHALT,
104 PCF50633_IRQ_THLIMON,
105 PCF50633_IRQ_THLIMOFF,
106 PCF50633_IRQ_USBLIMON,
107 PCF50633_IRQ_USBLIMOFF,
108 PCF50633_IRQ_ADCRDY,
109 PCF50633_IRQ_ONKEY1S,
110 PCF50633_IRQ_LOWSYS,
111 PCF50633_IRQ_LOWBAT,
112 PCF50633_IRQ_HIGHTMP,
113 PCF50633_IRQ_AUTOPWRFAIL,
114 PCF50633_IRQ_DWN1PWRFAIL,
115 PCF50633_IRQ_DWN2PWRFAIL,
116 PCF50633_IRQ_LEDPWRFAIL,
117 PCF50633_IRQ_LEDOVP,
118 PCF50633_IRQ_LDO1PWRFAIL,
119 PCF50633_IRQ_LDO2PWRFAIL,
120 PCF50633_IRQ_LDO3PWRFAIL,
121 PCF50633_IRQ_LDO4PWRFAIL,
122 PCF50633_IRQ_LDO5PWRFAIL,
123 PCF50633_IRQ_LDO6PWRFAIL,
124 PCF50633_IRQ_HCLDOPWRFAIL,
125 PCF50633_IRQ_HCLDOOVL,
126
127 /* Always last */
128 PCF50633_NUM_IRQ,
129};
130
131struct pcf50633 {
132 struct device *dev;
133 struct i2c_client *i2c_client;
134
135 struct pcf50633_platform_data *pdata;
136 int irq;
137 struct pcf50633_irq irq_handler[PCF50633_NUM_IRQ];
138 struct work_struct irq_work;
139 struct mutex lock;
140
141 u8 mask_regs[5];
142
143 u8 suspend_irq_masks[5];
144 u8 resume_reason[5];
145 int is_suspended;
146
147 int onkey1s_held;
148
149 struct platform_device *rtc_pdev;
150 struct platform_device *mbc_pdev;
151 struct platform_device *adc_pdev;
152 struct platform_device *input_pdev;
153 struct platform_device *regulator_pdev[PCF50633_NUM_REGULATORS];
154};
155
156enum pcf50633_reg_int1 {
157 PCF50633_INT1_ADPINS = 0x01, /* Adapter inserted */
158 PCF50633_INT1_ADPREM = 0x02, /* Adapter removed */
159 PCF50633_INT1_USBINS = 0x04, /* USB inserted */
160 PCF50633_INT1_USBREM = 0x08, /* USB removed */
161 /* reserved */
162 PCF50633_INT1_ALARM = 0x40, /* RTC alarm time is reached */
163 PCF50633_INT1_SECOND = 0x80, /* RTC periodic second interrupt */
164};
165
166enum pcf50633_reg_int2 {
167 PCF50633_INT2_ONKEYR = 0x01, /* ONKEY rising edge */
168 PCF50633_INT2_ONKEYF = 0x02, /* ONKEY falling edge */
169 PCF50633_INT2_EXTON1R = 0x04, /* EXTON1 rising edge */
170 PCF50633_INT2_EXTON1F = 0x08, /* EXTON1 falling edge */
171 PCF50633_INT2_EXTON2R = 0x10, /* EXTON2 rising edge */
172 PCF50633_INT2_EXTON2F = 0x20, /* EXTON2 falling edge */
173 PCF50633_INT2_EXTON3R = 0x40, /* EXTON3 rising edge */
174 PCF50633_INT2_EXTON3F = 0x80, /* EXTON3 falling edge */
175};
176
177enum pcf50633_reg_int3 {
178 PCF50633_INT3_BATFULL = 0x01, /* Battery full */
179 PCF50633_INT3_CHGHALT = 0x02, /* Charger halt */
180 PCF50633_INT3_THLIMON = 0x04,
181 PCF50633_INT3_THLIMOFF = 0x08,
182 PCF50633_INT3_USBLIMON = 0x10,
183 PCF50633_INT3_USBLIMOFF = 0x20,
184 PCF50633_INT3_ADCRDY = 0x40, /* ADC result ready */
185 PCF50633_INT3_ONKEY1S = 0x80, /* ONKEY pressed 1 second */
186};
187
188enum pcf50633_reg_int4 {
189 PCF50633_INT4_LOWSYS = 0x01,
190 PCF50633_INT4_LOWBAT = 0x02,
191 PCF50633_INT4_HIGHTMP = 0x04,
192 PCF50633_INT4_AUTOPWRFAIL = 0x08,
193 PCF50633_INT4_DWN1PWRFAIL = 0x10,
194 PCF50633_INT4_DWN2PWRFAIL = 0x20,
195 PCF50633_INT4_LEDPWRFAIL = 0x40,
196 PCF50633_INT4_LEDOVP = 0x80,
197};
198
199enum pcf50633_reg_int5 {
200 PCF50633_INT5_LDO1PWRFAIL = 0x01,
201 PCF50633_INT5_LDO2PWRFAIL = 0x02,
202 PCF50633_INT5_LDO3PWRFAIL = 0x04,
203 PCF50633_INT5_LDO4PWRFAIL = 0x08,
204 PCF50633_INT5_LDO5PWRFAIL = 0x10,
205 PCF50633_INT5_LDO6PWRFAIL = 0x20,
206 PCF50633_INT5_HCLDOPWRFAIL = 0x40,
207 PCF50633_INT5_HCLDOOVL = 0x80,
208};
209
210/* misc. registers */
211#define PCF50633_REG_OOCSHDWN 0x0c
212
213/* LED registers */
214#define PCF50633_REG_LEDOUT 0x28
215#define PCF50633_REG_LEDENA 0x29
216#define PCF50633_REG_LEDCTL 0x2a
217#define PCF50633_REG_LEDDIM 0x2b
218
219#endif
220