Linux kernel mirror (for testing)
git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
tjh.dev
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linux
1/*
2 * Compaq Hot Plug Controller Driver
3 *
4 * Copyright (C) 1995,2001 Compaq Computer Corporation
5 * Copyright (C) 2001 Greg Kroah-Hartman (greg@kroah.com)
6 * Copyright (C) 2001 IBM
7 *
8 * All rights reserved.
9 *
10 * This program is free software; you can redistribute it and/or modify
11 * it under the terms of the GNU General Public License as published by
12 * the Free Software Foundation; either version 2 of the License, or (at
13 * your option) any later version.
14 *
15 * This program is distributed in the hope that it will be useful, but
16 * WITHOUT ANY WARRANTY; without even the implied warranty of
17 * MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, GOOD TITLE or
18 * NON INFRINGEMENT. See the GNU General Public License for more
19 * details.
20 *
21 * You should have received a copy of the GNU General Public License
22 * along with this program; if not, write to the Free Software
23 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
24 *
25 * Send feedback to <greg@kroah.com>
26 *
27 */
28#ifndef _CPQPHP_H
29#define _CPQPHP_H
30
31#include <linux/interrupt.h>
32#include <asm/io.h> /* for read? and write? functions */
33#include <linux/delay.h> /* for delays */
34#include <linux/mutex.h>
35
36#define MY_NAME "cpqphp"
37
38#define dbg(fmt, arg...) do { if (cpqhp_debug) printk(KERN_DEBUG "%s: " fmt , MY_NAME , ## arg); } while (0)
39#define err(format, arg...) printk(KERN_ERR "%s: " format , MY_NAME , ## arg)
40#define info(format, arg...) printk(KERN_INFO "%s: " format , MY_NAME , ## arg)
41#define warn(format, arg...) printk(KERN_WARNING "%s: " format , MY_NAME , ## arg)
42
43
44
45struct smbios_system_slot {
46 u8 type;
47 u8 length;
48 u16 handle;
49 u8 name_string_num;
50 u8 slot_type;
51 u8 slot_width;
52 u8 slot_current_usage;
53 u8 slot_length;
54 u16 slot_number;
55 u8 properties1;
56 u8 properties2;
57} __attribute__ ((packed));
58
59/* offsets to the smbios generic type based on the above structure layout */
60enum smbios_system_slot_offsets {
61 SMBIOS_SLOT_GENERIC_TYPE = offsetof(struct smbios_system_slot, type),
62 SMBIOS_SLOT_GENERIC_LENGTH = offsetof(struct smbios_system_slot, length),
63 SMBIOS_SLOT_GENERIC_HANDLE = offsetof(struct smbios_system_slot, handle),
64 SMBIOS_SLOT_NAME_STRING_NUM = offsetof(struct smbios_system_slot, name_string_num),
65 SMBIOS_SLOT_TYPE = offsetof(struct smbios_system_slot, slot_type),
66 SMBIOS_SLOT_WIDTH = offsetof(struct smbios_system_slot, slot_width),
67 SMBIOS_SLOT_CURRENT_USAGE = offsetof(struct smbios_system_slot, slot_current_usage),
68 SMBIOS_SLOT_LENGTH = offsetof(struct smbios_system_slot, slot_length),
69 SMBIOS_SLOT_NUMBER = offsetof(struct smbios_system_slot, slot_number),
70 SMBIOS_SLOT_PROPERTIES1 = offsetof(struct smbios_system_slot, properties1),
71 SMBIOS_SLOT_PROPERTIES2 = offsetof(struct smbios_system_slot, properties2),
72};
73
74struct smbios_generic {
75 u8 type;
76 u8 length;
77 u16 handle;
78} __attribute__ ((packed));
79
80/* offsets to the smbios generic type based on the above structure layout */
81enum smbios_generic_offsets {
82 SMBIOS_GENERIC_TYPE = offsetof(struct smbios_generic, type),
83 SMBIOS_GENERIC_LENGTH = offsetof(struct smbios_generic, length),
84 SMBIOS_GENERIC_HANDLE = offsetof(struct smbios_generic, handle),
85};
86
87struct smbios_entry_point {
88 char anchor[4];
89 u8 ep_checksum;
90 u8 ep_length;
91 u8 major_version;
92 u8 minor_version;
93 u16 max_size_entry;
94 u8 ep_rev;
95 u8 reserved[5];
96 char int_anchor[5];
97 u8 int_checksum;
98 u16 st_length;
99 u32 st_address;
100 u16 number_of_entrys;
101 u8 bcd_rev;
102} __attribute__ ((packed));
103
104/* offsets to the smbios entry point based on the above structure layout */
105enum smbios_entry_point_offsets {
106 ANCHOR = offsetof(struct smbios_entry_point, anchor[0]),
107 EP_CHECKSUM = offsetof(struct smbios_entry_point, ep_checksum),
108 EP_LENGTH = offsetof(struct smbios_entry_point, ep_length),
109 MAJOR_VERSION = offsetof(struct smbios_entry_point, major_version),
110 MINOR_VERSION = offsetof(struct smbios_entry_point, minor_version),
111 MAX_SIZE_ENTRY = offsetof(struct smbios_entry_point, max_size_entry),
112 EP_REV = offsetof(struct smbios_entry_point, ep_rev),
113 INT_ANCHOR = offsetof(struct smbios_entry_point, int_anchor[0]),
114 INT_CHECKSUM = offsetof(struct smbios_entry_point, int_checksum),
115 ST_LENGTH = offsetof(struct smbios_entry_point, st_length),
116 ST_ADDRESS = offsetof(struct smbios_entry_point, st_address),
117 NUMBER_OF_ENTRYS = offsetof(struct smbios_entry_point, number_of_entrys),
118 BCD_REV = offsetof(struct smbios_entry_point, bcd_rev),
119};
120
121struct ctrl_reg { /* offset */
122 u8 slot_RST; /* 0x00 */
123 u8 slot_enable; /* 0x01 */
124 u16 misc; /* 0x02 */
125 u32 led_control; /* 0x04 */
126 u32 int_input_clear; /* 0x08 */
127 u32 int_mask; /* 0x0a */
128 u8 reserved0; /* 0x10 */
129 u8 reserved1; /* 0x11 */
130 u8 reserved2; /* 0x12 */
131 u8 gen_output_AB; /* 0x13 */
132 u32 non_int_input; /* 0x14 */
133 u32 reserved3; /* 0x18 */
134 u32 reserved4; /* 0x1a */
135 u32 reserved5; /* 0x20 */
136 u8 reserved6; /* 0x24 */
137 u8 reserved7; /* 0x25 */
138 u16 reserved8; /* 0x26 */
139 u8 slot_mask; /* 0x28 */
140 u8 reserved9; /* 0x29 */
141 u8 reserved10; /* 0x2a */
142 u8 reserved11; /* 0x2b */
143 u8 slot_SERR; /* 0x2c */
144 u8 slot_power; /* 0x2d */
145 u8 reserved12; /* 0x2e */
146 u8 reserved13; /* 0x2f */
147 u8 next_curr_freq; /* 0x30 */
148 u8 reset_freq_mode; /* 0x31 */
149} __attribute__ ((packed));
150
151/* offsets to the controller registers based on the above structure layout */
152enum ctrl_offsets {
153 SLOT_RST = offsetof(struct ctrl_reg, slot_RST),
154 SLOT_ENABLE = offsetof(struct ctrl_reg, slot_enable),
155 MISC = offsetof(struct ctrl_reg, misc),
156 LED_CONTROL = offsetof(struct ctrl_reg, led_control),
157 INT_INPUT_CLEAR = offsetof(struct ctrl_reg, int_input_clear),
158 INT_MASK = offsetof(struct ctrl_reg, int_mask),
159 CTRL_RESERVED0 = offsetof(struct ctrl_reg, reserved0),
160 CTRL_RESERVED1 = offsetof(struct ctrl_reg, reserved1),
161 CTRL_RESERVED2 = offsetof(struct ctrl_reg, reserved1),
162 GEN_OUTPUT_AB = offsetof(struct ctrl_reg, gen_output_AB),
163 NON_INT_INPUT = offsetof(struct ctrl_reg, non_int_input),
164 CTRL_RESERVED3 = offsetof(struct ctrl_reg, reserved3),
165 CTRL_RESERVED4 = offsetof(struct ctrl_reg, reserved4),
166 CTRL_RESERVED5 = offsetof(struct ctrl_reg, reserved5),
167 CTRL_RESERVED6 = offsetof(struct ctrl_reg, reserved6),
168 CTRL_RESERVED7 = offsetof(struct ctrl_reg, reserved7),
169 CTRL_RESERVED8 = offsetof(struct ctrl_reg, reserved8),
170 SLOT_MASK = offsetof(struct ctrl_reg, slot_mask),
171 CTRL_RESERVED9 = offsetof(struct ctrl_reg, reserved9),
172 CTRL_RESERVED10 = offsetof(struct ctrl_reg, reserved10),
173 CTRL_RESERVED11 = offsetof(struct ctrl_reg, reserved11),
174 SLOT_SERR = offsetof(struct ctrl_reg, slot_SERR),
175 SLOT_POWER = offsetof(struct ctrl_reg, slot_power),
176 NEXT_CURR_FREQ = offsetof(struct ctrl_reg, next_curr_freq),
177 RESET_FREQ_MODE = offsetof(struct ctrl_reg, reset_freq_mode),
178};
179
180struct hrt {
181 char sig0;
182 char sig1;
183 char sig2;
184 char sig3;
185 u16 unused_IRQ;
186 u16 PCIIRQ;
187 u8 number_of_entries;
188 u8 revision;
189 u16 reserved1;
190 u32 reserved2;
191} __attribute__ ((packed));
192
193/* offsets to the hotplug resource table registers based on the above
194 * structure layout
195 */
196enum hrt_offsets {
197 SIG0 = offsetof(struct hrt, sig0),
198 SIG1 = offsetof(struct hrt, sig1),
199 SIG2 = offsetof(struct hrt, sig2),
200 SIG3 = offsetof(struct hrt, sig3),
201 UNUSED_IRQ = offsetof(struct hrt, unused_IRQ),
202 PCIIRQ = offsetof(struct hrt, PCIIRQ),
203 NUMBER_OF_ENTRIES = offsetof(struct hrt, number_of_entries),
204 REVISION = offsetof(struct hrt, revision),
205 HRT_RESERVED1 = offsetof(struct hrt, reserved1),
206 HRT_RESERVED2 = offsetof(struct hrt, reserved2),
207};
208
209struct slot_rt {
210 u8 dev_func;
211 u8 primary_bus;
212 u8 secondary_bus;
213 u8 max_bus;
214 u16 io_base;
215 u16 io_length;
216 u16 mem_base;
217 u16 mem_length;
218 u16 pre_mem_base;
219 u16 pre_mem_length;
220} __attribute__ ((packed));
221
222/* offsets to the hotplug slot resource table registers based on the above
223 * structure layout
224 */
225enum slot_rt_offsets {
226 DEV_FUNC = offsetof(struct slot_rt, dev_func),
227 PRIMARY_BUS = offsetof(struct slot_rt, primary_bus),
228 SECONDARY_BUS = offsetof(struct slot_rt, secondary_bus),
229 MAX_BUS = offsetof(struct slot_rt, max_bus),
230 IO_BASE = offsetof(struct slot_rt, io_base),
231 IO_LENGTH = offsetof(struct slot_rt, io_length),
232 MEM_BASE = offsetof(struct slot_rt, mem_base),
233 MEM_LENGTH = offsetof(struct slot_rt, mem_length),
234 PRE_MEM_BASE = offsetof(struct slot_rt, pre_mem_base),
235 PRE_MEM_LENGTH = offsetof(struct slot_rt, pre_mem_length),
236};
237
238struct pci_func {
239 struct pci_func *next;
240 u8 bus;
241 u8 device;
242 u8 function;
243 u8 is_a_board;
244 u16 status;
245 u8 configured;
246 u8 switch_save;
247 u8 presence_save;
248 u32 base_length[0x06];
249 u8 base_type[0x06];
250 u16 reserved2;
251 u32 config_space[0x20];
252 struct pci_resource *mem_head;
253 struct pci_resource *p_mem_head;
254 struct pci_resource *io_head;
255 struct pci_resource *bus_head;
256 struct timer_list *p_task_event;
257 struct pci_dev* pci_dev;
258};
259
260struct slot {
261 struct slot *next;
262 u8 bus;
263 u8 device;
264 u8 number;
265 u8 is_a_board;
266 u8 configured;
267 u8 state;
268 u8 switch_save;
269 u8 presence_save;
270 u32 capabilities;
271 u16 reserved2;
272 struct timer_list task_event;
273 u8 hp_slot;
274 struct controller *ctrl;
275 void __iomem *p_sm_slot;
276 struct hotplug_slot *hotplug_slot;
277};
278
279struct pci_resource {
280 struct pci_resource * next;
281 u32 base;
282 u32 length;
283};
284
285struct event_info {
286 u32 event_type;
287 u8 hp_slot;
288};
289
290struct controller {
291 struct controller *next;
292 u32 ctrl_int_comp;
293 struct mutex crit_sect; /* critical section mutex */
294 void __iomem *hpc_reg; /* cookie for our pci controller location */
295 struct pci_resource *mem_head;
296 struct pci_resource *p_mem_head;
297 struct pci_resource *io_head;
298 struct pci_resource *bus_head;
299 struct pci_dev *pci_dev;
300 struct pci_bus *pci_bus;
301 struct event_info event_queue[10];
302 struct slot *slot;
303 u8 next_event;
304 u8 interrupt;
305 u8 cfgspc_irq;
306 u8 bus; /* bus number for the pci hotplug controller */
307 u8 rev;
308 u8 slot_device_offset;
309 u8 first_slot;
310 u8 add_support;
311 u8 push_flag;
312 enum pci_bus_speed speed;
313 enum pci_bus_speed speed_capability;
314 u8 push_button; /* 0 = no pushbutton, 1 = pushbutton present */
315 u8 slot_switch_type; /* 0 = no switch, 1 = switch present */
316 u8 defeature_PHP; /* 0 = PHP not supported, 1 = PHP supported */
317 u8 alternate_base_address; /* 0 = not supported, 1 = supported */
318 u8 pci_config_space; /* Index/data access to working registers 0 = not supported, 1 = supported */
319 u8 pcix_speed_capability; /* PCI-X */
320 u8 pcix_support; /* PCI-X */
321 u16 vendor_id;
322 struct work_struct int_task_event;
323 wait_queue_head_t queue; /* sleep & wake process */
324 struct dentry *dentry; /* debugfs dentry */
325};
326
327struct irq_mapping {
328 u8 barber_pole;
329 u8 valid_INT;
330 u8 interrupt[4];
331};
332
333struct resource_lists {
334 struct pci_resource *mem_head;
335 struct pci_resource *p_mem_head;
336 struct pci_resource *io_head;
337 struct pci_resource *bus_head;
338 struct irq_mapping *irqs;
339};
340
341#define ROM_PHY_ADDR 0x0F0000
342#define ROM_PHY_LEN 0x00ffff
343
344#define PCI_HPC_ID 0xA0F7
345#define PCI_SUB_HPC_ID 0xA2F7
346#define PCI_SUB_HPC_ID2 0xA2F8
347#define PCI_SUB_HPC_ID3 0xA2F9
348#define PCI_SUB_HPC_ID_INTC 0xA2FA
349#define PCI_SUB_HPC_ID4 0xA2FD
350
351#define INT_BUTTON_IGNORE 0
352#define INT_PRESENCE_ON 1
353#define INT_PRESENCE_OFF 2
354#define INT_SWITCH_CLOSE 3
355#define INT_SWITCH_OPEN 4
356#define INT_POWER_FAULT 5
357#define INT_POWER_FAULT_CLEAR 6
358#define INT_BUTTON_PRESS 7
359#define INT_BUTTON_RELEASE 8
360#define INT_BUTTON_CANCEL 9
361
362#define STATIC_STATE 0
363#define BLINKINGON_STATE 1
364#define BLINKINGOFF_STATE 2
365#define POWERON_STATE 3
366#define POWEROFF_STATE 4
367
368#define PCISLOT_INTERLOCK_CLOSED 0x00000001
369#define PCISLOT_ADAPTER_PRESENT 0x00000002
370#define PCISLOT_POWERED 0x00000004
371#define PCISLOT_66_MHZ_OPERATION 0x00000008
372#define PCISLOT_64_BIT_OPERATION 0x00000010
373#define PCISLOT_REPLACE_SUPPORTED 0x00000020
374#define PCISLOT_ADD_SUPPORTED 0x00000040
375#define PCISLOT_INTERLOCK_SUPPORTED 0x00000080
376#define PCISLOT_66_MHZ_SUPPORTED 0x00000100
377#define PCISLOT_64_BIT_SUPPORTED 0x00000200
378
379#define PCI_TO_PCI_BRIDGE_CLASS 0x00060400
380
381#define INTERLOCK_OPEN 0x00000002
382#define ADD_NOT_SUPPORTED 0x00000003
383#define CARD_FUNCTIONING 0x00000005
384#define ADAPTER_NOT_SAME 0x00000006
385#define NO_ADAPTER_PRESENT 0x00000009
386#define NOT_ENOUGH_RESOURCES 0x0000000B
387#define DEVICE_TYPE_NOT_SUPPORTED 0x0000000C
388#define POWER_FAILURE 0x0000000E
389
390#define REMOVE_NOT_SUPPORTED 0x00000003
391
392
393/*
394 * error Messages
395 */
396#define msg_initialization_err "Initialization failure, error=%d\n"
397#define msg_HPC_rev_error "Unsupported revision of the PCI hot plug controller found.\n"
398#define msg_HPC_non_compaq_or_intel "The PCI hot plug controller is not supported by this driver.\n"
399#define msg_HPC_not_supported "this system is not supported by this version of cpqphpd. Upgrade to a newer version of cpqphpd\n"
400#define msg_unable_to_save "unable to store PCI hot plug add resource information. This system must be rebooted before adding any PCI devices.\n"
401#define msg_button_on "PCI slot #%d - powering on due to button press.\n"
402#define msg_button_off "PCI slot #%d - powering off due to button press.\n"
403#define msg_button_cancel "PCI slot #%d - action canceled due to button press.\n"
404#define msg_button_ignore "PCI slot #%d - button press ignored. (action in progress...)\n"
405
406
407/* debugfs functions for the hotplug controller info */
408extern void cpqhp_initialize_debugfs(void);
409extern void cpqhp_shutdown_debugfs(void);
410extern void cpqhp_create_debugfs_files(struct controller *ctrl);
411extern void cpqhp_remove_debugfs_files(struct controller *ctrl);
412
413/* controller functions */
414extern void cpqhp_pushbutton_thread(unsigned long event_pointer);
415extern irqreturn_t cpqhp_ctrl_intr(int IRQ, void *data);
416extern int cpqhp_find_available_resources(struct controller *ctrl,
417 void __iomem *rom_start);
418extern int cpqhp_event_start_thread(void);
419extern void cpqhp_event_stop_thread(void);
420extern struct pci_func *cpqhp_slot_create(unsigned char busnumber);
421extern struct pci_func *cpqhp_slot_find(unsigned char bus, unsigned char device,
422 unsigned char index);
423extern int cpqhp_process_SI(struct controller *ctrl, struct pci_func *func);
424extern int cpqhp_process_SS(struct controller *ctrl, struct pci_func *func);
425extern int cpqhp_hardware_test(struct controller *ctrl, int test_num);
426
427/* resource functions */
428extern int cpqhp_resource_sort_and_combine (struct pci_resource **head);
429
430/* pci functions */
431extern int cpqhp_set_irq(u8 bus_num, u8 dev_num, u8 int_pin, u8 irq_num);
432extern int cpqhp_get_bus_dev(struct controller *ctrl, u8 *bus_num, u8 *dev_num,
433 u8 slot);
434extern int cpqhp_save_config(struct controller *ctrl, int busnumber,
435 int is_hot_plug);
436extern int cpqhp_save_base_addr_length(struct controller *ctrl,
437 struct pci_func *func);
438extern int cpqhp_save_used_resources(struct controller *ctrl,
439 struct pci_func *func);
440extern int cpqhp_configure_board(struct controller *ctrl,
441 struct pci_func *func);
442extern int cpqhp_save_slot_config(struct controller *ctrl,
443 struct pci_func *new_slot);
444extern int cpqhp_valid_replace(struct controller *ctrl, struct pci_func *func);
445extern void cpqhp_destroy_board_resources(struct pci_func *func);
446extern int cpqhp_return_board_resources (struct pci_func *func,
447 struct resource_lists *resources);
448extern void cpqhp_destroy_resource_list(struct resource_lists *resources);
449extern int cpqhp_configure_device(struct controller *ctrl,
450 struct pci_func *func);
451extern int cpqhp_unconfigure_device(struct pci_func *func);
452
453/* Global variables */
454extern int cpqhp_debug;
455extern int cpqhp_legacy_mode;
456extern struct controller *cpqhp_ctrl_list;
457extern struct pci_func *cpqhp_slot_list[256];
458extern struct irq_routing_table *cpqhp_routing_table;
459
460/* these can be gotten rid of, but for debugging they are purty */
461extern u8 cpqhp_nic_irq;
462extern u8 cpqhp_disk_irq;
463
464
465/* inline functions */
466
467static inline const char *slot_name(struct slot *slot)
468{
469 return hotplug_slot_name(slot->hotplug_slot);
470}
471
472/*
473 * return_resource
474 *
475 * Puts node back in the resource list pointed to by head
476 */
477static inline void return_resource(struct pci_resource **head,
478 struct pci_resource *node)
479{
480 if (!node || !head)
481 return;
482 node->next = *head;
483 *head = node;
484}
485
486static inline void set_SOGO(struct controller *ctrl)
487{
488 u16 misc;
489
490 misc = readw(ctrl->hpc_reg + MISC);
491 misc = (misc | 0x0001) & 0xFFFB;
492 writew(misc, ctrl->hpc_reg + MISC);
493}
494
495
496static inline void amber_LED_on(struct controller *ctrl, u8 slot)
497{
498 u32 led_control;
499
500 led_control = readl(ctrl->hpc_reg + LED_CONTROL);
501 led_control |= (0x01010000L << slot);
502 writel(led_control, ctrl->hpc_reg + LED_CONTROL);
503}
504
505
506static inline void amber_LED_off(struct controller *ctrl, u8 slot)
507{
508 u32 led_control;
509
510 led_control = readl(ctrl->hpc_reg + LED_CONTROL);
511 led_control &= ~(0x01010000L << slot);
512 writel(led_control, ctrl->hpc_reg + LED_CONTROL);
513}
514
515
516static inline int read_amber_LED(struct controller *ctrl, u8 slot)
517{
518 u32 led_control;
519
520 led_control = readl(ctrl->hpc_reg + LED_CONTROL);
521 led_control &= (0x01010000L << slot);
522
523 return led_control ? 1 : 0;
524}
525
526
527static inline void green_LED_on(struct controller *ctrl, u8 slot)
528{
529 u32 led_control;
530
531 led_control = readl(ctrl->hpc_reg + LED_CONTROL);
532 led_control |= 0x0101L << slot;
533 writel(led_control, ctrl->hpc_reg + LED_CONTROL);
534}
535
536static inline void green_LED_off(struct controller *ctrl, u8 slot)
537{
538 u32 led_control;
539
540 led_control = readl(ctrl->hpc_reg + LED_CONTROL);
541 led_control &= ~(0x0101L << slot);
542 writel(led_control, ctrl->hpc_reg + LED_CONTROL);
543}
544
545
546static inline void green_LED_blink(struct controller *ctrl, u8 slot)
547{
548 u32 led_control;
549
550 led_control = readl(ctrl->hpc_reg + LED_CONTROL);
551 led_control &= ~(0x0101L << slot);
552 led_control |= (0x0001L << slot);
553 writel(led_control, ctrl->hpc_reg + LED_CONTROL);
554}
555
556
557static inline void slot_disable(struct controller *ctrl, u8 slot)
558{
559 u8 slot_enable;
560
561 slot_enable = readb(ctrl->hpc_reg + SLOT_ENABLE);
562 slot_enable &= ~(0x01 << slot);
563 writeb(slot_enable, ctrl->hpc_reg + SLOT_ENABLE);
564}
565
566
567static inline void slot_enable(struct controller *ctrl, u8 slot)
568{
569 u8 slot_enable;
570
571 slot_enable = readb(ctrl->hpc_reg + SLOT_ENABLE);
572 slot_enable |= (0x01 << slot);
573 writeb(slot_enable, ctrl->hpc_reg + SLOT_ENABLE);
574}
575
576
577static inline u8 is_slot_enabled(struct controller *ctrl, u8 slot)
578{
579 u8 slot_enable;
580
581 slot_enable = readb(ctrl->hpc_reg + SLOT_ENABLE);
582 slot_enable &= (0x01 << slot);
583 return slot_enable ? 1 : 0;
584}
585
586
587static inline u8 read_slot_enable(struct controller *ctrl)
588{
589 return readb(ctrl->hpc_reg + SLOT_ENABLE);
590}
591
592
593/**
594 * get_controller_speed - find the current frequency/mode of controller.
595 *
596 * @ctrl: controller to get frequency/mode for.
597 *
598 * Returns controller speed.
599 */
600static inline u8 get_controller_speed(struct controller *ctrl)
601{
602 u8 curr_freq;
603 u16 misc;
604
605 if (ctrl->pcix_support) {
606 curr_freq = readb(ctrl->hpc_reg + NEXT_CURR_FREQ);
607 if ((curr_freq & 0xB0) == 0xB0)
608 return PCI_SPEED_133MHz_PCIX;
609 if ((curr_freq & 0xA0) == 0xA0)
610 return PCI_SPEED_100MHz_PCIX;
611 if ((curr_freq & 0x90) == 0x90)
612 return PCI_SPEED_66MHz_PCIX;
613 if (curr_freq & 0x10)
614 return PCI_SPEED_66MHz;
615
616 return PCI_SPEED_33MHz;
617 }
618
619 misc = readw(ctrl->hpc_reg + MISC);
620 return (misc & 0x0800) ? PCI_SPEED_66MHz : PCI_SPEED_33MHz;
621}
622
623
624/**
625 * get_adapter_speed - find the max supported frequency/mode of adapter.
626 *
627 * @ctrl: hotplug controller.
628 * @hp_slot: hotplug slot where adapter is installed.
629 *
630 * Returns adapter speed.
631 */
632static inline u8 get_adapter_speed(struct controller *ctrl, u8 hp_slot)
633{
634 u32 temp_dword = readl(ctrl->hpc_reg + NON_INT_INPUT);
635 dbg("slot: %d, PCIXCAP: %8x\n", hp_slot, temp_dword);
636 if (ctrl->pcix_support) {
637 if (temp_dword & (0x10000 << hp_slot))
638 return PCI_SPEED_133MHz_PCIX;
639 if (temp_dword & (0x100 << hp_slot))
640 return PCI_SPEED_66MHz_PCIX;
641 }
642
643 if (temp_dword & (0x01 << hp_slot))
644 return PCI_SPEED_66MHz;
645
646 return PCI_SPEED_33MHz;
647}
648
649static inline void enable_slot_power(struct controller *ctrl, u8 slot)
650{
651 u8 slot_power;
652
653 slot_power = readb(ctrl->hpc_reg + SLOT_POWER);
654 slot_power |= (0x01 << slot);
655 writeb(slot_power, ctrl->hpc_reg + SLOT_POWER);
656}
657
658static inline void disable_slot_power(struct controller *ctrl, u8 slot)
659{
660 u8 slot_power;
661
662 slot_power = readb(ctrl->hpc_reg + SLOT_POWER);
663 slot_power &= ~(0x01 << slot);
664 writeb(slot_power, ctrl->hpc_reg + SLOT_POWER);
665}
666
667
668static inline int cpq_get_attention_status(struct controller *ctrl, struct slot *slot)
669{
670 u8 hp_slot;
671
672 hp_slot = slot->device - ctrl->slot_device_offset;
673
674 return read_amber_LED(ctrl, hp_slot);
675}
676
677
678static inline int get_slot_enabled(struct controller *ctrl, struct slot *slot)
679{
680 u8 hp_slot;
681
682 hp_slot = slot->device - ctrl->slot_device_offset;
683
684 return is_slot_enabled(ctrl, hp_slot);
685}
686
687
688static inline int cpq_get_latch_status(struct controller *ctrl,
689 struct slot *slot)
690{
691 u32 status;
692 u8 hp_slot;
693
694 hp_slot = slot->device - ctrl->slot_device_offset;
695 dbg("%s: slot->device = %d, ctrl->slot_device_offset = %d \n",
696 __func__, slot->device, ctrl->slot_device_offset);
697
698 status = (readl(ctrl->hpc_reg + INT_INPUT_CLEAR) & (0x01L << hp_slot));
699
700 return(status == 0) ? 1 : 0;
701}
702
703
704static inline int get_presence_status(struct controller *ctrl,
705 struct slot *slot)
706{
707 int presence_save = 0;
708 u8 hp_slot;
709 u32 tempdword;
710
711 hp_slot = slot->device - ctrl->slot_device_offset;
712
713 tempdword = readl(ctrl->hpc_reg + INT_INPUT_CLEAR);
714 presence_save = (int) ((((~tempdword) >> 23) | ((~tempdword) >> 15))
715 >> hp_slot) & 0x02;
716
717 return presence_save;
718}
719
720static inline int wait_for_ctrl_irq(struct controller *ctrl)
721{
722 DECLARE_WAITQUEUE(wait, current);
723 int retval = 0;
724
725 dbg("%s - start\n", __func__);
726 add_wait_queue(&ctrl->queue, &wait);
727 /* Sleep for up to 1 second to wait for the LED to change. */
728 msleep_interruptible(1000);
729 remove_wait_queue(&ctrl->queue, &wait);
730 if (signal_pending(current))
731 retval = -EINTR;
732
733 dbg("%s - end\n", __func__);
734 return retval;
735}
736
737#include <asm/pci_x86.h>
738static inline int cpqhp_routing_table_length(void)
739{
740 BUG_ON(cpqhp_routing_table == NULL);
741 return ((cpqhp_routing_table->size - sizeof(struct irq_routing_table)) /
742 sizeof(struct irq_info));
743}
744
745#endif