tjh.dev
Linux kernel mirror (for testing)
git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel
os
linux
1/*
2 Copyright (C) 2004 - 2009 rt2x00 SourceForge Project
3 <http://rt2x00.serialmonkey.com>
4
5 This program is free software; you can redistribute it and/or modify
6 it under the terms of the GNU General Public License as published by
7 the Free Software Foundation; either version 2 of the License, or
8 (at your option) any later version.
9
10 This program is distributed in the hope that it will be useful,
11 but WITHOUT ANY WARRANTY; without even the implied warranty of
12 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 GNU General Public License for more details.
14
15 You should have received a copy of the GNU General Public License
16 along with this program; if not, write to the
17 Free Software Foundation, Inc.,
18 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
19 */
20
21/*
22 Module: rt2500usb
23 Abstract: rt2500usb device specific routines.
24 Supported chipsets: RT2570.
25 */
26
27#include <linux/delay.h>
28#include <linux/etherdevice.h>
29#include <linux/init.h>
30#include <linux/kernel.h>
31#include <linux/module.h>
32#include <linux/usb.h>
33
34#include "rt2x00.h"
35#include "rt2x00usb.h"
36#include "rt2500usb.h"
37
38/*
39 * Allow hardware encryption to be disabled.
40 */
41static int modparam_nohwcrypt = 0;
42module_param_named(nohwcrypt, modparam_nohwcrypt, bool, S_IRUGO);
43MODULE_PARM_DESC(nohwcrypt, "Disable hardware encryption.");
44
45/*
46 * Register access.
47 * All access to the CSR registers will go through the methods
48 * rt2500usb_register_read and rt2500usb_register_write.
49 * BBP and RF register require indirect register access,
50 * and use the CSR registers BBPCSR and RFCSR to achieve this.
51 * These indirect registers work with busy bits,
52 * and we will try maximal REGISTER_BUSY_COUNT times to access
53 * the register while taking a REGISTER_BUSY_DELAY us delay
54 * between each attampt. When the busy bit is still set at that time,
55 * the access attempt is considered to have failed,
56 * and we will print an error.
57 * If the csr_mutex is already held then the _lock variants must
58 * be used instead.
59 */
60static inline void rt2500usb_register_read(struct rt2x00_dev *rt2x00dev,
61 const unsigned int offset,
62 u16 *value)
63{
64 __le16 reg;
65 rt2x00usb_vendor_request_buff(rt2x00dev, USB_MULTI_READ,
66 USB_VENDOR_REQUEST_IN, offset,
67 ®, sizeof(reg), REGISTER_TIMEOUT);
68 *value = le16_to_cpu(reg);
69}
70
71static inline void rt2500usb_register_read_lock(struct rt2x00_dev *rt2x00dev,
72 const unsigned int offset,
73 u16 *value)
74{
75 __le16 reg;
76 rt2x00usb_vendor_req_buff_lock(rt2x00dev, USB_MULTI_READ,
77 USB_VENDOR_REQUEST_IN, offset,
78 ®, sizeof(reg), REGISTER_TIMEOUT);
79 *value = le16_to_cpu(reg);
80}
81
82static inline void rt2500usb_register_multiread(struct rt2x00_dev *rt2x00dev,
83 const unsigned int offset,
84 void *value, const u16 length)
85{
86 rt2x00usb_vendor_request_buff(rt2x00dev, USB_MULTI_READ,
87 USB_VENDOR_REQUEST_IN, offset,
88 value, length,
89 REGISTER_TIMEOUT16(length));
90}
91
92static inline void rt2500usb_register_write(struct rt2x00_dev *rt2x00dev,
93 const unsigned int offset,
94 u16 value)
95{
96 __le16 reg = cpu_to_le16(value);
97 rt2x00usb_vendor_request_buff(rt2x00dev, USB_MULTI_WRITE,
98 USB_VENDOR_REQUEST_OUT, offset,
99 ®, sizeof(reg), REGISTER_TIMEOUT);
100}
101
102static inline void rt2500usb_register_write_lock(struct rt2x00_dev *rt2x00dev,
103 const unsigned int offset,
104 u16 value)
105{
106 __le16 reg = cpu_to_le16(value);
107 rt2x00usb_vendor_req_buff_lock(rt2x00dev, USB_MULTI_WRITE,
108 USB_VENDOR_REQUEST_OUT, offset,
109 ®, sizeof(reg), REGISTER_TIMEOUT);
110}
111
112static inline void rt2500usb_register_multiwrite(struct rt2x00_dev *rt2x00dev,
113 const unsigned int offset,
114 void *value, const u16 length)
115{
116 rt2x00usb_vendor_request_buff(rt2x00dev, USB_MULTI_WRITE,
117 USB_VENDOR_REQUEST_OUT, offset,
118 value, length,
119 REGISTER_TIMEOUT16(length));
120}
121
122static int rt2500usb_regbusy_read(struct rt2x00_dev *rt2x00dev,
123 const unsigned int offset,
124 struct rt2x00_field16 field,
125 u16 *reg)
126{
127 unsigned int i;
128
129 for (i = 0; i < REGISTER_BUSY_COUNT; i++) {
130 rt2500usb_register_read_lock(rt2x00dev, offset, reg);
131 if (!rt2x00_get_field16(*reg, field))
132 return 1;
133 udelay(REGISTER_BUSY_DELAY);
134 }
135
136 ERROR(rt2x00dev, "Indirect register access failed: "
137 "offset=0x%.08x, value=0x%.08x\n", offset, *reg);
138 *reg = ~0;
139
140 return 0;
141}
142
143#define WAIT_FOR_BBP(__dev, __reg) \
144 rt2500usb_regbusy_read((__dev), PHY_CSR8, PHY_CSR8_BUSY, (__reg))
145#define WAIT_FOR_RF(__dev, __reg) \
146 rt2500usb_regbusy_read((__dev), PHY_CSR10, PHY_CSR10_RF_BUSY, (__reg))
147
148static void rt2500usb_bbp_write(struct rt2x00_dev *rt2x00dev,
149 const unsigned int word, const u8 value)
150{
151 u16 reg;
152
153 mutex_lock(&rt2x00dev->csr_mutex);
154
155 /*
156 * Wait until the BBP becomes available, afterwards we
157 * can safely write the new data into the register.
158 */
159 if (WAIT_FOR_BBP(rt2x00dev, ®)) {
160 reg = 0;
161 rt2x00_set_field16(®, PHY_CSR7_DATA, value);
162 rt2x00_set_field16(®, PHY_CSR7_REG_ID, word);
163 rt2x00_set_field16(®, PHY_CSR7_READ_CONTROL, 0);
164
165 rt2500usb_register_write_lock(rt2x00dev, PHY_CSR7, reg);
166 }
167
168 mutex_unlock(&rt2x00dev->csr_mutex);
169}
170
171static void rt2500usb_bbp_read(struct rt2x00_dev *rt2x00dev,
172 const unsigned int word, u8 *value)
173{
174 u16 reg;
175
176 mutex_lock(&rt2x00dev->csr_mutex);
177
178 /*
179 * Wait until the BBP becomes available, afterwards we
180 * can safely write the read request into the register.
181 * After the data has been written, we wait until hardware
182 * returns the correct value, if at any time the register
183 * doesn't become available in time, reg will be 0xffffffff
184 * which means we return 0xff to the caller.
185 */
186 if (WAIT_FOR_BBP(rt2x00dev, ®)) {
187 reg = 0;
188 rt2x00_set_field16(®, PHY_CSR7_REG_ID, word);
189 rt2x00_set_field16(®, PHY_CSR7_READ_CONTROL, 1);
190
191 rt2500usb_register_write_lock(rt2x00dev, PHY_CSR7, reg);
192
193 if (WAIT_FOR_BBP(rt2x00dev, ®))
194 rt2500usb_register_read_lock(rt2x00dev, PHY_CSR7, ®);
195 }
196
197 *value = rt2x00_get_field16(reg, PHY_CSR7_DATA);
198
199 mutex_unlock(&rt2x00dev->csr_mutex);
200}
201
202static void rt2500usb_rf_write(struct rt2x00_dev *rt2x00dev,
203 const unsigned int word, const u32 value)
204{
205 u16 reg;
206
207 mutex_lock(&rt2x00dev->csr_mutex);
208
209 /*
210 * Wait until the RF becomes available, afterwards we
211 * can safely write the new data into the register.
212 */
213 if (WAIT_FOR_RF(rt2x00dev, ®)) {
214 reg = 0;
215 rt2x00_set_field16(®, PHY_CSR9_RF_VALUE, value);
216 rt2500usb_register_write_lock(rt2x00dev, PHY_CSR9, reg);
217
218 reg = 0;
219 rt2x00_set_field16(®, PHY_CSR10_RF_VALUE, value >> 16);
220 rt2x00_set_field16(®, PHY_CSR10_RF_NUMBER_OF_BITS, 20);
221 rt2x00_set_field16(®, PHY_CSR10_RF_IF_SELECT, 0);
222 rt2x00_set_field16(®, PHY_CSR10_RF_BUSY, 1);
223
224 rt2500usb_register_write_lock(rt2x00dev, PHY_CSR10, reg);
225 rt2x00_rf_write(rt2x00dev, word, value);
226 }
227
228 mutex_unlock(&rt2x00dev->csr_mutex);
229}
230
231#ifdef CONFIG_RT2X00_LIB_DEBUGFS
232static void _rt2500usb_register_read(struct rt2x00_dev *rt2x00dev,
233 const unsigned int offset,
234 u32 *value)
235{
236 rt2500usb_register_read(rt2x00dev, offset, (u16 *)value);
237}
238
239static void _rt2500usb_register_write(struct rt2x00_dev *rt2x00dev,
240 const unsigned int offset,
241 u32 value)
242{
243 rt2500usb_register_write(rt2x00dev, offset, value);
244}
245
246static const struct rt2x00debug rt2500usb_rt2x00debug = {
247 .owner = THIS_MODULE,
248 .csr = {
249 .read = _rt2500usb_register_read,
250 .write = _rt2500usb_register_write,
251 .flags = RT2X00DEBUGFS_OFFSET,
252 .word_base = CSR_REG_BASE,
253 .word_size = sizeof(u16),
254 .word_count = CSR_REG_SIZE / sizeof(u16),
255 },
256 .eeprom = {
257 .read = rt2x00_eeprom_read,
258 .write = rt2x00_eeprom_write,
259 .word_base = EEPROM_BASE,
260 .word_size = sizeof(u16),
261 .word_count = EEPROM_SIZE / sizeof(u16),
262 },
263 .bbp = {
264 .read = rt2500usb_bbp_read,
265 .write = rt2500usb_bbp_write,
266 .word_base = BBP_BASE,
267 .word_size = sizeof(u8),
268 .word_count = BBP_SIZE / sizeof(u8),
269 },
270 .rf = {
271 .read = rt2x00_rf_read,
272 .write = rt2500usb_rf_write,
273 .word_base = RF_BASE,
274 .word_size = sizeof(u32),
275 .word_count = RF_SIZE / sizeof(u32),
276 },
277};
278#endif /* CONFIG_RT2X00_LIB_DEBUGFS */
279
280#ifdef CONFIG_RT2X00_LIB_RFKILL
281static int rt2500usb_rfkill_poll(struct rt2x00_dev *rt2x00dev)
282{
283 u16 reg;
284
285 rt2500usb_register_read(rt2x00dev, MAC_CSR19, ®);
286 return rt2x00_get_field32(reg, MAC_CSR19_BIT7);
287}
288#else
289#define rt2500usb_rfkill_poll NULL
290#endif /* CONFIG_RT2X00_LIB_RFKILL */
291
292#ifdef CONFIG_RT2X00_LIB_LEDS
293static void rt2500usb_brightness_set(struct led_classdev *led_cdev,
294 enum led_brightness brightness)
295{
296 struct rt2x00_led *led =
297 container_of(led_cdev, struct rt2x00_led, led_dev);
298 unsigned int enabled = brightness != LED_OFF;
299 u16 reg;
300
301 rt2500usb_register_read(led->rt2x00dev, MAC_CSR20, ®);
302
303 if (led->type == LED_TYPE_RADIO || led->type == LED_TYPE_ASSOC)
304 rt2x00_set_field16(®, MAC_CSR20_LINK, enabled);
305 else if (led->type == LED_TYPE_ACTIVITY)
306 rt2x00_set_field16(®, MAC_CSR20_ACTIVITY, enabled);
307
308 rt2500usb_register_write(led->rt2x00dev, MAC_CSR20, reg);
309}
310
311static int rt2500usb_blink_set(struct led_classdev *led_cdev,
312 unsigned long *delay_on,
313 unsigned long *delay_off)
314{
315 struct rt2x00_led *led =
316 container_of(led_cdev, struct rt2x00_led, led_dev);
317 u16 reg;
318
319 rt2500usb_register_read(led->rt2x00dev, MAC_CSR21, ®);
320 rt2x00_set_field16(®, MAC_CSR21_ON_PERIOD, *delay_on);
321 rt2x00_set_field16(®, MAC_CSR21_OFF_PERIOD, *delay_off);
322 rt2500usb_register_write(led->rt2x00dev, MAC_CSR21, reg);
323
324 return 0;
325}
326
327static void rt2500usb_init_led(struct rt2x00_dev *rt2x00dev,
328 struct rt2x00_led *led,
329 enum led_type type)
330{
331 led->rt2x00dev = rt2x00dev;
332 led->type = type;
333 led->led_dev.brightness_set = rt2500usb_brightness_set;
334 led->led_dev.blink_set = rt2500usb_blink_set;
335 led->flags = LED_INITIALIZED;
336}
337#endif /* CONFIG_RT2X00_LIB_LEDS */
338
339/*
340 * Configuration handlers.
341 */
342
343/*
344 * rt2500usb does not differentiate between shared and pairwise
345 * keys, so we should use the same function for both key types.
346 */
347static int rt2500usb_config_key(struct rt2x00_dev *rt2x00dev,
348 struct rt2x00lib_crypto *crypto,
349 struct ieee80211_key_conf *key)
350{
351 int timeout;
352 u32 mask;
353 u16 reg;
354
355 if (crypto->cmd == SET_KEY) {
356 /*
357 * Pairwise key will always be entry 0, but this
358 * could collide with a shared key on the same
359 * position...
360 */
361 mask = TXRX_CSR0_KEY_ID.bit_mask;
362
363 rt2500usb_register_read(rt2x00dev, TXRX_CSR0, ®);
364 reg &= mask;
365
366 if (reg && reg == mask)
367 return -ENOSPC;
368
369 reg = rt2x00_get_field16(reg, TXRX_CSR0_KEY_ID);
370
371 key->hw_key_idx += reg ? ffz(reg) : 0;
372
373 /*
374 * The encryption key doesn't fit within the CSR cache,
375 * this means we should allocate it seperately and use
376 * rt2x00usb_vendor_request() to send the key to the hardware.
377 */
378 reg = KEY_ENTRY(key->hw_key_idx);
379 timeout = REGISTER_TIMEOUT32(sizeof(crypto->key));
380 rt2x00usb_vendor_request_large_buff(rt2x00dev, USB_MULTI_WRITE,
381 USB_VENDOR_REQUEST_OUT, reg,
382 crypto->key,
383 sizeof(crypto->key),
384 timeout);
385
386 /*
387 * The driver does not support the IV/EIV generation
388 * in hardware. However it demands the data to be provided
389 * both seperately as well as inside the frame.
390 * We already provided the CONFIG_CRYPTO_COPY_IV to rt2x00lib
391 * to ensure rt2x00lib will not strip the data from the
392 * frame after the copy, now we must tell mac80211
393 * to generate the IV/EIV data.
394 */
395 key->flags |= IEEE80211_KEY_FLAG_GENERATE_IV;
396 key->flags |= IEEE80211_KEY_FLAG_GENERATE_MMIC;
397 }
398
399 /*
400 * TXRX_CSR0_KEY_ID contains only single-bit fields to indicate
401 * a particular key is valid.
402 */
403 rt2500usb_register_read(rt2x00dev, TXRX_CSR0, ®);
404 rt2x00_set_field16(®, TXRX_CSR0_ALGORITHM, crypto->cipher);
405 rt2x00_set_field16(®, TXRX_CSR0_IV_OFFSET, IEEE80211_HEADER);
406
407 mask = rt2x00_get_field16(reg, TXRX_CSR0_KEY_ID);
408 if (crypto->cmd == SET_KEY)
409 mask |= 1 << key->hw_key_idx;
410 else if (crypto->cmd == DISABLE_KEY)
411 mask &= ~(1 << key->hw_key_idx);
412 rt2x00_set_field16(®, TXRX_CSR0_KEY_ID, mask);
413 rt2500usb_register_write(rt2x00dev, TXRX_CSR0, reg);
414
415 return 0;
416}
417
418static void rt2500usb_config_filter(struct rt2x00_dev *rt2x00dev,
419 const unsigned int filter_flags)
420{
421 u16 reg;
422
423 /*
424 * Start configuration steps.
425 * Note that the version error will always be dropped
426 * and broadcast frames will always be accepted since
427 * there is no filter for it at this time.
428 */
429 rt2500usb_register_read(rt2x00dev, TXRX_CSR2, ®);
430 rt2x00_set_field16(®, TXRX_CSR2_DROP_CRC,
431 !(filter_flags & FIF_FCSFAIL));
432 rt2x00_set_field16(®, TXRX_CSR2_DROP_PHYSICAL,
433 !(filter_flags & FIF_PLCPFAIL));
434 rt2x00_set_field16(®, TXRX_CSR2_DROP_CONTROL,
435 !(filter_flags & FIF_CONTROL));
436 rt2x00_set_field16(®, TXRX_CSR2_DROP_NOT_TO_ME,
437 !(filter_flags & FIF_PROMISC_IN_BSS));
438 rt2x00_set_field16(®, TXRX_CSR2_DROP_TODS,
439 !(filter_flags & FIF_PROMISC_IN_BSS) &&
440 !rt2x00dev->intf_ap_count);
441 rt2x00_set_field16(®, TXRX_CSR2_DROP_VERSION_ERROR, 1);
442 rt2x00_set_field16(®, TXRX_CSR2_DROP_MULTICAST,
443 !(filter_flags & FIF_ALLMULTI));
444 rt2x00_set_field16(®, TXRX_CSR2_DROP_BROADCAST, 0);
445 rt2500usb_register_write(rt2x00dev, TXRX_CSR2, reg);
446}
447
448static void rt2500usb_config_intf(struct rt2x00_dev *rt2x00dev,
449 struct rt2x00_intf *intf,
450 struct rt2x00intf_conf *conf,
451 const unsigned int flags)
452{
453 unsigned int bcn_preload;
454 u16 reg;
455
456 if (flags & CONFIG_UPDATE_TYPE) {
457 /*
458 * Enable beacon config
459 */
460 bcn_preload = PREAMBLE + GET_DURATION(IEEE80211_HEADER, 20);
461 rt2500usb_register_read(rt2x00dev, TXRX_CSR20, ®);
462 rt2x00_set_field16(®, TXRX_CSR20_OFFSET, bcn_preload >> 6);
463 rt2x00_set_field16(®, TXRX_CSR20_BCN_EXPECT_WINDOW,
464 2 * (conf->type != NL80211_IFTYPE_STATION));
465 rt2500usb_register_write(rt2x00dev, TXRX_CSR20, reg);
466
467 /*
468 * Enable synchronisation.
469 */
470 rt2500usb_register_read(rt2x00dev, TXRX_CSR18, ®);
471 rt2x00_set_field16(®, TXRX_CSR18_OFFSET, 0);
472 rt2500usb_register_write(rt2x00dev, TXRX_CSR18, reg);
473
474 rt2500usb_register_read(rt2x00dev, TXRX_CSR19, ®);
475 rt2x00_set_field16(®, TXRX_CSR19_TSF_COUNT, 1);
476 rt2x00_set_field16(®, TXRX_CSR19_TSF_SYNC, conf->sync);
477 rt2x00_set_field16(®, TXRX_CSR19_TBCN, 1);
478 rt2500usb_register_write(rt2x00dev, TXRX_CSR19, reg);
479 }
480
481 if (flags & CONFIG_UPDATE_MAC)
482 rt2500usb_register_multiwrite(rt2x00dev, MAC_CSR2, conf->mac,
483 (3 * sizeof(__le16)));
484
485 if (flags & CONFIG_UPDATE_BSSID)
486 rt2500usb_register_multiwrite(rt2x00dev, MAC_CSR5, conf->bssid,
487 (3 * sizeof(__le16)));
488}
489
490static void rt2500usb_config_erp(struct rt2x00_dev *rt2x00dev,
491 struct rt2x00lib_erp *erp)
492{
493 u16 reg;
494
495 rt2500usb_register_read(rt2x00dev, TXRX_CSR1, ®);
496 rt2x00_set_field16(®, TXRX_CSR1_ACK_TIMEOUT, erp->ack_timeout);
497 rt2500usb_register_write(rt2x00dev, TXRX_CSR1, reg);
498
499 rt2500usb_register_read(rt2x00dev, TXRX_CSR10, ®);
500 rt2x00_set_field16(®, TXRX_CSR10_AUTORESPOND_PREAMBLE,
501 !!erp->short_preamble);
502 rt2500usb_register_write(rt2x00dev, TXRX_CSR10, reg);
503
504 rt2500usb_register_write(rt2x00dev, TXRX_CSR11, erp->basic_rates);
505
506 rt2500usb_register_write(rt2x00dev, MAC_CSR10, erp->slot_time);
507 rt2500usb_register_write(rt2x00dev, MAC_CSR11, erp->sifs);
508 rt2500usb_register_write(rt2x00dev, MAC_CSR12, erp->eifs);
509}
510
511static void rt2500usb_config_ant(struct rt2x00_dev *rt2x00dev,
512 struct antenna_setup *ant)
513{
514 u8 r2;
515 u8 r14;
516 u16 csr5;
517 u16 csr6;
518
519 /*
520 * We should never come here because rt2x00lib is supposed
521 * to catch this and send us the correct antenna explicitely.
522 */
523 BUG_ON(ant->rx == ANTENNA_SW_DIVERSITY ||
524 ant->tx == ANTENNA_SW_DIVERSITY);
525
526 rt2500usb_bbp_read(rt2x00dev, 2, &r2);
527 rt2500usb_bbp_read(rt2x00dev, 14, &r14);
528 rt2500usb_register_read(rt2x00dev, PHY_CSR5, &csr5);
529 rt2500usb_register_read(rt2x00dev, PHY_CSR6, &csr6);
530
531 /*
532 * Configure the TX antenna.
533 */
534 switch (ant->tx) {
535 case ANTENNA_HW_DIVERSITY:
536 rt2x00_set_field8(&r2, BBP_R2_TX_ANTENNA, 1);
537 rt2x00_set_field16(&csr5, PHY_CSR5_CCK, 1);
538 rt2x00_set_field16(&csr6, PHY_CSR6_OFDM, 1);
539 break;
540 case ANTENNA_A:
541 rt2x00_set_field8(&r2, BBP_R2_TX_ANTENNA, 0);
542 rt2x00_set_field16(&csr5, PHY_CSR5_CCK, 0);
543 rt2x00_set_field16(&csr6, PHY_CSR6_OFDM, 0);
544 break;
545 case ANTENNA_B:
546 default:
547 rt2x00_set_field8(&r2, BBP_R2_TX_ANTENNA, 2);
548 rt2x00_set_field16(&csr5, PHY_CSR5_CCK, 2);
549 rt2x00_set_field16(&csr6, PHY_CSR6_OFDM, 2);
550 break;
551 }
552
553 /*
554 * Configure the RX antenna.
555 */
556 switch (ant->rx) {
557 case ANTENNA_HW_DIVERSITY:
558 rt2x00_set_field8(&r14, BBP_R14_RX_ANTENNA, 1);
559 break;
560 case ANTENNA_A:
561 rt2x00_set_field8(&r14, BBP_R14_RX_ANTENNA, 0);
562 break;
563 case ANTENNA_B:
564 default:
565 rt2x00_set_field8(&r14, BBP_R14_RX_ANTENNA, 2);
566 break;
567 }
568
569 /*
570 * RT2525E and RT5222 need to flip TX I/Q
571 */
572 if (rt2x00_rf(&rt2x00dev->chip, RF2525E) ||
573 rt2x00_rf(&rt2x00dev->chip, RF5222)) {
574 rt2x00_set_field8(&r2, BBP_R2_TX_IQ_FLIP, 1);
575 rt2x00_set_field16(&csr5, PHY_CSR5_CCK_FLIP, 1);
576 rt2x00_set_field16(&csr6, PHY_CSR6_OFDM_FLIP, 1);
577
578 /*
579 * RT2525E does not need RX I/Q Flip.
580 */
581 if (rt2x00_rf(&rt2x00dev->chip, RF2525E))
582 rt2x00_set_field8(&r14, BBP_R14_RX_IQ_FLIP, 0);
583 } else {
584 rt2x00_set_field16(&csr5, PHY_CSR5_CCK_FLIP, 0);
585 rt2x00_set_field16(&csr6, PHY_CSR6_OFDM_FLIP, 0);
586 }
587
588 rt2500usb_bbp_write(rt2x00dev, 2, r2);
589 rt2500usb_bbp_write(rt2x00dev, 14, r14);
590 rt2500usb_register_write(rt2x00dev, PHY_CSR5, csr5);
591 rt2500usb_register_write(rt2x00dev, PHY_CSR6, csr6);
592}
593
594static void rt2500usb_config_channel(struct rt2x00_dev *rt2x00dev,
595 struct rf_channel *rf, const int txpower)
596{
597 /*
598 * Set TXpower.
599 */
600 rt2x00_set_field32(&rf->rf3, RF3_TXPOWER, TXPOWER_TO_DEV(txpower));
601
602 /*
603 * For RT2525E we should first set the channel to half band higher.
604 */
605 if (rt2x00_rf(&rt2x00dev->chip, RF2525E)) {
606 static const u32 vals[] = {
607 0x000008aa, 0x000008ae, 0x000008ae, 0x000008b2,
608 0x000008b2, 0x000008b6, 0x000008b6, 0x000008ba,
609 0x000008ba, 0x000008be, 0x000008b7, 0x00000902,
610 0x00000902, 0x00000906
611 };
612
613 rt2500usb_rf_write(rt2x00dev, 2, vals[rf->channel - 1]);
614 if (rf->rf4)
615 rt2500usb_rf_write(rt2x00dev, 4, rf->rf4);
616 }
617
618 rt2500usb_rf_write(rt2x00dev, 1, rf->rf1);
619 rt2500usb_rf_write(rt2x00dev, 2, rf->rf2);
620 rt2500usb_rf_write(rt2x00dev, 3, rf->rf3);
621 if (rf->rf4)
622 rt2500usb_rf_write(rt2x00dev, 4, rf->rf4);
623}
624
625static void rt2500usb_config_txpower(struct rt2x00_dev *rt2x00dev,
626 const int txpower)
627{
628 u32 rf3;
629
630 rt2x00_rf_read(rt2x00dev, 3, &rf3);
631 rt2x00_set_field32(&rf3, RF3_TXPOWER, TXPOWER_TO_DEV(txpower));
632 rt2500usb_rf_write(rt2x00dev, 3, rf3);
633}
634
635static void rt2500usb_config_duration(struct rt2x00_dev *rt2x00dev,
636 struct rt2x00lib_conf *libconf)
637{
638 u16 reg;
639
640 rt2500usb_register_read(rt2x00dev, TXRX_CSR18, ®);
641 rt2x00_set_field16(®, TXRX_CSR18_INTERVAL,
642 libconf->conf->beacon_int * 4);
643 rt2500usb_register_write(rt2x00dev, TXRX_CSR18, reg);
644}
645
646static void rt2500usb_config_ps(struct rt2x00_dev *rt2x00dev,
647 struct rt2x00lib_conf *libconf)
648{
649 enum dev_state state =
650 (libconf->conf->flags & IEEE80211_CONF_PS) ?
651 STATE_SLEEP : STATE_AWAKE;
652 u16 reg;
653
654 if (state == STATE_SLEEP) {
655 rt2500usb_register_read(rt2x00dev, MAC_CSR18, ®);
656 rt2x00_set_field16(®, MAC_CSR18_DELAY_AFTER_BEACON,
657 libconf->conf->beacon_int - 20);
658 rt2x00_set_field16(®, MAC_CSR18_BEACONS_BEFORE_WAKEUP,
659 libconf->conf->listen_interval - 1);
660
661 /* We must first disable autowake before it can be enabled */
662 rt2x00_set_field16(®, MAC_CSR18_AUTO_WAKE, 0);
663 rt2500usb_register_write(rt2x00dev, MAC_CSR18, reg);
664
665 rt2x00_set_field16(®, MAC_CSR18_AUTO_WAKE, 1);
666 rt2500usb_register_write(rt2x00dev, MAC_CSR18, reg);
667 }
668
669 rt2x00dev->ops->lib->set_device_state(rt2x00dev, state);
670}
671
672static void rt2500usb_config(struct rt2x00_dev *rt2x00dev,
673 struct rt2x00lib_conf *libconf,
674 const unsigned int flags)
675{
676 if (flags & IEEE80211_CONF_CHANGE_CHANNEL)
677 rt2500usb_config_channel(rt2x00dev, &libconf->rf,
678 libconf->conf->power_level);
679 if ((flags & IEEE80211_CONF_CHANGE_POWER) &&
680 !(flags & IEEE80211_CONF_CHANGE_CHANNEL))
681 rt2500usb_config_txpower(rt2x00dev,
682 libconf->conf->power_level);
683 if (flags & IEEE80211_CONF_CHANGE_BEACON_INTERVAL)
684 rt2500usb_config_duration(rt2x00dev, libconf);
685 if (flags & IEEE80211_CONF_CHANGE_PS)
686 rt2500usb_config_ps(rt2x00dev, libconf);
687}
688
689/*
690 * Link tuning
691 */
692static void rt2500usb_link_stats(struct rt2x00_dev *rt2x00dev,
693 struct link_qual *qual)
694{
695 u16 reg;
696
697 /*
698 * Update FCS error count from register.
699 */
700 rt2500usb_register_read(rt2x00dev, STA_CSR0, ®);
701 qual->rx_failed = rt2x00_get_field16(reg, STA_CSR0_FCS_ERROR);
702
703 /*
704 * Update False CCA count from register.
705 */
706 rt2500usb_register_read(rt2x00dev, STA_CSR3, ®);
707 qual->false_cca = rt2x00_get_field16(reg, STA_CSR3_FALSE_CCA_ERROR);
708}
709
710static void rt2500usb_reset_tuner(struct rt2x00_dev *rt2x00dev,
711 struct link_qual *qual)
712{
713 u16 eeprom;
714 u16 value;
715
716 rt2x00_eeprom_read(rt2x00dev, EEPROM_BBPTUNE_R24, &eeprom);
717 value = rt2x00_get_field16(eeprom, EEPROM_BBPTUNE_R24_LOW);
718 rt2500usb_bbp_write(rt2x00dev, 24, value);
719
720 rt2x00_eeprom_read(rt2x00dev, EEPROM_BBPTUNE_R25, &eeprom);
721 value = rt2x00_get_field16(eeprom, EEPROM_BBPTUNE_R25_LOW);
722 rt2500usb_bbp_write(rt2x00dev, 25, value);
723
724 rt2x00_eeprom_read(rt2x00dev, EEPROM_BBPTUNE_R61, &eeprom);
725 value = rt2x00_get_field16(eeprom, EEPROM_BBPTUNE_R61_LOW);
726 rt2500usb_bbp_write(rt2x00dev, 61, value);
727
728 rt2x00_eeprom_read(rt2x00dev, EEPROM_BBPTUNE_VGC, &eeprom);
729 value = rt2x00_get_field16(eeprom, EEPROM_BBPTUNE_VGCUPPER);
730 rt2500usb_bbp_write(rt2x00dev, 17, value);
731
732 qual->vgc_level = value;
733}
734
735/*
736 * NOTE: This function is directly ported from legacy driver, but
737 * despite it being declared it was never called. Although link tuning
738 * sounds like a good idea, and usually works well for the other drivers,
739 * it does _not_ work with rt2500usb. Enabling this function will result
740 * in TX capabilities only until association kicks in. Immediately
741 * after the successful association all TX frames will be kept in the
742 * hardware queue and never transmitted.
743 */
744#if 0
745static void rt2500usb_link_tuner(struct rt2x00_dev *rt2x00dev)
746{
747 int rssi = rt2x00_get_link_rssi(&rt2x00dev->link);
748 u16 bbp_thresh;
749 u16 vgc_bound;
750 u16 sens;
751 u16 r24;
752 u16 r25;
753 u16 r61;
754 u16 r17_sens;
755 u8 r17;
756 u8 up_bound;
757 u8 low_bound;
758
759 /*
760 * Read current r17 value, as well as the sensitivity values
761 * for the r17 register.
762 */
763 rt2500usb_bbp_read(rt2x00dev, 17, &r17);
764 rt2x00_eeprom_read(rt2x00dev, EEPROM_BBPTUNE_R17, &r17_sens);
765
766 rt2x00_eeprom_read(rt2x00dev, EEPROM_BBPTUNE_VGC, &vgc_bound);
767 up_bound = rt2x00_get_field16(vgc_bound, EEPROM_BBPTUNE_VGCUPPER);
768 low_bound = rt2x00_get_field16(vgc_bound, EEPROM_BBPTUNE_VGCLOWER);
769
770 /*
771 * If we are not associated, we should go straight to the
772 * dynamic CCA tuning.
773 */
774 if (!rt2x00dev->intf_associated)
775 goto dynamic_cca_tune;
776
777 /*
778 * Determine the BBP tuning threshold and correctly
779 * set BBP 24, 25 and 61.
780 */
781 rt2x00_eeprom_read(rt2x00dev, EEPROM_BBPTUNE, &bbp_thresh);
782 bbp_thresh = rt2x00_get_field16(bbp_thresh, EEPROM_BBPTUNE_THRESHOLD);
783
784 rt2x00_eeprom_read(rt2x00dev, EEPROM_BBPTUNE_R24, &r24);
785 rt2x00_eeprom_read(rt2x00dev, EEPROM_BBPTUNE_R25, &r25);
786 rt2x00_eeprom_read(rt2x00dev, EEPROM_BBPTUNE_R61, &r61);
787
788 if ((rssi + bbp_thresh) > 0) {
789 r24 = rt2x00_get_field16(r24, EEPROM_BBPTUNE_R24_HIGH);
790 r25 = rt2x00_get_field16(r25, EEPROM_BBPTUNE_R25_HIGH);
791 r61 = rt2x00_get_field16(r61, EEPROM_BBPTUNE_R61_HIGH);
792 } else {
793 r24 = rt2x00_get_field16(r24, EEPROM_BBPTUNE_R24_LOW);
794 r25 = rt2x00_get_field16(r25, EEPROM_BBPTUNE_R25_LOW);
795 r61 = rt2x00_get_field16(r61, EEPROM_BBPTUNE_R61_LOW);
796 }
797
798 rt2500usb_bbp_write(rt2x00dev, 24, r24);
799 rt2500usb_bbp_write(rt2x00dev, 25, r25);
800 rt2500usb_bbp_write(rt2x00dev, 61, r61);
801
802 /*
803 * A too low RSSI will cause too much false CCA which will
804 * then corrupt the R17 tuning. To remidy this the tuning should
805 * be stopped (While making sure the R17 value will not exceed limits)
806 */
807 if (rssi >= -40) {
808 if (r17 != 0x60)
809 rt2500usb_bbp_write(rt2x00dev, 17, 0x60);
810 return;
811 }
812
813 /*
814 * Special big-R17 for short distance
815 */
816 if (rssi >= -58) {
817 sens = rt2x00_get_field16(r17_sens, EEPROM_BBPTUNE_R17_LOW);
818 if (r17 != sens)
819 rt2500usb_bbp_write(rt2x00dev, 17, sens);
820 return;
821 }
822
823 /*
824 * Special mid-R17 for middle distance
825 */
826 if (rssi >= -74) {
827 sens = rt2x00_get_field16(r17_sens, EEPROM_BBPTUNE_R17_HIGH);
828 if (r17 != sens)
829 rt2500usb_bbp_write(rt2x00dev, 17, sens);
830 return;
831 }
832
833 /*
834 * Leave short or middle distance condition, restore r17
835 * to the dynamic tuning range.
836 */
837 low_bound = 0x32;
838 if (rssi < -77)
839 up_bound -= (-77 - rssi);
840
841 if (up_bound < low_bound)
842 up_bound = low_bound;
843
844 if (r17 > up_bound) {
845 rt2500usb_bbp_write(rt2x00dev, 17, up_bound);
846 rt2x00dev->link.vgc_level = up_bound;
847 return;
848 }
849
850dynamic_cca_tune:
851
852 /*
853 * R17 is inside the dynamic tuning range,
854 * start tuning the link based on the false cca counter.
855 */
856 if (rt2x00dev->link.qual.false_cca > 512 && r17 < up_bound) {
857 rt2500usb_bbp_write(rt2x00dev, 17, ++r17);
858 rt2x00dev->link.vgc_level = r17;
859 } else if (rt2x00dev->link.qual.false_cca < 100 && r17 > low_bound) {
860 rt2500usb_bbp_write(rt2x00dev, 17, --r17);
861 rt2x00dev->link.vgc_level = r17;
862 }
863}
864#else
865#define rt2500usb_link_tuner NULL
866#endif
867
868/*
869 * Initialization functions.
870 */
871static int rt2500usb_init_registers(struct rt2x00_dev *rt2x00dev)
872{
873 u16 reg;
874
875 rt2x00usb_vendor_request_sw(rt2x00dev, USB_DEVICE_MODE, 0x0001,
876 USB_MODE_TEST, REGISTER_TIMEOUT);
877 rt2x00usb_vendor_request_sw(rt2x00dev, USB_SINGLE_WRITE, 0x0308,
878 0x00f0, REGISTER_TIMEOUT);
879
880 rt2500usb_register_read(rt2x00dev, TXRX_CSR2, ®);
881 rt2x00_set_field16(®, TXRX_CSR2_DISABLE_RX, 1);
882 rt2500usb_register_write(rt2x00dev, TXRX_CSR2, reg);
883
884 rt2500usb_register_write(rt2x00dev, MAC_CSR13, 0x1111);
885 rt2500usb_register_write(rt2x00dev, MAC_CSR14, 0x1e11);
886
887 rt2500usb_register_read(rt2x00dev, MAC_CSR1, ®);
888 rt2x00_set_field16(®, MAC_CSR1_SOFT_RESET, 1);
889 rt2x00_set_field16(®, MAC_CSR1_BBP_RESET, 1);
890 rt2x00_set_field16(®, MAC_CSR1_HOST_READY, 0);
891 rt2500usb_register_write(rt2x00dev, MAC_CSR1, reg);
892
893 rt2500usb_register_read(rt2x00dev, MAC_CSR1, ®);
894 rt2x00_set_field16(®, MAC_CSR1_SOFT_RESET, 0);
895 rt2x00_set_field16(®, MAC_CSR1_BBP_RESET, 0);
896 rt2x00_set_field16(®, MAC_CSR1_HOST_READY, 0);
897 rt2500usb_register_write(rt2x00dev, MAC_CSR1, reg);
898
899 rt2500usb_register_read(rt2x00dev, TXRX_CSR5, ®);
900 rt2x00_set_field16(®, TXRX_CSR5_BBP_ID0, 13);
901 rt2x00_set_field16(®, TXRX_CSR5_BBP_ID0_VALID, 1);
902 rt2x00_set_field16(®, TXRX_CSR5_BBP_ID1, 12);
903 rt2x00_set_field16(®, TXRX_CSR5_BBP_ID1_VALID, 1);
904 rt2500usb_register_write(rt2x00dev, TXRX_CSR5, reg);
905
906 rt2500usb_register_read(rt2x00dev, TXRX_CSR6, ®);
907 rt2x00_set_field16(®, TXRX_CSR6_BBP_ID0, 10);
908 rt2x00_set_field16(®, TXRX_CSR6_BBP_ID0_VALID, 1);
909 rt2x00_set_field16(®, TXRX_CSR6_BBP_ID1, 11);
910 rt2x00_set_field16(®, TXRX_CSR6_BBP_ID1_VALID, 1);
911 rt2500usb_register_write(rt2x00dev, TXRX_CSR6, reg);
912
913 rt2500usb_register_read(rt2x00dev, TXRX_CSR7, ®);
914 rt2x00_set_field16(®, TXRX_CSR7_BBP_ID0, 7);
915 rt2x00_set_field16(®, TXRX_CSR7_BBP_ID0_VALID, 1);
916 rt2x00_set_field16(®, TXRX_CSR7_BBP_ID1, 6);
917 rt2x00_set_field16(®, TXRX_CSR7_BBP_ID1_VALID, 1);
918 rt2500usb_register_write(rt2x00dev, TXRX_CSR7, reg);
919
920 rt2500usb_register_read(rt2x00dev, TXRX_CSR8, ®);
921 rt2x00_set_field16(®, TXRX_CSR8_BBP_ID0, 5);
922 rt2x00_set_field16(®, TXRX_CSR8_BBP_ID0_VALID, 1);
923 rt2x00_set_field16(®, TXRX_CSR8_BBP_ID1, 0);
924 rt2x00_set_field16(®, TXRX_CSR8_BBP_ID1_VALID, 0);
925 rt2500usb_register_write(rt2x00dev, TXRX_CSR8, reg);
926
927 rt2500usb_register_read(rt2x00dev, TXRX_CSR19, ®);
928 rt2x00_set_field16(®, TXRX_CSR19_TSF_COUNT, 0);
929 rt2x00_set_field16(®, TXRX_CSR19_TSF_SYNC, 0);
930 rt2x00_set_field16(®, TXRX_CSR19_TBCN, 0);
931 rt2x00_set_field16(®, TXRX_CSR19_BEACON_GEN, 0);
932 rt2500usb_register_write(rt2x00dev, TXRX_CSR19, reg);
933
934 rt2500usb_register_write(rt2x00dev, TXRX_CSR21, 0xe78f);
935 rt2500usb_register_write(rt2x00dev, MAC_CSR9, 0xff1d);
936
937 if (rt2x00dev->ops->lib->set_device_state(rt2x00dev, STATE_AWAKE))
938 return -EBUSY;
939
940 rt2500usb_register_read(rt2x00dev, MAC_CSR1, ®);
941 rt2x00_set_field16(®, MAC_CSR1_SOFT_RESET, 0);
942 rt2x00_set_field16(®, MAC_CSR1_BBP_RESET, 0);
943 rt2x00_set_field16(®, MAC_CSR1_HOST_READY, 1);
944 rt2500usb_register_write(rt2x00dev, MAC_CSR1, reg);
945
946 if (rt2x00_rev(&rt2x00dev->chip) >= RT2570_VERSION_C) {
947 rt2500usb_register_read(rt2x00dev, PHY_CSR2, ®);
948 rt2x00_set_field16(®, PHY_CSR2_LNA, 0);
949 } else {
950 reg = 0;
951 rt2x00_set_field16(®, PHY_CSR2_LNA, 1);
952 rt2x00_set_field16(®, PHY_CSR2_LNA_MODE, 3);
953 }
954 rt2500usb_register_write(rt2x00dev, PHY_CSR2, reg);
955
956 rt2500usb_register_write(rt2x00dev, MAC_CSR11, 0x0002);
957 rt2500usb_register_write(rt2x00dev, MAC_CSR22, 0x0053);
958 rt2500usb_register_write(rt2x00dev, MAC_CSR15, 0x01ee);
959 rt2500usb_register_write(rt2x00dev, MAC_CSR16, 0x0000);
960
961 rt2500usb_register_read(rt2x00dev, MAC_CSR8, ®);
962 rt2x00_set_field16(®, MAC_CSR8_MAX_FRAME_UNIT,
963 rt2x00dev->rx->data_size);
964 rt2500usb_register_write(rt2x00dev, MAC_CSR8, reg);
965
966 rt2500usb_register_read(rt2x00dev, TXRX_CSR0, ®);
967 rt2x00_set_field16(®, TXRX_CSR0_IV_OFFSET, IEEE80211_HEADER);
968 rt2x00_set_field16(®, TXRX_CSR0_KEY_ID, 0);
969 rt2500usb_register_write(rt2x00dev, TXRX_CSR0, reg);
970
971 rt2500usb_register_read(rt2x00dev, MAC_CSR18, ®);
972 rt2x00_set_field16(®, MAC_CSR18_DELAY_AFTER_BEACON, 90);
973 rt2500usb_register_write(rt2x00dev, MAC_CSR18, reg);
974
975 rt2500usb_register_read(rt2x00dev, PHY_CSR4, ®);
976 rt2x00_set_field16(®, PHY_CSR4_LOW_RF_LE, 1);
977 rt2500usb_register_write(rt2x00dev, PHY_CSR4, reg);
978
979 rt2500usb_register_read(rt2x00dev, TXRX_CSR1, ®);
980 rt2x00_set_field16(®, TXRX_CSR1_AUTO_SEQUENCE, 1);
981 rt2500usb_register_write(rt2x00dev, TXRX_CSR1, reg);
982
983 return 0;
984}
985
986static int rt2500usb_wait_bbp_ready(struct rt2x00_dev *rt2x00dev)
987{
988 unsigned int i;
989 u8 value;
990
991 for (i = 0; i < REGISTER_BUSY_COUNT; i++) {
992 rt2500usb_bbp_read(rt2x00dev, 0, &value);
993 if ((value != 0xff) && (value != 0x00))
994 return 0;
995 udelay(REGISTER_BUSY_DELAY);
996 }
997
998 ERROR(rt2x00dev, "BBP register access failed, aborting.\n");
999 return -EACCES;
1000}
1001
1002static int rt2500usb_init_bbp(struct rt2x00_dev *rt2x00dev)
1003{
1004 unsigned int i;
1005 u16 eeprom;
1006 u8 value;
1007 u8 reg_id;
1008
1009 if (unlikely(rt2500usb_wait_bbp_ready(rt2x00dev)))
1010 return -EACCES;
1011
1012 rt2500usb_bbp_write(rt2x00dev, 3, 0x02);
1013 rt2500usb_bbp_write(rt2x00dev, 4, 0x19);
1014 rt2500usb_bbp_write(rt2x00dev, 14, 0x1c);
1015 rt2500usb_bbp_write(rt2x00dev, 15, 0x30);
1016 rt2500usb_bbp_write(rt2x00dev, 16, 0xac);
1017 rt2500usb_bbp_write(rt2x00dev, 18, 0x18);
1018 rt2500usb_bbp_write(rt2x00dev, 19, 0xff);
1019 rt2500usb_bbp_write(rt2x00dev, 20, 0x1e);
1020 rt2500usb_bbp_write(rt2x00dev, 21, 0x08);
1021 rt2500usb_bbp_write(rt2x00dev, 22, 0x08);
1022 rt2500usb_bbp_write(rt2x00dev, 23, 0x08);
1023 rt2500usb_bbp_write(rt2x00dev, 24, 0x80);
1024 rt2500usb_bbp_write(rt2x00dev, 25, 0x50);
1025 rt2500usb_bbp_write(rt2x00dev, 26, 0x08);
1026 rt2500usb_bbp_write(rt2x00dev, 27, 0x23);
1027 rt2500usb_bbp_write(rt2x00dev, 30, 0x10);
1028 rt2500usb_bbp_write(rt2x00dev, 31, 0x2b);
1029 rt2500usb_bbp_write(rt2x00dev, 32, 0xb9);
1030 rt2500usb_bbp_write(rt2x00dev, 34, 0x12);
1031 rt2500usb_bbp_write(rt2x00dev, 35, 0x50);
1032 rt2500usb_bbp_write(rt2x00dev, 39, 0xc4);
1033 rt2500usb_bbp_write(rt2x00dev, 40, 0x02);
1034 rt2500usb_bbp_write(rt2x00dev, 41, 0x60);
1035 rt2500usb_bbp_write(rt2x00dev, 53, 0x10);
1036 rt2500usb_bbp_write(rt2x00dev, 54, 0x18);
1037 rt2500usb_bbp_write(rt2x00dev, 56, 0x08);
1038 rt2500usb_bbp_write(rt2x00dev, 57, 0x10);
1039 rt2500usb_bbp_write(rt2x00dev, 58, 0x08);
1040 rt2500usb_bbp_write(rt2x00dev, 61, 0x60);
1041 rt2500usb_bbp_write(rt2x00dev, 62, 0x10);
1042 rt2500usb_bbp_write(rt2x00dev, 75, 0xff);
1043
1044 for (i = 0; i < EEPROM_BBP_SIZE; i++) {
1045 rt2x00_eeprom_read(rt2x00dev, EEPROM_BBP_START + i, &eeprom);
1046
1047 if (eeprom != 0xffff && eeprom != 0x0000) {
1048 reg_id = rt2x00_get_field16(eeprom, EEPROM_BBP_REG_ID);
1049 value = rt2x00_get_field16(eeprom, EEPROM_BBP_VALUE);
1050 rt2500usb_bbp_write(rt2x00dev, reg_id, value);
1051 }
1052 }
1053
1054 return 0;
1055}
1056
1057/*
1058 * Device state switch handlers.
1059 */
1060static void rt2500usb_toggle_rx(struct rt2x00_dev *rt2x00dev,
1061 enum dev_state state)
1062{
1063 u16 reg;
1064
1065 rt2500usb_register_read(rt2x00dev, TXRX_CSR2, ®);
1066 rt2x00_set_field16(®, TXRX_CSR2_DISABLE_RX,
1067 (state == STATE_RADIO_RX_OFF) ||
1068 (state == STATE_RADIO_RX_OFF_LINK));
1069 rt2500usb_register_write(rt2x00dev, TXRX_CSR2, reg);
1070}
1071
1072static int rt2500usb_enable_radio(struct rt2x00_dev *rt2x00dev)
1073{
1074 /*
1075 * Initialize all registers.
1076 */
1077 if (unlikely(rt2500usb_init_registers(rt2x00dev) ||
1078 rt2500usb_init_bbp(rt2x00dev)))
1079 return -EIO;
1080
1081 return 0;
1082}
1083
1084static void rt2500usb_disable_radio(struct rt2x00_dev *rt2x00dev)
1085{
1086 rt2500usb_register_write(rt2x00dev, MAC_CSR13, 0x2121);
1087 rt2500usb_register_write(rt2x00dev, MAC_CSR14, 0x2121);
1088
1089 /*
1090 * Disable synchronisation.
1091 */
1092 rt2500usb_register_write(rt2x00dev, TXRX_CSR19, 0);
1093
1094 rt2x00usb_disable_radio(rt2x00dev);
1095}
1096
1097static int rt2500usb_set_state(struct rt2x00_dev *rt2x00dev,
1098 enum dev_state state)
1099{
1100 u16 reg;
1101 u16 reg2;
1102 unsigned int i;
1103 char put_to_sleep;
1104 char bbp_state;
1105 char rf_state;
1106
1107 put_to_sleep = (state != STATE_AWAKE);
1108
1109 reg = 0;
1110 rt2x00_set_field16(®, MAC_CSR17_BBP_DESIRE_STATE, state);
1111 rt2x00_set_field16(®, MAC_CSR17_RF_DESIRE_STATE, state);
1112 rt2x00_set_field16(®, MAC_CSR17_PUT_TO_SLEEP, put_to_sleep);
1113 rt2500usb_register_write(rt2x00dev, MAC_CSR17, reg);
1114 rt2x00_set_field16(®, MAC_CSR17_SET_STATE, 1);
1115 rt2500usb_register_write(rt2x00dev, MAC_CSR17, reg);
1116
1117 /*
1118 * Device is not guaranteed to be in the requested state yet.
1119 * We must wait until the register indicates that the
1120 * device has entered the correct state.
1121 */
1122 for (i = 0; i < REGISTER_BUSY_COUNT; i++) {
1123 rt2500usb_register_read(rt2x00dev, MAC_CSR17, ®2);
1124 bbp_state = rt2x00_get_field16(reg2, MAC_CSR17_BBP_CURR_STATE);
1125 rf_state = rt2x00_get_field16(reg2, MAC_CSR17_RF_CURR_STATE);
1126 if (bbp_state == state && rf_state == state)
1127 return 0;
1128 rt2500usb_register_write(rt2x00dev, MAC_CSR17, reg);
1129 msleep(30);
1130 }
1131
1132 return -EBUSY;
1133}
1134
1135static int rt2500usb_set_device_state(struct rt2x00_dev *rt2x00dev,
1136 enum dev_state state)
1137{
1138 int retval = 0;
1139
1140 switch (state) {
1141 case STATE_RADIO_ON:
1142 retval = rt2500usb_enable_radio(rt2x00dev);
1143 break;
1144 case STATE_RADIO_OFF:
1145 rt2500usb_disable_radio(rt2x00dev);
1146 break;
1147 case STATE_RADIO_RX_ON:
1148 case STATE_RADIO_RX_ON_LINK:
1149 case STATE_RADIO_RX_OFF:
1150 case STATE_RADIO_RX_OFF_LINK:
1151 rt2500usb_toggle_rx(rt2x00dev, state);
1152 break;
1153 case STATE_RADIO_IRQ_ON:
1154 case STATE_RADIO_IRQ_OFF:
1155 /* No support, but no error either */
1156 break;
1157 case STATE_DEEP_SLEEP:
1158 case STATE_SLEEP:
1159 case STATE_STANDBY:
1160 case STATE_AWAKE:
1161 retval = rt2500usb_set_state(rt2x00dev, state);
1162 break;
1163 default:
1164 retval = -ENOTSUPP;
1165 break;
1166 }
1167
1168 if (unlikely(retval))
1169 ERROR(rt2x00dev, "Device failed to enter state %d (%d).\n",
1170 state, retval);
1171
1172 return retval;
1173}
1174
1175/*
1176 * TX descriptor initialization
1177 */
1178static void rt2500usb_write_tx_desc(struct rt2x00_dev *rt2x00dev,
1179 struct sk_buff *skb,
1180 struct txentry_desc *txdesc)
1181{
1182 struct skb_frame_desc *skbdesc = get_skb_frame_desc(skb);
1183 __le32 *txd = skbdesc->desc;
1184 u32 word;
1185
1186 /*
1187 * Start writing the descriptor words.
1188 */
1189 rt2x00_desc_read(txd, 1, &word);
1190 rt2x00_set_field32(&word, TXD_W1_IV_OFFSET, txdesc->iv_offset);
1191 rt2x00_set_field32(&word, TXD_W1_AIFS, txdesc->aifs);
1192 rt2x00_set_field32(&word, TXD_W1_CWMIN, txdesc->cw_min);
1193 rt2x00_set_field32(&word, TXD_W1_CWMAX, txdesc->cw_max);
1194 rt2x00_desc_write(txd, 1, word);
1195
1196 rt2x00_desc_read(txd, 2, &word);
1197 rt2x00_set_field32(&word, TXD_W2_PLCP_SIGNAL, txdesc->signal);
1198 rt2x00_set_field32(&word, TXD_W2_PLCP_SERVICE, txdesc->service);
1199 rt2x00_set_field32(&word, TXD_W2_PLCP_LENGTH_LOW, txdesc->length_low);
1200 rt2x00_set_field32(&word, TXD_W2_PLCP_LENGTH_HIGH, txdesc->length_high);
1201 rt2x00_desc_write(txd, 2, word);
1202
1203 if (test_bit(ENTRY_TXD_ENCRYPT, &txdesc->flags)) {
1204 _rt2x00_desc_write(txd, 3, skbdesc->iv[0]);
1205 _rt2x00_desc_write(txd, 4, skbdesc->iv[1]);
1206 }
1207
1208 rt2x00_desc_read(txd, 0, &word);
1209 rt2x00_set_field32(&word, TXD_W0_RETRY_LIMIT, txdesc->retry_limit);
1210 rt2x00_set_field32(&word, TXD_W0_MORE_FRAG,
1211 test_bit(ENTRY_TXD_MORE_FRAG, &txdesc->flags));
1212 rt2x00_set_field32(&word, TXD_W0_ACK,
1213 test_bit(ENTRY_TXD_ACK, &txdesc->flags));
1214 rt2x00_set_field32(&word, TXD_W0_TIMESTAMP,
1215 test_bit(ENTRY_TXD_REQ_TIMESTAMP, &txdesc->flags));
1216 rt2x00_set_field32(&word, TXD_W0_OFDM,
1217 (txdesc->rate_mode == RATE_MODE_OFDM));
1218 rt2x00_set_field32(&word, TXD_W0_NEW_SEQ,
1219 test_bit(ENTRY_TXD_FIRST_FRAGMENT, &txdesc->flags));
1220 rt2x00_set_field32(&word, TXD_W0_IFS, txdesc->ifs);
1221 rt2x00_set_field32(&word, TXD_W0_DATABYTE_COUNT, skb->len);
1222 rt2x00_set_field32(&word, TXD_W0_CIPHER, !!txdesc->cipher);
1223 rt2x00_set_field32(&word, TXD_W0_KEY_ID, txdesc->key_idx);
1224 rt2x00_desc_write(txd, 0, word);
1225}
1226
1227/*
1228 * TX data initialization
1229 */
1230static void rt2500usb_beacondone(struct urb *urb);
1231
1232static void rt2500usb_write_beacon(struct queue_entry *entry)
1233{
1234 struct rt2x00_dev *rt2x00dev = entry->queue->rt2x00dev;
1235 struct usb_device *usb_dev = to_usb_device_intf(rt2x00dev->dev);
1236 struct queue_entry_priv_usb_bcn *bcn_priv = entry->priv_data;
1237 struct skb_frame_desc *skbdesc = get_skb_frame_desc(entry->skb);
1238 int pipe = usb_sndbulkpipe(usb_dev, entry->queue->usb_endpoint);
1239 int length;
1240 u16 reg;
1241
1242 /*
1243 * Add the descriptor in front of the skb.
1244 */
1245 skb_push(entry->skb, entry->queue->desc_size);
1246 memcpy(entry->skb->data, skbdesc->desc, skbdesc->desc_len);
1247 skbdesc->desc = entry->skb->data;
1248
1249 /*
1250 * Disable beaconing while we are reloading the beacon data,
1251 * otherwise we might be sending out invalid data.
1252 */
1253 rt2500usb_register_read(rt2x00dev, TXRX_CSR19, ®);
1254 rt2x00_set_field16(®, TXRX_CSR19_TSF_COUNT, 0);
1255 rt2x00_set_field16(®, TXRX_CSR19_TBCN, 0);
1256 rt2x00_set_field16(®, TXRX_CSR19_BEACON_GEN, 0);
1257 rt2500usb_register_write(rt2x00dev, TXRX_CSR19, reg);
1258
1259 /*
1260 * USB devices cannot blindly pass the skb->len as the
1261 * length of the data to usb_fill_bulk_urb. Pass the skb
1262 * to the driver to determine what the length should be.
1263 */
1264 length = rt2x00dev->ops->lib->get_tx_data_len(entry);
1265
1266 usb_fill_bulk_urb(bcn_priv->urb, usb_dev, pipe,
1267 entry->skb->data, length, rt2500usb_beacondone,
1268 entry);
1269
1270 /*
1271 * Second we need to create the guardian byte.
1272 * We only need a single byte, so lets recycle
1273 * the 'flags' field we are not using for beacons.
1274 */
1275 bcn_priv->guardian_data = 0;
1276 usb_fill_bulk_urb(bcn_priv->guardian_urb, usb_dev, pipe,
1277 &bcn_priv->guardian_data, 1, rt2500usb_beacondone,
1278 entry);
1279
1280 /*
1281 * Send out the guardian byte.
1282 */
1283 usb_submit_urb(bcn_priv->guardian_urb, GFP_ATOMIC);
1284}
1285
1286static int rt2500usb_get_tx_data_len(struct queue_entry *entry)
1287{
1288 int length;
1289
1290 /*
1291 * The length _must_ be a multiple of 2,
1292 * but it must _not_ be a multiple of the USB packet size.
1293 */
1294 length = roundup(entry->skb->len, 2);
1295 length += (2 * !(length % entry->queue->usb_maxpacket));
1296
1297 return length;
1298}
1299
1300static void rt2500usb_kick_tx_queue(struct rt2x00_dev *rt2x00dev,
1301 const enum data_queue_qid queue)
1302{
1303 u16 reg;
1304
1305 if (queue != QID_BEACON) {
1306 rt2x00usb_kick_tx_queue(rt2x00dev, queue);
1307 return;
1308 }
1309
1310 rt2500usb_register_read(rt2x00dev, TXRX_CSR19, ®);
1311 if (!rt2x00_get_field16(reg, TXRX_CSR19_BEACON_GEN)) {
1312 rt2x00_set_field16(®, TXRX_CSR19_TSF_COUNT, 1);
1313 rt2x00_set_field16(®, TXRX_CSR19_TBCN, 1);
1314 rt2x00_set_field16(®, TXRX_CSR19_BEACON_GEN, 1);
1315 /*
1316 * Beacon generation will fail initially.
1317 * To prevent this we need to register the TXRX_CSR19
1318 * register several times.
1319 */
1320 rt2500usb_register_write(rt2x00dev, TXRX_CSR19, reg);
1321 rt2500usb_register_write(rt2x00dev, TXRX_CSR19, 0);
1322 rt2500usb_register_write(rt2x00dev, TXRX_CSR19, reg);
1323 rt2500usb_register_write(rt2x00dev, TXRX_CSR19, 0);
1324 rt2500usb_register_write(rt2x00dev, TXRX_CSR19, reg);
1325 }
1326}
1327
1328/*
1329 * RX control handlers
1330 */
1331static void rt2500usb_fill_rxdone(struct queue_entry *entry,
1332 struct rxdone_entry_desc *rxdesc)
1333{
1334 struct rt2x00_dev *rt2x00dev = entry->queue->rt2x00dev;
1335 struct queue_entry_priv_usb *entry_priv = entry->priv_data;
1336 struct skb_frame_desc *skbdesc = get_skb_frame_desc(entry->skb);
1337 __le32 *rxd =
1338 (__le32 *)(entry->skb->data +
1339 (entry_priv->urb->actual_length -
1340 entry->queue->desc_size));
1341 u32 word0;
1342 u32 word1;
1343
1344 /*
1345 * Copy descriptor to the skbdesc->desc buffer, making it safe from moving of
1346 * frame data in rt2x00usb.
1347 */
1348 memcpy(skbdesc->desc, rxd, skbdesc->desc_len);
1349 rxd = (__le32 *)skbdesc->desc;
1350
1351 /*
1352 * It is now safe to read the descriptor on all architectures.
1353 */
1354 rt2x00_desc_read(rxd, 0, &word0);
1355 rt2x00_desc_read(rxd, 1, &word1);
1356
1357 if (rt2x00_get_field32(word0, RXD_W0_CRC_ERROR))
1358 rxdesc->flags |= RX_FLAG_FAILED_FCS_CRC;
1359 if (rt2x00_get_field32(word0, RXD_W0_PHYSICAL_ERROR))
1360 rxdesc->flags |= RX_FLAG_FAILED_PLCP_CRC;
1361
1362 if (test_bit(CONFIG_SUPPORT_HW_CRYPTO, &rt2x00dev->flags)) {
1363 rxdesc->cipher = rt2x00_get_field32(word0, RXD_W0_CIPHER);
1364 if (rt2x00_get_field32(word0, RXD_W0_CIPHER_ERROR))
1365 rxdesc->cipher_status = RX_CRYPTO_FAIL_KEY;
1366 }
1367
1368 if (rxdesc->cipher != CIPHER_NONE) {
1369 _rt2x00_desc_read(rxd, 2, &rxdesc->iv[0]);
1370 _rt2x00_desc_read(rxd, 3, &rxdesc->iv[1]);
1371 rxdesc->dev_flags |= RXDONE_CRYPTO_IV;
1372
1373 /* ICV is located at the end of frame */
1374
1375 rxdesc->flags |= RX_FLAG_MMIC_STRIPPED;
1376 if (rxdesc->cipher_status == RX_CRYPTO_SUCCESS)
1377 rxdesc->flags |= RX_FLAG_DECRYPTED;
1378 else if (rxdesc->cipher_status == RX_CRYPTO_FAIL_MIC)
1379 rxdesc->flags |= RX_FLAG_MMIC_ERROR;
1380 }
1381
1382 /*
1383 * Obtain the status about this packet.
1384 * When frame was received with an OFDM bitrate,
1385 * the signal is the PLCP value. If it was received with
1386 * a CCK bitrate the signal is the rate in 100kbit/s.
1387 */
1388 rxdesc->signal = rt2x00_get_field32(word1, RXD_W1_SIGNAL);
1389 rxdesc->rssi =
1390 rt2x00_get_field32(word1, RXD_W1_RSSI) - rt2x00dev->rssi_offset;
1391 rxdesc->size = rt2x00_get_field32(word0, RXD_W0_DATABYTE_COUNT);
1392
1393 if (rt2x00_get_field32(word0, RXD_W0_OFDM))
1394 rxdesc->dev_flags |= RXDONE_SIGNAL_PLCP;
1395 else
1396 rxdesc->dev_flags |= RXDONE_SIGNAL_BITRATE;
1397 if (rt2x00_get_field32(word0, RXD_W0_MY_BSS))
1398 rxdesc->dev_flags |= RXDONE_MY_BSS;
1399
1400 /*
1401 * Adjust the skb memory window to the frame boundaries.
1402 */
1403 skb_trim(entry->skb, rxdesc->size);
1404}
1405
1406/*
1407 * Interrupt functions.
1408 */
1409static void rt2500usb_beacondone(struct urb *urb)
1410{
1411 struct queue_entry *entry = (struct queue_entry *)urb->context;
1412 struct queue_entry_priv_usb_bcn *bcn_priv = entry->priv_data;
1413
1414 if (!test_bit(DEVICE_STATE_ENABLED_RADIO, &entry->queue->rt2x00dev->flags))
1415 return;
1416
1417 /*
1418 * Check if this was the guardian beacon,
1419 * if that was the case we need to send the real beacon now.
1420 * Otherwise we should free the sk_buffer, the device
1421 * should be doing the rest of the work now.
1422 */
1423 if (bcn_priv->guardian_urb == urb) {
1424 usb_submit_urb(bcn_priv->urb, GFP_ATOMIC);
1425 } else if (bcn_priv->urb == urb) {
1426 dev_kfree_skb(entry->skb);
1427 entry->skb = NULL;
1428 }
1429}
1430
1431/*
1432 * Device probe functions.
1433 */
1434static int rt2500usb_validate_eeprom(struct rt2x00_dev *rt2x00dev)
1435{
1436 u16 word;
1437 u8 *mac;
1438 u8 bbp;
1439
1440 rt2x00usb_eeprom_read(rt2x00dev, rt2x00dev->eeprom, EEPROM_SIZE);
1441
1442 /*
1443 * Start validation of the data that has been read.
1444 */
1445 mac = rt2x00_eeprom_addr(rt2x00dev, EEPROM_MAC_ADDR_0);
1446 if (!is_valid_ether_addr(mac)) {
1447 random_ether_addr(mac);
1448 EEPROM(rt2x00dev, "MAC: %pM\n", mac);
1449 }
1450
1451 rt2x00_eeprom_read(rt2x00dev, EEPROM_ANTENNA, &word);
1452 if (word == 0xffff) {
1453 rt2x00_set_field16(&word, EEPROM_ANTENNA_NUM, 2);
1454 rt2x00_set_field16(&word, EEPROM_ANTENNA_TX_DEFAULT,
1455 ANTENNA_SW_DIVERSITY);
1456 rt2x00_set_field16(&word, EEPROM_ANTENNA_RX_DEFAULT,
1457 ANTENNA_SW_DIVERSITY);
1458 rt2x00_set_field16(&word, EEPROM_ANTENNA_LED_MODE,
1459 LED_MODE_DEFAULT);
1460 rt2x00_set_field16(&word, EEPROM_ANTENNA_DYN_TXAGC, 0);
1461 rt2x00_set_field16(&word, EEPROM_ANTENNA_HARDWARE_RADIO, 0);
1462 rt2x00_set_field16(&word, EEPROM_ANTENNA_RF_TYPE, RF2522);
1463 rt2x00_eeprom_write(rt2x00dev, EEPROM_ANTENNA, word);
1464 EEPROM(rt2x00dev, "Antenna: 0x%04x\n", word);
1465 }
1466
1467 rt2x00_eeprom_read(rt2x00dev, EEPROM_NIC, &word);
1468 if (word == 0xffff) {
1469 rt2x00_set_field16(&word, EEPROM_NIC_CARDBUS_ACCEL, 0);
1470 rt2x00_set_field16(&word, EEPROM_NIC_DYN_BBP_TUNE, 0);
1471 rt2x00_set_field16(&word, EEPROM_NIC_CCK_TX_POWER, 0);
1472 rt2x00_eeprom_write(rt2x00dev, EEPROM_NIC, word);
1473 EEPROM(rt2x00dev, "NIC: 0x%04x\n", word);
1474 }
1475
1476 rt2x00_eeprom_read(rt2x00dev, EEPROM_CALIBRATE_OFFSET, &word);
1477 if (word == 0xffff) {
1478 rt2x00_set_field16(&word, EEPROM_CALIBRATE_OFFSET_RSSI,
1479 DEFAULT_RSSI_OFFSET);
1480 rt2x00_eeprom_write(rt2x00dev, EEPROM_CALIBRATE_OFFSET, word);
1481 EEPROM(rt2x00dev, "Calibrate offset: 0x%04x\n", word);
1482 }
1483
1484 rt2x00_eeprom_read(rt2x00dev, EEPROM_BBPTUNE, &word);
1485 if (word == 0xffff) {
1486 rt2x00_set_field16(&word, EEPROM_BBPTUNE_THRESHOLD, 45);
1487 rt2x00_eeprom_write(rt2x00dev, EEPROM_BBPTUNE, word);
1488 EEPROM(rt2x00dev, "BBPtune: 0x%04x\n", word);
1489 }
1490
1491 /*
1492 * Switch lower vgc bound to current BBP R17 value,
1493 * lower the value a bit for better quality.
1494 */
1495 rt2500usb_bbp_read(rt2x00dev, 17, &bbp);
1496 bbp -= 6;
1497
1498 rt2x00_eeprom_read(rt2x00dev, EEPROM_BBPTUNE_VGC, &word);
1499 if (word == 0xffff) {
1500 rt2x00_set_field16(&word, EEPROM_BBPTUNE_VGCUPPER, 0x40);
1501 rt2x00_set_field16(&word, EEPROM_BBPTUNE_VGCLOWER, bbp);
1502 rt2x00_eeprom_write(rt2x00dev, EEPROM_BBPTUNE_VGC, word);
1503 EEPROM(rt2x00dev, "BBPtune vgc: 0x%04x\n", word);
1504 } else {
1505 rt2x00_set_field16(&word, EEPROM_BBPTUNE_VGCLOWER, bbp);
1506 rt2x00_eeprom_write(rt2x00dev, EEPROM_BBPTUNE_VGC, word);
1507 }
1508
1509 rt2x00_eeprom_read(rt2x00dev, EEPROM_BBPTUNE_R17, &word);
1510 if (word == 0xffff) {
1511 rt2x00_set_field16(&word, EEPROM_BBPTUNE_R17_LOW, 0x48);
1512 rt2x00_set_field16(&word, EEPROM_BBPTUNE_R17_HIGH, 0x41);
1513 rt2x00_eeprom_write(rt2x00dev, EEPROM_BBPTUNE_R17, word);
1514 EEPROM(rt2x00dev, "BBPtune r17: 0x%04x\n", word);
1515 }
1516
1517 rt2x00_eeprom_read(rt2x00dev, EEPROM_BBPTUNE_R24, &word);
1518 if (word == 0xffff) {
1519 rt2x00_set_field16(&word, EEPROM_BBPTUNE_R24_LOW, 0x40);
1520 rt2x00_set_field16(&word, EEPROM_BBPTUNE_R24_HIGH, 0x80);
1521 rt2x00_eeprom_write(rt2x00dev, EEPROM_BBPTUNE_R24, word);
1522 EEPROM(rt2x00dev, "BBPtune r24: 0x%04x\n", word);
1523 }
1524
1525 rt2x00_eeprom_read(rt2x00dev, EEPROM_BBPTUNE_R25, &word);
1526 if (word == 0xffff) {
1527 rt2x00_set_field16(&word, EEPROM_BBPTUNE_R25_LOW, 0x40);
1528 rt2x00_set_field16(&word, EEPROM_BBPTUNE_R25_HIGH, 0x50);
1529 rt2x00_eeprom_write(rt2x00dev, EEPROM_BBPTUNE_R25, word);
1530 EEPROM(rt2x00dev, "BBPtune r25: 0x%04x\n", word);
1531 }
1532
1533 rt2x00_eeprom_read(rt2x00dev, EEPROM_BBPTUNE_R61, &word);
1534 if (word == 0xffff) {
1535 rt2x00_set_field16(&word, EEPROM_BBPTUNE_R61_LOW, 0x60);
1536 rt2x00_set_field16(&word, EEPROM_BBPTUNE_R61_HIGH, 0x6d);
1537 rt2x00_eeprom_write(rt2x00dev, EEPROM_BBPTUNE_R61, word);
1538 EEPROM(rt2x00dev, "BBPtune r61: 0x%04x\n", word);
1539 }
1540
1541 return 0;
1542}
1543
1544static int rt2500usb_init_eeprom(struct rt2x00_dev *rt2x00dev)
1545{
1546 u16 reg;
1547 u16 value;
1548 u16 eeprom;
1549
1550 /*
1551 * Read EEPROM word for configuration.
1552 */
1553 rt2x00_eeprom_read(rt2x00dev, EEPROM_ANTENNA, &eeprom);
1554
1555 /*
1556 * Identify RF chipset.
1557 */
1558 value = rt2x00_get_field16(eeprom, EEPROM_ANTENNA_RF_TYPE);
1559 rt2500usb_register_read(rt2x00dev, MAC_CSR0, ®);
1560 rt2x00_set_chip(rt2x00dev, RT2570, value, reg);
1561
1562 if (!rt2x00_check_rev(&rt2x00dev->chip, 0)) {
1563 ERROR(rt2x00dev, "Invalid RT chipset detected.\n");
1564 return -ENODEV;
1565 }
1566
1567 if (!rt2x00_rf(&rt2x00dev->chip, RF2522) &&
1568 !rt2x00_rf(&rt2x00dev->chip, RF2523) &&
1569 !rt2x00_rf(&rt2x00dev->chip, RF2524) &&
1570 !rt2x00_rf(&rt2x00dev->chip, RF2525) &&
1571 !rt2x00_rf(&rt2x00dev->chip, RF2525E) &&
1572 !rt2x00_rf(&rt2x00dev->chip, RF5222)) {
1573 ERROR(rt2x00dev, "Invalid RF chipset detected.\n");
1574 return -ENODEV;
1575 }
1576
1577 /*
1578 * Identify default antenna configuration.
1579 */
1580 rt2x00dev->default_ant.tx =
1581 rt2x00_get_field16(eeprom, EEPROM_ANTENNA_TX_DEFAULT);
1582 rt2x00dev->default_ant.rx =
1583 rt2x00_get_field16(eeprom, EEPROM_ANTENNA_RX_DEFAULT);
1584
1585 /*
1586 * When the eeprom indicates SW_DIVERSITY use HW_DIVERSITY instead.
1587 * I am not 100% sure about this, but the legacy drivers do not
1588 * indicate antenna swapping in software is required when
1589 * diversity is enabled.
1590 */
1591 if (rt2x00dev->default_ant.tx == ANTENNA_SW_DIVERSITY)
1592 rt2x00dev->default_ant.tx = ANTENNA_HW_DIVERSITY;
1593 if (rt2x00dev->default_ant.rx == ANTENNA_SW_DIVERSITY)
1594 rt2x00dev->default_ant.rx = ANTENNA_HW_DIVERSITY;
1595
1596 /*
1597 * Store led mode, for correct led behaviour.
1598 */
1599#ifdef CONFIG_RT2X00_LIB_LEDS
1600 value = rt2x00_get_field16(eeprom, EEPROM_ANTENNA_LED_MODE);
1601
1602 rt2500usb_init_led(rt2x00dev, &rt2x00dev->led_radio, LED_TYPE_RADIO);
1603 if (value == LED_MODE_TXRX_ACTIVITY ||
1604 value == LED_MODE_DEFAULT ||
1605 value == LED_MODE_ASUS)
1606 rt2500usb_init_led(rt2x00dev, &rt2x00dev->led_qual,
1607 LED_TYPE_ACTIVITY);
1608#endif /* CONFIG_RT2X00_LIB_LEDS */
1609
1610 /*
1611 * Detect if this device has an hardware controlled radio.
1612 */
1613#ifdef CONFIG_RT2X00_LIB_RFKILL
1614 if (rt2x00_get_field16(eeprom, EEPROM_ANTENNA_HARDWARE_RADIO))
1615 __set_bit(CONFIG_SUPPORT_HW_BUTTON, &rt2x00dev->flags);
1616#endif /* CONFIG_RT2X00_LIB_RFKILL */
1617
1618 /*
1619 * Check if the BBP tuning should be disabled.
1620 */
1621 rt2x00_eeprom_read(rt2x00dev, EEPROM_NIC, &eeprom);
1622 if (rt2x00_get_field16(eeprom, EEPROM_NIC_DYN_BBP_TUNE))
1623 __set_bit(CONFIG_DISABLE_LINK_TUNING, &rt2x00dev->flags);
1624
1625 /*
1626 * Read the RSSI <-> dBm offset information.
1627 */
1628 rt2x00_eeprom_read(rt2x00dev, EEPROM_CALIBRATE_OFFSET, &eeprom);
1629 rt2x00dev->rssi_offset =
1630 rt2x00_get_field16(eeprom, EEPROM_CALIBRATE_OFFSET_RSSI);
1631
1632 return 0;
1633}
1634
1635/*
1636 * RF value list for RF2522
1637 * Supports: 2.4 GHz
1638 */
1639static const struct rf_channel rf_vals_bg_2522[] = {
1640 { 1, 0x00002050, 0x000c1fda, 0x00000101, 0 },
1641 { 2, 0x00002050, 0x000c1fee, 0x00000101, 0 },
1642 { 3, 0x00002050, 0x000c2002, 0x00000101, 0 },
1643 { 4, 0x00002050, 0x000c2016, 0x00000101, 0 },
1644 { 5, 0x00002050, 0x000c202a, 0x00000101, 0 },
1645 { 6, 0x00002050, 0x000c203e, 0x00000101, 0 },
1646 { 7, 0x00002050, 0x000c2052, 0x00000101, 0 },
1647 { 8, 0x00002050, 0x000c2066, 0x00000101, 0 },
1648 { 9, 0x00002050, 0x000c207a, 0x00000101, 0 },
1649 { 10, 0x00002050, 0x000c208e, 0x00000101, 0 },
1650 { 11, 0x00002050, 0x000c20a2, 0x00000101, 0 },
1651 { 12, 0x00002050, 0x000c20b6, 0x00000101, 0 },
1652 { 13, 0x00002050, 0x000c20ca, 0x00000101, 0 },
1653 { 14, 0x00002050, 0x000c20fa, 0x00000101, 0 },
1654};
1655
1656/*
1657 * RF value list for RF2523
1658 * Supports: 2.4 GHz
1659 */
1660static const struct rf_channel rf_vals_bg_2523[] = {
1661 { 1, 0x00022010, 0x00000c9e, 0x000e0111, 0x00000a1b },
1662 { 2, 0x00022010, 0x00000ca2, 0x000e0111, 0x00000a1b },
1663 { 3, 0x00022010, 0x00000ca6, 0x000e0111, 0x00000a1b },
1664 { 4, 0x00022010, 0x00000caa, 0x000e0111, 0x00000a1b },
1665 { 5, 0x00022010, 0x00000cae, 0x000e0111, 0x00000a1b },
1666 { 6, 0x00022010, 0x00000cb2, 0x000e0111, 0x00000a1b },
1667 { 7, 0x00022010, 0x00000cb6, 0x000e0111, 0x00000a1b },
1668 { 8, 0x00022010, 0x00000cba, 0x000e0111, 0x00000a1b },
1669 { 9, 0x00022010, 0x00000cbe, 0x000e0111, 0x00000a1b },
1670 { 10, 0x00022010, 0x00000d02, 0x000e0111, 0x00000a1b },
1671 { 11, 0x00022010, 0x00000d06, 0x000e0111, 0x00000a1b },
1672 { 12, 0x00022010, 0x00000d0a, 0x000e0111, 0x00000a1b },
1673 { 13, 0x00022010, 0x00000d0e, 0x000e0111, 0x00000a1b },
1674 { 14, 0x00022010, 0x00000d1a, 0x000e0111, 0x00000a03 },
1675};
1676
1677/*
1678 * RF value list for RF2524
1679 * Supports: 2.4 GHz
1680 */
1681static const struct rf_channel rf_vals_bg_2524[] = {
1682 { 1, 0x00032020, 0x00000c9e, 0x00000101, 0x00000a1b },
1683 { 2, 0x00032020, 0x00000ca2, 0x00000101, 0x00000a1b },
1684 { 3, 0x00032020, 0x00000ca6, 0x00000101, 0x00000a1b },
1685 { 4, 0x00032020, 0x00000caa, 0x00000101, 0x00000a1b },
1686 { 5, 0x00032020, 0x00000cae, 0x00000101, 0x00000a1b },
1687 { 6, 0x00032020, 0x00000cb2, 0x00000101, 0x00000a1b },
1688 { 7, 0x00032020, 0x00000cb6, 0x00000101, 0x00000a1b },
1689 { 8, 0x00032020, 0x00000cba, 0x00000101, 0x00000a1b },
1690 { 9, 0x00032020, 0x00000cbe, 0x00000101, 0x00000a1b },
1691 { 10, 0x00032020, 0x00000d02, 0x00000101, 0x00000a1b },
1692 { 11, 0x00032020, 0x00000d06, 0x00000101, 0x00000a1b },
1693 { 12, 0x00032020, 0x00000d0a, 0x00000101, 0x00000a1b },
1694 { 13, 0x00032020, 0x00000d0e, 0x00000101, 0x00000a1b },
1695 { 14, 0x00032020, 0x00000d1a, 0x00000101, 0x00000a03 },
1696};
1697
1698/*
1699 * RF value list for RF2525
1700 * Supports: 2.4 GHz
1701 */
1702static const struct rf_channel rf_vals_bg_2525[] = {
1703 { 1, 0x00022020, 0x00080c9e, 0x00060111, 0x00000a1b },
1704 { 2, 0x00022020, 0x00080ca2, 0x00060111, 0x00000a1b },
1705 { 3, 0x00022020, 0x00080ca6, 0x00060111, 0x00000a1b },
1706 { 4, 0x00022020, 0x00080caa, 0x00060111, 0x00000a1b },
1707 { 5, 0x00022020, 0x00080cae, 0x00060111, 0x00000a1b },
1708 { 6, 0x00022020, 0x00080cb2, 0x00060111, 0x00000a1b },
1709 { 7, 0x00022020, 0x00080cb6, 0x00060111, 0x00000a1b },
1710 { 8, 0x00022020, 0x00080cba, 0x00060111, 0x00000a1b },
1711 { 9, 0x00022020, 0x00080cbe, 0x00060111, 0x00000a1b },
1712 { 10, 0x00022020, 0x00080d02, 0x00060111, 0x00000a1b },
1713 { 11, 0x00022020, 0x00080d06, 0x00060111, 0x00000a1b },
1714 { 12, 0x00022020, 0x00080d0a, 0x00060111, 0x00000a1b },
1715 { 13, 0x00022020, 0x00080d0e, 0x00060111, 0x00000a1b },
1716 { 14, 0x00022020, 0x00080d1a, 0x00060111, 0x00000a03 },
1717};
1718
1719/*
1720 * RF value list for RF2525e
1721 * Supports: 2.4 GHz
1722 */
1723static const struct rf_channel rf_vals_bg_2525e[] = {
1724 { 1, 0x00022010, 0x0000089a, 0x00060111, 0x00000e1b },
1725 { 2, 0x00022010, 0x0000089e, 0x00060111, 0x00000e07 },
1726 { 3, 0x00022010, 0x0000089e, 0x00060111, 0x00000e1b },
1727 { 4, 0x00022010, 0x000008a2, 0x00060111, 0x00000e07 },
1728 { 5, 0x00022010, 0x000008a2, 0x00060111, 0x00000e1b },
1729 { 6, 0x00022010, 0x000008a6, 0x00060111, 0x00000e07 },
1730 { 7, 0x00022010, 0x000008a6, 0x00060111, 0x00000e1b },
1731 { 8, 0x00022010, 0x000008aa, 0x00060111, 0x00000e07 },
1732 { 9, 0x00022010, 0x000008aa, 0x00060111, 0x00000e1b },
1733 { 10, 0x00022010, 0x000008ae, 0x00060111, 0x00000e07 },
1734 { 11, 0x00022010, 0x000008ae, 0x00060111, 0x00000e1b },
1735 { 12, 0x00022010, 0x000008b2, 0x00060111, 0x00000e07 },
1736 { 13, 0x00022010, 0x000008b2, 0x00060111, 0x00000e1b },
1737 { 14, 0x00022010, 0x000008b6, 0x00060111, 0x00000e23 },
1738};
1739
1740/*
1741 * RF value list for RF5222
1742 * Supports: 2.4 GHz & 5.2 GHz
1743 */
1744static const struct rf_channel rf_vals_5222[] = {
1745 { 1, 0x00022020, 0x00001136, 0x00000101, 0x00000a0b },
1746 { 2, 0x00022020, 0x0000113a, 0x00000101, 0x00000a0b },
1747 { 3, 0x00022020, 0x0000113e, 0x00000101, 0x00000a0b },
1748 { 4, 0x00022020, 0x00001182, 0x00000101, 0x00000a0b },
1749 { 5, 0x00022020, 0x00001186, 0x00000101, 0x00000a0b },
1750 { 6, 0x00022020, 0x0000118a, 0x00000101, 0x00000a0b },
1751 { 7, 0x00022020, 0x0000118e, 0x00000101, 0x00000a0b },
1752 { 8, 0x00022020, 0x00001192, 0x00000101, 0x00000a0b },
1753 { 9, 0x00022020, 0x00001196, 0x00000101, 0x00000a0b },
1754 { 10, 0x00022020, 0x0000119a, 0x00000101, 0x00000a0b },
1755 { 11, 0x00022020, 0x0000119e, 0x00000101, 0x00000a0b },
1756 { 12, 0x00022020, 0x000011a2, 0x00000101, 0x00000a0b },
1757 { 13, 0x00022020, 0x000011a6, 0x00000101, 0x00000a0b },
1758 { 14, 0x00022020, 0x000011ae, 0x00000101, 0x00000a1b },
1759
1760 /* 802.11 UNI / HyperLan 2 */
1761 { 36, 0x00022010, 0x00018896, 0x00000101, 0x00000a1f },
1762 { 40, 0x00022010, 0x0001889a, 0x00000101, 0x00000a1f },
1763 { 44, 0x00022010, 0x0001889e, 0x00000101, 0x00000a1f },
1764 { 48, 0x00022010, 0x000188a2, 0x00000101, 0x00000a1f },
1765 { 52, 0x00022010, 0x000188a6, 0x00000101, 0x00000a1f },
1766 { 66, 0x00022010, 0x000188aa, 0x00000101, 0x00000a1f },
1767 { 60, 0x00022010, 0x000188ae, 0x00000101, 0x00000a1f },
1768 { 64, 0x00022010, 0x000188b2, 0x00000101, 0x00000a1f },
1769
1770 /* 802.11 HyperLan 2 */
1771 { 100, 0x00022010, 0x00008802, 0x00000101, 0x00000a0f },
1772 { 104, 0x00022010, 0x00008806, 0x00000101, 0x00000a0f },
1773 { 108, 0x00022010, 0x0000880a, 0x00000101, 0x00000a0f },
1774 { 112, 0x00022010, 0x0000880e, 0x00000101, 0x00000a0f },
1775 { 116, 0x00022010, 0x00008812, 0x00000101, 0x00000a0f },
1776 { 120, 0x00022010, 0x00008816, 0x00000101, 0x00000a0f },
1777 { 124, 0x00022010, 0x0000881a, 0x00000101, 0x00000a0f },
1778 { 128, 0x00022010, 0x0000881e, 0x00000101, 0x00000a0f },
1779 { 132, 0x00022010, 0x00008822, 0x00000101, 0x00000a0f },
1780 { 136, 0x00022010, 0x00008826, 0x00000101, 0x00000a0f },
1781
1782 /* 802.11 UNII */
1783 { 140, 0x00022010, 0x0000882a, 0x00000101, 0x00000a0f },
1784 { 149, 0x00022020, 0x000090a6, 0x00000101, 0x00000a07 },
1785 { 153, 0x00022020, 0x000090ae, 0x00000101, 0x00000a07 },
1786 { 157, 0x00022020, 0x000090b6, 0x00000101, 0x00000a07 },
1787 { 161, 0x00022020, 0x000090be, 0x00000101, 0x00000a07 },
1788};
1789
1790static int rt2500usb_probe_hw_mode(struct rt2x00_dev *rt2x00dev)
1791{
1792 struct hw_mode_spec *spec = &rt2x00dev->spec;
1793 struct channel_info *info;
1794 char *tx_power;
1795 unsigned int i;
1796
1797 /*
1798 * Initialize all hw fields.
1799 */
1800 rt2x00dev->hw->flags =
1801 IEEE80211_HW_RX_INCLUDES_FCS |
1802 IEEE80211_HW_HOST_BROADCAST_PS_BUFFERING |
1803 IEEE80211_HW_SIGNAL_DBM |
1804 IEEE80211_HW_SUPPORTS_PS |
1805 IEEE80211_HW_PS_NULLFUNC_STACK;
1806
1807 rt2x00dev->hw->extra_tx_headroom = TXD_DESC_SIZE;
1808
1809 SET_IEEE80211_DEV(rt2x00dev->hw, rt2x00dev->dev);
1810 SET_IEEE80211_PERM_ADDR(rt2x00dev->hw,
1811 rt2x00_eeprom_addr(rt2x00dev,
1812 EEPROM_MAC_ADDR_0));
1813
1814 /*
1815 * Initialize hw_mode information.
1816 */
1817 spec->supported_bands = SUPPORT_BAND_2GHZ;
1818 spec->supported_rates = SUPPORT_RATE_CCK | SUPPORT_RATE_OFDM;
1819
1820 if (rt2x00_rf(&rt2x00dev->chip, RF2522)) {
1821 spec->num_channels = ARRAY_SIZE(rf_vals_bg_2522);
1822 spec->channels = rf_vals_bg_2522;
1823 } else if (rt2x00_rf(&rt2x00dev->chip, RF2523)) {
1824 spec->num_channels = ARRAY_SIZE(rf_vals_bg_2523);
1825 spec->channels = rf_vals_bg_2523;
1826 } else if (rt2x00_rf(&rt2x00dev->chip, RF2524)) {
1827 spec->num_channels = ARRAY_SIZE(rf_vals_bg_2524);
1828 spec->channels = rf_vals_bg_2524;
1829 } else if (rt2x00_rf(&rt2x00dev->chip, RF2525)) {
1830 spec->num_channels = ARRAY_SIZE(rf_vals_bg_2525);
1831 spec->channels = rf_vals_bg_2525;
1832 } else if (rt2x00_rf(&rt2x00dev->chip, RF2525E)) {
1833 spec->num_channels = ARRAY_SIZE(rf_vals_bg_2525e);
1834 spec->channels = rf_vals_bg_2525e;
1835 } else if (rt2x00_rf(&rt2x00dev->chip, RF5222)) {
1836 spec->supported_bands |= SUPPORT_BAND_5GHZ;
1837 spec->num_channels = ARRAY_SIZE(rf_vals_5222);
1838 spec->channels = rf_vals_5222;
1839 }
1840
1841 /*
1842 * Create channel information array
1843 */
1844 info = kzalloc(spec->num_channels * sizeof(*info), GFP_KERNEL);
1845 if (!info)
1846 return -ENOMEM;
1847
1848 spec->channels_info = info;
1849
1850 tx_power = rt2x00_eeprom_addr(rt2x00dev, EEPROM_TXPOWER_START);
1851 for (i = 0; i < 14; i++)
1852 info[i].tx_power1 = TXPOWER_FROM_DEV(tx_power[i]);
1853
1854 if (spec->num_channels > 14) {
1855 for (i = 14; i < spec->num_channels; i++)
1856 info[i].tx_power1 = DEFAULT_TXPOWER;
1857 }
1858
1859 return 0;
1860}
1861
1862static int rt2500usb_probe_hw(struct rt2x00_dev *rt2x00dev)
1863{
1864 int retval;
1865
1866 /*
1867 * Allocate eeprom data.
1868 */
1869 retval = rt2500usb_validate_eeprom(rt2x00dev);
1870 if (retval)
1871 return retval;
1872
1873 retval = rt2500usb_init_eeprom(rt2x00dev);
1874 if (retval)
1875 return retval;
1876
1877 /*
1878 * Initialize hw specifications.
1879 */
1880 retval = rt2500usb_probe_hw_mode(rt2x00dev);
1881 if (retval)
1882 return retval;
1883
1884 /*
1885 * This device requires the atim queue
1886 */
1887 __set_bit(DRIVER_REQUIRE_ATIM_QUEUE, &rt2x00dev->flags);
1888 __set_bit(DRIVER_REQUIRE_BEACON_GUARD, &rt2x00dev->flags);
1889 __set_bit(DRIVER_REQUIRE_SCHEDULED, &rt2x00dev->flags);
1890 if (!modparam_nohwcrypt) {
1891 __set_bit(CONFIG_SUPPORT_HW_CRYPTO, &rt2x00dev->flags);
1892 __set_bit(DRIVER_REQUIRE_COPY_IV, &rt2x00dev->flags);
1893 }
1894 __set_bit(CONFIG_DISABLE_LINK_TUNING, &rt2x00dev->flags);
1895
1896 /*
1897 * Set the rssi offset.
1898 */
1899 rt2x00dev->rssi_offset = DEFAULT_RSSI_OFFSET;
1900
1901 return 0;
1902}
1903
1904static const struct ieee80211_ops rt2500usb_mac80211_ops = {
1905 .tx = rt2x00mac_tx,
1906 .start = rt2x00mac_start,
1907 .stop = rt2x00mac_stop,
1908 .add_interface = rt2x00mac_add_interface,
1909 .remove_interface = rt2x00mac_remove_interface,
1910 .config = rt2x00mac_config,
1911 .config_interface = rt2x00mac_config_interface,
1912 .configure_filter = rt2x00mac_configure_filter,
1913 .set_key = rt2x00mac_set_key,
1914 .get_stats = rt2x00mac_get_stats,
1915 .bss_info_changed = rt2x00mac_bss_info_changed,
1916 .conf_tx = rt2x00mac_conf_tx,
1917 .get_tx_stats = rt2x00mac_get_tx_stats,
1918};
1919
1920static const struct rt2x00lib_ops rt2500usb_rt2x00_ops = {
1921 .probe_hw = rt2500usb_probe_hw,
1922 .initialize = rt2x00usb_initialize,
1923 .uninitialize = rt2x00usb_uninitialize,
1924 .clear_entry = rt2x00usb_clear_entry,
1925 .set_device_state = rt2500usb_set_device_state,
1926 .rfkill_poll = rt2500usb_rfkill_poll,
1927 .link_stats = rt2500usb_link_stats,
1928 .reset_tuner = rt2500usb_reset_tuner,
1929 .link_tuner = rt2500usb_link_tuner,
1930 .write_tx_desc = rt2500usb_write_tx_desc,
1931 .write_tx_data = rt2x00usb_write_tx_data,
1932 .write_beacon = rt2500usb_write_beacon,
1933 .get_tx_data_len = rt2500usb_get_tx_data_len,
1934 .kick_tx_queue = rt2500usb_kick_tx_queue,
1935 .kill_tx_queue = rt2x00usb_kill_tx_queue,
1936 .fill_rxdone = rt2500usb_fill_rxdone,
1937 .config_shared_key = rt2500usb_config_key,
1938 .config_pairwise_key = rt2500usb_config_key,
1939 .config_filter = rt2500usb_config_filter,
1940 .config_intf = rt2500usb_config_intf,
1941 .config_erp = rt2500usb_config_erp,
1942 .config_ant = rt2500usb_config_ant,
1943 .config = rt2500usb_config,
1944};
1945
1946static const struct data_queue_desc rt2500usb_queue_rx = {
1947 .entry_num = RX_ENTRIES,
1948 .data_size = DATA_FRAME_SIZE,
1949 .desc_size = RXD_DESC_SIZE,
1950 .priv_size = sizeof(struct queue_entry_priv_usb),
1951};
1952
1953static const struct data_queue_desc rt2500usb_queue_tx = {
1954 .entry_num = TX_ENTRIES,
1955 .data_size = DATA_FRAME_SIZE,
1956 .desc_size = TXD_DESC_SIZE,
1957 .priv_size = sizeof(struct queue_entry_priv_usb),
1958};
1959
1960static const struct data_queue_desc rt2500usb_queue_bcn = {
1961 .entry_num = BEACON_ENTRIES,
1962 .data_size = MGMT_FRAME_SIZE,
1963 .desc_size = TXD_DESC_SIZE,
1964 .priv_size = sizeof(struct queue_entry_priv_usb_bcn),
1965};
1966
1967static const struct data_queue_desc rt2500usb_queue_atim = {
1968 .entry_num = ATIM_ENTRIES,
1969 .data_size = DATA_FRAME_SIZE,
1970 .desc_size = TXD_DESC_SIZE,
1971 .priv_size = sizeof(struct queue_entry_priv_usb),
1972};
1973
1974static const struct rt2x00_ops rt2500usb_ops = {
1975 .name = KBUILD_MODNAME,
1976 .max_sta_intf = 1,
1977 .max_ap_intf = 1,
1978 .eeprom_size = EEPROM_SIZE,
1979 .rf_size = RF_SIZE,
1980 .tx_queues = NUM_TX_QUEUES,
1981 .rx = &rt2500usb_queue_rx,
1982 .tx = &rt2500usb_queue_tx,
1983 .bcn = &rt2500usb_queue_bcn,
1984 .atim = &rt2500usb_queue_atim,
1985 .lib = &rt2500usb_rt2x00_ops,
1986 .hw = &rt2500usb_mac80211_ops,
1987#ifdef CONFIG_RT2X00_LIB_DEBUGFS
1988 .debugfs = &rt2500usb_rt2x00debug,
1989#endif /* CONFIG_RT2X00_LIB_DEBUGFS */
1990};
1991
1992/*
1993 * rt2500usb module information.
1994 */
1995static struct usb_device_id rt2500usb_device_table[] = {
1996 /* ASUS */
1997 { USB_DEVICE(0x0b05, 0x1706), USB_DEVICE_DATA(&rt2500usb_ops) },
1998 { USB_DEVICE(0x0b05, 0x1707), USB_DEVICE_DATA(&rt2500usb_ops) },
1999 /* Belkin */
2000 { USB_DEVICE(0x050d, 0x7050), USB_DEVICE_DATA(&rt2500usb_ops) },
2001 { USB_DEVICE(0x050d, 0x7051), USB_DEVICE_DATA(&rt2500usb_ops) },
2002 { USB_DEVICE(0x050d, 0x705a), USB_DEVICE_DATA(&rt2500usb_ops) },
2003 /* Cisco Systems */
2004 { USB_DEVICE(0x13b1, 0x000d), USB_DEVICE_DATA(&rt2500usb_ops) },
2005 { USB_DEVICE(0x13b1, 0x0011), USB_DEVICE_DATA(&rt2500usb_ops) },
2006 { USB_DEVICE(0x13b1, 0x001a), USB_DEVICE_DATA(&rt2500usb_ops) },
2007 /* CNet */
2008 { USB_DEVICE(0x1371, 0x9022), USB_DEVICE_DATA(&rt2500usb_ops) },
2009 /* Conceptronic */
2010 { USB_DEVICE(0x14b2, 0x3c02), USB_DEVICE_DATA(&rt2500usb_ops) },
2011 /* D-LINK */
2012 { USB_DEVICE(0x2001, 0x3c00), USB_DEVICE_DATA(&rt2500usb_ops) },
2013 /* Gigabyte */
2014 { USB_DEVICE(0x1044, 0x8001), USB_DEVICE_DATA(&rt2500usb_ops) },
2015 { USB_DEVICE(0x1044, 0x8007), USB_DEVICE_DATA(&rt2500usb_ops) },
2016 /* Hercules */
2017 { USB_DEVICE(0x06f8, 0xe000), USB_DEVICE_DATA(&rt2500usb_ops) },
2018 /* Melco */
2019 { USB_DEVICE(0x0411, 0x005e), USB_DEVICE_DATA(&rt2500usb_ops) },
2020 { USB_DEVICE(0x0411, 0x0066), USB_DEVICE_DATA(&rt2500usb_ops) },
2021 { USB_DEVICE(0x0411, 0x0067), USB_DEVICE_DATA(&rt2500usb_ops) },
2022 { USB_DEVICE(0x0411, 0x008b), USB_DEVICE_DATA(&rt2500usb_ops) },
2023 { USB_DEVICE(0x0411, 0x0097), USB_DEVICE_DATA(&rt2500usb_ops) },
2024 /* MSI */
2025 { USB_DEVICE(0x0db0, 0x6861), USB_DEVICE_DATA(&rt2500usb_ops) },
2026 { USB_DEVICE(0x0db0, 0x6865), USB_DEVICE_DATA(&rt2500usb_ops) },
2027 { USB_DEVICE(0x0db0, 0x6869), USB_DEVICE_DATA(&rt2500usb_ops) },
2028 /* Ralink */
2029 { USB_DEVICE(0x148f, 0x1706), USB_DEVICE_DATA(&rt2500usb_ops) },
2030 { USB_DEVICE(0x148f, 0x2570), USB_DEVICE_DATA(&rt2500usb_ops) },
2031 { USB_DEVICE(0x148f, 0x2573), USB_DEVICE_DATA(&rt2500usb_ops) },
2032 { USB_DEVICE(0x148f, 0x9020), USB_DEVICE_DATA(&rt2500usb_ops) },
2033 /* Sagem */
2034 { USB_DEVICE(0x079b, 0x004b), USB_DEVICE_DATA(&rt2500usb_ops) },
2035 /* Siemens */
2036 { USB_DEVICE(0x0681, 0x3c06), USB_DEVICE_DATA(&rt2500usb_ops) },
2037 /* SMC */
2038 { USB_DEVICE(0x0707, 0xee13), USB_DEVICE_DATA(&rt2500usb_ops) },
2039 /* Spairon */
2040 { USB_DEVICE(0x114b, 0x0110), USB_DEVICE_DATA(&rt2500usb_ops) },
2041 /* SURECOM */
2042 { USB_DEVICE(0x0769, 0x11f3), USB_DEVICE_DATA(&rt2500usb_ops) },
2043 /* Trust */
2044 { USB_DEVICE(0x0eb0, 0x9020), USB_DEVICE_DATA(&rt2500usb_ops) },
2045 /* VTech */
2046 { USB_DEVICE(0x0f88, 0x3012), USB_DEVICE_DATA(&rt2500usb_ops) },
2047 /* Zinwell */
2048 { USB_DEVICE(0x5a57, 0x0260), USB_DEVICE_DATA(&rt2500usb_ops) },
2049 { 0, }
2050};
2051
2052MODULE_AUTHOR(DRV_PROJECT);
2053MODULE_VERSION(DRV_VERSION);
2054MODULE_DESCRIPTION("Ralink RT2500 USB Wireless LAN driver.");
2055MODULE_SUPPORTED_DEVICE("Ralink RT2570 USB chipset based cards");
2056MODULE_DEVICE_TABLE(usb, rt2500usb_device_table);
2057MODULE_LICENSE("GPL");
2058
2059static struct usb_driver rt2500usb_driver = {
2060 .name = KBUILD_MODNAME,
2061 .id_table = rt2500usb_device_table,
2062 .probe = rt2x00usb_probe,
2063 .disconnect = rt2x00usb_disconnect,
2064 .suspend = rt2x00usb_suspend,
2065 .resume = rt2x00usb_resume,
2066};
2067
2068static int __init rt2500usb_init(void)
2069{
2070 return usb_register(&rt2500usb_driver);
2071}
2072
2073static void __exit rt2500usb_exit(void)
2074{
2075 usb_deregister(&rt2500usb_driver);
2076}
2077
2078module_init(rt2500usb_init);
2079module_exit(rt2500usb_exit);