tjh.dev / kernel
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kernel / drivers / net / tokenring / 3c359.c
at v2.6.30-rc6 1847 lines 60 kB view raw
1/* 2 * 3c359.c (c) 2000 Mike Phillips (mikep@linuxtr.net) All Rights Reserved 3 * 4 * Linux driver for 3Com 3c359 Tokenlink Velocity XL PCI NIC 5 * 6 * Base Driver Olympic: 7 * Written 1999 Peter De Schrijver & Mike Phillips 8 * 9 * This software may be used and distributed according to the terms 10 * of the GNU General Public License, incorporated herein by reference. 11 * 12 * 7/17/00 - Clean up, version number 0.9.0. Ready to release to the world. 13 * 14 * 2/16/01 - Port up to kernel 2.4.2 ready for submission into the kernel. 15 * 3/05/01 - Last clean up stuff before submission. 16 * 2/15/01 - Finally, update to new pci api. 17 * 18 * To Do: 19 */ 20 21/* 22 * Technical Card Details 23 * 24 * All access to data is done with 16/8 bit transfers. The transfer 25 * method really sucks. You can only read or write one location at a time. 26 * 27 * Also, the microcode for the card must be uploaded if the card does not have 28 * the flashrom on board. This is a 28K bloat in the driver when compiled 29 * as a module. 30 * 31 * Rx is very simple, status into a ring of descriptors, dma data transfer, 32 * interrupts to tell us when a packet is received. 33 * 34 * Tx is a little more interesting. Similar scenario, descriptor and dma data 35 * transfers, but we don't have to interrupt the card to tell it another packet 36 * is ready for transmission, we are just doing simple memory writes, not io or mmio 37 * writes. The card can be set up to simply poll on the next 38 * descriptor pointer and when this value is non-zero will automatically download 39 * the next packet. The card then interrupts us when the packet is done. 40 * 41 */ 42 43#define XL_DEBUG 0 44 45#include <linux/jiffies.h> 46#include <linux/module.h> 47#include <linux/kernel.h> 48#include <linux/errno.h> 49#include <linux/timer.h> 50#include <linux/in.h> 51#include <linux/ioport.h> 52#include <linux/string.h> 53#include <linux/proc_fs.h> 54#include <linux/ptrace.h> 55#include <linux/skbuff.h> 56#include <linux/interrupt.h> 57#include <linux/delay.h> 58#include <linux/netdevice.h> 59#include <linux/trdevice.h> 60#include <linux/stddef.h> 61#include <linux/init.h> 62#include <linux/pci.h> 63#include <linux/spinlock.h> 64#include <linux/bitops.h> 65#include <linux/firmware.h> 66 67#include <net/checksum.h> 68 69#include <asm/io.h> 70#include <asm/system.h> 71 72#include "3c359.h" 73 74static char version[] __devinitdata = 75"3c359.c v1.2.0 2/17/01 - Mike Phillips (mikep@linuxtr.net)" ; 76 77#define FW_NAME "3com/3C359.bin" 78MODULE_AUTHOR("Mike Phillips <mikep@linuxtr.net>") ; 79MODULE_DESCRIPTION("3Com 3C359 Velocity XL Token Ring Adapter Driver \n") ; 80MODULE_FIRMWARE(FW_NAME); 81 82/* Module paramters */ 83 84/* Ring Speed 0,4,16 85 * 0 = Autosense 86 * 4,16 = Selected speed only, no autosense 87 * This allows the card to be the first on the ring 88 * and become the active monitor. 89 * 90 * WARNING: Some hubs will allow you to insert 91 * at the wrong speed. 92 * 93 * The adapter will _not_ fail to open if there are no 94 * active monitors on the ring, it will simply open up in 95 * its last known ringspeed if no ringspeed is specified. 96 */ 97 98static int ringspeed[XL_MAX_ADAPTERS] = {0,} ; 99 100module_param_array(ringspeed, int, NULL, 0); 101MODULE_PARM_DESC(ringspeed,"3c359: Ringspeed selection - 4,16 or 0") ; 102 103/* Packet buffer size */ 104 105static int pkt_buf_sz[XL_MAX_ADAPTERS] = {0,} ; 106 107module_param_array(pkt_buf_sz, int, NULL, 0) ; 108MODULE_PARM_DESC(pkt_buf_sz,"3c359: Initial buffer size") ; 109/* Message Level */ 110 111static int message_level[XL_MAX_ADAPTERS] = {0,} ; 112 113module_param_array(message_level, int, NULL, 0) ; 114MODULE_PARM_DESC(message_level, "3c359: Level of reported messages") ; 115/* 116 * This is a real nasty way of doing this, but otherwise you 117 * will be stuck with 1555 lines of hex #'s in the code. 118 */ 119 120static struct pci_device_id xl_pci_tbl[] = 121{ 122 {PCI_VENDOR_ID_3COM,PCI_DEVICE_ID_3COM_3C359, PCI_ANY_ID, PCI_ANY_ID, }, 123 { } /* terminate list */ 124}; 125MODULE_DEVICE_TABLE(pci,xl_pci_tbl) ; 126 127static int xl_init(struct net_device *dev); 128static int xl_open(struct net_device *dev); 129static int xl_open_hw(struct net_device *dev) ; 130static int xl_hw_reset(struct net_device *dev); 131static int xl_xmit(struct sk_buff *skb, struct net_device *dev); 132static void xl_dn_comp(struct net_device *dev); 133static int xl_close(struct net_device *dev); 134static void xl_set_rx_mode(struct net_device *dev); 135static irqreturn_t xl_interrupt(int irq, void *dev_id); 136static int xl_set_mac_address(struct net_device *dev, void *addr) ; 137static void xl_arb_cmd(struct net_device *dev); 138static void xl_asb_cmd(struct net_device *dev) ; 139static void xl_srb_cmd(struct net_device *dev, int srb_cmd) ; 140static void xl_wait_misr_flags(struct net_device *dev) ; 141static int xl_change_mtu(struct net_device *dev, int mtu); 142static void xl_srb_bh(struct net_device *dev) ; 143static void xl_asb_bh(struct net_device *dev) ; 144static void xl_reset(struct net_device *dev) ; 145static void xl_freemem(struct net_device *dev) ; 146 147 148/* EEProm Access Functions */ 149static u16 xl_ee_read(struct net_device *dev, int ee_addr) ; 150static void xl_ee_write(struct net_device *dev, int ee_addr, u16 ee_value) ; 151 152/* Debugging functions */ 153#if XL_DEBUG 154static void print_tx_state(struct net_device *dev) ; 155static void print_rx_state(struct net_device *dev) ; 156 157static void print_tx_state(struct net_device *dev) 158{ 159 160 struct xl_private *xl_priv = netdev_priv(dev); 161 struct xl_tx_desc *txd ; 162 u8 __iomem *xl_mmio = xl_priv->xl_mmio ; 163 int i ; 164 165 printk("tx_ring_head: %d, tx_ring_tail: %d, free_ent: %d \n",xl_priv->tx_ring_head, 166 xl_priv->tx_ring_tail, xl_priv->free_ring_entries) ; 167 printk("Ring , Address , FSH , DnNextPtr, Buffer, Buffer_Len \n"); 168 for (i = 0; i < 16; i++) { 169 txd = &(xl_priv->xl_tx_ring[i]) ; 170 printk("%d, %08lx, %08x, %08x, %08x, %08x \n", i, virt_to_bus(txd), 171 txd->framestartheader, txd->dnnextptr, txd->buffer, txd->buffer_length ) ; 172 } 173 174 printk("DNLISTPTR = %04x \n", readl(xl_mmio + MMIO_DNLISTPTR) ); 175 176 printk("DmaCtl = %04x \n", readl(xl_mmio + MMIO_DMA_CTRL) ); 177 printk("Queue status = %0x \n",netif_running(dev) ) ; 178} 179 180static void print_rx_state(struct net_device *dev) 181{ 182 183 struct xl_private *xl_priv = netdev_priv(dev); 184 struct xl_rx_desc *rxd ; 185 u8 __iomem *xl_mmio = xl_priv->xl_mmio ; 186 int i ; 187 188 printk("rx_ring_tail: %d \n", xl_priv->rx_ring_tail) ; 189 printk("Ring , Address , FrameState , UPNextPtr, FragAddr, Frag_Len \n"); 190 for (i = 0; i < 16; i++) { 191 /* rxd = (struct xl_rx_desc *)xl_priv->rx_ring_dma_addr + (i * sizeof(struct xl_rx_desc)) ; */ 192 rxd = &(xl_priv->xl_rx_ring[i]) ; 193 printk("%d, %08lx, %08x, %08x, %08x, %08x \n", i, virt_to_bus(rxd), 194 rxd->framestatus, rxd->upnextptr, rxd->upfragaddr, rxd->upfraglen ) ; 195 } 196 197 printk("UPLISTPTR = %04x \n", readl(xl_mmio + MMIO_UPLISTPTR) ); 198 199 printk("DmaCtl = %04x \n", readl(xl_mmio + MMIO_DMA_CTRL) ); 200 printk("Queue status = %0x \n",netif_running(dev) ) ; 201} 202#endif 203 204/* 205 * Read values from the on-board EEProm. This looks very strange 206 * but you have to wait for the EEProm to get/set the value before 207 * passing/getting the next value from the nic. As with all requests 208 * on this nic it has to be done in two stages, a) tell the nic which 209 * memory address you want to access and b) pass/get the value from the nic. 210 * With the EEProm, you have to wait before and inbetween access a) and b). 211 * As this is only read at initialization time and the wait period is very 212 * small we shouldn't have to worry about scheduling issues. 213 */ 214 215static u16 xl_ee_read(struct net_device *dev, int ee_addr) 216{ 217 struct xl_private *xl_priv = netdev_priv(dev); 218 u8 __iomem *xl_mmio = xl_priv->xl_mmio ; 219 220 /* Wait for EEProm to not be busy */ 221 writel(IO_WORD_READ | EECONTROL, xl_mmio + MMIO_MAC_ACCESS_CMD) ; 222 while ( readw(xl_mmio + MMIO_MACDATA) & EEBUSY ) ; 223 224 /* Tell EEProm what we want to do and where */ 225 writel(IO_WORD_WRITE | EECONTROL, xl_mmio + MMIO_MAC_ACCESS_CMD) ; 226 writew(EEREAD + ee_addr, xl_mmio + MMIO_MACDATA) ; 227 228 /* Wait for EEProm to not be busy */ 229 writel(IO_WORD_READ | EECONTROL, xl_mmio + MMIO_MAC_ACCESS_CMD) ; 230 while ( readw(xl_mmio + MMIO_MACDATA) & EEBUSY ) ; 231 232 /* Tell EEProm what we want to do and where */ 233 writel(IO_WORD_WRITE | EECONTROL , xl_mmio + MMIO_MAC_ACCESS_CMD) ; 234 writew(EEREAD + ee_addr, xl_mmio + MMIO_MACDATA) ; 235 236 /* Finally read the value from the EEProm */ 237 writel(IO_WORD_READ | EEDATA , xl_mmio + MMIO_MAC_ACCESS_CMD) ; 238 return readw(xl_mmio + MMIO_MACDATA) ; 239} 240 241/* 242 * Write values to the onboard eeprom. As with eeprom read you need to 243 * set which location to write, wait, value to write, wait, with the 244 * added twist of having to enable eeprom writes as well. 245 */ 246 247static void xl_ee_write(struct net_device *dev, int ee_addr, u16 ee_value) 248{ 249 struct xl_private *xl_priv = netdev_priv(dev); 250 u8 __iomem *xl_mmio = xl_priv->xl_mmio ; 251 252 /* Wait for EEProm to not be busy */ 253 writel(IO_WORD_READ | EECONTROL, xl_mmio + MMIO_MAC_ACCESS_CMD) ; 254 while ( readw(xl_mmio + MMIO_MACDATA) & EEBUSY ) ; 255 256 /* Enable write/erase */ 257 writel(IO_WORD_WRITE | EECONTROL, xl_mmio + MMIO_MAC_ACCESS_CMD) ; 258 writew(EE_ENABLE_WRITE, xl_mmio + MMIO_MACDATA) ; 259 260 /* Wait for EEProm to not be busy */ 261 writel(IO_WORD_READ | EECONTROL, xl_mmio + MMIO_MAC_ACCESS_CMD) ; 262 while ( readw(xl_mmio + MMIO_MACDATA) & EEBUSY ) ; 263 264 /* Put the value we want to write into EEDATA */ 265 writel(IO_WORD_WRITE | EEDATA, xl_mmio + MMIO_MAC_ACCESS_CMD) ; 266 writew(ee_value, xl_mmio + MMIO_MACDATA) ; 267 268 /* Tell EEProm to write eevalue into ee_addr */ 269 writel(IO_WORD_WRITE | EECONTROL, xl_mmio + MMIO_MAC_ACCESS_CMD) ; 270 writew(EEWRITE + ee_addr, xl_mmio + MMIO_MACDATA) ; 271 272 /* Wait for EEProm to not be busy, to ensure write gets done */ 273 writel(IO_WORD_READ | EECONTROL, xl_mmio + MMIO_MAC_ACCESS_CMD) ; 274 while ( readw(xl_mmio + MMIO_MACDATA) & EEBUSY ) ; 275 276 return ; 277} 278 279static const struct net_device_ops xl_netdev_ops = { 280 .ndo_open = xl_open, 281 .ndo_stop = xl_close, 282 .ndo_start_xmit = xl_xmit, 283 .ndo_change_mtu = xl_change_mtu, 284 .ndo_set_multicast_list = xl_set_rx_mode, 285 .ndo_set_mac_address = xl_set_mac_address, 286}; 287 288static int __devinit xl_probe(struct pci_dev *pdev, 289 const struct pci_device_id *ent) 290{ 291 struct net_device *dev ; 292 struct xl_private *xl_priv ; 293 static int card_no = -1 ; 294 int i ; 295 296 card_no++ ; 297 298 if (pci_enable_device(pdev)) { 299 return -ENODEV ; 300 } 301 302 pci_set_master(pdev); 303 304 if ((i = pci_request_regions(pdev,"3c359"))) { 305 return i ; 306 } ; 307 308 /* 309 * Allowing init_trdev to allocate the private data will align 310 * xl_private on a 32 bytes boundary which we need for the rx/tx 311 * descriptors 312 */ 313 314 dev = alloc_trdev(sizeof(struct xl_private)) ; 315 if (!dev) { 316 pci_release_regions(pdev) ; 317 return -ENOMEM ; 318 } 319 xl_priv = netdev_priv(dev); 320 321#if XL_DEBUG 322 printk("pci_device: %p, dev:%p, dev->priv: %p, ba[0]: %10x, ba[1]:%10x\n", 323 pdev, dev, netdev_priv(dev), (unsigned int)pdev->resource[0].start, (unsigned int)pdev->resource[1].start); 324#endif 325 326 dev->irq=pdev->irq; 327 dev->base_addr=pci_resource_start(pdev,0) ; 328 xl_priv->xl_card_name = pci_name(pdev); 329 xl_priv->xl_mmio=ioremap(pci_resource_start(pdev,1), XL_IO_SPACE); 330 xl_priv->pdev = pdev ; 331 332 if ((pkt_buf_sz[card_no] < 100) || (pkt_buf_sz[card_no] > 18000) ) 333 xl_priv->pkt_buf_sz = PKT_BUF_SZ ; 334 else 335 xl_priv->pkt_buf_sz = pkt_buf_sz[card_no] ; 336 337 dev->mtu = xl_priv->pkt_buf_sz - TR_HLEN ; 338 xl_priv->xl_ring_speed = ringspeed[card_no] ; 339 xl_priv->xl_message_level = message_level[card_no] ; 340 xl_priv->xl_functional_addr[0] = xl_priv->xl_functional_addr[1] = xl_priv->xl_functional_addr[2] = xl_priv->xl_functional_addr[3] = 0 ; 341 xl_priv->xl_copy_all_options = 0 ; 342 343 if((i = xl_init(dev))) { 344 iounmap(xl_priv->xl_mmio) ; 345 free_netdev(dev) ; 346 pci_release_regions(pdev) ; 347 return i ; 348 } 349 350 dev->netdev_ops = &xl_netdev_ops; 351 SET_NETDEV_DEV(dev, &pdev->dev); 352 353 pci_set_drvdata(pdev,dev) ; 354 if ((i = register_netdev(dev))) { 355 printk(KERN_ERR "3C359, register netdev failed\n") ; 356 pci_set_drvdata(pdev,NULL) ; 357 iounmap(xl_priv->xl_mmio) ; 358 free_netdev(dev) ; 359 pci_release_regions(pdev) ; 360 return i ; 361 } 362 363 printk(KERN_INFO "3C359: %s registered as: %s\n",xl_priv->xl_card_name,dev->name) ; 364 365 return 0; 366} 367 368static int xl_init_firmware(struct xl_private *xl_priv) 369{ 370 int err; 371 372 err = request_firmware(&xl_priv->fw, FW_NAME, &xl_priv->pdev->dev); 373 if (err) { 374 printk(KERN_ERR "Failed to load firmware \"%s\"\n", FW_NAME); 375 return err; 376 } 377 378 if (xl_priv->fw->size < 16) { 379 printk(KERN_ERR "Bogus length %zu in \"%s\"\n", 380 xl_priv->fw->size, FW_NAME); 381 release_firmware(xl_priv->fw); 382 err = -EINVAL; 383 } 384 385 return err; 386} 387 388static int __devinit xl_init(struct net_device *dev) 389{ 390 struct xl_private *xl_priv = netdev_priv(dev); 391 int err; 392 393 printk(KERN_INFO "%s \n", version); 394 printk(KERN_INFO "%s: I/O at %hx, MMIO at %p, using irq %d\n", 395 xl_priv->xl_card_name, (unsigned int)dev->base_addr ,xl_priv->xl_mmio, dev->irq); 396 397 spin_lock_init(&xl_priv->xl_lock) ; 398 399 err = xl_init_firmware(xl_priv); 400 if (err == 0) 401 err = xl_hw_reset(dev); 402 403 return err; 404} 405 406 407/* 408 * Hardware reset. This needs to be a separate entity as we need to reset the card 409 * when we change the EEProm settings. 410 */ 411 412static int xl_hw_reset(struct net_device *dev) 413{ 414 struct xl_private *xl_priv = netdev_priv(dev); 415 u8 __iomem *xl_mmio = xl_priv->xl_mmio ; 416 unsigned long t ; 417 u16 i ; 418 u16 result_16 ; 419 u8 result_8 ; 420 u16 start ; 421 int j ; 422 423 if (xl_priv->fw == NULL) 424 return -EINVAL; 425 426 /* 427 * Reset the card. If the card has got the microcode on board, we have 428 * missed the initialization interrupt, so we must always do this. 429 */ 430 431 writew( GLOBAL_RESET, xl_mmio + MMIO_COMMAND ) ; 432 433 /* 434 * Must wait for cmdInProgress bit (12) to clear before continuing with 435 * card configuration. 436 */ 437 438 t=jiffies; 439 while (readw(xl_mmio + MMIO_INTSTATUS) & INTSTAT_CMD_IN_PROGRESS) { 440 schedule(); 441 if (time_after(jiffies, t + 40 * HZ)) { 442 printk(KERN_ERR "%s: 3COM 3C359 Velocity XL card not responding to global reset.\n", dev->name); 443 return -ENODEV; 444 } 445 } 446 447 /* 448 * Enable pmbar by setting bit in CPAttention 449 */ 450 451 writel( (IO_BYTE_READ | CPATTENTION), xl_mmio + MMIO_MAC_ACCESS_CMD) ; 452 result_8 = readb(xl_mmio + MMIO_MACDATA) ; 453 result_8 = result_8 | CPA_PMBARVIS ; 454 writel( (IO_BYTE_WRITE | CPATTENTION), xl_mmio + MMIO_MAC_ACCESS_CMD) ; 455 writeb(result_8, xl_mmio + MMIO_MACDATA) ; 456 457 /* 458 * Read cpHold bit in pmbar, if cleared we have got Flashrom on board. 459 * If not, we need to upload the microcode to the card 460 */ 461 462 writel( (IO_WORD_READ | PMBAR),xl_mmio + MMIO_MAC_ACCESS_CMD); 463 464#if XL_DEBUG 465 printk(KERN_INFO "Read from PMBAR = %04x \n", readw(xl_mmio + MMIO_MACDATA)) ; 466#endif 467 468 if ( readw( (xl_mmio + MMIO_MACDATA)) & PMB_CPHOLD ) { 469 470 /* Set PmBar, privateMemoryBase bits (8:2) to 0 */ 471 472 writel( (IO_WORD_READ | PMBAR),xl_mmio + MMIO_MAC_ACCESS_CMD); 473 result_16 = readw(xl_mmio + MMIO_MACDATA) ; 474 result_16 = result_16 & ~((0x7F) << 2) ; 475 writel( (IO_WORD_WRITE | PMBAR), xl_mmio + MMIO_MAC_ACCESS_CMD) ; 476 writew(result_16,xl_mmio + MMIO_MACDATA) ; 477 478 /* Set CPAttention, memWrEn bit */ 479 480 writel( (IO_BYTE_READ | CPATTENTION), xl_mmio + MMIO_MAC_ACCESS_CMD) ; 481 result_8 = readb(xl_mmio + MMIO_MACDATA) ; 482 result_8 = result_8 | CPA_MEMWREN ; 483 writel( (IO_BYTE_WRITE | CPATTENTION), xl_mmio + MMIO_MAC_ACCESS_CMD) ; 484 writeb(result_8, xl_mmio + MMIO_MACDATA) ; 485 486 /* 487 * Now to write the microcode into the shared ram 488 * The microcode must finish at position 0xFFFF, 489 * so we must subtract to get the start position for the code 490 * 491 * Looks strange but ensures compiler only uses 492 * 16 bit unsigned int 493 */ 494 start = (0xFFFF - (xl_priv->fw->size) + 1) ; 495 496 printk(KERN_INFO "3C359: Uploading Microcode: "); 497 498 for (i = start, j = 0; j < xl_priv->fw->size; i++, j++) { 499 writel(MEM_BYTE_WRITE | 0XD0000 | i, 500 xl_mmio + MMIO_MAC_ACCESS_CMD); 501 writeb(xl_priv->fw->data[j], xl_mmio + MMIO_MACDATA); 502 if (j % 1024 == 0) 503 printk("."); 504 } 505 printk("\n") ; 506 507 for (i = 0; i < 16; i++) { 508 writel((MEM_BYTE_WRITE | 0xDFFF0) + i, 509 xl_mmio + MMIO_MAC_ACCESS_CMD); 510 writeb(xl_priv->fw->data[xl_priv->fw->size - 16 + i], 511 xl_mmio + MMIO_MACDATA); 512 } 513 514 /* 515 * Have to write the start address of the upload to FFF4, but 516 * the address must be >> 4. You do not want to know how long 517 * it took me to discover this. 518 */ 519 520 writel(MEM_WORD_WRITE | 0xDFFF4, xl_mmio + MMIO_MAC_ACCESS_CMD) ; 521 writew(start >> 4, xl_mmio + MMIO_MACDATA); 522 523 /* Clear the CPAttention, memWrEn Bit */ 524 525 writel( (IO_BYTE_READ | CPATTENTION), xl_mmio + MMIO_MAC_ACCESS_CMD) ; 526 result_8 = readb(xl_mmio + MMIO_MACDATA) ; 527 result_8 = result_8 & ~CPA_MEMWREN ; 528 writel( (IO_BYTE_WRITE | CPATTENTION), xl_mmio + MMIO_MAC_ACCESS_CMD) ; 529 writeb(result_8, xl_mmio + MMIO_MACDATA) ; 530 531 /* Clear the cpHold bit in pmbar */ 532 533 writel( (IO_WORD_READ | PMBAR),xl_mmio + MMIO_MAC_ACCESS_CMD); 534 result_16 = readw(xl_mmio + MMIO_MACDATA) ; 535 result_16 = result_16 & ~PMB_CPHOLD ; 536 writel( (IO_WORD_WRITE | PMBAR), xl_mmio + MMIO_MAC_ACCESS_CMD) ; 537 writew(result_16,xl_mmio + MMIO_MACDATA) ; 538 539 540 } /* If microcode upload required */ 541 542 /* 543 * The card should now go though a self test procedure and get itself ready 544 * to be opened, we must wait for an srb response with the initialization 545 * information. 546 */ 547 548#if XL_DEBUG 549 printk(KERN_INFO "%s: Microcode uploaded, must wait for the self test to complete\n", dev->name); 550#endif 551 552 writew(SETINDENABLE | 0xFFF, xl_mmio + MMIO_COMMAND) ; 553 554 t=jiffies; 555 while ( !(readw(xl_mmio + MMIO_INTSTATUS_AUTO) & INTSTAT_SRB) ) { 556 schedule(); 557 if (time_after(jiffies, t + 15 * HZ)) { 558 printk(KERN_ERR "3COM 3C359 Velocity XL card not responding.\n"); 559 return -ENODEV; 560 } 561 } 562 563 /* 564 * Write the RxBufArea with D000, RxEarlyThresh, TxStartThresh, 565 * DnPriReqThresh, read the tech docs if you want to know what 566 * values they need to be. 567 */ 568 569 writel(MMIO_WORD_WRITE | RXBUFAREA, xl_mmio + MMIO_MAC_ACCESS_CMD) ; 570 writew(0xD000, xl_mmio + MMIO_MACDATA) ; 571 572 writel(MMIO_WORD_WRITE | RXEARLYTHRESH, xl_mmio + MMIO_MAC_ACCESS_CMD) ; 573 writew(0X0020, xl_mmio + MMIO_MACDATA) ; 574 575 writew( SETTXSTARTTHRESH | 0x40 , xl_mmio + MMIO_COMMAND) ; 576 577 writeb(0x04, xl_mmio + MMIO_DNBURSTTHRESH) ; 578 writeb(0x04, xl_mmio + DNPRIREQTHRESH) ; 579 580 /* 581 * Read WRBR to provide the location of the srb block, have to use byte reads not word reads. 582 * Tech docs have this wrong !!!! 583 */ 584 585 writel(MMIO_BYTE_READ | WRBR, xl_mmio + MMIO_MAC_ACCESS_CMD) ; 586 xl_priv->srb = readb(xl_mmio + MMIO_MACDATA) << 8 ; 587 writel( (MMIO_BYTE_READ | WRBR) + 1, xl_mmio + MMIO_MAC_ACCESS_CMD) ; 588 xl_priv->srb = xl_priv->srb | readb(xl_mmio + MMIO_MACDATA) ; 589 590#if XL_DEBUG 591 writel(IO_WORD_READ | SWITCHSETTINGS, xl_mmio + MMIO_MAC_ACCESS_CMD) ; 592 if ( readw(xl_mmio + MMIO_MACDATA) & 2) { 593 printk(KERN_INFO "Default ring speed 4 mbps \n") ; 594 } else { 595 printk(KERN_INFO "Default ring speed 16 mbps \n") ; 596 } 597 printk(KERN_INFO "%s: xl_priv->srb = %04x\n",xl_priv->xl_card_name, xl_priv->srb); 598#endif 599 600 return 0; 601} 602 603static int xl_open(struct net_device *dev) 604{ 605 struct xl_private *xl_priv=netdev_priv(dev); 606 u8 __iomem *xl_mmio = xl_priv->xl_mmio ; 607 u8 i ; 608 __le16 hwaddr[3] ; /* Should be u8[6] but we get word return values */ 609 int open_err ; 610 611 u16 switchsettings, switchsettings_eeprom ; 612 613 if(request_irq(dev->irq, &xl_interrupt, IRQF_SHARED , "3c359", dev)) { 614 return -EAGAIN; 615 } 616 617 /* 618 * Read the information from the EEPROM that we need. 619 */ 620 621 hwaddr[0] = cpu_to_le16(xl_ee_read(dev,0x10)); 622 hwaddr[1] = cpu_to_le16(xl_ee_read(dev,0x11)); 623 hwaddr[2] = cpu_to_le16(xl_ee_read(dev,0x12)); 624 625 /* Ring speed */ 626 627 switchsettings_eeprom = xl_ee_read(dev,0x08) ; 628 switchsettings = switchsettings_eeprom ; 629 630 if (xl_priv->xl_ring_speed != 0) { 631 if (xl_priv->xl_ring_speed == 4) 632 switchsettings = switchsettings | 0x02 ; 633 else 634 switchsettings = switchsettings & ~0x02 ; 635 } 636 637 /* Only write EEProm if there has been a change */ 638 if (switchsettings != switchsettings_eeprom) { 639 xl_ee_write(dev,0x08,switchsettings) ; 640 /* Hardware reset after changing EEProm */ 641 xl_hw_reset(dev) ; 642 } 643 644 memcpy(dev->dev_addr,hwaddr,dev->addr_len) ; 645 646 open_err = xl_open_hw(dev) ; 647 648 /* 649 * This really needs to be cleaned up with better error reporting. 650 */ 651 652 if (open_err != 0) { /* Something went wrong with the open command */ 653 if (open_err & 0x07) { /* Wrong speed, retry at different speed */ 654 printk(KERN_WARNING "%s: Open Error, retrying at different ringspeed \n", dev->name) ; 655 switchsettings = switchsettings ^ 2 ; 656 xl_ee_write(dev,0x08,switchsettings) ; 657 xl_hw_reset(dev) ; 658 open_err = xl_open_hw(dev) ; 659 if (open_err != 0) { 660 printk(KERN_WARNING "%s: Open error returned a second time, we're bombing out now\n", dev->name); 661 free_irq(dev->irq,dev) ; 662 return -ENODEV ; 663 } 664 } else { 665 printk(KERN_WARNING "%s: Open Error = %04x\n", dev->name, open_err) ; 666 free_irq(dev->irq,dev) ; 667 return -ENODEV ; 668 } 669 } 670 671 /* 672 * Now to set up the Rx and Tx buffer structures 673 */ 674 /* These MUST be on 8 byte boundaries */ 675 xl_priv->xl_tx_ring = kzalloc((sizeof(struct xl_tx_desc) * XL_TX_RING_SIZE) + 7, GFP_DMA | GFP_KERNEL); 676 if (xl_priv->xl_tx_ring == NULL) { 677 printk(KERN_WARNING "%s: Not enough memory to allocate tx buffers.\n", 678 dev->name); 679 free_irq(dev->irq,dev); 680 return -ENOMEM; 681 } 682 xl_priv->xl_rx_ring = kzalloc((sizeof(struct xl_rx_desc) * XL_RX_RING_SIZE) +7, GFP_DMA | GFP_KERNEL); 683 if (xl_priv->xl_rx_ring == NULL) { 684 printk(KERN_WARNING "%s: Not enough memory to allocate rx buffers.\n", 685 dev->name); 686 free_irq(dev->irq,dev); 687 kfree(xl_priv->xl_tx_ring); 688 return -ENOMEM; 689 } 690 691 /* Setup Rx Ring */ 692 for (i=0 ; i < XL_RX_RING_SIZE ; i++) { 693 struct sk_buff *skb ; 694 695 skb = dev_alloc_skb(xl_priv->pkt_buf_sz) ; 696 if (skb==NULL) 697 break ; 698 699 skb->dev = dev ; 700 xl_priv->xl_rx_ring[i].upfragaddr = cpu_to_le32(pci_map_single(xl_priv->pdev, skb->data,xl_priv->pkt_buf_sz, PCI_DMA_FROMDEVICE)); 701 xl_priv->xl_rx_ring[i].upfraglen = cpu_to_le32(xl_priv->pkt_buf_sz) | RXUPLASTFRAG; 702 xl_priv->rx_ring_skb[i] = skb ; 703 } 704 705 if (i==0) { 706 printk(KERN_WARNING "%s: Not enough memory to allocate rx buffers. Adapter disabled \n",dev->name) ; 707 free_irq(dev->irq,dev) ; 708 kfree(xl_priv->xl_tx_ring); 709 kfree(xl_priv->xl_rx_ring); 710 return -EIO ; 711 } 712 713 xl_priv->rx_ring_no = i ; 714 xl_priv->rx_ring_tail = 0 ; 715 xl_priv->rx_ring_dma_addr = pci_map_single(xl_priv->pdev,xl_priv->xl_rx_ring, sizeof(struct xl_rx_desc) * XL_RX_RING_SIZE, PCI_DMA_TODEVICE) ; 716 for (i=0;i<(xl_priv->rx_ring_no-1);i++) { 717 xl_priv->xl_rx_ring[i].upnextptr = cpu_to_le32(xl_priv->rx_ring_dma_addr + (sizeof (struct xl_rx_desc) * (i+1))); 718 } 719 xl_priv->xl_rx_ring[i].upnextptr = 0 ; 720 721 writel(xl_priv->rx_ring_dma_addr, xl_mmio + MMIO_UPLISTPTR) ; 722 723 /* Setup Tx Ring */ 724 725 xl_priv->tx_ring_dma_addr = pci_map_single(xl_priv->pdev,xl_priv->xl_tx_ring, sizeof(struct xl_tx_desc) * XL_TX_RING_SIZE,PCI_DMA_TODEVICE) ; 726 727 xl_priv->tx_ring_head = 1 ; 728 xl_priv->tx_ring_tail = 255 ; /* Special marker for first packet */ 729 xl_priv->free_ring_entries = XL_TX_RING_SIZE ; 730 731 /* 732 * Setup the first dummy DPD entry for polling to start working. 733 */ 734 735 xl_priv->xl_tx_ring[0].framestartheader = TXDPDEMPTY; 736 xl_priv->xl_tx_ring[0].buffer = 0 ; 737 xl_priv->xl_tx_ring[0].buffer_length = 0 ; 738 xl_priv->xl_tx_ring[0].dnnextptr = 0 ; 739 740 writel(xl_priv->tx_ring_dma_addr, xl_mmio + MMIO_DNLISTPTR) ; 741 writel(DNUNSTALL, xl_mmio + MMIO_COMMAND) ; 742 writel(UPUNSTALL, xl_mmio + MMIO_COMMAND) ; 743 writel(DNENABLE, xl_mmio + MMIO_COMMAND) ; 744 writeb(0x40, xl_mmio + MMIO_DNPOLL) ; 745 746 /* 747 * Enable interrupts on the card 748 */ 749 750 writel(SETINTENABLE | INT_MASK, xl_mmio + MMIO_COMMAND) ; 751 writel(SETINDENABLE | INT_MASK, xl_mmio + MMIO_COMMAND) ; 752 753 netif_start_queue(dev) ; 754 return 0; 755 756} 757 758static int xl_open_hw(struct net_device *dev) 759{ 760 struct xl_private *xl_priv=netdev_priv(dev); 761 u8 __iomem *xl_mmio = xl_priv->xl_mmio ; 762 u16 vsoff ; 763 char ver_str[33]; 764 int open_err ; 765 int i ; 766 unsigned long t ; 767 768 /* 769 * Okay, let's build up the Open.NIC srb command 770 * 771 */ 772 773 writel( (MEM_BYTE_WRITE | 0xD0000 | xl_priv->srb), xl_mmio + MMIO_MAC_ACCESS_CMD) ; 774 writeb(OPEN_NIC, xl_mmio + MMIO_MACDATA) ; 775 776 /* 777 * Use this as a test byte, if it comes back with the same value, the command didn't work 778 */ 779 780 writel( (MEM_BYTE_WRITE | 0xD0000 | xl_priv->srb)+ 2, xl_mmio + MMIO_MAC_ACCESS_CMD) ; 781 writeb(0xff,xl_mmio + MMIO_MACDATA) ; 782 783 /* Open options */ 784 writel( (MEM_BYTE_WRITE | 0xD0000 | xl_priv->srb) + 8, xl_mmio + MMIO_MAC_ACCESS_CMD) ; 785 writeb(0x00, xl_mmio + MMIO_MACDATA) ; 786 writel( (MEM_BYTE_WRITE | 0xD0000 | xl_priv->srb) + 9, xl_mmio + MMIO_MAC_ACCESS_CMD) ; 787 writeb(0x00, xl_mmio + MMIO_MACDATA) ; 788 789 /* 790 * Node address, be careful here, the docs say you can just put zeros here and it will use 791 * the hardware address, it doesn't, you must include the node address in the open command. 792 */ 793 794 if (xl_priv->xl_laa[0]) { /* If using a LAA address */ 795 for (i=10;i<16;i++) { 796 writel( (MEM_BYTE_WRITE | 0xD0000 | xl_priv->srb) + i, xl_mmio + MMIO_MAC_ACCESS_CMD) ; 797 writeb(xl_priv->xl_laa[i-10],xl_mmio + MMIO_MACDATA) ; 798 } 799 memcpy(dev->dev_addr,xl_priv->xl_laa,dev->addr_len) ; 800 } else { /* Regular hardware address */ 801 for (i=10;i<16;i++) { 802 writel( (MEM_BYTE_WRITE | 0xD0000 | xl_priv->srb) + i, xl_mmio + MMIO_MAC_ACCESS_CMD) ; 803 writeb(dev->dev_addr[i-10], xl_mmio + MMIO_MACDATA) ; 804 } 805 } 806 807 /* Default everything else to 0 */ 808 for (i = 16; i < 34; i++) { 809 writel( (MEM_BYTE_WRITE | 0xD0000 | xl_priv->srb) + i, xl_mmio + MMIO_MAC_ACCESS_CMD) ; 810 writeb(0x00,xl_mmio + MMIO_MACDATA) ; 811 } 812 813 /* 814 * Set the csrb bit in the MISR register 815 */ 816 817 xl_wait_misr_flags(dev) ; 818 writel(MEM_BYTE_WRITE | MF_CSRB, xl_mmio + MMIO_MAC_ACCESS_CMD) ; 819 writeb(0xFF, xl_mmio + MMIO_MACDATA) ; 820 writel(MMIO_BYTE_WRITE | MISR_SET, xl_mmio + MMIO_MAC_ACCESS_CMD) ; 821 writeb(MISR_CSRB , xl_mmio + MMIO_MACDATA) ; 822 823 /* 824 * Now wait for the command to run 825 */ 826 827 t=jiffies; 828 while (! (readw(xl_mmio + MMIO_INTSTATUS) & INTSTAT_SRB)) { 829 schedule(); 830 if (time_after(jiffies, t + 40 * HZ)) { 831 printk(KERN_ERR "3COM 3C359 Velocity XL card not responding.\n"); 832 break ; 833 } 834 } 835 836 /* 837 * Let's interpret the open response 838 */ 839 840 writel( (MEM_BYTE_READ | 0xD0000 | xl_priv->srb)+2, xl_mmio + MMIO_MAC_ACCESS_CMD) ; 841 if (readb(xl_mmio + MMIO_MACDATA)!=0) { 842 open_err = readb(xl_mmio + MMIO_MACDATA) << 8 ; 843 writel( (MEM_BYTE_READ | 0xD0000 | xl_priv->srb) + 7, xl_mmio + MMIO_MAC_ACCESS_CMD) ; 844 open_err |= readb(xl_mmio + MMIO_MACDATA) ; 845 return open_err ; 846 } else { 847 writel( (MEM_WORD_READ | 0xD0000 | xl_priv->srb) + 8, xl_mmio + MMIO_MAC_ACCESS_CMD) ; 848 xl_priv->asb = swab16(readw(xl_mmio + MMIO_MACDATA)) ; 849 printk(KERN_INFO "%s: Adapter Opened Details: ",dev->name) ; 850 printk("ASB: %04x",xl_priv->asb ) ; 851 writel( (MEM_WORD_READ | 0xD0000 | xl_priv->srb) + 10, xl_mmio + MMIO_MAC_ACCESS_CMD) ; 852 printk(", SRB: %04x",swab16(readw(xl_mmio + MMIO_MACDATA)) ) ; 853 854 writel( (MEM_WORD_READ | 0xD0000 | xl_priv->srb) + 12, xl_mmio + MMIO_MAC_ACCESS_CMD) ; 855 xl_priv->arb = swab16(readw(xl_mmio + MMIO_MACDATA)) ; 856 printk(", ARB: %04x \n",xl_priv->arb ) ; 857 writel( (MEM_WORD_READ | 0xD0000 | xl_priv->srb) + 14, xl_mmio + MMIO_MAC_ACCESS_CMD) ; 858 vsoff = swab16(readw(xl_mmio + MMIO_MACDATA)) ; 859 860 /* 861 * Interesting, sending the individual characters directly to printk was causing klogd to use 862 * use 100% of processor time, so we build up the string and print that instead. 863 */ 864 865 for (i=0;i<0x20;i++) { 866 writel( (MEM_BYTE_READ | 0xD0000 | vsoff) + i, xl_mmio + MMIO_MAC_ACCESS_CMD) ; 867 ver_str[i] = readb(xl_mmio + MMIO_MACDATA) ; 868 } 869 ver_str[i] = '\0' ; 870 printk(KERN_INFO "%s: Microcode version String: %s \n",dev->name,ver_str); 871 } 872 873 /* 874 * Issue the AckInterrupt 875 */ 876 writew(ACK_INTERRUPT | SRBRACK | LATCH_ACK, xl_mmio + MMIO_COMMAND) ; 877 878 return 0 ; 879} 880 881/* 882 * There are two ways of implementing rx on the 359 NIC, either 883 * interrupt driven or polling. We are going to uses interrupts, 884 * it is the easier way of doing things. 885 * 886 * The Rx works with a ring of Rx descriptors. At initialise time the ring 887 * entries point to the next entry except for the last entry in the ring 888 * which points to 0. The card is programmed with the location of the first 889 * available descriptor and keeps reading the next_ptr until next_ptr is set 890 * to 0. Hopefully with a ring size of 16 the card will never get to read a next_ptr 891 * of 0. As the Rx interrupt is received we copy the frame up to the protocol layers 892 * and then point the end of the ring to our current position and point our current 893 * position to 0, therefore making the current position the last position on the ring. 894 * The last position on the ring therefore loops continually loops around the rx ring. 895 * 896 * rx_ring_tail is the position on the ring to process next. (Think of a snake, the head 897 * expands as the card adds new packets and we go around eating the tail processing the 898 * packets.) 899 * 900 * Undoubtably it could be streamlined and improved upon, but at the moment it works 901 * and the fast path through the routine is fine. 902 * 903 * adv_rx_ring could be inlined to increase performance, but its called a *lot* of times 904 * in xl_rx so would increase the size of the function significantly. 905 */ 906 907static void adv_rx_ring(struct net_device *dev) /* Advance rx_ring, cut down on bloat in xl_rx */ 908{ 909 struct xl_private *xl_priv=netdev_priv(dev); 910 int n = xl_priv->rx_ring_tail; 911 int prev_ring_loc; 912 913 prev_ring_loc = (n + XL_RX_RING_SIZE - 1) & (XL_RX_RING_SIZE - 1); 914 xl_priv->xl_rx_ring[prev_ring_loc].upnextptr = cpu_to_le32(xl_priv->rx_ring_dma_addr + (sizeof (struct xl_rx_desc) * n)); 915 xl_priv->xl_rx_ring[n].framestatus = 0; 916 xl_priv->xl_rx_ring[n].upnextptr = 0; 917 xl_priv->rx_ring_tail++; 918 xl_priv->rx_ring_tail &= (XL_RX_RING_SIZE-1); 919} 920 921static void xl_rx(struct net_device *dev) 922{ 923 struct xl_private *xl_priv=netdev_priv(dev); 924 u8 __iomem * xl_mmio = xl_priv->xl_mmio ; 925 struct sk_buff *skb, *skb2 ; 926 int frame_length = 0, copy_len = 0 ; 927 int temp_ring_loc ; 928 929 /* 930 * Receive the next frame, loop around the ring until all frames 931 * have been received. 932 */ 933 934 while (xl_priv->xl_rx_ring[xl_priv->rx_ring_tail].framestatus & (RXUPDCOMPLETE | RXUPDFULL) ) { /* Descriptor to process */ 935 936 if (xl_priv->xl_rx_ring[xl_priv->rx_ring_tail].framestatus & RXUPDFULL ) { /* UpdFull, Multiple Descriptors used for the frame */ 937 938 /* 939 * This is a pain, you need to go through all the descriptors until the last one 940 * for this frame to find the framelength 941 */ 942 943 temp_ring_loc = xl_priv->rx_ring_tail ; 944 945 while (xl_priv->xl_rx_ring[temp_ring_loc].framestatus & RXUPDFULL ) { 946 temp_ring_loc++ ; 947 temp_ring_loc &= (XL_RX_RING_SIZE-1) ; 948 } 949 950 frame_length = le32_to_cpu(xl_priv->xl_rx_ring[temp_ring_loc].framestatus) & 0x7FFF; 951 952 skb = dev_alloc_skb(frame_length) ; 953 954 if (skb==NULL) { /* No memory for frame, still need to roll forward the rx ring */ 955 printk(KERN_WARNING "%s: dev_alloc_skb failed - multi buffer !\n", dev->name) ; 956 while (xl_priv->rx_ring_tail != temp_ring_loc) 957 adv_rx_ring(dev) ; 958 959 adv_rx_ring(dev) ; /* One more time just for luck :) */ 960 dev->stats.rx_dropped++ ; 961 962 writel(ACK_INTERRUPT | UPCOMPACK | LATCH_ACK , xl_mmio + MMIO_COMMAND) ; 963 return ; 964 } 965 966 while (xl_priv->rx_ring_tail != temp_ring_loc) { 967 copy_len = le32_to_cpu(xl_priv->xl_rx_ring[xl_priv->rx_ring_tail].upfraglen) & 0x7FFF; 968 frame_length -= copy_len ; 969 pci_dma_sync_single_for_cpu(xl_priv->pdev,le32_to_cpu(xl_priv->xl_rx_ring[xl_priv->rx_ring_tail].upfragaddr),xl_priv->pkt_buf_sz,PCI_DMA_FROMDEVICE); 970 skb_copy_from_linear_data(xl_priv->rx_ring_skb[xl_priv->rx_ring_tail], 971 skb_put(skb, copy_len), 972 copy_len); 973 pci_dma_sync_single_for_device(xl_priv->pdev,le32_to_cpu(xl_priv->xl_rx_ring[xl_priv->rx_ring_tail].upfragaddr),xl_priv->pkt_buf_sz,PCI_DMA_FROMDEVICE); 974 adv_rx_ring(dev) ; 975 } 976 977 /* Now we have found the last fragment */ 978 pci_dma_sync_single_for_cpu(xl_priv->pdev,le32_to_cpu(xl_priv->xl_rx_ring[xl_priv->rx_ring_tail].upfragaddr),xl_priv->pkt_buf_sz,PCI_DMA_FROMDEVICE); 979 skb_copy_from_linear_data(xl_priv->rx_ring_skb[xl_priv->rx_ring_tail], 980 skb_put(skb,copy_len), frame_length); 981/* memcpy(skb_put(skb,frame_length), bus_to_virt(xl_priv->xl_rx_ring[xl_priv->rx_ring_tail].upfragaddr), frame_length) ; */ 982 pci_dma_sync_single_for_device(xl_priv->pdev,le32_to_cpu(xl_priv->xl_rx_ring[xl_priv->rx_ring_tail].upfragaddr),xl_priv->pkt_buf_sz,PCI_DMA_FROMDEVICE); 983 adv_rx_ring(dev) ; 984 skb->protocol = tr_type_trans(skb,dev) ; 985 netif_rx(skb) ; 986 987 } else { /* Single Descriptor Used, simply swap buffers over, fast path */ 988 989 frame_length = le32_to_cpu(xl_priv->xl_rx_ring[xl_priv->rx_ring_tail].framestatus) & 0x7FFF; 990 991 skb = dev_alloc_skb(xl_priv->pkt_buf_sz) ; 992 993 if (skb==NULL) { /* Still need to fix the rx ring */ 994 printk(KERN_WARNING "%s: dev_alloc_skb failed in rx, single buffer \n",dev->name) ; 995 adv_rx_ring(dev) ; 996 dev->stats.rx_dropped++ ; 997 writel(ACK_INTERRUPT | UPCOMPACK | LATCH_ACK , xl_mmio + MMIO_COMMAND) ; 998 return ; 999 } 1000 1001 skb2 = xl_priv->rx_ring_skb[xl_priv->rx_ring_tail] ; 1002 pci_unmap_single(xl_priv->pdev, le32_to_cpu(xl_priv->xl_rx_ring[xl_priv->rx_ring_tail].upfragaddr), xl_priv->pkt_buf_sz,PCI_DMA_FROMDEVICE) ; 1003 skb_put(skb2, frame_length) ; 1004 skb2->protocol = tr_type_trans(skb2,dev) ; 1005 1006 xl_priv->rx_ring_skb[xl_priv->rx_ring_tail] = skb ; 1007 xl_priv->xl_rx_ring[xl_priv->rx_ring_tail].upfragaddr = cpu_to_le32(pci_map_single(xl_priv->pdev,skb->data,xl_priv->pkt_buf_sz, PCI_DMA_FROMDEVICE)); 1008 xl_priv->xl_rx_ring[xl_priv->rx_ring_tail].upfraglen = cpu_to_le32(xl_priv->pkt_buf_sz) | RXUPLASTFRAG; 1009 adv_rx_ring(dev) ; 1010 dev->stats.rx_packets++ ; 1011 dev->stats.rx_bytes += frame_length ; 1012 1013 netif_rx(skb2) ; 1014 } /* if multiple buffers */ 1015 } /* while packet to do */ 1016 1017 /* Clear the updComplete interrupt */ 1018 writel(ACK_INTERRUPT | UPCOMPACK | LATCH_ACK , xl_mmio + MMIO_COMMAND) ; 1019 return ; 1020} 1021 1022/* 1023 * This is ruthless, it doesn't care what state the card is in it will 1024 * completely reset the adapter. 1025 */ 1026 1027static void xl_reset(struct net_device *dev) 1028{ 1029 struct xl_private *xl_priv=netdev_priv(dev); 1030 u8 __iomem * xl_mmio = xl_priv->xl_mmio ; 1031 unsigned long t; 1032 1033 writew( GLOBAL_RESET, xl_mmio + MMIO_COMMAND ) ; 1034 1035 /* 1036 * Must wait for cmdInProgress bit (12) to clear before continuing with 1037 * card configuration. 1038 */ 1039 1040 t=jiffies; 1041 while (readw(xl_mmio + MMIO_INTSTATUS) & INTSTAT_CMD_IN_PROGRESS) { 1042 if (time_after(jiffies, t + 40 * HZ)) { 1043 printk(KERN_ERR "3COM 3C359 Velocity XL card not responding.\n"); 1044 break ; 1045 } 1046 } 1047 1048} 1049 1050static void xl_freemem(struct net_device *dev) 1051{ 1052 struct xl_private *xl_priv=netdev_priv(dev); 1053 int i ; 1054 1055 for (i=0;i<XL_RX_RING_SIZE;i++) { 1056 dev_kfree_skb_irq(xl_priv->rx_ring_skb[xl_priv->rx_ring_tail]) ; 1057 pci_unmap_single(xl_priv->pdev,le32_to_cpu(xl_priv->xl_rx_ring[xl_priv->rx_ring_tail].upfragaddr),xl_priv->pkt_buf_sz, PCI_DMA_FROMDEVICE); 1058 xl_priv->rx_ring_tail++ ; 1059 xl_priv->rx_ring_tail &= XL_RX_RING_SIZE-1; 1060 } 1061 1062 /* unmap ring */ 1063 pci_unmap_single(xl_priv->pdev,xl_priv->rx_ring_dma_addr, sizeof(struct xl_rx_desc) * XL_RX_RING_SIZE, PCI_DMA_FROMDEVICE) ; 1064 1065 pci_unmap_single(xl_priv->pdev,xl_priv->tx_ring_dma_addr, sizeof(struct xl_tx_desc) * XL_TX_RING_SIZE, PCI_DMA_TODEVICE) ; 1066 1067 kfree(xl_priv->xl_rx_ring) ; 1068 kfree(xl_priv->xl_tx_ring) ; 1069 1070 return ; 1071} 1072 1073static irqreturn_t xl_interrupt(int irq, void *dev_id) 1074{ 1075 struct net_device *dev = (struct net_device *)dev_id; 1076 struct xl_private *xl_priv =netdev_priv(dev); 1077 u8 __iomem * xl_mmio = xl_priv->xl_mmio ; 1078 u16 intstatus, macstatus ; 1079 1080 intstatus = readw(xl_mmio + MMIO_INTSTATUS) ; 1081 1082 if (!(intstatus & 1)) /* We didn't generate the interrupt */ 1083 return IRQ_NONE; 1084 1085 spin_lock(&xl_priv->xl_lock) ; 1086 1087 /* 1088 * Process the interrupt 1089 */ 1090 /* 1091 * Something fishy going on here, we shouldn't get 0001 ints, not fatal though. 1092 */ 1093 if (intstatus == 0x0001) { 1094 writel(ACK_INTERRUPT | LATCH_ACK, xl_mmio + MMIO_COMMAND) ; 1095 printk(KERN_INFO "%s: 00001 int received \n",dev->name) ; 1096 } else { 1097 if (intstatus & (HOSTERRINT | SRBRINT | ARBCINT | UPCOMPINT | DNCOMPINT | HARDERRINT | (1<<8) | TXUNDERRUN | ASBFINT)) { 1098 1099 /* 1100 * Host Error. 1101 * It may be possible to recover from this, but usually it means something 1102 * is seriously fubar, so we just close the adapter. 1103 */ 1104 1105 if (intstatus & HOSTERRINT) { 1106 printk(KERN_WARNING "%s: Host Error, performing global reset, intstatus = %04x \n",dev->name,intstatus) ; 1107 writew( GLOBAL_RESET, xl_mmio + MMIO_COMMAND ) ; 1108 printk(KERN_WARNING "%s: Resetting hardware: \n", dev->name); 1109 netif_stop_queue(dev) ; 1110 xl_freemem(dev) ; 1111 free_irq(dev->irq,dev); 1112 xl_reset(dev) ; 1113 writel(ACK_INTERRUPT | LATCH_ACK, xl_mmio + MMIO_COMMAND) ; 1114 spin_unlock(&xl_priv->xl_lock) ; 1115 return IRQ_HANDLED; 1116 } /* Host Error */ 1117 1118 if (intstatus & SRBRINT ) { /* Srbc interrupt */ 1119 writel(ACK_INTERRUPT | SRBRACK | LATCH_ACK, xl_mmio + MMIO_COMMAND) ; 1120 if (xl_priv->srb_queued) 1121 xl_srb_bh(dev) ; 1122 } /* SRBR Interrupt */ 1123 1124 if (intstatus & TXUNDERRUN) { /* Issue DnReset command */ 1125 writel(DNRESET, xl_mmio + MMIO_MAC_ACCESS_CMD) ; 1126 while (readw(xl_mmio + MMIO_INTSTATUS) & INTSTAT_CMD_IN_PROGRESS) { /* Wait for command to run */ 1127 /* !!! FIX-ME !!!! 1128 Must put a timeout check here ! */ 1129 /* Empty Loop */ 1130 } 1131 printk(KERN_WARNING "%s: TX Underrun received \n",dev->name) ; 1132 writel(ACK_INTERRUPT | LATCH_ACK, xl_mmio + MMIO_COMMAND) ; 1133 } /* TxUnderRun */ 1134 1135 if (intstatus & ARBCINT ) { /* Arbc interrupt */ 1136 xl_arb_cmd(dev) ; 1137 } /* Arbc */ 1138 1139 if (intstatus & ASBFINT) { 1140 if (xl_priv->asb_queued == 1) { 1141 xl_asb_cmd(dev) ; 1142 } else if (xl_priv->asb_queued == 2) { 1143 xl_asb_bh(dev) ; 1144 } else { 1145 writel(ACK_INTERRUPT | LATCH_ACK | ASBFACK, xl_mmio + MMIO_COMMAND) ; 1146 } 1147 } /* Asbf */ 1148 1149 if (intstatus & UPCOMPINT ) /* UpComplete */ 1150 xl_rx(dev) ; 1151 1152 if (intstatus & DNCOMPINT ) /* DnComplete */ 1153 xl_dn_comp(dev) ; 1154 1155 if (intstatus & HARDERRINT ) { /* Hardware error */ 1156 writel(MMIO_WORD_READ | MACSTATUS, xl_mmio + MMIO_MAC_ACCESS_CMD) ; 1157 macstatus = readw(xl_mmio + MMIO_MACDATA) ; 1158 printk(KERN_WARNING "%s: MacStatusError, details: ", dev->name); 1159 if (macstatus & (1<<14)) 1160 printk(KERN_WARNING "tchk error: Unrecoverable error \n") ; 1161 if (macstatus & (1<<3)) 1162 printk(KERN_WARNING "eint error: Internal watchdog timer expired \n") ; 1163 if (macstatus & (1<<2)) 1164 printk(KERN_WARNING "aint error: Host tried to perform invalid operation \n") ; 1165 printk(KERN_WARNING "Instatus = %02x, macstatus = %02x\n",intstatus,macstatus) ; 1166 printk(KERN_WARNING "%s: Resetting hardware: \n", dev->name); 1167 netif_stop_queue(dev) ; 1168 xl_freemem(dev) ; 1169 free_irq(dev->irq,dev); 1170 unregister_netdev(dev) ; 1171 free_netdev(dev) ; 1172 xl_reset(dev) ; 1173 writel(ACK_INTERRUPT | LATCH_ACK, xl_mmio + MMIO_COMMAND) ; 1174 spin_unlock(&xl_priv->xl_lock) ; 1175 return IRQ_HANDLED; 1176 } 1177 } else { 1178 printk(KERN_WARNING "%s: Received Unknown interrupt : %04x \n", dev->name, intstatus) ; 1179 writel(ACK_INTERRUPT | LATCH_ACK, xl_mmio + MMIO_COMMAND) ; 1180 } 1181 } 1182 1183 /* Turn interrupts back on */ 1184 1185 writel( SETINDENABLE | INT_MASK, xl_mmio + MMIO_COMMAND) ; 1186 writel( SETINTENABLE | INT_MASK, xl_mmio + MMIO_COMMAND) ; 1187 1188 spin_unlock(&xl_priv->xl_lock) ; 1189 return IRQ_HANDLED; 1190} 1191 1192/* 1193 * Tx - Polling configuration 1194 */ 1195 1196static int xl_xmit(struct sk_buff *skb, struct net_device *dev) 1197{ 1198 struct xl_private *xl_priv=netdev_priv(dev); 1199 struct xl_tx_desc *txd ; 1200 int tx_head, tx_tail, tx_prev ; 1201 unsigned long flags ; 1202 1203 spin_lock_irqsave(&xl_priv->xl_lock,flags) ; 1204 1205 netif_stop_queue(dev) ; 1206 1207 if (xl_priv->free_ring_entries > 1 ) { 1208 /* 1209 * Set up the descriptor for the packet 1210 */ 1211 tx_head = xl_priv->tx_ring_head ; 1212 tx_tail = xl_priv->tx_ring_tail ; 1213 1214 txd = &(xl_priv->xl_tx_ring[tx_head]) ; 1215 txd->dnnextptr = 0 ; 1216 txd->framestartheader = cpu_to_le32(skb->len) | TXDNINDICATE; 1217 txd->buffer = cpu_to_le32(pci_map_single(xl_priv->pdev, skb->data, skb->len, PCI_DMA_TODEVICE)); 1218 txd->buffer_length = cpu_to_le32(skb->len) | TXDNFRAGLAST; 1219 xl_priv->tx_ring_skb[tx_head] = skb ; 1220 dev->stats.tx_packets++ ; 1221 dev->stats.tx_bytes += skb->len ; 1222 1223 /* 1224 * Set the nextptr of the previous descriptor equal to this descriptor, add XL_TX_RING_SIZE -1 1225 * to ensure no negative numbers in unsigned locations. 1226 */ 1227 1228 tx_prev = (xl_priv->tx_ring_head + XL_TX_RING_SIZE - 1) & (XL_TX_RING_SIZE - 1) ; 1229 1230 xl_priv->tx_ring_head++ ; 1231 xl_priv->tx_ring_head &= (XL_TX_RING_SIZE - 1) ; 1232 xl_priv->free_ring_entries-- ; 1233 1234 xl_priv->xl_tx_ring[tx_prev].dnnextptr = cpu_to_le32(xl_priv->tx_ring_dma_addr + (sizeof (struct xl_tx_desc) * tx_head)); 1235 1236 /* Sneaky, by doing a read on DnListPtr we can force the card to poll on the DnNextPtr */ 1237 /* readl(xl_mmio + MMIO_DNLISTPTR) ; */ 1238 1239 netif_wake_queue(dev) ; 1240 1241 spin_unlock_irqrestore(&xl_priv->xl_lock,flags) ; 1242 1243 return 0; 1244 } else { 1245 spin_unlock_irqrestore(&xl_priv->xl_lock,flags) ; 1246 return 1; 1247 } 1248 1249} 1250 1251/* 1252 * The NIC has told us that a packet has been downloaded onto the card, we must 1253 * find out which packet it has done, clear the skb and information for the packet 1254 * then advance around the ring for all tranmitted packets 1255 */ 1256 1257static void xl_dn_comp(struct net_device *dev) 1258{ 1259 struct xl_private *xl_priv=netdev_priv(dev); 1260 u8 __iomem * xl_mmio = xl_priv->xl_mmio ; 1261 struct xl_tx_desc *txd ; 1262 1263 1264 if (xl_priv->tx_ring_tail == 255) {/* First time */ 1265 xl_priv->xl_tx_ring[0].framestartheader = 0 ; 1266 xl_priv->xl_tx_ring[0].dnnextptr = 0 ; 1267 xl_priv->tx_ring_tail = 1 ; 1268 } 1269 1270 while (xl_priv->xl_tx_ring[xl_priv->tx_ring_tail].framestartheader & TXDNCOMPLETE ) { 1271 txd = &(xl_priv->xl_tx_ring[xl_priv->tx_ring_tail]) ; 1272 pci_unmap_single(xl_priv->pdev, le32_to_cpu(txd->buffer), xl_priv->tx_ring_skb[xl_priv->tx_ring_tail]->len, PCI_DMA_TODEVICE); 1273 txd->framestartheader = 0 ; 1274 txd->buffer = cpu_to_le32(0xdeadbeef); 1275 txd->buffer_length = 0 ; 1276 dev_kfree_skb_irq(xl_priv->tx_ring_skb[xl_priv->tx_ring_tail]) ; 1277 xl_priv->tx_ring_tail++ ; 1278 xl_priv->tx_ring_tail &= (XL_TX_RING_SIZE - 1) ; 1279 xl_priv->free_ring_entries++ ; 1280 } 1281 1282 netif_wake_queue(dev) ; 1283 1284 writel(ACK_INTERRUPT | DNCOMPACK | LATCH_ACK , xl_mmio + MMIO_COMMAND) ; 1285} 1286 1287/* 1288 * Close the adapter properly. 1289 * This srb reply cannot be handled from interrupt context as we have 1290 * to free the interrupt from the driver. 1291 */ 1292 1293static int xl_close(struct net_device *dev) 1294{ 1295 struct xl_private *xl_priv = netdev_priv(dev); 1296 u8 __iomem * xl_mmio = xl_priv->xl_mmio ; 1297 unsigned long t ; 1298 1299 netif_stop_queue(dev) ; 1300 1301 /* 1302 * Close the adapter, need to stall the rx and tx queues. 1303 */ 1304 1305 writew(DNSTALL, xl_mmio + MMIO_COMMAND) ; 1306 t=jiffies; 1307 while (readw(xl_mmio + MMIO_INTSTATUS) & INTSTAT_CMD_IN_PROGRESS) { 1308 schedule(); 1309 if (time_after(jiffies, t + 10 * HZ)) { 1310 printk(KERN_ERR "%s: 3COM 3C359 Velocity XL-DNSTALL not responding.\n", dev->name); 1311 break ; 1312 } 1313 } 1314 writew(DNDISABLE, xl_mmio + MMIO_COMMAND) ; 1315 t=jiffies; 1316 while (readw(xl_mmio + MMIO_INTSTATUS) & INTSTAT_CMD_IN_PROGRESS) { 1317 schedule(); 1318 if (time_after(jiffies, t + 10 * HZ)) { 1319 printk(KERN_ERR "%s: 3COM 3C359 Velocity XL-DNDISABLE not responding.\n", dev->name); 1320 break ; 1321 } 1322 } 1323 writew(UPSTALL, xl_mmio + MMIO_COMMAND) ; 1324 t=jiffies; 1325 while (readw(xl_mmio + MMIO_INTSTATUS) & INTSTAT_CMD_IN_PROGRESS) { 1326 schedule(); 1327 if (time_after(jiffies, t + 10 * HZ)) { 1328 printk(KERN_ERR "%s: 3COM 3C359 Velocity XL-UPSTALL not responding.\n", dev->name); 1329 break ; 1330 } 1331 } 1332 1333 /* Turn off interrupts, we will still get the indication though 1334 * so we can trap it 1335 */ 1336 1337 writel(SETINTENABLE, xl_mmio + MMIO_COMMAND) ; 1338 1339 xl_srb_cmd(dev,CLOSE_NIC) ; 1340 1341 t=jiffies; 1342 while (!(readw(xl_mmio + MMIO_INTSTATUS) & INTSTAT_SRB)) { 1343 schedule(); 1344 if (time_after(jiffies, t + 10 * HZ)) { 1345 printk(KERN_ERR "%s: 3COM 3C359 Velocity XL-CLOSENIC not responding.\n", dev->name); 1346 break ; 1347 } 1348 } 1349 /* Read the srb response from the adapter */ 1350 1351 writel(MEM_BYTE_READ | 0xd0000 | xl_priv->srb, xl_mmio + MMIO_MAC_ACCESS_CMD); 1352 if (readb(xl_mmio + MMIO_MACDATA) != CLOSE_NIC) { 1353 printk(KERN_INFO "%s: CLOSE_NIC did not get a CLOSE_NIC response \n",dev->name) ; 1354 } else { 1355 writel((MEM_BYTE_READ | 0xd0000 | xl_priv->srb) +2, xl_mmio + MMIO_MAC_ACCESS_CMD) ; 1356 if (readb(xl_mmio + MMIO_MACDATA)==0) { 1357 printk(KERN_INFO "%s: Adapter has been closed \n",dev->name) ; 1358 writew(ACK_INTERRUPT | SRBRACK | LATCH_ACK, xl_mmio + MMIO_COMMAND) ; 1359 1360 xl_freemem(dev) ; 1361 free_irq(dev->irq,dev) ; 1362 } else { 1363 printk(KERN_INFO "%s: Close nic command returned error code %02x\n",dev->name, readb(xl_mmio + MMIO_MACDATA)) ; 1364 } 1365 } 1366 1367 /* Reset the upload and download logic */ 1368 1369 writew(UPRESET, xl_mmio + MMIO_COMMAND) ; 1370 t=jiffies; 1371 while (readw(xl_mmio + MMIO_INTSTATUS) & INTSTAT_CMD_IN_PROGRESS) { 1372 schedule(); 1373 if (time_after(jiffies, t + 10 * HZ)) { 1374 printk(KERN_ERR "%s: 3COM 3C359 Velocity XL-UPRESET not responding.\n", dev->name); 1375 break ; 1376 } 1377 } 1378 writew(DNRESET, xl_mmio + MMIO_COMMAND) ; 1379 t=jiffies; 1380 while (readw(xl_mmio + MMIO_INTSTATUS) & INTSTAT_CMD_IN_PROGRESS) { 1381 schedule(); 1382 if (time_after(jiffies, t + 10 * HZ)) { 1383 printk(KERN_ERR "%s: 3COM 3C359 Velocity XL-DNRESET not responding.\n", dev->name); 1384 break ; 1385 } 1386 } 1387 xl_hw_reset(dev) ; 1388 return 0 ; 1389} 1390 1391static void xl_set_rx_mode(struct net_device *dev) 1392{ 1393 struct xl_private *xl_priv = netdev_priv(dev); 1394 struct dev_mc_list *dmi ; 1395 unsigned char dev_mc_address[4] ; 1396 u16 options ; 1397 int i ; 1398 1399 if (dev->flags & IFF_PROMISC) 1400 options = 0x0004 ; 1401 else 1402 options = 0x0000 ; 1403 1404 if (options ^ xl_priv->xl_copy_all_options) { /* Changed, must send command */ 1405 xl_priv->xl_copy_all_options = options ; 1406 xl_srb_cmd(dev, SET_RECEIVE_MODE) ; 1407 return ; 1408 } 1409 1410 dev_mc_address[0] = dev_mc_address[1] = dev_mc_address[2] = dev_mc_address[3] = 0 ; 1411 1412 for (i=0,dmi=dev->mc_list;i < dev->mc_count; i++,dmi = dmi->next) { 1413 dev_mc_address[0] |= dmi->dmi_addr[2] ; 1414 dev_mc_address[1] |= dmi->dmi_addr[3] ; 1415 dev_mc_address[2] |= dmi->dmi_addr[4] ; 1416 dev_mc_address[3] |= dmi->dmi_addr[5] ; 1417 } 1418 1419 if (memcmp(xl_priv->xl_functional_addr,dev_mc_address,4) != 0) { /* Options have changed, run the command */ 1420 memcpy(xl_priv->xl_functional_addr, dev_mc_address,4) ; 1421 xl_srb_cmd(dev, SET_FUNC_ADDRESS) ; 1422 } 1423 return ; 1424} 1425 1426 1427/* 1428 * We issued an srb command and now we must read 1429 * the response from the completed command. 1430 */ 1431 1432static void xl_srb_bh(struct net_device *dev) 1433{ 1434 struct xl_private *xl_priv = netdev_priv(dev); 1435 u8 __iomem * xl_mmio = xl_priv->xl_mmio ; 1436 u8 srb_cmd, ret_code ; 1437 int i ; 1438 1439 writel(MEM_BYTE_READ | 0xd0000 | xl_priv->srb, xl_mmio + MMIO_MAC_ACCESS_CMD) ; 1440 srb_cmd = readb(xl_mmio + MMIO_MACDATA) ; 1441 writel((MEM_BYTE_READ | 0xd0000 | xl_priv->srb) +2, xl_mmio + MMIO_MAC_ACCESS_CMD) ; 1442 ret_code = readb(xl_mmio + MMIO_MACDATA) ; 1443 1444 /* Ret_code is standard across all commands */ 1445 1446 switch (ret_code) { 1447 case 1: 1448 printk(KERN_INFO "%s: Command: %d - Invalid Command code\n",dev->name,srb_cmd) ; 1449 break ; 1450 case 4: 1451 printk(KERN_INFO "%s: Command: %d - Adapter is closed, must be open for this command \n",dev->name,srb_cmd) ; 1452 break ; 1453 1454 case 6: 1455 printk(KERN_INFO "%s: Command: %d - Options Invalid for command \n",dev->name,srb_cmd) ; 1456 break ; 1457 1458 case 0: /* Successful command execution */ 1459 switch (srb_cmd) { 1460 case READ_LOG: /* Returns 14 bytes of data from the NIC */ 1461 if(xl_priv->xl_message_level) 1462 printk(KERN_INFO "%s: READ.LOG 14 bytes of data ",dev->name) ; 1463 /* 1464 * We still have to read the log even if message_level = 0 and we don't want 1465 * to see it 1466 */ 1467 for (i=0;i<14;i++) { 1468 writel(MEM_BYTE_READ | 0xd0000 | xl_priv->srb | i, xl_mmio + MMIO_MAC_ACCESS_CMD) ; 1469 if(xl_priv->xl_message_level) 1470 printk("%02x:",readb(xl_mmio + MMIO_MACDATA)) ; 1471 } 1472 printk("\n") ; 1473 break ; 1474 case SET_FUNC_ADDRESS: 1475 if(xl_priv->xl_message_level) 1476 printk(KERN_INFO "%s: Functional Address Set \n",dev->name) ; 1477 break ; 1478 case CLOSE_NIC: 1479 if(xl_priv->xl_message_level) 1480 printk(KERN_INFO "%s: Received CLOSE_NIC interrupt in interrupt handler \n",dev->name) ; 1481 break ; 1482 case SET_MULTICAST_MODE: 1483 if(xl_priv->xl_message_level) 1484 printk(KERN_INFO "%s: Multicast options successfully changed\n",dev->name) ; 1485 break ; 1486 case SET_RECEIVE_MODE: 1487 if(xl_priv->xl_message_level) { 1488 if (xl_priv->xl_copy_all_options == 0x0004) 1489 printk(KERN_INFO "%s: Entering promiscuous mode \n", dev->name) ; 1490 else 1491 printk(KERN_INFO "%s: Entering normal receive mode \n",dev->name) ; 1492 } 1493 break ; 1494 1495 } /* switch */ 1496 break ; 1497 } /* switch */ 1498 return ; 1499} 1500 1501static int xl_set_mac_address (struct net_device *dev, void *addr) 1502{ 1503 struct sockaddr *saddr = addr ; 1504 struct xl_private *xl_priv = netdev_priv(dev); 1505 1506 if (netif_running(dev)) { 1507 printk(KERN_WARNING "%s: Cannot set mac/laa address while card is open\n", dev->name) ; 1508 return -EIO ; 1509 } 1510 1511 memcpy(xl_priv->xl_laa, saddr->sa_data,dev->addr_len) ; 1512 1513 if (xl_priv->xl_message_level) { 1514 printk(KERN_INFO "%s: MAC/LAA Set to = %x.%x.%x.%x.%x.%x\n",dev->name, xl_priv->xl_laa[0], 1515 xl_priv->xl_laa[1], xl_priv->xl_laa[2], 1516 xl_priv->xl_laa[3], xl_priv->xl_laa[4], 1517 xl_priv->xl_laa[5]); 1518 } 1519 1520 return 0 ; 1521} 1522 1523static void xl_arb_cmd(struct net_device *dev) 1524{ 1525 struct xl_private *xl_priv = netdev_priv(dev); 1526 u8 __iomem * xl_mmio = xl_priv->xl_mmio ; 1527 u8 arb_cmd ; 1528 u16 lan_status, lan_status_diff ; 1529 1530 writel( ( MEM_BYTE_READ | 0xD0000 | xl_priv->arb), xl_mmio + MMIO_MAC_ACCESS_CMD) ; 1531 arb_cmd = readb(xl_mmio + MMIO_MACDATA) ; 1532 1533 if (arb_cmd == RING_STATUS_CHANGE) { /* Ring.Status.Change */ 1534 writel( ( (MEM_WORD_READ | 0xD0000 | xl_priv->arb) + 6), xl_mmio + MMIO_MAC_ACCESS_CMD) ; 1535 1536 printk(KERN_INFO "%s: Ring Status Change: New Status = %04x\n", dev->name, swab16(readw(xl_mmio + MMIO_MACDATA) )) ; 1537 1538 lan_status = swab16(readw(xl_mmio + MMIO_MACDATA)); 1539 1540 /* Acknowledge interrupt, this tells nic we are done with the arb */ 1541 writel(ACK_INTERRUPT | ARBCACK | LATCH_ACK, xl_mmio + MMIO_COMMAND) ; 1542 1543 lan_status_diff = xl_priv->xl_lan_status ^ lan_status ; 1544 1545 if (lan_status_diff & (LSC_LWF | LSC_ARW | LSC_FPE | LSC_RR) ) { 1546 if (lan_status_diff & LSC_LWF) 1547 printk(KERN_WARNING "%s: Short circuit detected on the lobe\n",dev->name); 1548 if (lan_status_diff & LSC_ARW) 1549 printk(KERN_WARNING "%s: Auto removal error\n",dev->name); 1550 if (lan_status_diff & LSC_FPE) 1551 printk(KERN_WARNING "%s: FDX Protocol Error\n",dev->name); 1552 if (lan_status_diff & LSC_RR) 1553 printk(KERN_WARNING "%s: Force remove MAC frame received\n",dev->name); 1554 1555 /* Adapter has been closed by the hardware */ 1556 1557 netif_stop_queue(dev); 1558 xl_freemem(dev) ; 1559 free_irq(dev->irq,dev); 1560 1561 printk(KERN_WARNING "%s: Adapter has been closed \n", dev->name) ; 1562 } /* If serious error */ 1563 1564 if (xl_priv->xl_message_level) { 1565 if (lan_status_diff & LSC_SIG_LOSS) 1566 printk(KERN_WARNING "%s: No receive signal detected \n", dev->name) ; 1567 if (lan_status_diff & LSC_HARD_ERR) 1568 printk(KERN_INFO "%s: Beaconing \n",dev->name); 1569 if (lan_status_diff & LSC_SOFT_ERR) 1570 printk(KERN_WARNING "%s: Adapter transmitted Soft Error Report Mac Frame \n",dev->name); 1571 if (lan_status_diff & LSC_TRAN_BCN) 1572 printk(KERN_INFO "%s: We are tranmitting the beacon, aaah\n",dev->name); 1573 if (lan_status_diff & LSC_SS) 1574 printk(KERN_INFO "%s: Single Station on the ring \n", dev->name); 1575 if (lan_status_diff & LSC_RING_REC) 1576 printk(KERN_INFO "%s: Ring recovery ongoing\n",dev->name); 1577 if (lan_status_diff & LSC_FDX_MODE) 1578 printk(KERN_INFO "%s: Operating in FDX mode\n",dev->name); 1579 } 1580 1581 if (lan_status_diff & LSC_CO) { 1582 if (xl_priv->xl_message_level) 1583 printk(KERN_INFO "%s: Counter Overflow \n", dev->name); 1584 /* Issue READ.LOG command */ 1585 xl_srb_cmd(dev, READ_LOG) ; 1586 } 1587 1588 /* There is no command in the tech docs to issue the read_sr_counters */ 1589 if (lan_status_diff & LSC_SR_CO) { 1590 if (xl_priv->xl_message_level) 1591 printk(KERN_INFO "%s: Source routing counters overflow\n", dev->name); 1592 } 1593 1594 xl_priv->xl_lan_status = lan_status ; 1595 1596 } /* Lan.change.status */ 1597 else if ( arb_cmd == RECEIVE_DATA) { /* Received.Data */ 1598#if XL_DEBUG 1599 printk(KERN_INFO "Received.Data \n") ; 1600#endif 1601 writel( ((MEM_WORD_READ | 0xD0000 | xl_priv->arb) + 6), xl_mmio + MMIO_MAC_ACCESS_CMD) ; 1602 xl_priv->mac_buffer = swab16(readw(xl_mmio + MMIO_MACDATA)) ; 1603 1604 /* Now we are going to be really basic here and not do anything 1605 * with the data at all. The tech docs do not give me enough 1606 * information to calculate the buffers properly so we're 1607 * just going to tell the nic that we've dealt with the frame 1608 * anyway. 1609 */ 1610 1611 /* Acknowledge interrupt, this tells nic we are done with the arb */ 1612 writel(ACK_INTERRUPT | ARBCACK | LATCH_ACK, xl_mmio + MMIO_COMMAND) ; 1613 1614 /* Is the ASB free ? */ 1615 1616 xl_priv->asb_queued = 0 ; 1617 writel( ((MEM_BYTE_READ | 0xD0000 | xl_priv->asb) + 2), xl_mmio + MMIO_MAC_ACCESS_CMD) ; 1618 if (readb(xl_mmio + MMIO_MACDATA) != 0xff) { 1619 xl_priv->asb_queued = 1 ; 1620 1621 xl_wait_misr_flags(dev) ; 1622 1623 writel(MEM_BYTE_WRITE | MF_ASBFR, xl_mmio + MMIO_MAC_ACCESS_CMD); 1624 writeb(0xff, xl_mmio + MMIO_MACDATA) ; 1625 writel(MMIO_BYTE_WRITE | MISR_SET, xl_mmio + MMIO_MAC_ACCESS_CMD) ; 1626 writeb(MISR_ASBFR, xl_mmio + MMIO_MACDATA) ; 1627 return ; 1628 /* Drop out and wait for the bottom half to be run */ 1629 } 1630 1631 xl_asb_cmd(dev) ; 1632 1633 } else { 1634 printk(KERN_WARNING "%s: Received unknown arb (xl_priv) command: %02x \n",dev->name,arb_cmd) ; 1635 } 1636 1637 /* Acknowledge the arb interrupt */ 1638 1639 writel(ACK_INTERRUPT | ARBCACK | LATCH_ACK , xl_mmio + MMIO_COMMAND) ; 1640 1641 return ; 1642} 1643 1644 1645/* 1646 * There is only one asb command, but we can get called from different 1647 * places. 1648 */ 1649 1650static void xl_asb_cmd(struct net_device *dev) 1651{ 1652 struct xl_private *xl_priv = netdev_priv(dev); 1653 u8 __iomem * xl_mmio = xl_priv->xl_mmio ; 1654 1655 if (xl_priv->asb_queued == 1) 1656 writel(ACK_INTERRUPT | LATCH_ACK | ASBFACK, xl_mmio + MMIO_COMMAND) ; 1657 1658 writel(MEM_BYTE_WRITE | 0xd0000 | xl_priv->asb, xl_mmio + MMIO_MAC_ACCESS_CMD) ; 1659 writeb(0x81, xl_mmio + MMIO_MACDATA) ; 1660 1661 writel(MEM_WORD_WRITE | 0xd0000 | xl_priv->asb | 6, xl_mmio + MMIO_MAC_ACCESS_CMD) ; 1662 writew(swab16(xl_priv->mac_buffer), xl_mmio + MMIO_MACDATA) ; 1663 1664 xl_wait_misr_flags(dev) ; 1665 1666 writel(MEM_BYTE_WRITE | MF_RASB, xl_mmio + MMIO_MAC_ACCESS_CMD); 1667 writeb(0xff, xl_mmio + MMIO_MACDATA) ; 1668 1669 writel(MMIO_BYTE_WRITE | MISR_SET, xl_mmio + MMIO_MAC_ACCESS_CMD) ; 1670 writeb(MISR_RASB, xl_mmio + MMIO_MACDATA) ; 1671 1672 xl_priv->asb_queued = 2 ; 1673 1674 return ; 1675} 1676 1677/* 1678 * This will only get called if there was an error 1679 * from the asb cmd. 1680 */ 1681static void xl_asb_bh(struct net_device *dev) 1682{ 1683 struct xl_private *xl_priv = netdev_priv(dev); 1684 u8 __iomem * xl_mmio = xl_priv->xl_mmio ; 1685 u8 ret_code ; 1686 1687 writel(MMIO_BYTE_READ | 0xd0000 | xl_priv->asb | 2, xl_mmio + MMIO_MAC_ACCESS_CMD) ; 1688 ret_code = readb(xl_mmio + MMIO_MACDATA) ; 1689 switch (ret_code) { 1690 case 0x01: 1691 printk(KERN_INFO "%s: ASB Command, unrecognized command code \n",dev->name) ; 1692 break ; 1693 case 0x26: 1694 printk(KERN_INFO "%s: ASB Command, unexpected receive buffer \n", dev->name) ; 1695 break ; 1696 case 0x40: 1697 printk(KERN_INFO "%s: ASB Command, Invalid Station ID \n", dev->name) ; 1698 break ; 1699 } 1700 xl_priv->asb_queued = 0 ; 1701 writel(ACK_INTERRUPT | LATCH_ACK | ASBFACK, xl_mmio + MMIO_COMMAND) ; 1702 return ; 1703} 1704 1705/* 1706 * Issue srb commands to the nic 1707 */ 1708 1709static void xl_srb_cmd(struct net_device *dev, int srb_cmd) 1710{ 1711 struct xl_private *xl_priv = netdev_priv(dev); 1712 u8 __iomem * xl_mmio = xl_priv->xl_mmio ; 1713 1714 switch (srb_cmd) { 1715 case READ_LOG: 1716 writel(MEM_BYTE_WRITE | 0xD0000 | xl_priv->srb, xl_mmio + MMIO_MAC_ACCESS_CMD) ; 1717 writeb(READ_LOG, xl_mmio + MMIO_MACDATA) ; 1718 break; 1719 1720 case CLOSE_NIC: 1721 writel(MEM_BYTE_WRITE | 0xD0000 | xl_priv->srb, xl_mmio + MMIO_MAC_ACCESS_CMD) ; 1722 writeb(CLOSE_NIC, xl_mmio + MMIO_MACDATA) ; 1723 break ; 1724 1725 case SET_RECEIVE_MODE: 1726 writel(MEM_BYTE_WRITE | 0xD0000 | xl_priv->srb, xl_mmio + MMIO_MAC_ACCESS_CMD) ; 1727 writeb(SET_RECEIVE_MODE, xl_mmio + MMIO_MACDATA) ; 1728 writel(MEM_WORD_WRITE | 0xD0000 | xl_priv->srb | 4, xl_mmio + MMIO_MAC_ACCESS_CMD) ; 1729 writew(xl_priv->xl_copy_all_options, xl_mmio + MMIO_MACDATA) ; 1730 break ; 1731 1732 case SET_FUNC_ADDRESS: 1733 writel(MEM_BYTE_WRITE | 0xD0000 | xl_priv->srb, xl_mmio + MMIO_MAC_ACCESS_CMD) ; 1734 writeb(SET_FUNC_ADDRESS, xl_mmio + MMIO_MACDATA) ; 1735 writel(MEM_BYTE_WRITE | 0xD0000 | xl_priv->srb | 6 , xl_mmio + MMIO_MAC_ACCESS_CMD) ; 1736 writeb(xl_priv->xl_functional_addr[0], xl_mmio + MMIO_MACDATA) ; 1737 writel(MEM_BYTE_WRITE | 0xD0000 | xl_priv->srb | 7 , xl_mmio + MMIO_MAC_ACCESS_CMD) ; 1738 writeb(xl_priv->xl_functional_addr[1], xl_mmio + MMIO_MACDATA) ; 1739 writel(MEM_BYTE_WRITE | 0xD0000 | xl_priv->srb | 8 , xl_mmio + MMIO_MAC_ACCESS_CMD) ; 1740 writeb(xl_priv->xl_functional_addr[2], xl_mmio + MMIO_MACDATA) ; 1741 writel(MEM_BYTE_WRITE | 0xD0000 | xl_priv->srb | 9 , xl_mmio + MMIO_MAC_ACCESS_CMD) ; 1742 writeb(xl_priv->xl_functional_addr[3], xl_mmio + MMIO_MACDATA) ; 1743 break ; 1744 } /* switch */ 1745 1746 1747 xl_wait_misr_flags(dev) ; 1748 1749 /* Write 0xff to the CSRB flag */ 1750 writel(MEM_BYTE_WRITE | MF_CSRB , xl_mmio + MMIO_MAC_ACCESS_CMD) ; 1751 writeb(0xFF, xl_mmio + MMIO_MACDATA) ; 1752 /* Set csrb bit in MISR register to process command */ 1753 writel(MMIO_BYTE_WRITE | MISR_SET, xl_mmio + MMIO_MAC_ACCESS_CMD) ; 1754 writeb(MISR_CSRB, xl_mmio + MMIO_MACDATA) ; 1755 xl_priv->srb_queued = 1 ; 1756 1757 return ; 1758} 1759 1760/* 1761 * This is nasty, to use the MISR command you have to wait for 6 memory locations 1762 * to be zero. This is the way the driver does on other OS'es so we should be ok with 1763 * the empty loop. 1764 */ 1765 1766static void xl_wait_misr_flags(struct net_device *dev) 1767{ 1768 struct xl_private *xl_priv = netdev_priv(dev); 1769 u8 __iomem * xl_mmio = xl_priv->xl_mmio ; 1770 1771 int i ; 1772 1773 writel(MMIO_BYTE_READ | MISR_RW, xl_mmio + MMIO_MAC_ACCESS_CMD) ; 1774 if (readb(xl_mmio + MMIO_MACDATA) != 0) { /* Misr not clear */ 1775 for (i=0; i<6; i++) { 1776 writel(MEM_BYTE_READ | 0xDFFE0 | i, xl_mmio + MMIO_MAC_ACCESS_CMD) ; 1777 while (readb(xl_mmio + MMIO_MACDATA) != 0 ) {} ; /* Empty Loop */ 1778 } 1779 } 1780 1781 writel(MMIO_BYTE_WRITE | MISR_AND, xl_mmio + MMIO_MAC_ACCESS_CMD) ; 1782 writeb(0x80, xl_mmio + MMIO_MACDATA) ; 1783 1784 return ; 1785} 1786 1787/* 1788 * Change mtu size, this should work the same as olympic 1789 */ 1790 1791static int xl_change_mtu(struct net_device *dev, int mtu) 1792{ 1793 struct xl_private *xl_priv = netdev_priv(dev); 1794 u16 max_mtu ; 1795 1796 if (xl_priv->xl_ring_speed == 4) 1797 max_mtu = 4500 ; 1798 else 1799 max_mtu = 18000 ; 1800 1801 if (mtu > max_mtu) 1802 return -EINVAL ; 1803 if (mtu < 100) 1804 return -EINVAL ; 1805 1806 dev->mtu = mtu ; 1807 xl_priv->pkt_buf_sz = mtu + TR_HLEN ; 1808 1809 return 0 ; 1810} 1811 1812static void __devexit xl_remove_one (struct pci_dev *pdev) 1813{ 1814 struct net_device *dev = pci_get_drvdata(pdev); 1815 struct xl_private *xl_priv=netdev_priv(dev); 1816 1817 release_firmware(xl_priv->fw); 1818 unregister_netdev(dev); 1819 iounmap(xl_priv->xl_mmio) ; 1820 pci_release_regions(pdev) ; 1821 pci_set_drvdata(pdev,NULL) ; 1822 free_netdev(dev); 1823 return ; 1824} 1825 1826static struct pci_driver xl_3c359_driver = { 1827 .name = "3c359", 1828 .id_table = xl_pci_tbl, 1829 .probe = xl_probe, 1830 .remove = __devexit_p(xl_remove_one), 1831}; 1832 1833static int __init xl_pci_init (void) 1834{ 1835 return pci_register_driver(&xl_3c359_driver); 1836} 1837 1838 1839static void __exit xl_pci_cleanup (void) 1840{ 1841 pci_unregister_driver (&xl_3c359_driver); 1842} 1843 1844module_init(xl_pci_init); 1845module_exit(xl_pci_cleanup); 1846 1847MODULE_LICENSE("GPL") ;