Linux kernel mirror (for testing)
git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
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kernel
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linux
1/*
2 * Linux driver for Disk-On-Chip devices
3 *
4 * Copyright (C) 1999 Machine Vision Holdings, Inc.
5 * Copyright (C) 2001-2003 David Woodhouse <dwmw2@infradead.org>
6 * Copyright (C) 2002-2003 Greg Ungerer <gerg@snapgear.com>
7 * Copyright (C) 2002-2003 SnapGear Inc
8 *
9 * Released under GPL
10 */
11
12#ifndef __MTD_DOC2000_H__
13#define __MTD_DOC2000_H__
14
15#include <linux/mtd/mtd.h>
16#include <linux/mutex.h>
17
18#define DoC_Sig1 0
19#define DoC_Sig2 1
20
21#define DoC_ChipID 0x1000
22#define DoC_DOCStatus 0x1001
23#define DoC_DOCControl 0x1002
24#define DoC_FloorSelect 0x1003
25#define DoC_CDSNControl 0x1004
26#define DoC_CDSNDeviceSelect 0x1005
27#define DoC_ECCConf 0x1006
28#define DoC_2k_ECCStatus 0x1007
29
30#define DoC_CDSNSlowIO 0x100d
31#define DoC_ECCSyndrome0 0x1010
32#define DoC_ECCSyndrome1 0x1011
33#define DoC_ECCSyndrome2 0x1012
34#define DoC_ECCSyndrome3 0x1013
35#define DoC_ECCSyndrome4 0x1014
36#define DoC_ECCSyndrome5 0x1015
37#define DoC_AliasResolution 0x101b
38#define DoC_ConfigInput 0x101c
39#define DoC_ReadPipeInit 0x101d
40#define DoC_WritePipeTerm 0x101e
41#define DoC_LastDataRead 0x101f
42#define DoC_NOP 0x1020
43
44#define DoC_Mil_CDSN_IO 0x0800
45#define DoC_2k_CDSN_IO 0x1800
46
47#define DoC_Mplus_NOP 0x1002
48#define DoC_Mplus_AliasResolution 0x1004
49#define DoC_Mplus_DOCControl 0x1006
50#define DoC_Mplus_AccessStatus 0x1008
51#define DoC_Mplus_DeviceSelect 0x1008
52#define DoC_Mplus_Configuration 0x100a
53#define DoC_Mplus_OutputControl 0x100c
54#define DoC_Mplus_FlashControl 0x1020
55#define DoC_Mplus_FlashSelect 0x1022
56#define DoC_Mplus_FlashCmd 0x1024
57#define DoC_Mplus_FlashAddress 0x1026
58#define DoC_Mplus_FlashData0 0x1028
59#define DoC_Mplus_FlashData1 0x1029
60#define DoC_Mplus_ReadPipeInit 0x102a
61#define DoC_Mplus_LastDataRead 0x102c
62#define DoC_Mplus_LastDataRead1 0x102d
63#define DoC_Mplus_WritePipeTerm 0x102e
64#define DoC_Mplus_ECCSyndrome0 0x1040
65#define DoC_Mplus_ECCSyndrome1 0x1041
66#define DoC_Mplus_ECCSyndrome2 0x1042
67#define DoC_Mplus_ECCSyndrome3 0x1043
68#define DoC_Mplus_ECCSyndrome4 0x1044
69#define DoC_Mplus_ECCSyndrome5 0x1045
70#define DoC_Mplus_ECCConf 0x1046
71#define DoC_Mplus_Toggle 0x1046
72#define DoC_Mplus_DownloadStatus 0x1074
73#define DoC_Mplus_CtrlConfirm 0x1076
74#define DoC_Mplus_Power 0x1fff
75
76/* How to access the device?
77 * On ARM, it'll be mmap'd directly with 32-bit wide accesses.
78 * On PPC, it's mmap'd and 16-bit wide.
79 * Others use readb/writeb
80 */
81#if defined(__arm__)
82#define ReadDOC_(adr, reg) ((unsigned char)(*(volatile __u32 *)(((unsigned long)adr)+((reg)<<2))))
83#define WriteDOC_(d, adr, reg) do{ *(volatile __u32 *)(((unsigned long)adr)+((reg)<<2)) = (__u32)d; wmb();} while(0)
84#define DOC_IOREMAP_LEN 0x8000
85#elif defined(__ppc__)
86#define ReadDOC_(adr, reg) ((unsigned char)(*(volatile __u16 *)(((unsigned long)adr)+((reg)<<1))))
87#define WriteDOC_(d, adr, reg) do{ *(volatile __u16 *)(((unsigned long)adr)+((reg)<<1)) = (__u16)d; wmb();} while(0)
88#define DOC_IOREMAP_LEN 0x4000
89#else
90#define ReadDOC_(adr, reg) readb((void __iomem *)(adr) + (reg))
91#define WriteDOC_(d, adr, reg) writeb(d, (void __iomem *)(adr) + (reg))
92#define DOC_IOREMAP_LEN 0x2000
93
94#endif
95
96#if defined(__i386__) || defined(__x86_64__)
97#define USE_MEMCPY
98#endif
99
100/* These are provided to directly use the DoC_xxx defines */
101#define ReadDOC(adr, reg) ReadDOC_(adr,DoC_##reg)
102#define WriteDOC(d, adr, reg) WriteDOC_(d,adr,DoC_##reg)
103
104#define DOC_MODE_RESET 0
105#define DOC_MODE_NORMAL 1
106#define DOC_MODE_RESERVED1 2
107#define DOC_MODE_RESERVED2 3
108
109#define DOC_MODE_CLR_ERR 0x80
110#define DOC_MODE_RST_LAT 0x10
111#define DOC_MODE_BDECT 0x08
112#define DOC_MODE_MDWREN 0x04
113
114#define DOC_ChipID_Doc2k 0x20
115#define DOC_ChipID_Doc2kTSOP 0x21 /* internal number for MTD */
116#define DOC_ChipID_DocMil 0x30
117#define DOC_ChipID_DocMilPlus32 0x40
118#define DOC_ChipID_DocMilPlus16 0x41
119
120#define CDSN_CTRL_FR_B 0x80
121#define CDSN_CTRL_FR_B0 0x40
122#define CDSN_CTRL_FR_B1 0x80
123
124#define CDSN_CTRL_ECC_IO 0x20
125#define CDSN_CTRL_FLASH_IO 0x10
126#define CDSN_CTRL_WP 0x08
127#define CDSN_CTRL_ALE 0x04
128#define CDSN_CTRL_CLE 0x02
129#define CDSN_CTRL_CE 0x01
130
131#define DOC_ECC_RESET 0
132#define DOC_ECC_ERROR 0x80
133#define DOC_ECC_RW 0x20
134#define DOC_ECC__EN 0x08
135#define DOC_TOGGLE_BIT 0x04
136#define DOC_ECC_RESV 0x02
137#define DOC_ECC_IGNORE 0x01
138
139#define DOC_FLASH_CE 0x80
140#define DOC_FLASH_WP 0x40
141#define DOC_FLASH_BANK 0x02
142
143/* We have to also set the reserved bit 1 for enable */
144#define DOC_ECC_EN (DOC_ECC__EN | DOC_ECC_RESV)
145#define DOC_ECC_DIS (DOC_ECC_RESV)
146
147struct Nand {
148 char floor, chip;
149 unsigned long curadr;
150 unsigned char curmode;
151 /* Also some erase/write/pipeline info when we get that far */
152};
153
154#define MAX_FLOORS 4
155#define MAX_CHIPS 4
156
157#define MAX_FLOORS_MIL 1
158#define MAX_CHIPS_MIL 1
159
160#define MAX_FLOORS_MPLUS 2
161#define MAX_CHIPS_MPLUS 1
162
163#define ADDR_COLUMN 1
164#define ADDR_PAGE 2
165#define ADDR_COLUMN_PAGE 3
166
167struct DiskOnChip {
168 unsigned long physadr;
169 void __iomem *virtadr;
170 unsigned long totlen;
171 unsigned char ChipID; /* Type of DiskOnChip */
172 int ioreg;
173
174 unsigned long mfr; /* Flash IDs - only one type of flash per device */
175 unsigned long id;
176 int chipshift;
177 char page256;
178 char pageadrlen;
179 char interleave; /* Internal interleaving - Millennium Plus style */
180 unsigned long erasesize;
181
182 int curfloor;
183 int curchip;
184
185 int numchips;
186 struct Nand *chips;
187 struct mtd_info *nextdoc;
188 struct mutex lock;
189};
190
191int doc_decode_ecc(unsigned char sector[512], unsigned char ecc1[6]);
192
193#endif /* __MTD_DOC2000_H__ */