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1#ifndef _IDE_H 2#define _IDE_H 3/* 4 * linux/include/linux/ide.h 5 * 6 * Copyright (C) 1994-2002 Linus Torvalds & authors 7 */ 8 9#include <linux/init.h> 10#include <linux/ioport.h> 11#include <linux/ata.h> 12#include <linux/blkdev.h> 13#include <linux/proc_fs.h> 14#include <linux/interrupt.h> 15#include <linux/bitops.h> 16#include <linux/bio.h> 17#include <linux/device.h> 18#include <linux/pci.h> 19#include <linux/completion.h> 20#include <linux/pm.h> 21#ifdef CONFIG_BLK_DEV_IDEACPI 22#include <acpi/acpi.h> 23#endif 24#include <asm/byteorder.h> 25#include <asm/system.h> 26#include <asm/io.h> 27#include <asm/mutex.h> 28 29#if defined(CONFIG_CRIS) || defined(CONFIG_FRV) 30# define SUPPORT_VLB_SYNC 0 31#else 32# define SUPPORT_VLB_SYNC 1 33#endif 34 35/* 36 * Probably not wise to fiddle with these 37 */ 38#define IDE_DEFAULT_MAX_FAILURES 1 39#define ERROR_MAX 8 /* Max read/write errors per sector */ 40#define ERROR_RESET 3 /* Reset controller every 4th retry */ 41#define ERROR_RECAL 1 /* Recalibrate every 2nd retry */ 42 43/* 44 * Definitions for accessing IDE controller registers 45 */ 46#define IDE_NR_PORTS (10) 47 48struct ide_io_ports { 49 unsigned long data_addr; 50 51 union { 52 unsigned long error_addr; /* read: error */ 53 unsigned long feature_addr; /* write: feature */ 54 }; 55 56 unsigned long nsect_addr; 57 unsigned long lbal_addr; 58 unsigned long lbam_addr; 59 unsigned long lbah_addr; 60 61 unsigned long device_addr; 62 63 union { 64 unsigned long status_addr; /*  read: status  */ 65 unsigned long command_addr; /* write: command */ 66 }; 67 68 unsigned long ctl_addr; 69 70 unsigned long irq_addr; 71}; 72 73#define OK_STAT(stat,good,bad) (((stat)&((good)|(bad)))==(good)) 74 75#define BAD_R_STAT (ATA_BUSY | ATA_ERR) 76#define BAD_W_STAT (BAD_R_STAT | ATA_DF) 77#define BAD_STAT (BAD_R_STAT | ATA_DRQ) 78#define DRIVE_READY (ATA_DRDY | ATA_DSC) 79 80#define BAD_CRC (ATA_ABORTED | ATA_ICRC) 81 82#define SATA_NR_PORTS (3) /* 16 possible ?? */ 83 84#define SATA_STATUS_OFFSET (0) 85#define SATA_ERROR_OFFSET (1) 86#define SATA_CONTROL_OFFSET (2) 87 88/* 89 * Our Physical Region Descriptor (PRD) table should be large enough 90 * to handle the biggest I/O request we are likely to see. Since requests 91 * can have no more than 256 sectors, and since the typical blocksize is 92 * two or more sectors, we could get by with a limit of 128 entries here for 93 * the usual worst case. Most requests seem to include some contiguous blocks, 94 * further reducing the number of table entries required. 95 * 96 * The driver reverts to PIO mode for individual requests that exceed 97 * this limit (possible with 512 byte blocksizes, eg. MSDOS f/s), so handling 98 * 100% of all crazy scenarios here is not necessary. 99 * 100 * As it turns out though, we must allocate a full 4KB page for this, 101 * so the two PRD tables (ide0 & ide1) will each get half of that, 102 * allowing each to have about 256 entries (8 bytes each) from this. 103 */ 104#define PRD_BYTES 8 105#define PRD_ENTRIES 256 106 107/* 108 * Some more useful definitions 109 */ 110#define PARTN_BITS 6 /* number of minor dev bits for partitions */ 111#define MAX_DRIVES 2 /* per interface; 2 assumed by lots of code */ 112#define SECTOR_SIZE 512 113 114/* 115 * Timeouts for various operations: 116 */ 117enum { 118 /* spec allows up to 20ms */ 119 WAIT_DRQ = HZ / 10, /* 100ms */ 120 /* some laptops are very slow */ 121 WAIT_READY = 5 * HZ, /* 5s */ 122 /* should be less than 3ms (?), if all ATAPI CD is closed at boot */ 123 WAIT_PIDENTIFY = 10 * HZ, /* 10s */ 124 /* worst case when spinning up */ 125 WAIT_WORSTCASE = 30 * HZ, /* 30s */ 126 /* maximum wait for an IRQ to happen */ 127 WAIT_CMD = 10 * HZ, /* 10s */ 128 /* Some drives require a longer IRQ timeout. */ 129 WAIT_FLOPPY_CMD = 50 * HZ, /* 50s */ 130 /* 131 * Some drives (for example, Seagate STT3401A Travan) require a very 132 * long timeout, because they don't return an interrupt or clear their 133 * BSY bit until after the command completes (even retension commands). 134 */ 135 WAIT_TAPE_CMD = 900 * HZ, /* 900s */ 136 /* minimum sleep time */ 137 WAIT_MIN_SLEEP = HZ / 50, /* 20ms */ 138}; 139 140/* 141 * Op codes for special requests to be handled by ide_special_rq(). 142 * Values should be in the range of 0x20 to 0x3f. 143 */ 144#define REQ_DRIVE_RESET 0x20 145#define REQ_DEVSET_EXEC 0x21 146#define REQ_PARK_HEADS 0x22 147#define REQ_UNPARK_HEADS 0x23 148 149/* 150 * Check for an interrupt and acknowledge the interrupt status 151 */ 152struct hwif_s; 153typedef int (ide_ack_intr_t)(struct hwif_s *); 154 155/* 156 * hwif_chipset_t is used to keep track of the specific hardware 157 * chipset used by each IDE interface, if known. 158 */ 159enum { ide_unknown, ide_generic, ide_pci, 160 ide_cmd640, ide_dtc2278, ide_ali14xx, 161 ide_qd65xx, ide_umc8672, ide_ht6560b, 162 ide_4drives, ide_pmac, ide_acorn, 163 ide_au1xxx, ide_palm3710 164}; 165 166typedef u8 hwif_chipset_t; 167 168/* 169 * Structure to hold all information about the location of this port 170 */ 171typedef struct hw_regs_s { 172 union { 173 struct ide_io_ports io_ports; 174 unsigned long io_ports_array[IDE_NR_PORTS]; 175 }; 176 177 int irq; /* our irq number */ 178 ide_ack_intr_t *ack_intr; /* acknowledge interrupt */ 179 hwif_chipset_t chipset; 180 struct device *dev, *parent; 181 unsigned long config; 182} hw_regs_t; 183 184static inline void ide_std_init_ports(hw_regs_t *hw, 185 unsigned long io_addr, 186 unsigned long ctl_addr) 187{ 188 unsigned int i; 189 190 for (i = 0; i <= 7; i++) 191 hw->io_ports_array[i] = io_addr++; 192 193 hw->io_ports.ctl_addr = ctl_addr; 194} 195 196/* for IDE PCI controllers in legacy mode, temporary */ 197static inline int __ide_default_irq(unsigned long base) 198{ 199 switch (base) { 200#ifdef CONFIG_IA64 201 case 0x1f0: return isa_irq_to_vector(14); 202 case 0x170: return isa_irq_to_vector(15); 203#else 204 case 0x1f0: return 14; 205 case 0x170: return 15; 206#endif 207 } 208 return 0; 209} 210 211#if defined(CONFIG_ARM) || defined(CONFIG_FRV) || defined(CONFIG_M68K) || \ 212 defined(CONFIG_MIPS) || defined(CONFIG_MN10300) || defined(CONFIG_PARISC) \ 213 || defined(CONFIG_PPC) || defined(CONFIG_SPARC) || defined(CONFIG_SPARC64) 214#include <asm/ide.h> 215#else 216#include <asm-generic/ide_iops.h> 217#endif 218 219#define MAX_HWIFS 10 220 221/* Currently only m68k, apus and m8xx need it */ 222#ifndef IDE_ARCH_ACK_INTR 223# define ide_ack_intr(hwif) (1) 224#endif 225 226/* Currently only Atari needs it */ 227#ifndef IDE_ARCH_LOCK 228# define ide_release_lock() do {} while (0) 229# define ide_get_lock(hdlr, data) do {} while (0) 230#endif /* IDE_ARCH_LOCK */ 231 232/* 233 * Now for the data we need to maintain per-drive: ide_drive_t 234 */ 235 236#define ide_scsi 0x21 237#define ide_disk 0x20 238#define ide_optical 0x7 239#define ide_cdrom 0x5 240#define ide_tape 0x1 241#define ide_floppy 0x0 242 243/* 244 * Special Driver Flags 245 * 246 * set_geometry : respecify drive geometry 247 * recalibrate : seek to cyl 0 248 * set_multmode : set multmode count 249 * reserved : unused 250 */ 251typedef union { 252 unsigned all : 8; 253 struct { 254 unsigned set_geometry : 1; 255 unsigned recalibrate : 1; 256 unsigned set_multmode : 1; 257 unsigned reserved : 5; 258 } b; 259} special_t; 260 261/* 262 * Status returned from various ide_ functions 263 */ 264typedef enum { 265 ide_stopped, /* no drive operation was started */ 266 ide_started, /* a drive operation was started, handler was set */ 267} ide_startstop_t; 268 269enum { 270 IDE_TFLAG_LBA48 = (1 << 0), 271 IDE_TFLAG_FLAGGED = (1 << 2), 272 IDE_TFLAG_OUT_DATA = (1 << 3), 273 IDE_TFLAG_OUT_HOB_FEATURE = (1 << 4), 274 IDE_TFLAG_OUT_HOB_NSECT = (1 << 5), 275 IDE_TFLAG_OUT_HOB_LBAL = (1 << 6), 276 IDE_TFLAG_OUT_HOB_LBAM = (1 << 7), 277 IDE_TFLAG_OUT_HOB_LBAH = (1 << 8), 278 IDE_TFLAG_OUT_HOB = IDE_TFLAG_OUT_HOB_FEATURE | 279 IDE_TFLAG_OUT_HOB_NSECT | 280 IDE_TFLAG_OUT_HOB_LBAL | 281 IDE_TFLAG_OUT_HOB_LBAM | 282 IDE_TFLAG_OUT_HOB_LBAH, 283 IDE_TFLAG_OUT_FEATURE = (1 << 9), 284 IDE_TFLAG_OUT_NSECT = (1 << 10), 285 IDE_TFLAG_OUT_LBAL = (1 << 11), 286 IDE_TFLAG_OUT_LBAM = (1 << 12), 287 IDE_TFLAG_OUT_LBAH = (1 << 13), 288 IDE_TFLAG_OUT_TF = IDE_TFLAG_OUT_FEATURE | 289 IDE_TFLAG_OUT_NSECT | 290 IDE_TFLAG_OUT_LBAL | 291 IDE_TFLAG_OUT_LBAM | 292 IDE_TFLAG_OUT_LBAH, 293 IDE_TFLAG_OUT_DEVICE = (1 << 14), 294 IDE_TFLAG_WRITE = (1 << 15), 295 IDE_TFLAG_FLAGGED_SET_IN_FLAGS = (1 << 16), 296 IDE_TFLAG_IN_DATA = (1 << 17), 297 IDE_TFLAG_CUSTOM_HANDLER = (1 << 18), 298 IDE_TFLAG_DMA_PIO_FALLBACK = (1 << 19), 299 IDE_TFLAG_IN_HOB_FEATURE = (1 << 20), 300 IDE_TFLAG_IN_HOB_NSECT = (1 << 21), 301 IDE_TFLAG_IN_HOB_LBAL = (1 << 22), 302 IDE_TFLAG_IN_HOB_LBAM = (1 << 23), 303 IDE_TFLAG_IN_HOB_LBAH = (1 << 24), 304 IDE_TFLAG_IN_HOB_LBA = IDE_TFLAG_IN_HOB_LBAL | 305 IDE_TFLAG_IN_HOB_LBAM | 306 IDE_TFLAG_IN_HOB_LBAH, 307 IDE_TFLAG_IN_HOB = IDE_TFLAG_IN_HOB_FEATURE | 308 IDE_TFLAG_IN_HOB_NSECT | 309 IDE_TFLAG_IN_HOB_LBA, 310 IDE_TFLAG_IN_FEATURE = (1 << 1), 311 IDE_TFLAG_IN_NSECT = (1 << 25), 312 IDE_TFLAG_IN_LBAL = (1 << 26), 313 IDE_TFLAG_IN_LBAM = (1 << 27), 314 IDE_TFLAG_IN_LBAH = (1 << 28), 315 IDE_TFLAG_IN_LBA = IDE_TFLAG_IN_LBAL | 316 IDE_TFLAG_IN_LBAM | 317 IDE_TFLAG_IN_LBAH, 318 IDE_TFLAG_IN_TF = IDE_TFLAG_IN_NSECT | 319 IDE_TFLAG_IN_LBA, 320 IDE_TFLAG_IN_DEVICE = (1 << 29), 321 IDE_TFLAG_HOB = IDE_TFLAG_OUT_HOB | 322 IDE_TFLAG_IN_HOB, 323 IDE_TFLAG_TF = IDE_TFLAG_OUT_TF | 324 IDE_TFLAG_IN_TF, 325 IDE_TFLAG_DEVICE = IDE_TFLAG_OUT_DEVICE | 326 IDE_TFLAG_IN_DEVICE, 327 /* force 16-bit I/O operations */ 328 IDE_TFLAG_IO_16BIT = (1 << 30), 329 /* ide_task_t was allocated using kmalloc() */ 330 IDE_TFLAG_DYN = (1 << 31), 331}; 332 333struct ide_taskfile { 334 u8 hob_data; /* 0: high data byte (for TASKFILE IOCTL) */ 335 336 u8 hob_feature; /* 1-5: additional data to support LBA48 */ 337 u8 hob_nsect; 338 u8 hob_lbal; 339 u8 hob_lbam; 340 u8 hob_lbah; 341 342 u8 data; /* 6: low data byte (for TASKFILE IOCTL) */ 343 344 union { /*  7: */ 345 u8 error; /* read: error */ 346 u8 feature; /* write: feature */ 347 }; 348 349 u8 nsect; /* 8: number of sectors */ 350 u8 lbal; /* 9: LBA low */ 351 u8 lbam; /* 10: LBA mid */ 352 u8 lbah; /* 11: LBA high */ 353 354 u8 device; /* 12: device select */ 355 356 union { /* 13: */ 357 u8 status; /*  read: status  */ 358 u8 command; /* write: command */ 359 }; 360}; 361 362typedef struct ide_task_s { 363 union { 364 struct ide_taskfile tf; 365 u8 tf_array[14]; 366 }; 367 u32 tf_flags; 368 int data_phase; 369 struct request *rq; /* copy of request */ 370 void *special; /* valid_t generally */ 371} ide_task_t; 372 373/* ATAPI packet command flags */ 374enum { 375 /* set when an error is considered normal - no retry (ide-tape) */ 376 PC_FLAG_ABORT = (1 << 0), 377 PC_FLAG_SUPPRESS_ERROR = (1 << 1), 378 PC_FLAG_WAIT_FOR_DSC = (1 << 2), 379 PC_FLAG_DMA_OK = (1 << 3), 380 PC_FLAG_DMA_IN_PROGRESS = (1 << 4), 381 PC_FLAG_DMA_ERROR = (1 << 5), 382 PC_FLAG_WRITING = (1 << 6), 383 /* command timed out */ 384 PC_FLAG_TIMEDOUT = (1 << 7), 385}; 386 387/* 388 * With each packet command, we allocate a buffer of IDE_PC_BUFFER_SIZE bytes. 389 * This is used for several packet commands (not for READ/WRITE commands). 390 */ 391#define IDE_PC_BUFFER_SIZE 256 392#define ATAPI_WAIT_PC (60 * HZ) 393 394struct ide_atapi_pc { 395 /* actual packet bytes */ 396 u8 c[12]; 397 /* incremented on each retry */ 398 int retries; 399 int error; 400 401 /* bytes to transfer */ 402 int req_xfer; 403 /* bytes actually transferred */ 404 int xferred; 405 406 /* data buffer */ 407 u8 *buf; 408 /* current buffer position */ 409 u8 *cur_pos; 410 int buf_size; 411 /* missing/available data on the current buffer */ 412 int b_count; 413 414 /* the corresponding request */ 415 struct request *rq; 416 417 unsigned long flags; 418 419 /* 420 * those are more or less driver-specific and some of them are subject 421 * to change/removal later. 422 */ 423 u8 pc_buf[IDE_PC_BUFFER_SIZE]; 424 425 /* idetape only */ 426 struct idetape_bh *bh; 427 char *b_data; 428 429 struct scatterlist *sg; 430 unsigned int sg_cnt; 431 432 unsigned long timeout; 433}; 434 435struct ide_devset; 436struct ide_driver; 437 438#ifdef CONFIG_BLK_DEV_IDEACPI 439struct ide_acpi_drive_link; 440struct ide_acpi_hwif_link; 441#endif 442 443struct ide_drive_s; 444 445struct ide_disk_ops { 446 int (*check)(struct ide_drive_s *, const char *); 447 int (*get_capacity)(struct ide_drive_s *); 448 void (*setup)(struct ide_drive_s *); 449 void (*flush)(struct ide_drive_s *); 450 int (*init_media)(struct ide_drive_s *, struct gendisk *); 451 int (*set_doorlock)(struct ide_drive_s *, struct gendisk *, 452 int); 453 ide_startstop_t (*do_request)(struct ide_drive_s *, struct request *, 454 sector_t); 455 int (*end_request)(struct ide_drive_s *, int, int); 456 int (*ioctl)(struct ide_drive_s *, struct block_device *, 457 fmode_t, unsigned int, unsigned long); 458}; 459 460/* ATAPI device flags */ 461enum { 462 IDE_AFLAG_DRQ_INTERRUPT = (1 << 0), 463 464 /* ide-cd */ 465 /* Drive cannot eject the disc. */ 466 IDE_AFLAG_NO_EJECT = (1 << 1), 467 /* Drive is a pre ATAPI 1.2 drive. */ 468 IDE_AFLAG_PRE_ATAPI12 = (1 << 2), 469 /* TOC addresses are in BCD. */ 470 IDE_AFLAG_TOCADDR_AS_BCD = (1 << 3), 471 /* TOC track numbers are in BCD. */ 472 IDE_AFLAG_TOCTRACKS_AS_BCD = (1 << 4), 473 /* 474 * Drive does not provide data in multiples of SECTOR_SIZE 475 * when more than one interrupt is needed. 476 */ 477 IDE_AFLAG_LIMIT_NFRAMES = (1 << 5), 478 /* Saved TOC information is current. */ 479 IDE_AFLAG_TOC_VALID = (1 << 6), 480 /* We think that the drive door is locked. */ 481 IDE_AFLAG_DOOR_LOCKED = (1 << 7), 482 /* SET_CD_SPEED command is unsupported. */ 483 IDE_AFLAG_NO_SPEED_SELECT = (1 << 8), 484 IDE_AFLAG_VERTOS_300_SSD = (1 << 9), 485 IDE_AFLAG_VERTOS_600_ESD = (1 << 10), 486 IDE_AFLAG_SANYO_3CD = (1 << 11), 487 IDE_AFLAG_FULL_CAPS_PAGE = (1 << 12), 488 IDE_AFLAG_PLAY_AUDIO_OK = (1 << 13), 489 IDE_AFLAG_LE_SPEED_FIELDS = (1 << 14), 490 491 /* ide-floppy */ 492 /* Avoid commands not supported in Clik drive */ 493 IDE_AFLAG_CLIK_DRIVE = (1 << 15), 494 /* Requires BH algorithm for packets */ 495 IDE_AFLAG_ZIP_DRIVE = (1 << 16), 496 /* Supports format progress report */ 497 IDE_AFLAG_SRFP = (1 << 17), 498 499 /* ide-tape */ 500 IDE_AFLAG_IGNORE_DSC = (1 << 18), 501 /* 0 When the tape position is unknown */ 502 IDE_AFLAG_ADDRESS_VALID = (1 << 19), 503 /* Device already opened */ 504 IDE_AFLAG_BUSY = (1 << 20), 505 /* Attempt to auto-detect the current user block size */ 506 IDE_AFLAG_DETECT_BS = (1 << 21), 507 /* Currently on a filemark */ 508 IDE_AFLAG_FILEMARK = (1 << 22), 509 /* 0 = no tape is loaded, so we don't rewind after ejecting */ 510 IDE_AFLAG_MEDIUM_PRESENT = (1 << 23), 511 512 IDE_AFLAG_NO_AUTOCLOSE = (1 << 24), 513}; 514 515/* device flags */ 516enum { 517 /* restore settings after device reset */ 518 IDE_DFLAG_KEEP_SETTINGS = (1 << 0), 519 /* device is using DMA for read/write */ 520 IDE_DFLAG_USING_DMA = (1 << 1), 521 /* okay to unmask other IRQs */ 522 IDE_DFLAG_UNMASK = (1 << 2), 523 /* don't attempt flushes */ 524 IDE_DFLAG_NOFLUSH = (1 << 3), 525 /* DSC overlap */ 526 IDE_DFLAG_DSC_OVERLAP = (1 << 4), 527 /* give potential excess bandwidth */ 528 IDE_DFLAG_NICE1 = (1 << 5), 529 /* device is physically present */ 530 IDE_DFLAG_PRESENT = (1 << 6), 531 /* device ejected hint */ 532 IDE_DFLAG_DEAD = (1 << 7), 533 /* id read from device (synthetic if not set) */ 534 IDE_DFLAG_ID_READ = (1 << 8), 535 IDE_DFLAG_NOPROBE = (1 << 9), 536 /* need to do check_media_change() */ 537 IDE_DFLAG_REMOVABLE = (1 << 10), 538 /* needed for removable devices */ 539 IDE_DFLAG_ATTACH = (1 << 11), 540 IDE_DFLAG_FORCED_GEOM = (1 << 12), 541 /* disallow setting unmask bit */ 542 IDE_DFLAG_NO_UNMASK = (1 << 13), 543 /* disallow enabling 32-bit I/O */ 544 IDE_DFLAG_NO_IO_32BIT = (1 << 14), 545 /* for removable only: door lock/unlock works */ 546 IDE_DFLAG_DOORLOCKING = (1 << 15), 547 /* disallow DMA */ 548 IDE_DFLAG_NODMA = (1 << 16), 549 /* powermanagment told us not to do anything, so sleep nicely */ 550 IDE_DFLAG_BLOCKED = (1 << 17), 551 /* sleeping & sleep field valid */ 552 IDE_DFLAG_SLEEPING = (1 << 18), 553 IDE_DFLAG_POST_RESET = (1 << 19), 554 IDE_DFLAG_UDMA33_WARNED = (1 << 20), 555 IDE_DFLAG_LBA48 = (1 << 21), 556 /* status of write cache */ 557 IDE_DFLAG_WCACHE = (1 << 22), 558 /* used for ignoring ATA_DF */ 559 IDE_DFLAG_NOWERR = (1 << 23), 560 /* retrying in PIO */ 561 IDE_DFLAG_DMA_PIO_RETRY = (1 << 24), 562 IDE_DFLAG_LBA = (1 << 25), 563 /* don't unload heads */ 564 IDE_DFLAG_NO_UNLOAD = (1 << 26), 565 /* heads unloaded, please don't reset port */ 566 IDE_DFLAG_PARKED = (1 << 27), 567 IDE_DFLAG_MEDIA_CHANGED = (1 << 28), 568 /* write protect */ 569 IDE_DFLAG_WP = (1 << 29), 570 IDE_DFLAG_FORMAT_IN_PROGRESS = (1 << 30), 571}; 572 573struct ide_drive_s { 574 char name[4]; /* drive name, such as "hda" */ 575 char driver_req[10]; /* requests specific driver */ 576 577 struct request_queue *queue; /* request queue */ 578 579 struct request *rq; /* current request */ 580 void *driver_data; /* extra driver data */ 581 u16 *id; /* identification info */ 582#ifdef CONFIG_IDE_PROC_FS 583 struct proc_dir_entry *proc; /* /proc/ide/ directory entry */ 584 const struct ide_proc_devset *settings; /* /proc/ide/ drive settings */ 585#endif 586 struct hwif_s *hwif; /* actually (ide_hwif_t *) */ 587 588 const struct ide_disk_ops *disk_ops; 589 590 unsigned long dev_flags; 591 592 unsigned long sleep; /* sleep until this time */ 593 unsigned long timeout; /* max time to wait for irq */ 594 595 special_t special; /* special action flags */ 596 597 u8 select; /* basic drive/head select reg value */ 598 u8 retry_pio; /* retrying dma capable host in pio */ 599 u8 waiting_for_dma; /* dma currently in progress */ 600 u8 dma; /* atapi dma flag */ 601 602 u8 quirk_list; /* considered quirky, set for a specific host */ 603 u8 init_speed; /* transfer rate set at boot */ 604 u8 current_speed; /* current transfer rate set */ 605 u8 desired_speed; /* desired transfer rate set */ 606 u8 dn; /* now wide spread use */ 607 u8 acoustic; /* acoustic management */ 608 u8 media; /* disk, cdrom, tape, floppy, ... */ 609 u8 ready_stat; /* min status value for drive ready */ 610 u8 mult_count; /* current multiple sector setting */ 611 u8 mult_req; /* requested multiple sector setting */ 612 u8 io_32bit; /* 0=16-bit, 1=32-bit, 2/3=32bit+sync */ 613 u8 bad_wstat; /* used for ignoring ATA_DF */ 614 u8 head; /* "real" number of heads */ 615 u8 sect; /* "real" sectors per track */ 616 u8 bios_head; /* BIOS/fdisk/LILO number of heads */ 617 u8 bios_sect; /* BIOS/fdisk/LILO sectors per track */ 618 619 /* delay this long before sending packet command */ 620 u8 pc_delay; 621 622 unsigned int bios_cyl; /* BIOS/fdisk/LILO number of cyls */ 623 unsigned int cyl; /* "real" number of cyls */ 624 unsigned int drive_data; /* used by set_pio_mode/selectproc */ 625 unsigned int failures; /* current failure count */ 626 unsigned int max_failures; /* maximum allowed failure count */ 627 u64 probed_capacity;/* initial reported media capacity (ide-cd only currently) */ 628 629 u64 capacity64; /* total number of sectors */ 630 631 int lun; /* logical unit */ 632 int crc_count; /* crc counter to reduce drive speed */ 633 634 unsigned long debug_mask; /* debugging levels switch */ 635 636#ifdef CONFIG_BLK_DEV_IDEACPI 637 struct ide_acpi_drive_link *acpidata; 638#endif 639 struct list_head list; 640 struct device gendev; 641 struct completion gendev_rel_comp; /* to deal with device release() */ 642 643 /* current packet command */ 644 struct ide_atapi_pc *pc; 645 646 /* callback for packet commands */ 647 void (*pc_callback)(struct ide_drive_s *, int); 648 649 void (*pc_update_buffers)(struct ide_drive_s *, struct ide_atapi_pc *); 650 int (*pc_io_buffers)(struct ide_drive_s *, struct ide_atapi_pc *, 651 unsigned int, int); 652 653 ide_startstop_t (*irq_handler)(struct ide_drive_s *); 654 655 unsigned long atapi_flags; 656 657 struct ide_atapi_pc request_sense_pc; 658 struct request request_sense_rq; 659}; 660 661typedef struct ide_drive_s ide_drive_t; 662 663#define to_ide_device(dev) container_of(dev, ide_drive_t, gendev) 664 665#define to_ide_drv(obj, cont_type) \ 666 container_of(obj, struct cont_type, dev) 667 668#define ide_drv_g(disk, cont_type) \ 669 container_of((disk)->private_data, struct cont_type, driver) 670 671struct ide_port_info; 672 673struct ide_tp_ops { 674 void (*exec_command)(struct hwif_s *, u8); 675 u8 (*read_status)(struct hwif_s *); 676 u8 (*read_altstatus)(struct hwif_s *); 677 678 void (*set_irq)(struct hwif_s *, int); 679 680 void (*tf_load)(ide_drive_t *, struct ide_task_s *); 681 void (*tf_read)(ide_drive_t *, struct ide_task_s *); 682 683 void (*input_data)(ide_drive_t *, struct request *, void *, 684 unsigned int); 685 void (*output_data)(ide_drive_t *, struct request *, void *, 686 unsigned int); 687}; 688 689extern const struct ide_tp_ops default_tp_ops; 690 691/** 692 * struct ide_port_ops - IDE port operations 693 * 694 * @init_dev: host specific initialization of a device 695 * @set_pio_mode: routine to program host for PIO mode 696 * @set_dma_mode: routine to program host for DMA mode 697 * @selectproc: tweaks hardware to select drive 698 * @reset_poll: chipset polling based on hba specifics 699 * @pre_reset: chipset specific changes to default for device-hba resets 700 * @resetproc: routine to reset controller after a disk reset 701 * @maskproc: special host masking for drive selection 702 * @quirkproc: check host's drive quirk list 703 * @clear_irq: clear IRQ 704 * 705 * @mdma_filter: filter MDMA modes 706 * @udma_filter: filter UDMA modes 707 * 708 * @cable_detect: detect cable type 709 */ 710struct ide_port_ops { 711 void (*init_dev)(ide_drive_t *); 712 void (*set_pio_mode)(ide_drive_t *, const u8); 713 void (*set_dma_mode)(ide_drive_t *, const u8); 714 void (*selectproc)(ide_drive_t *); 715 int (*reset_poll)(ide_drive_t *); 716 void (*pre_reset)(ide_drive_t *); 717 void (*resetproc)(ide_drive_t *); 718 void (*maskproc)(ide_drive_t *, int); 719 void (*quirkproc)(ide_drive_t *); 720 void (*clear_irq)(ide_drive_t *); 721 722 u8 (*mdma_filter)(ide_drive_t *); 723 u8 (*udma_filter)(ide_drive_t *); 724 725 u8 (*cable_detect)(struct hwif_s *); 726}; 727 728struct ide_dma_ops { 729 void (*dma_host_set)(struct ide_drive_s *, int); 730 int (*dma_setup)(struct ide_drive_s *); 731 void (*dma_exec_cmd)(struct ide_drive_s *, u8); 732 void (*dma_start)(struct ide_drive_s *); 733 int (*dma_end)(struct ide_drive_s *); 734 int (*dma_test_irq)(struct ide_drive_s *); 735 void (*dma_lost_irq)(struct ide_drive_s *); 736 void (*dma_timeout)(struct ide_drive_s *); 737 /* 738 * The following method is optional and only required to be 739 * implemented for the SFF-8038i compatible controllers. 740 */ 741 u8 (*dma_sff_read_status)(struct hwif_s *); 742}; 743 744struct ide_host; 745 746typedef struct hwif_s { 747 struct hwif_s *mate; /* other hwif from same PCI chip */ 748 struct proc_dir_entry *proc; /* /proc/ide/ directory entry */ 749 750 struct ide_host *host; 751 752 char name[6]; /* name of interface, eg. "ide0" */ 753 754 struct ide_io_ports io_ports; 755 756 unsigned long sata_scr[SATA_NR_PORTS]; 757 758 ide_drive_t *devices[MAX_DRIVES + 1]; 759 760 u8 major; /* our major number */ 761 u8 index; /* 0 for ide0; 1 for ide1; ... */ 762 u8 channel; /* for dual-port chips: 0=primary, 1=secondary */ 763 764 u32 host_flags; 765 766 u8 pio_mask; 767 768 u8 ultra_mask; 769 u8 mwdma_mask; 770 u8 swdma_mask; 771 772 u8 cbl; /* cable type */ 773 774 hwif_chipset_t chipset; /* sub-module for tuning.. */ 775 776 struct device *dev; 777 778 ide_ack_intr_t *ack_intr; 779 780 void (*rw_disk)(ide_drive_t *, struct request *); 781 782 const struct ide_tp_ops *tp_ops; 783 const struct ide_port_ops *port_ops; 784 const struct ide_dma_ops *dma_ops; 785 786 /* dma physical region descriptor table (cpu view) */ 787 unsigned int *dmatable_cpu; 788 /* dma physical region descriptor table (dma view) */ 789 dma_addr_t dmatable_dma; 790 791 /* maximum number of PRD table entries */ 792 int prd_max_nents; 793 /* PRD entry size in bytes */ 794 int prd_ent_size; 795 796 /* Scatter-gather list used to build the above */ 797 struct scatterlist *sg_table; 798 int sg_max_nents; /* Maximum number of entries in it */ 799 int sg_nents; /* Current number of entries in it */ 800 int orig_sg_nents; 801 int sg_dma_direction; /* dma transfer direction */ 802 803 /* data phase of the active command (currently only valid for PIO/DMA) */ 804 int data_phase; 805 806 struct ide_task_s task; /* current command */ 807 808 unsigned int nsect; 809 unsigned int nleft; 810 struct scatterlist *cursg; 811 unsigned int cursg_ofs; 812 813 int rqsize; /* max sectors per request */ 814 int irq; /* our irq number */ 815 816 unsigned long dma_base; /* base addr for dma ports */ 817 818 unsigned long config_data; /* for use by chipset-specific code */ 819 unsigned long select_data; /* for use by chipset-specific code */ 820 821 unsigned long extra_base; /* extra addr for dma ports */ 822 unsigned extra_ports; /* number of extra dma ports */ 823 824 unsigned present : 1; /* this interface exists */ 825 unsigned busy : 1; /* serializes devices on a port */ 826 827 struct device gendev; 828 struct device *portdev; 829 830 struct completion gendev_rel_comp; /* To deal with device release() */ 831 832 void *hwif_data; /* extra hwif data */ 833 834#ifdef CONFIG_BLK_DEV_IDEACPI 835 struct ide_acpi_hwif_link *acpidata; 836#endif 837 838 /* IRQ handler, if active */ 839 ide_startstop_t (*handler)(ide_drive_t *); 840 841 /* BOOL: polling active & poll_timeout field valid */ 842 unsigned int polling : 1; 843 844 /* current drive */ 845 ide_drive_t *cur_dev; 846 847 /* current request */ 848 struct request *rq; 849 850 /* failsafe timer */ 851 struct timer_list timer; 852 /* timeout value during long polls */ 853 unsigned long poll_timeout; 854 /* queried upon timeouts */ 855 int (*expiry)(ide_drive_t *); 856 857 int req_gen; 858 int req_gen_timer; 859 860 spinlock_t lock; 861} ____cacheline_internodealigned_in_smp ide_hwif_t; 862 863#define MAX_HOST_PORTS 4 864 865struct ide_host { 866 ide_hwif_t *ports[MAX_HOST_PORTS + 1]; 867 unsigned int n_ports; 868 struct device *dev[2]; 869 unsigned int (*init_chipset)(struct pci_dev *); 870 irq_handler_t irq_handler; 871 unsigned long host_flags; 872 void *host_priv; 873 ide_hwif_t *cur_port; /* for hosts requiring serialization */ 874 875 /* used for hosts requiring serialization */ 876 volatile unsigned long host_busy; 877}; 878 879#define IDE_HOST_BUSY 0 880 881/* 882 * internal ide interrupt handler type 883 */ 884typedef ide_startstop_t (ide_handler_t)(ide_drive_t *); 885typedef int (ide_expiry_t)(ide_drive_t *); 886 887/* used by ide-cd, ide-floppy, etc. */ 888typedef void (xfer_func_t)(ide_drive_t *, struct request *rq, void *, unsigned); 889 890extern struct mutex ide_setting_mtx; 891 892/* 893 * configurable drive settings 894 */ 895 896#define DS_SYNC (1 << 0) 897 898struct ide_devset { 899 int (*get)(ide_drive_t *); 900 int (*set)(ide_drive_t *, int); 901 unsigned int flags; 902}; 903 904#define __DEVSET(_flags, _get, _set) { \ 905 .flags = _flags, \ 906 .get = _get, \ 907 .set = _set, \ 908} 909 910#define ide_devset_get(name, field) \ 911static int get_##name(ide_drive_t *drive) \ 912{ \ 913 return drive->field; \ 914} 915 916#define ide_devset_set(name, field) \ 917static int set_##name(ide_drive_t *drive, int arg) \ 918{ \ 919 drive->field = arg; \ 920 return 0; \ 921} 922 923#define ide_devset_get_flag(name, flag) \ 924static int get_##name(ide_drive_t *drive) \ 925{ \ 926 return !!(drive->dev_flags & flag); \ 927} 928 929#define ide_devset_set_flag(name, flag) \ 930static int set_##name(ide_drive_t *drive, int arg) \ 931{ \ 932 if (arg) \ 933 drive->dev_flags |= flag; \ 934 else \ 935 drive->dev_flags &= ~flag; \ 936 return 0; \ 937} 938 939#define __IDE_DEVSET(_name, _flags, _get, _set) \ 940const struct ide_devset ide_devset_##_name = \ 941 __DEVSET(_flags, _get, _set) 942 943#define IDE_DEVSET(_name, _flags, _get, _set) \ 944static __IDE_DEVSET(_name, _flags, _get, _set) 945 946#define ide_devset_rw(_name, _func) \ 947IDE_DEVSET(_name, 0, get_##_func, set_##_func) 948 949#define ide_devset_w(_name, _func) \ 950IDE_DEVSET(_name, 0, NULL, set_##_func) 951 952#define ide_ext_devset_rw(_name, _func) \ 953__IDE_DEVSET(_name, 0, get_##_func, set_##_func) 954 955#define ide_ext_devset_rw_sync(_name, _func) \ 956__IDE_DEVSET(_name, DS_SYNC, get_##_func, set_##_func) 957 958#define ide_decl_devset(_name) \ 959extern const struct ide_devset ide_devset_##_name 960 961ide_decl_devset(io_32bit); 962ide_decl_devset(keepsettings); 963ide_decl_devset(pio_mode); 964ide_decl_devset(unmaskirq); 965ide_decl_devset(using_dma); 966 967#ifdef CONFIG_IDE_PROC_FS 968/* 969 * /proc/ide interface 970 */ 971 972#define ide_devset_rw_field(_name, _field) \ 973ide_devset_get(_name, _field); \ 974ide_devset_set(_name, _field); \ 975IDE_DEVSET(_name, DS_SYNC, get_##_name, set_##_name) 976 977#define ide_devset_rw_flag(_name, _field) \ 978ide_devset_get_flag(_name, _field); \ 979ide_devset_set_flag(_name, _field); \ 980IDE_DEVSET(_name, DS_SYNC, get_##_name, set_##_name) 981 982struct ide_proc_devset { 983 const char *name; 984 const struct ide_devset *setting; 985 int min, max; 986 int (*mulf)(ide_drive_t *); 987 int (*divf)(ide_drive_t *); 988}; 989 990#define __IDE_PROC_DEVSET(_name, _min, _max, _mulf, _divf) { \ 991 .name = __stringify(_name), \ 992 .setting = &ide_devset_##_name, \ 993 .min = _min, \ 994 .max = _max, \ 995 .mulf = _mulf, \ 996 .divf = _divf, \ 997} 998 999#define IDE_PROC_DEVSET(_name, _min, _max) \ 1000__IDE_PROC_DEVSET(_name, _min, _max, NULL, NULL) 1001 1002typedef struct { 1003 const char *name; 1004 mode_t mode; 1005 read_proc_t *read_proc; 1006 write_proc_t *write_proc; 1007} ide_proc_entry_t; 1008 1009void proc_ide_create(void); 1010void proc_ide_destroy(void); 1011void ide_proc_register_port(ide_hwif_t *); 1012void ide_proc_port_register_devices(ide_hwif_t *); 1013void ide_proc_unregister_device(ide_drive_t *); 1014void ide_proc_unregister_port(ide_hwif_t *); 1015void ide_proc_register_driver(ide_drive_t *, struct ide_driver *); 1016void ide_proc_unregister_driver(ide_drive_t *, struct ide_driver *); 1017 1018read_proc_t proc_ide_read_capacity; 1019read_proc_t proc_ide_read_geometry; 1020 1021/* 1022 * Standard exit stuff: 1023 */ 1024#define PROC_IDE_READ_RETURN(page,start,off,count,eof,len) \ 1025{ \ 1026 len -= off; \ 1027 if (len < count) { \ 1028 *eof = 1; \ 1029 if (len <= 0) \ 1030 return 0; \ 1031 } else \ 1032 len = count; \ 1033 *start = page + off; \ 1034 return len; \ 1035} 1036#else 1037static inline void proc_ide_create(void) { ; } 1038static inline void proc_ide_destroy(void) { ; } 1039static inline void ide_proc_register_port(ide_hwif_t *hwif) { ; } 1040static inline void ide_proc_port_register_devices(ide_hwif_t *hwif) { ; } 1041static inline void ide_proc_unregister_device(ide_drive_t *drive) { ; } 1042static inline void ide_proc_unregister_port(ide_hwif_t *hwif) { ; } 1043static inline void ide_proc_register_driver(ide_drive_t *drive, 1044 struct ide_driver *driver) { ; } 1045static inline void ide_proc_unregister_driver(ide_drive_t *drive, 1046 struct ide_driver *driver) { ; } 1047#define PROC_IDE_READ_RETURN(page,start,off,count,eof,len) return 0; 1048#endif 1049 1050enum { 1051 /* enter/exit functions */ 1052 IDE_DBG_FUNC = (1 << 0), 1053 /* sense key/asc handling */ 1054 IDE_DBG_SENSE = (1 << 1), 1055 /* packet commands handling */ 1056 IDE_DBG_PC = (1 << 2), 1057 /* request handling */ 1058 IDE_DBG_RQ = (1 << 3), 1059 /* driver probing/setup */ 1060 IDE_DBG_PROBE = (1 << 4), 1061}; 1062 1063/* DRV_NAME has to be defined in the driver before using the macro below */ 1064#define __ide_debug_log(lvl, fmt, args...) \ 1065{ \ 1066 if (unlikely(drive->debug_mask & lvl)) \ 1067 printk(KERN_INFO DRV_NAME ": " fmt, ## args); \ 1068} 1069 1070/* 1071 * Power Management state machine (rq->pm->pm_step). 1072 * 1073 * For each step, the core calls ide_start_power_step() first. 1074 * This can return: 1075 * - ide_stopped : In this case, the core calls us back again unless 1076 * step have been set to ide_power_state_completed. 1077 * - ide_started : In this case, the channel is left busy until an 1078 * async event (interrupt) occurs. 1079 * Typically, ide_start_power_step() will issue a taskfile request with 1080 * do_rw_taskfile(). 1081 * 1082 * Upon reception of the interrupt, the core will call ide_complete_power_step() 1083 * with the error code if any. This routine should update the step value 1084 * and return. It should not start a new request. The core will call 1085 * ide_start_power_step() for the new step value, unless step have been 1086 * set to IDE_PM_COMPLETED. 1087 */ 1088enum { 1089 IDE_PM_START_SUSPEND, 1090 IDE_PM_FLUSH_CACHE = IDE_PM_START_SUSPEND, 1091 IDE_PM_STANDBY, 1092 1093 IDE_PM_START_RESUME, 1094 IDE_PM_RESTORE_PIO = IDE_PM_START_RESUME, 1095 IDE_PM_IDLE, 1096 IDE_PM_RESTORE_DMA, 1097 1098 IDE_PM_COMPLETED, 1099}; 1100 1101int generic_ide_suspend(struct device *, pm_message_t); 1102int generic_ide_resume(struct device *); 1103 1104void ide_complete_power_step(ide_drive_t *, struct request *); 1105ide_startstop_t ide_start_power_step(ide_drive_t *, struct request *); 1106void ide_complete_pm_request(ide_drive_t *, struct request *); 1107void ide_check_pm_state(ide_drive_t *, struct request *); 1108 1109/* 1110 * Subdrivers support. 1111 * 1112 * The gendriver.owner field should be set to the module owner of this driver. 1113 * The gendriver.name field should be set to the name of this driver 1114 */ 1115struct ide_driver { 1116 const char *version; 1117 ide_startstop_t (*do_request)(ide_drive_t *, struct request *, sector_t); 1118 int (*end_request)(ide_drive_t *, int, int); 1119 struct device_driver gen_driver; 1120 int (*probe)(ide_drive_t *); 1121 void (*remove)(ide_drive_t *); 1122 void (*resume)(ide_drive_t *); 1123 void (*shutdown)(ide_drive_t *); 1124#ifdef CONFIG_IDE_PROC_FS 1125 ide_proc_entry_t * (*proc_entries)(ide_drive_t *); 1126 const struct ide_proc_devset * (*proc_devsets)(ide_drive_t *); 1127#endif 1128}; 1129 1130#define to_ide_driver(drv) container_of(drv, struct ide_driver, gen_driver) 1131 1132int ide_device_get(ide_drive_t *); 1133void ide_device_put(ide_drive_t *); 1134 1135struct ide_ioctl_devset { 1136 unsigned int get_ioctl; 1137 unsigned int set_ioctl; 1138 const struct ide_devset *setting; 1139}; 1140 1141int ide_setting_ioctl(ide_drive_t *, struct block_device *, unsigned int, 1142 unsigned long, const struct ide_ioctl_devset *); 1143 1144int generic_ide_ioctl(ide_drive_t *, struct block_device *, unsigned, unsigned long); 1145 1146extern int ide_vlb_clk; 1147extern int ide_pci_clk; 1148 1149extern int ide_end_request (ide_drive_t *drive, int uptodate, int nrsecs); 1150int ide_end_dequeued_request(ide_drive_t *drive, struct request *rq, 1151 int uptodate, int nr_sectors); 1152 1153extern void ide_set_handler (ide_drive_t *drive, ide_handler_t *handler, unsigned int timeout, ide_expiry_t *expiry); 1154 1155void ide_execute_command(ide_drive_t *, u8, ide_handler_t *, unsigned int, 1156 ide_expiry_t *); 1157 1158void ide_execute_pkt_cmd(ide_drive_t *); 1159 1160void ide_pad_transfer(ide_drive_t *, int, int); 1161 1162ide_startstop_t ide_error(ide_drive_t *, const char *, u8); 1163 1164void ide_fix_driveid(u16 *); 1165 1166extern void ide_fixstring(u8 *, const int, const int); 1167 1168int ide_busy_sleep(ide_hwif_t *, unsigned long, int); 1169 1170int ide_wait_stat(ide_startstop_t *, ide_drive_t *, u8, u8, unsigned long); 1171 1172extern ide_startstop_t ide_do_reset (ide_drive_t *); 1173 1174extern int ide_devset_execute(ide_drive_t *drive, 1175 const struct ide_devset *setting, int arg); 1176 1177extern void ide_do_drive_cmd(ide_drive_t *, struct request *); 1178 1179extern void ide_end_drive_cmd(ide_drive_t *, u8, u8); 1180 1181void ide_tf_dump(const char *, struct ide_taskfile *); 1182 1183void ide_exec_command(ide_hwif_t *, u8); 1184u8 ide_read_status(ide_hwif_t *); 1185u8 ide_read_altstatus(ide_hwif_t *); 1186 1187void ide_set_irq(ide_hwif_t *, int); 1188 1189void ide_tf_load(ide_drive_t *, ide_task_t *); 1190void ide_tf_read(ide_drive_t *, ide_task_t *); 1191 1192void ide_input_data(ide_drive_t *, struct request *, void *, unsigned int); 1193void ide_output_data(ide_drive_t *, struct request *, void *, unsigned int); 1194 1195int ide_io_buffers(ide_drive_t *, struct ide_atapi_pc *, unsigned int, int); 1196 1197extern void SELECT_DRIVE(ide_drive_t *); 1198void SELECT_MASK(ide_drive_t *, int); 1199 1200u8 ide_read_error(ide_drive_t *); 1201void ide_read_bcount_and_ireason(ide_drive_t *, u16 *, u8 *); 1202 1203extern int drive_is_ready(ide_drive_t *); 1204 1205void ide_pktcmd_tf_load(ide_drive_t *, u32, u16, u8); 1206 1207int ide_check_atapi_device(ide_drive_t *, const char *); 1208 1209void ide_init_pc(struct ide_atapi_pc *); 1210 1211/* Disk head parking */ 1212extern wait_queue_head_t ide_park_wq; 1213ssize_t ide_park_show(struct device *dev, struct device_attribute *attr, 1214 char *buf); 1215ssize_t ide_park_store(struct device *dev, struct device_attribute *attr, 1216 const char *buf, size_t len); 1217 1218/* 1219 * Special requests for ide-tape block device strategy routine. 1220 * 1221 * In order to service a character device command, we add special requests to 1222 * the tail of our block device request queue and wait for their completion. 1223 */ 1224enum { 1225 REQ_IDETAPE_PC1 = (1 << 0), /* packet command (first stage) */ 1226 REQ_IDETAPE_PC2 = (1 << 1), /* packet command (second stage) */ 1227 REQ_IDETAPE_READ = (1 << 2), 1228 REQ_IDETAPE_WRITE = (1 << 3), 1229}; 1230 1231int ide_queue_pc_tail(ide_drive_t *, struct gendisk *, struct ide_atapi_pc *); 1232 1233int ide_do_test_unit_ready(ide_drive_t *, struct gendisk *); 1234int ide_do_start_stop(ide_drive_t *, struct gendisk *, int); 1235int ide_set_media_lock(ide_drive_t *, struct gendisk *, int); 1236void ide_create_request_sense_cmd(ide_drive_t *, struct ide_atapi_pc *); 1237void ide_retry_pc(ide_drive_t *, struct gendisk *); 1238 1239int ide_cd_expiry(ide_drive_t *); 1240 1241int ide_cd_get_xferlen(struct request *); 1242 1243ide_startstop_t ide_issue_pc(ide_drive_t *); 1244 1245ide_startstop_t do_rw_taskfile(ide_drive_t *, ide_task_t *); 1246 1247void task_end_request(ide_drive_t *, struct request *, u8); 1248 1249int ide_raw_taskfile(ide_drive_t *, ide_task_t *, u8 *, u16); 1250int ide_no_data_taskfile(ide_drive_t *, ide_task_t *); 1251 1252int ide_taskfile_ioctl(ide_drive_t *, unsigned int, unsigned long); 1253 1254extern int ide_driveid_update(ide_drive_t *); 1255extern int ide_config_drive_speed(ide_drive_t *, u8); 1256extern u8 eighty_ninty_three (ide_drive_t *); 1257extern int taskfile_lib_get_identify(ide_drive_t *drive, u8 *); 1258 1259extern int ide_wait_not_busy(ide_hwif_t *hwif, unsigned long timeout); 1260 1261extern void ide_stall_queue(ide_drive_t *drive, unsigned long timeout); 1262 1263extern void ide_timer_expiry(unsigned long); 1264extern irqreturn_t ide_intr(int irq, void *dev_id); 1265extern void do_ide_request(struct request_queue *); 1266 1267void ide_init_disk(struct gendisk *, ide_drive_t *); 1268 1269#ifdef CONFIG_IDEPCI_PCIBUS_ORDER 1270extern int __ide_pci_register_driver(struct pci_driver *driver, struct module *owner, const char *mod_name); 1271#define ide_pci_register_driver(d) __ide_pci_register_driver(d, THIS_MODULE, KBUILD_MODNAME) 1272#else 1273#define ide_pci_register_driver(d) pci_register_driver(d) 1274#endif 1275 1276static inline int ide_pci_is_in_compatibility_mode(struct pci_dev *dev) 1277{ 1278 if ((dev->class >> 8) == PCI_CLASS_STORAGE_IDE && (dev->class & 5) != 5) 1279 return 1; 1280 return 0; 1281} 1282 1283void ide_pci_setup_ports(struct pci_dev *, const struct ide_port_info *, int, 1284 hw_regs_t *, hw_regs_t **); 1285void ide_setup_pci_noise(struct pci_dev *, const struct ide_port_info *); 1286 1287#ifdef CONFIG_BLK_DEV_IDEDMA_PCI 1288int ide_pci_set_master(struct pci_dev *, const char *); 1289unsigned long ide_pci_dma_base(ide_hwif_t *, const struct ide_port_info *); 1290int ide_pci_check_simplex(ide_hwif_t *, const struct ide_port_info *); 1291int ide_hwif_setup_dma(ide_hwif_t *, const struct ide_port_info *); 1292#else 1293static inline int ide_hwif_setup_dma(ide_hwif_t *hwif, 1294 const struct ide_port_info *d) 1295{ 1296 return -EINVAL; 1297} 1298#endif 1299 1300struct ide_pci_enablebit { 1301 u8 reg; /* byte pci reg holding the enable-bit */ 1302 u8 mask; /* mask to isolate the enable-bit */ 1303 u8 val; /* value of masked reg when "enabled" */ 1304}; 1305 1306enum { 1307 /* Uses ISA control ports not PCI ones. */ 1308 IDE_HFLAG_ISA_PORTS = (1 << 0), 1309 /* single port device */ 1310 IDE_HFLAG_SINGLE = (1 << 1), 1311 /* don't use legacy PIO blacklist */ 1312 IDE_HFLAG_PIO_NO_BLACKLIST = (1 << 2), 1313 /* set for the second port of QD65xx */ 1314 IDE_HFLAG_QD_2ND_PORT = (1 << 3), 1315 /* use PIO8/9 for prefetch off/on */ 1316 IDE_HFLAG_ABUSE_PREFETCH = (1 << 4), 1317 /* use PIO6/7 for fast-devsel off/on */ 1318 IDE_HFLAG_ABUSE_FAST_DEVSEL = (1 << 5), 1319 /* use 100-102 and 200-202 PIO values to set DMA modes */ 1320 IDE_HFLAG_ABUSE_DMA_MODES = (1 << 6), 1321 /* 1322 * keep DMA setting when programming PIO mode, may be used only 1323 * for hosts which have separate PIO and DMA timings (ie. PMAC) 1324 */ 1325 IDE_HFLAG_SET_PIO_MODE_KEEP_DMA = (1 << 7), 1326 /* program host for the transfer mode after programming device */ 1327 IDE_HFLAG_POST_SET_MODE = (1 << 8), 1328 /* don't program host/device for the transfer mode ("smart" hosts) */ 1329 IDE_HFLAG_NO_SET_MODE = (1 << 9), 1330 /* trust BIOS for programming chipset/device for DMA */ 1331 IDE_HFLAG_TRUST_BIOS_FOR_DMA = (1 << 10), 1332 /* host is CS5510/CS5520 */ 1333 IDE_HFLAG_CS5520 = (1 << 11), 1334 /* ATAPI DMA is unsupported */ 1335 IDE_HFLAG_NO_ATAPI_DMA = (1 << 12), 1336 /* set if host is a "non-bootable" controller */ 1337 IDE_HFLAG_NON_BOOTABLE = (1 << 13), 1338 /* host doesn't support DMA */ 1339 IDE_HFLAG_NO_DMA = (1 << 14), 1340 /* check if host is PCI IDE device before allowing DMA */ 1341 IDE_HFLAG_NO_AUTODMA = (1 << 15), 1342 /* host uses MMIO */ 1343 IDE_HFLAG_MMIO = (1 << 16), 1344 /* no LBA48 */ 1345 IDE_HFLAG_NO_LBA48 = (1 << 17), 1346 /* no LBA48 DMA */ 1347 IDE_HFLAG_NO_LBA48_DMA = (1 << 18), 1348 /* data FIFO is cleared by an error */ 1349 IDE_HFLAG_ERROR_STOPS_FIFO = (1 << 19), 1350 /* serialize ports */ 1351 IDE_HFLAG_SERIALIZE = (1 << 20), 1352 /* use legacy IRQs */ 1353 IDE_HFLAG_LEGACY_IRQS = (1 << 21), 1354 /* force use of legacy IRQs */ 1355 IDE_HFLAG_FORCE_LEGACY_IRQS = (1 << 22), 1356 /* host is TRM290 */ 1357 IDE_HFLAG_TRM290 = (1 << 23), 1358 /* use 32-bit I/O ops */ 1359 IDE_HFLAG_IO_32BIT = (1 << 24), 1360 /* unmask IRQs */ 1361 IDE_HFLAG_UNMASK_IRQS = (1 << 25), 1362 IDE_HFLAG_BROKEN_ALTSTATUS = (1 << 26), 1363 /* serialize ports if DMA is possible (for sl82c105) */ 1364 IDE_HFLAG_SERIALIZE_DMA = (1 << 27), 1365 /* force host out of "simplex" mode */ 1366 IDE_HFLAG_CLEAR_SIMPLEX = (1 << 28), 1367 /* DSC overlap is unsupported */ 1368 IDE_HFLAG_NO_DSC = (1 << 29), 1369 /* never use 32-bit I/O ops */ 1370 IDE_HFLAG_NO_IO_32BIT = (1 << 30), 1371 /* never unmask IRQs */ 1372 IDE_HFLAG_NO_UNMASK_IRQS = (1 << 31), 1373}; 1374 1375#ifdef CONFIG_BLK_DEV_OFFBOARD 1376# define IDE_HFLAG_OFF_BOARD 0 1377#else 1378# define IDE_HFLAG_OFF_BOARD IDE_HFLAG_NON_BOOTABLE 1379#endif 1380 1381struct ide_port_info { 1382 char *name; 1383 unsigned int (*init_chipset)(struct pci_dev *); 1384 void (*init_iops)(ide_hwif_t *); 1385 void (*init_hwif)(ide_hwif_t *); 1386 int (*init_dma)(ide_hwif_t *, 1387 const struct ide_port_info *); 1388 1389 const struct ide_tp_ops *tp_ops; 1390 const struct ide_port_ops *port_ops; 1391 const struct ide_dma_ops *dma_ops; 1392 1393 struct ide_pci_enablebit enablebits[2]; 1394 1395 hwif_chipset_t chipset; 1396 1397 u16 max_sectors; /* if < than the default one */ 1398 1399 u32 host_flags; 1400 u8 pio_mask; 1401 u8 swdma_mask; 1402 u8 mwdma_mask; 1403 u8 udma_mask; 1404}; 1405 1406int ide_pci_init_one(struct pci_dev *, const struct ide_port_info *, void *); 1407int ide_pci_init_two(struct pci_dev *, struct pci_dev *, 1408 const struct ide_port_info *, void *); 1409void ide_pci_remove(struct pci_dev *); 1410 1411#ifdef CONFIG_PM 1412int ide_pci_suspend(struct pci_dev *, pm_message_t); 1413int ide_pci_resume(struct pci_dev *); 1414#else 1415#define ide_pci_suspend NULL 1416#define ide_pci_resume NULL 1417#endif 1418 1419void ide_map_sg(ide_drive_t *, struct request *); 1420void ide_init_sg_cmd(ide_drive_t *, struct request *); 1421 1422#define BAD_DMA_DRIVE 0 1423#define GOOD_DMA_DRIVE 1 1424 1425struct drive_list_entry { 1426 const char *id_model; 1427 const char *id_firmware; 1428}; 1429 1430int ide_in_drive_list(u16 *, const struct drive_list_entry *); 1431 1432#ifdef CONFIG_BLK_DEV_IDEDMA 1433int ide_dma_good_drive(ide_drive_t *); 1434int __ide_dma_bad_drive(ide_drive_t *); 1435int ide_id_dma_bug(ide_drive_t *); 1436 1437u8 ide_find_dma_mode(ide_drive_t *, u8); 1438 1439static inline u8 ide_max_dma_mode(ide_drive_t *drive) 1440{ 1441 return ide_find_dma_mode(drive, XFER_UDMA_6); 1442} 1443 1444void ide_dma_off_quietly(ide_drive_t *); 1445void ide_dma_off(ide_drive_t *); 1446void ide_dma_on(ide_drive_t *); 1447int ide_set_dma(ide_drive_t *); 1448void ide_check_dma_crc(ide_drive_t *); 1449ide_startstop_t ide_dma_intr(ide_drive_t *); 1450 1451int ide_allocate_dma_engine(ide_hwif_t *); 1452void ide_release_dma_engine(ide_hwif_t *); 1453 1454int ide_build_sglist(ide_drive_t *, struct request *); 1455void ide_destroy_dmatable(ide_drive_t *); 1456 1457#ifdef CONFIG_BLK_DEV_IDEDMA_SFF 1458int config_drive_for_dma(ide_drive_t *); 1459extern int ide_build_dmatable(ide_drive_t *, struct request *); 1460void ide_dma_host_set(ide_drive_t *, int); 1461extern int ide_dma_setup(ide_drive_t *); 1462void ide_dma_exec_cmd(ide_drive_t *, u8); 1463extern void ide_dma_start(ide_drive_t *); 1464int ide_dma_end(ide_drive_t *); 1465int ide_dma_test_irq(ide_drive_t *); 1466u8 ide_dma_sff_read_status(ide_hwif_t *); 1467extern const struct ide_dma_ops sff_dma_ops; 1468#else 1469static inline int config_drive_for_dma(ide_drive_t *drive) { return 0; } 1470#endif /* CONFIG_BLK_DEV_IDEDMA_SFF */ 1471 1472void ide_dma_lost_irq(ide_drive_t *); 1473void ide_dma_timeout(ide_drive_t *); 1474 1475#else 1476static inline int ide_id_dma_bug(ide_drive_t *drive) { return 0; } 1477static inline u8 ide_find_dma_mode(ide_drive_t *drive, u8 speed) { return 0; } 1478static inline u8 ide_max_dma_mode(ide_drive_t *drive) { return 0; } 1479static inline void ide_dma_off_quietly(ide_drive_t *drive) { ; } 1480static inline void ide_dma_off(ide_drive_t *drive) { ; } 1481static inline void ide_dma_on(ide_drive_t *drive) { ; } 1482static inline void ide_dma_verbose(ide_drive_t *drive) { ; } 1483static inline int ide_set_dma(ide_drive_t *drive) { return 1; } 1484static inline void ide_check_dma_crc(ide_drive_t *drive) { ; } 1485static inline void ide_release_dma_engine(ide_hwif_t *hwif) { ; } 1486#endif /* CONFIG_BLK_DEV_IDEDMA */ 1487 1488#ifdef CONFIG_BLK_DEV_IDEACPI 1489extern int ide_acpi_exec_tfs(ide_drive_t *drive); 1490extern void ide_acpi_get_timing(ide_hwif_t *hwif); 1491extern void ide_acpi_push_timing(ide_hwif_t *hwif); 1492extern void ide_acpi_init(ide_hwif_t *hwif); 1493void ide_acpi_port_init_devices(ide_hwif_t *); 1494extern void ide_acpi_set_state(ide_hwif_t *hwif, int on); 1495#else 1496static inline int ide_acpi_exec_tfs(ide_drive_t *drive) { return 0; } 1497static inline void ide_acpi_get_timing(ide_hwif_t *hwif) { ; } 1498static inline void ide_acpi_push_timing(ide_hwif_t *hwif) { ; } 1499static inline void ide_acpi_init(ide_hwif_t *hwif) { ; } 1500static inline void ide_acpi_port_init_devices(ide_hwif_t *hwif) { ; } 1501static inline void ide_acpi_set_state(ide_hwif_t *hwif, int on) {} 1502#endif 1503 1504void ide_register_region(struct gendisk *); 1505void ide_unregister_region(struct gendisk *); 1506 1507void ide_undecoded_slave(ide_drive_t *); 1508 1509void ide_port_apply_params(ide_hwif_t *); 1510int ide_sysfs_register_port(ide_hwif_t *); 1511 1512struct ide_host *ide_host_alloc(const struct ide_port_info *, hw_regs_t **); 1513void ide_host_free(struct ide_host *); 1514int ide_host_register(struct ide_host *, const struct ide_port_info *, 1515 hw_regs_t **); 1516int ide_host_add(const struct ide_port_info *, hw_regs_t **, 1517 struct ide_host **); 1518void ide_host_remove(struct ide_host *); 1519int ide_legacy_device_add(const struct ide_port_info *, unsigned long); 1520void ide_port_unregister_devices(ide_hwif_t *); 1521void ide_port_scan(ide_hwif_t *); 1522 1523static inline void *ide_get_hwifdata (ide_hwif_t * hwif) 1524{ 1525 return hwif->hwif_data; 1526} 1527 1528static inline void ide_set_hwifdata (ide_hwif_t * hwif, void *data) 1529{ 1530 hwif->hwif_data = data; 1531} 1532 1533const char *ide_xfer_verbose(u8 mode); 1534extern void ide_toggle_bounce(ide_drive_t *drive, int on); 1535extern int ide_set_xfer_rate(ide_drive_t *drive, u8 rate); 1536 1537u64 ide_get_lba_addr(struct ide_taskfile *, int); 1538u8 ide_dump_status(ide_drive_t *, const char *, u8); 1539 1540struct ide_timing { 1541 u8 mode; 1542 u8 setup; /* t1 */ 1543 u16 act8b; /* t2 for 8-bit io */ 1544 u16 rec8b; /* t2i for 8-bit io */ 1545 u16 cyc8b; /* t0 for 8-bit io */ 1546 u16 active; /* t2 or tD */ 1547 u16 recover; /* t2i or tK */ 1548 u16 cycle; /* t0 */ 1549 u16 udma; /* t2CYCTYP/2 */ 1550}; 1551 1552enum { 1553 IDE_TIMING_SETUP = (1 << 0), 1554 IDE_TIMING_ACT8B = (1 << 1), 1555 IDE_TIMING_REC8B = (1 << 2), 1556 IDE_TIMING_CYC8B = (1 << 3), 1557 IDE_TIMING_8BIT = IDE_TIMING_ACT8B | IDE_TIMING_REC8B | 1558 IDE_TIMING_CYC8B, 1559 IDE_TIMING_ACTIVE = (1 << 4), 1560 IDE_TIMING_RECOVER = (1 << 5), 1561 IDE_TIMING_CYCLE = (1 << 6), 1562 IDE_TIMING_UDMA = (1 << 7), 1563 IDE_TIMING_ALL = IDE_TIMING_SETUP | IDE_TIMING_8BIT | 1564 IDE_TIMING_ACTIVE | IDE_TIMING_RECOVER | 1565 IDE_TIMING_CYCLE | IDE_TIMING_UDMA, 1566}; 1567 1568struct ide_timing *ide_timing_find_mode(u8); 1569u16 ide_pio_cycle_time(ide_drive_t *, u8); 1570void ide_timing_merge(struct ide_timing *, struct ide_timing *, 1571 struct ide_timing *, unsigned int); 1572int ide_timing_compute(ide_drive_t *, u8, struct ide_timing *, int, int); 1573 1574int ide_scan_pio_blacklist(char *); 1575 1576u8 ide_get_best_pio_mode(ide_drive_t *, u8, u8); 1577 1578int ide_set_pio_mode(ide_drive_t *, u8); 1579int ide_set_dma_mode(ide_drive_t *, u8); 1580 1581void ide_set_pio(ide_drive_t *, u8); 1582 1583static inline void ide_set_max_pio(ide_drive_t *drive) 1584{ 1585 ide_set_pio(drive, 255); 1586} 1587 1588char *ide_media_string(ide_drive_t *); 1589 1590extern struct device_attribute ide_dev_attrs[]; 1591extern struct bus_type ide_bus_type; 1592extern struct class *ide_port_class; 1593 1594static inline void ide_dump_identify(u8 *id) 1595{ 1596 print_hex_dump(KERN_INFO, "", DUMP_PREFIX_NONE, 16, 2, id, 512, 0); 1597} 1598 1599static inline int hwif_to_node(ide_hwif_t *hwif) 1600{ 1601 return hwif->dev ? dev_to_node(hwif->dev) : -1; 1602} 1603 1604static inline ide_drive_t *ide_get_pair_dev(ide_drive_t *drive) 1605{ 1606 ide_drive_t *peer = drive->hwif->devices[(drive->dn ^ 1) & 1]; 1607 1608 return (peer->dev_flags & IDE_DFLAG_PRESENT) ? peer : NULL; 1609} 1610 1611#define ide_port_for_each_dev(i, dev, port) \ 1612 for ((i) = 0; ((dev) = (port)->devices[i]) || (i) < MAX_DRIVES; (i)++) 1613 1614#define ide_host_for_each_port(i, port, host) \ 1615 for ((i) = 0; ((port) = (host)->ports[i]) || (i) < MAX_HOST_PORTS; (i)++) 1616 1617#endif /* _IDE_H */