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1/*
2 * include/linux/fsl_devices.h
3 *
4 * Definitions for any platform device related flags or structures for
5 * Freescale processor devices
6 *
7 * Maintainer: Kumar Gala <galak@kernel.crashing.org>
8 *
9 * Copyright 2004 Freescale Semiconductor, Inc
10 *
11 * This program is free software; you can redistribute it and/or modify it
12 * under the terms of the GNU General Public License as published by the
13 * Free Software Foundation; either version 2 of the License, or (at your
14 * option) any later version.
15 */
16
17#ifndef _FSL_DEVICE_H_
18#define _FSL_DEVICE_H_
19
20#include <linux/types.h>
21#include <linux/phy.h>
22
23/*
24 * Some conventions on how we handle peripherals on Freescale chips
25 *
26 * unique device: a platform_device entry in fsl_plat_devs[] plus
27 * associated device information in its platform_data structure.
28 *
29 * A chip is described by a set of unique devices.
30 *
31 * Each sub-arch has its own master list of unique devices and
32 * enumerates them by enum fsl_devices in a sub-arch specific header
33 *
34 * The platform data structure is broken into two parts. The
35 * first is device specific information that help identify any
36 * unique features of a peripheral. The second is any
37 * information that may be defined by the board or how the device
38 * is connected externally of the chip.
39 *
40 * naming conventions:
41 * - platform data structures: <driver>_platform_data
42 * - platform data device flags: FSL_<driver>_DEV_<FLAG>
43 * - platform data board flags: FSL_<driver>_BRD_<FLAG>
44 *
45 */
46
47struct gianfar_platform_data {
48 /* device specific information */
49 u32 device_flags;
50 char bus_id[BUS_ID_SIZE];
51 phy_interface_t interface;
52};
53
54struct gianfar_mdio_data {
55 /* board specific information */
56 int irq[32];
57};
58
59/* Flags in gianfar_platform_data */
60#define FSL_GIANFAR_BRD_HAS_PHY_INTR 0x00000001 /* set or use a timer */
61#define FSL_GIANFAR_BRD_IS_REDUCED 0x00000002 /* Set if RGMII, RMII */
62
63struct fsl_i2c_platform_data {
64 /* device specific information */
65 u32 device_flags;
66};
67
68/* Flags related to I2C device features */
69#define FSL_I2C_DEV_SEPARATE_DFSRR 0x00000001
70#define FSL_I2C_DEV_CLOCK_5200 0x00000002
71
72enum fsl_usb2_operating_modes {
73 FSL_USB2_MPH_HOST,
74 FSL_USB2_DR_HOST,
75 FSL_USB2_DR_DEVICE,
76 FSL_USB2_DR_OTG,
77};
78
79enum fsl_usb2_phy_modes {
80 FSL_USB2_PHY_NONE,
81 FSL_USB2_PHY_ULPI,
82 FSL_USB2_PHY_UTMI,
83 FSL_USB2_PHY_UTMI_WIDE,
84 FSL_USB2_PHY_SERIAL,
85};
86
87struct fsl_usb2_platform_data {
88 /* board specific information */
89 enum fsl_usb2_operating_modes operating_mode;
90 enum fsl_usb2_phy_modes phy_mode;
91 unsigned int port_enables;
92};
93
94/* Flags in fsl_usb2_mph_platform_data */
95#define FSL_USB2_PORT0_ENABLED 0x00000001
96#define FSL_USB2_PORT1_ENABLED 0x00000002
97
98struct fsl_spi_platform_data {
99 u32 initial_spmode; /* initial SPMODE value */
100 u16 bus_num;
101 bool qe_mode;
102 /* board specific information */
103 u16 max_chipselect;
104 void (*activate_cs)(u8 cs, u8 polarity);
105 void (*deactivate_cs)(u8 cs, u8 polarity);
106 u32 sysclk;
107};
108
109struct mpc8xx_pcmcia_ops {
110 void(*hw_ctrl)(int slot, int enable);
111 int(*voltage_set)(int slot, int vcc, int vpp);
112};
113
114/* Returns non-zero if the current suspend operation would
115 * lead to a deep sleep (i.e. power removed from the core,
116 * instead of just the clock).
117 */
118int fsl_deep_sleep(void);
119
120#endif /* _FSL_DEVICE_H_ */