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Linux kernel mirror (for testing)
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linux
1/*
2 * arch/arm/include/asm/ptrace.h
3 *
4 * Copyright (C) 1996-2003 Russell King
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
9 */
10#ifndef __ASM_ARM_PTRACE_H
11#define __ASM_ARM_PTRACE_H
12
13#include <asm/hwcap.h>
14
15#define PTRACE_GETREGS 12
16#define PTRACE_SETREGS 13
17#define PTRACE_GETFPREGS 14
18#define PTRACE_SETFPREGS 15
19/* PTRACE_ATTACH is 16 */
20/* PTRACE_DETACH is 17 */
21#define PTRACE_GETWMMXREGS 18
22#define PTRACE_SETWMMXREGS 19
23/* 20 is unused */
24#define PTRACE_OLDSETOPTIONS 21
25#define PTRACE_GET_THREAD_AREA 22
26#define PTRACE_SET_SYSCALL 23
27/* PTRACE_SYSCALL is 24 */
28#define PTRACE_GETCRUNCHREGS 25
29#define PTRACE_SETCRUNCHREGS 26
30
31/*
32 * PSR bits
33 */
34#define USR26_MODE 0x00000000
35#define FIQ26_MODE 0x00000001
36#define IRQ26_MODE 0x00000002
37#define SVC26_MODE 0x00000003
38#define USR_MODE 0x00000010
39#define FIQ_MODE 0x00000011
40#define IRQ_MODE 0x00000012
41#define SVC_MODE 0x00000013
42#define ABT_MODE 0x00000017
43#define UND_MODE 0x0000001b
44#define SYSTEM_MODE 0x0000001f
45#define MODE32_BIT 0x00000010
46#define MODE_MASK 0x0000001f
47#define PSR_T_BIT 0x00000020
48#define PSR_F_BIT 0x00000040
49#define PSR_I_BIT 0x00000080
50#define PSR_A_BIT 0x00000100
51#define PSR_J_BIT 0x01000000
52#define PSR_Q_BIT 0x08000000
53#define PSR_V_BIT 0x10000000
54#define PSR_C_BIT 0x20000000
55#define PSR_Z_BIT 0x40000000
56#define PSR_N_BIT 0x80000000
57
58/*
59 * Groups of PSR bits
60 */
61#define PSR_f 0xff000000 /* Flags */
62#define PSR_s 0x00ff0000 /* Status */
63#define PSR_x 0x0000ff00 /* Extension */
64#define PSR_c 0x000000ff /* Control */
65
66#ifndef __ASSEMBLY__
67
68/*
69 * This struct defines the way the registers are stored on the
70 * stack during a system call. Note that sizeof(struct pt_regs)
71 * has to be a multiple of 8.
72 */
73struct pt_regs {
74 long uregs[18];
75};
76
77#define ARM_cpsr uregs[16]
78#define ARM_pc uregs[15]
79#define ARM_lr uregs[14]
80#define ARM_sp uregs[13]
81#define ARM_ip uregs[12]
82#define ARM_fp uregs[11]
83#define ARM_r10 uregs[10]
84#define ARM_r9 uregs[9]
85#define ARM_r8 uregs[8]
86#define ARM_r7 uregs[7]
87#define ARM_r6 uregs[6]
88#define ARM_r5 uregs[5]
89#define ARM_r4 uregs[4]
90#define ARM_r3 uregs[3]
91#define ARM_r2 uregs[2]
92#define ARM_r1 uregs[1]
93#define ARM_r0 uregs[0]
94#define ARM_ORIG_r0 uregs[17]
95
96#ifdef __KERNEL__
97
98#define user_mode(regs) \
99 (((regs)->ARM_cpsr & 0xf) == 0)
100
101#ifdef CONFIG_ARM_THUMB
102#define thumb_mode(regs) \
103 (((regs)->ARM_cpsr & PSR_T_BIT))
104#else
105#define thumb_mode(regs) (0)
106#endif
107
108#define isa_mode(regs) \
109 ((((regs)->ARM_cpsr & PSR_J_BIT) >> 23) | \
110 (((regs)->ARM_cpsr & PSR_T_BIT) >> 5))
111
112#define processor_mode(regs) \
113 ((regs)->ARM_cpsr & MODE_MASK)
114
115#define interrupts_enabled(regs) \
116 (!((regs)->ARM_cpsr & PSR_I_BIT))
117
118#define fast_interrupts_enabled(regs) \
119 (!((regs)->ARM_cpsr & PSR_F_BIT))
120
121/* Are the current registers suitable for user mode?
122 * (used to maintain security in signal handlers)
123 */
124static inline int valid_user_regs(struct pt_regs *regs)
125{
126 if (user_mode(regs) && (regs->ARM_cpsr & PSR_I_BIT) == 0) {
127 regs->ARM_cpsr &= ~(PSR_F_BIT | PSR_A_BIT);
128 return 1;
129 }
130
131 /*
132 * Force CPSR to something logical...
133 */
134 regs->ARM_cpsr &= PSR_f | PSR_s | (PSR_x & ~PSR_A_BIT) | PSR_T_BIT | MODE32_BIT;
135 if (!(elf_hwcap & HWCAP_26BIT))
136 regs->ARM_cpsr |= USR_MODE;
137
138 return 0;
139}
140
141#define instruction_pointer(regs) (regs)->ARM_pc
142
143#ifdef CONFIG_SMP
144extern unsigned long profile_pc(struct pt_regs *regs);
145#else
146#define profile_pc(regs) instruction_pointer(regs)
147#endif
148
149#define predicate(x) ((x) & 0xf0000000)
150#define PREDICATE_ALWAYS 0xe0000000
151
152#endif /* __KERNEL__ */
153
154#endif /* __ASSEMBLY__ */
155
156#endif
157