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1#ifndef P54COMMON_H
2#define P54COMMON_H
3
4/*
5 * Common code specific definitions for mac80211 Prism54 drivers
6 *
7 * Copyright (c) 2006, Michael Wu <flamingice@sourmilk.net>
8 * Copyright (c) 2007, Christian Lamparter <chunkeey@web.de>
9 *
10 * Based on the islsm (softmac prism54) driver, which is:
11 * Copyright 2004-2006 Jean-Baptiste Note <jbnote@gmail.com>, et al.
12 *
13 * This program is free software; you can redistribute it and/or modify
14 * it under the terms of the GNU General Public License version 2 as
15 * published by the Free Software Foundation.
16 */
17
18struct bootrec {
19 __le32 code;
20 __le32 len;
21 u32 data[10];
22 __le16 rx_mtu;
23} __attribute__((packed));
24
25struct bootrec_exp_if {
26 __le16 role;
27 __le16 if_id;
28 __le16 variant;
29 __le16 btm_compat;
30 __le16 top_compat;
31} __attribute__((packed));
32
33struct bootrec_desc {
34 __le16 modes;
35 __le16 flags;
36 __le32 rx_start;
37 __le32 rx_end;
38 u8 headroom;
39 u8 tailroom;
40 u8 unimportant[6];
41 u8 rates[16];
42} __attribute__((packed));
43
44#define BR_CODE_MIN 0x80000000
45#define BR_CODE_COMPONENT_ID 0x80000001
46#define BR_CODE_COMPONENT_VERSION 0x80000002
47#define BR_CODE_DEPENDENT_IF 0x80000003
48#define BR_CODE_EXPOSED_IF 0x80000004
49#define BR_CODE_DESCR 0x80000101
50#define BR_CODE_MAX 0x8FFFFFFF
51#define BR_CODE_END_OF_BRA 0xFF0000FF
52#define LEGACY_BR_CODE_END_OF_BRA 0xFFFFFFFF
53
54/* PDA defines are Copyright (C) 2005 Nokia Corporation (taken from islsm_pda.h) */
55
56struct pda_entry {
57 __le16 len; /* includes both code and data */
58 __le16 code;
59 u8 data[0];
60} __attribute__ ((packed));
61
62struct eeprom_pda_wrap {
63 __le32 magic;
64 __le16 pad;
65 __le16 len;
66 __le32 arm_opcode;
67 u8 data[0];
68} __attribute__ ((packed));
69
70struct pda_iq_autocal_entry {
71 __le16 freq;
72 __le16 iq_param[4];
73} __attribute__ ((packed));
74
75struct pda_channel_output_limit {
76 __le16 freq;
77 u8 val_bpsk;
78 u8 val_qpsk;
79 u8 val_16qam;
80 u8 val_64qam;
81 u8 rate_set_mask;
82 u8 rate_set_size;
83} __attribute__ ((packed));
84
85struct pda_pa_curve_data_sample_rev0 {
86 u8 rf_power;
87 u8 pa_detector;
88 u8 pcv;
89} __attribute__ ((packed));
90
91struct pda_pa_curve_data_sample_rev1 {
92 u8 rf_power;
93 u8 pa_detector;
94 u8 data_barker;
95 u8 data_bpsk;
96 u8 data_qpsk;
97 u8 data_16qam;
98 u8 data_64qam;
99} __attribute__ ((packed));
100
101struct p54_pa_curve_data_sample {
102 u8 rf_power;
103 u8 pa_detector;
104 u8 data_barker;
105 u8 data_bpsk;
106 u8 data_qpsk;
107 u8 data_16qam;
108 u8 data_64qam;
109 u8 padding;
110} __attribute__ ((packed));
111
112struct pda_pa_curve_data {
113 u8 cal_method_rev;
114 u8 channels;
115 u8 points_per_channel;
116 u8 padding;
117 u8 data[0];
118} __attribute__ ((packed));
119
120/*
121 * this defines the PDR codes used to build PDAs as defined in document
122 * number 553155. The current implementation mirrors version 1.1 of the
123 * document and lists only PDRs supported by the ARM platform.
124 */
125
126/* common and choice range (0x0000 - 0x0fff) */
127#define PDR_END 0x0000
128#define PDR_MANUFACTURING_PART_NUMBER 0x0001
129#define PDR_PDA_VERSION 0x0002
130#define PDR_NIC_SERIAL_NUMBER 0x0003
131
132#define PDR_MAC_ADDRESS 0x0101
133#define PDR_REGULATORY_DOMAIN_LIST 0x0103
134#define PDR_TEMPERATURE_TYPE 0x0107
135
136#define PDR_PRISM_PCI_IDENTIFIER 0x0402
137
138/* ARM range (0x1000 - 0x1fff) */
139#define PDR_COUNTRY_INFORMATION 0x1000
140#define PDR_INTERFACE_LIST 0x1001
141#define PDR_HARDWARE_PLATFORM_COMPONENT_ID 0x1002
142#define PDR_OEM_NAME 0x1003
143#define PDR_PRODUCT_NAME 0x1004
144#define PDR_UTF8_OEM_NAME 0x1005
145#define PDR_UTF8_PRODUCT_NAME 0x1006
146#define PDR_COUNTRY_LIST 0x1007
147#define PDR_DEFAULT_COUNTRY 0x1008
148
149#define PDR_ANTENNA_GAIN 0x1100
150
151#define PDR_PRISM_INDIGO_PA_CALIBRATION_DATA 0x1901
152#define PDR_RSSI_LINEAR_APPROXIMATION 0x1902
153#define PDR_PRISM_PA_CAL_OUTPUT_POWER_LIMITS 0x1903
154#define PDR_PRISM_PA_CAL_CURVE_DATA 0x1904
155#define PDR_RSSI_LINEAR_APPROXIMATION_DUAL_BAND 0x1905
156#define PDR_PRISM_ZIF_TX_IQ_CALIBRATION 0x1906
157#define PDR_REGULATORY_POWER_LIMITS 0x1907
158#define PDR_RSSI_LINEAR_APPROXIMATION_EXTENDED 0x1908
159#define PDR_RADIATED_TRANSMISSION_CORRECTION 0x1909
160#define PDR_PRISM_TX_IQ_CALIBRATION 0x190a
161
162/* reserved range (0x2000 - 0x7fff) */
163
164/* customer range (0x8000 - 0xffff) */
165#define PDR_BASEBAND_REGISTERS 0x8000
166#define PDR_PER_CHANNEL_BASEBAND_REGISTERS 0x8001
167
168/* stored in skb->cb */
169struct memrecord {
170 u32 start_addr;
171 u32 end_addr;
172};
173
174struct p54_eeprom_lm86 {
175 __le16 offset;
176 __le16 len;
177 u8 data[0];
178} __attribute__ ((packed));
179
180struct p54_rx_hdr {
181 __le16 magic;
182 __le16 len;
183 __le16 freq;
184 u8 antenna;
185 u8 rate;
186 u8 rssi;
187 u8 quality;
188 u16 unknown2;
189 __le32 tsf32;
190 __le32 unalloc0;
191 u8 align[0];
192} __attribute__ ((packed));
193
194struct p54_frame_sent_hdr {
195 u8 status;
196 u8 retries;
197 __le16 ack_rssi;
198 __le16 seq;
199 u16 rate;
200} __attribute__ ((packed));
201
202struct p54_tx_control_allocdata {
203 u8 rateset[8];
204 u8 unalloc0[2];
205 u8 key_type;
206 u8 key_len;
207 u8 key[16];
208 u8 hw_queue;
209 u8 unalloc1[9];
210 u8 tx_antenna;
211 u8 output_power;
212 u8 cts_rate;
213 u8 unalloc2[3];
214 u8 align[0];
215} __attribute__ ((packed));
216
217struct p54_tx_control_filter {
218 __le16 filter_type;
219 u8 mac_addr[ETH_ALEN];
220 u8 bssid[ETH_ALEN];
221 u8 rx_antenna;
222 u8 rx_align;
223 union {
224 struct {
225 __le32 basic_rate_mask;
226 u8 rts_rates[8];
227 __le32 rx_addr;
228 __le16 max_rx;
229 __le16 rxhw;
230 __le16 wakeup_timer;
231 __le16 unalloc0;
232 } v1 __attribute__ ((packed));
233 struct {
234 __le32 rx_addr;
235 __le16 max_rx;
236 __le16 rxhw;
237 __le16 timer;
238 __le16 unalloc0;
239 __le32 unalloc1;
240 } v2 __attribute__ ((packed));
241 } __attribute__ ((packed));
242} __attribute__ ((packed));
243
244#define P54_TX_CONTROL_FILTER_V1_LEN (sizeof(struct p54_tx_control_filter))
245#define P54_TX_CONTROL_FILTER_V2_LEN (sizeof(struct p54_tx_control_filter)-8)
246
247struct p54_tx_control_channel {
248 __le16 flags;
249 __le16 dwell;
250 u8 padding1[20];
251 struct pda_iq_autocal_entry iq_autocal;
252 u8 pa_points_per_curve;
253 u8 val_barker;
254 u8 val_bpsk;
255 u8 val_qpsk;
256 u8 val_16qam;
257 u8 val_64qam;
258 struct p54_pa_curve_data_sample curve_data[8];
259 u8 dup_bpsk;
260 u8 dup_qpsk;
261 u8 dup_16qam;
262 u8 dup_64qam;
263 union {
264 struct {
265 __le16 rssical_mul;
266 __le16 rssical_add;
267 } v1 __attribute__ ((packed));
268
269 struct {
270 __le32 basic_rate_mask;
271 u8 rts_rates[8];
272 __le16 rssical_mul;
273 __le16 rssical_add;
274 } v2 __attribute__ ((packed));
275 } __attribute__ ((packed));
276} __attribute__ ((packed));
277
278#define P54_TX_CONTROL_CHANNEL_V1_LEN (sizeof(struct p54_tx_control_channel)-12)
279#define P54_TX_CONTROL_CHANNEL_V2_LEN (sizeof(struct p54_tx_control_channel))
280
281struct p54_tx_control_led {
282 __le16 mode;
283 __le16 led_temporary;
284 __le16 led_permanent;
285 __le16 duration;
286} __attribute__ ((packed));
287
288struct p54_tx_vdcf_queues {
289 __le16 aifs;
290 __le16 cwmin;
291 __le16 cwmax;
292 __le16 txop;
293} __attribute__ ((packed));
294
295struct p54_tx_control_vdcf {
296 u8 padding;
297 u8 slottime;
298 u8 magic1;
299 u8 magic2;
300 struct p54_tx_vdcf_queues queue[8];
301 u8 pad2[4];
302 __le16 frameburst;
303} __attribute__ ((packed));
304
305struct p54_statistics {
306 __le32 rx_success;
307 __le32 rx_bad_fcs;
308 __le32 rx_abort;
309 __le32 rx_abort_phy;
310 __le32 rts_success;
311 __le32 rts_fail;
312 __le32 tsf32;
313 __le32 airtime;
314 __le32 noise;
315 __le32 unkn[10]; /* CCE / CCA / RADAR */
316} __attribute__ ((packed));
317
318struct p54_tx_control_xbow_synth {
319 __le16 magic1;
320 __le16 magic2;
321 __le16 freq;
322 u32 padding[5];
323} __attribute__ ((packed));
324
325#endif /* P54COMMON_H */