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1/* 2 * Copyright (C) 1996-2001 Linus Torvalds & author (see below) 3 */ 4 5/* 6 * Version 0.03 Cleaned auto-tune, added probe 7 * Version 0.04 Added second channel tuning 8 * Version 0.05 Enhanced tuning ; added qd6500 support 9 * Version 0.06 Added dos driver's list 10 * Version 0.07 Second channel bug fix 11 * 12 * QDI QD6500/QD6580 EIDE controller fast support 13 * 14 * To activate controller support, use "ide0=qd65xx" 15 */ 16 17/* 18 * Rewritten from the work of Colten Edwards <pje120@cs.usask.ca> by 19 * Samuel Thibault <samuel.thibault@fnac.net> 20 */ 21 22#include <linux/module.h> 23#include <linux/types.h> 24#include <linux/kernel.h> 25#include <linux/delay.h> 26#include <linux/timer.h> 27#include <linux/mm.h> 28#include <linux/ioport.h> 29#include <linux/blkdev.h> 30#include <linux/ide.h> 31#include <linux/init.h> 32#include <asm/system.h> 33#include <asm/io.h> 34 35#define DRV_NAME "qd65xx" 36 37#include "qd65xx.h" 38 39/* 40 * I/O ports are 0x30-0x31 (and 0x32-0x33 for qd6580) 41 * or 0xb0-0xb1 (and 0xb2-0xb3 for qd6580) 42 * -- qd6500 is a single IDE interface 43 * -- qd6580 is a dual IDE interface 44 * 45 * More research on qd6580 being done by willmore@cig.mot.com (David) 46 * More Information given by Petr Soucek (petr@ryston.cz) 47 * http://www.ryston.cz/petr/vlb 48 */ 49 50/* 51 * base: Timer1 52 * 53 * 54 * base+0x01: Config (R/O) 55 * 56 * bit 0: ide baseport: 1 = 0x1f0 ; 0 = 0x170 (only useful for qd6500) 57 * bit 1: qd65xx baseport: 1 = 0xb0 ; 0 = 0x30 58 * bit 2: ID3: bus speed: 1 = <=33MHz ; 0 = >33MHz 59 * bit 3: qd6500: 1 = disabled, 0 = enabled 60 * qd6580: 1 61 * upper nibble: 62 * qd6500: 1100 63 * qd6580: either 1010 or 0101 64 * 65 * 66 * base+0x02: Timer2 (qd6580 only) 67 * 68 * 69 * base+0x03: Control (qd6580 only) 70 * 71 * bits 0-3 must always be set 1 72 * bit 4 must be set 1, but is set 0 by dos driver while measuring vlb clock 73 * bit 0 : 1 = Only primary port enabled : channel 0 for hda, channel 1 for hdb 74 * 0 = Primary and Secondary ports enabled : channel 0 for hda & hdb 75 * channel 1 for hdc & hdd 76 * bit 1 : 1 = only disks on primary port 77 * 0 = disks & ATAPI devices on primary port 78 * bit 2-4 : always 0 79 * bit 5 : status, but of what ? 80 * bit 6 : always set 1 by dos driver 81 * bit 7 : set 1 for non-ATAPI devices on primary port 82 * (maybe read-ahead and post-write buffer ?) 83 */ 84 85static int timings[4]={-1,-1,-1,-1}; /* stores current timing for each timer */ 86 87/* 88 * qd65xx_select: 89 * 90 * This routine is invoked to prepare for access to a given drive. 91 */ 92 93static void qd65xx_select(ide_drive_t *drive) 94{ 95 u8 index = (( (QD_TIMREG(drive)) & 0x80 ) >> 7) | 96 (QD_TIMREG(drive) & 0x02); 97 98 if (timings[index] != QD_TIMING(drive)) 99 outb(timings[index] = QD_TIMING(drive), QD_TIMREG(drive)); 100} 101 102/* 103 * qd6500_compute_timing 104 * 105 * computes the timing value where 106 * lower nibble represents active time, in count of VLB clocks 107 * upper nibble represents recovery time, in count of VLB clocks 108 */ 109 110static u8 qd6500_compute_timing (ide_hwif_t *hwif, int active_time, int recovery_time) 111{ 112 int clk = ide_vlb_clk ? ide_vlb_clk : 50; 113 u8 act_cyc, rec_cyc; 114 115 if (clk <= 33) { 116 act_cyc = 9 - IDE_IN(active_time * clk / 1000 + 1, 2, 9); 117 rec_cyc = 15 - IDE_IN(recovery_time * clk / 1000 + 1, 0, 15); 118 } else { 119 act_cyc = 8 - IDE_IN(active_time * clk / 1000 + 1, 1, 8); 120 rec_cyc = 18 - IDE_IN(recovery_time * clk / 1000 + 1, 3, 18); 121 } 122 123 return (rec_cyc << 4) | 0x08 | act_cyc; 124} 125 126/* 127 * qd6580_compute_timing 128 * 129 * idem for qd6580 130 */ 131 132static u8 qd6580_compute_timing (int active_time, int recovery_time) 133{ 134 int clk = ide_vlb_clk ? ide_vlb_clk : 50; 135 u8 act_cyc, rec_cyc; 136 137 act_cyc = 17 - IDE_IN(active_time * clk / 1000 + 1, 2, 17); 138 rec_cyc = 15 - IDE_IN(recovery_time * clk / 1000 + 1, 2, 15); 139 140 return (rec_cyc << 4) | act_cyc; 141} 142 143/* 144 * qd_find_disk_type 145 * 146 * tries to find timing from dos driver's table 147 */ 148 149static int qd_find_disk_type (ide_drive_t *drive, 150 int *active_time, int *recovery_time) 151{ 152 struct qd65xx_timing_s *p; 153 char *m = (char *)&drive->id[ATA_ID_PROD]; 154 char model[ATA_ID_PROD_LEN]; 155 156 if (*m == 0) 157 return 0; 158 159 strncpy(model, m, ATA_ID_PROD_LEN); 160 ide_fixstring(model, ATA_ID_PROD_LEN, 1); /* byte-swap */ 161 162 for (p = qd65xx_timing ; p->offset != -1 ; p++) { 163 if (!strncmp(p->model, model+p->offset, 4)) { 164 printk(KERN_DEBUG "%s: listed !\n", drive->name); 165 *active_time = p->active; 166 *recovery_time = p->recovery; 167 return 1; 168 } 169 } 170 return 0; 171} 172 173/* 174 * qd_set_timing: 175 * 176 * records the timing 177 */ 178 179static void qd_set_timing (ide_drive_t *drive, u8 timing) 180{ 181 drive->drive_data &= 0xff00; 182 drive->drive_data |= timing; 183 184 printk(KERN_DEBUG "%s: %#x\n", drive->name, timing); 185} 186 187static void qd6500_set_pio_mode(ide_drive_t *drive, const u8 pio) 188{ 189 u16 *id = drive->id; 190 int active_time = 175; 191 int recovery_time = 415; /* worst case values from the dos driver */ 192 193 /* 194 * FIXME: use "pio" value 195 */ 196 if (!qd_find_disk_type(drive, &active_time, &recovery_time) && 197 (id[ATA_ID_OLD_PIO_MODES] & 0xff) && (id[ATA_ID_FIELD_VALID] & 2) && 198 id[ATA_ID_EIDE_PIO] >= 240) { 199 printk(KERN_INFO "%s: PIO mode%d\n", drive->name, 200 id[ATA_ID_OLD_PIO_MODES] & 0xff); 201 active_time = 110; 202 recovery_time = drive->id[ATA_ID_EIDE_PIO] - 120; 203 } 204 205 qd_set_timing(drive, qd6500_compute_timing(HWIF(drive), active_time, recovery_time)); 206} 207 208static void qd6580_set_pio_mode(ide_drive_t *drive, const u8 pio) 209{ 210 ide_hwif_t *hwif = drive->hwif; 211 struct ide_timing *t = ide_timing_find_mode(XFER_PIO_0 + pio); 212 unsigned int cycle_time; 213 int active_time = 175; 214 int recovery_time = 415; /* worst case values from the dos driver */ 215 u8 base = (hwif->config_data & 0xff00) >> 8; 216 217 if (drive->id && !qd_find_disk_type(drive, &active_time, &recovery_time)) { 218 cycle_time = ide_pio_cycle_time(drive, pio); 219 220 switch (pio) { 221 case 0: break; 222 case 3: 223 if (cycle_time >= 110) { 224 active_time = 86; 225 recovery_time = cycle_time - 102; 226 } else 227 printk(KERN_WARNING "%s: Strange recovery time !\n",drive->name); 228 break; 229 case 4: 230 if (cycle_time >= 69) { 231 active_time = 70; 232 recovery_time = cycle_time - 61; 233 } else 234 printk(KERN_WARNING "%s: Strange recovery time !\n",drive->name); 235 break; 236 default: 237 if (cycle_time >= 180) { 238 active_time = 110; 239 recovery_time = cycle_time - 120; 240 } else { 241 active_time = t->active; 242 recovery_time = cycle_time - active_time; 243 } 244 } 245 printk(KERN_INFO "%s: PIO mode%d\n", drive->name,pio); 246 } 247 248 if (!HWIF(drive)->channel && drive->media != ide_disk) { 249 outb(0x5f, QD_CONTROL_PORT); 250 printk(KERN_WARNING "%s: ATAPI: disabled read-ahead FIFO " 251 "and post-write buffer on %s.\n", 252 drive->name, HWIF(drive)->name); 253 } 254 255 qd_set_timing(drive, qd6580_compute_timing(active_time, recovery_time)); 256} 257 258/* 259 * qd_testreg 260 * 261 * tests if the given port is a register 262 */ 263 264static int __init qd_testreg(int port) 265{ 266 unsigned long flags; 267 u8 savereg, readreg; 268 269 local_irq_save(flags); 270 savereg = inb_p(port); 271 outb_p(QD_TESTVAL, port); /* safe value */ 272 readreg = inb_p(port); 273 outb(savereg, port); 274 local_irq_restore(flags); 275 276 if (savereg == QD_TESTVAL) { 277 printk(KERN_ERR "Outch ! the probe for qd65xx isn't reliable !\n"); 278 printk(KERN_ERR "Please contact maintainers to tell about your hardware\n"); 279 printk(KERN_ERR "Assuming qd65xx is not present.\n"); 280 return 1; 281 } 282 283 return (readreg != QD_TESTVAL); 284} 285 286static void __init qd6500_init_dev(ide_drive_t *drive) 287{ 288 ide_hwif_t *hwif = drive->hwif; 289 u8 base = (hwif->config_data & 0xff00) >> 8; 290 u8 config = QD_CONFIG(hwif); 291 292 drive->drive_data = QD6500_DEF_DATA; 293} 294 295static void __init qd6580_init_dev(ide_drive_t *drive) 296{ 297 ide_hwif_t *hwif = drive->hwif; 298 u16 t1, t2; 299 u8 base = (hwif->config_data & 0xff00) >> 8; 300 u8 config = QD_CONFIG(hwif); 301 302 if (hwif->host_flags & IDE_HFLAG_SINGLE) { 303 t1 = QD6580_DEF_DATA; 304 t2 = QD6580_DEF_DATA2; 305 } else 306 t2 = t1 = hwif->channel ? QD6580_DEF_DATA2 : QD6580_DEF_DATA; 307 308 drive->drive_data = (drive->dn & 1) ? t2 : t1; 309} 310 311static const struct ide_port_ops qd6500_port_ops = { 312 .init_dev = qd6500_init_dev, 313 .set_pio_mode = qd6500_set_pio_mode, 314 .selectproc = qd65xx_select, 315}; 316 317static const struct ide_port_ops qd6580_port_ops = { 318 .init_dev = qd6580_init_dev, 319 .set_pio_mode = qd6580_set_pio_mode, 320 .selectproc = qd65xx_select, 321}; 322 323static const struct ide_port_info qd65xx_port_info __initdata = { 324 .name = DRV_NAME, 325 .chipset = ide_qd65xx, 326 .host_flags = IDE_HFLAG_IO_32BIT | 327 IDE_HFLAG_NO_DMA, 328 .pio_mask = ATA_PIO4, 329}; 330 331/* 332 * qd_probe: 333 * 334 * looks at the specified baseport, and if qd found, registers & initialises it 335 * return 1 if another qd may be probed 336 */ 337 338static int __init qd_probe(int base) 339{ 340 int rc; 341 u8 config, unit, control; 342 struct ide_port_info d = qd65xx_port_info; 343 344 config = inb(QD_CONFIG_PORT); 345 346 if (! ((config & QD_CONFIG_BASEPORT) >> 1 == (base == 0xb0)) ) 347 return -ENODEV; 348 349 unit = ! (config & QD_CONFIG_IDE_BASEPORT); 350 351 if (unit) 352 d.host_flags |= IDE_HFLAG_QD_2ND_PORT; 353 354 switch (config & 0xf0) { 355 case QD_CONFIG_QD6500: 356 if (qd_testreg(base)) 357 return -ENODEV; /* bad register */ 358 359 if (config & QD_CONFIG_DISABLED) { 360 printk(KERN_WARNING "qd6500 is disabled !\n"); 361 return -ENODEV; 362 } 363 364 printk(KERN_NOTICE "qd6500 at %#x\n", base); 365 printk(KERN_DEBUG "qd6500: config=%#x, ID3=%u\n", 366 config, QD_ID3); 367 368 d.port_ops = &qd6500_port_ops; 369 d.host_flags |= IDE_HFLAG_SINGLE; 370 break; 371 case QD_CONFIG_QD6580_A: 372 case QD_CONFIG_QD6580_B: 373 if (qd_testreg(base) || qd_testreg(base + 0x02)) 374 return -ENODEV; /* bad registers */ 375 376 control = inb(QD_CONTROL_PORT); 377 378 printk(KERN_NOTICE "qd6580 at %#x\n", base); 379 printk(KERN_DEBUG "qd6580: config=%#x, control=%#x, ID3=%u\n", 380 config, control, QD_ID3); 381 382 outb(QD_DEF_CONTR, QD_CONTROL_PORT); 383 384 d.port_ops = &qd6580_port_ops; 385 if (control & QD_CONTR_SEC_DISABLED) 386 d.host_flags |= IDE_HFLAG_SINGLE; 387 388 printk(KERN_INFO "qd6580: %s IDE board\n", 389 (control & QD_CONTR_SEC_DISABLED) ? "single" : "dual"); 390 break; 391 default: 392 return -ENODEV; 393 } 394 395 rc = ide_legacy_device_add(&d, (base << 8) | config); 396 397 if (d.host_flags & IDE_HFLAG_SINGLE) 398 return (rc == 0) ? 1 : rc; 399 400 return rc; 401} 402 403static int probe_qd65xx; 404 405module_param_named(probe, probe_qd65xx, bool, 0); 406MODULE_PARM_DESC(probe, "probe for QD65xx chipsets"); 407 408static int __init qd65xx_init(void) 409{ 410 int rc1, rc2 = -ENODEV; 411 412 if (probe_qd65xx == 0) 413 return -ENODEV; 414 415 rc1 = qd_probe(0x30); 416 if (rc1) 417 rc2 = qd_probe(0xb0); 418 419 if (rc1 < 0 && rc2 < 0) 420 return -ENODEV; 421 422 return 0; 423} 424 425module_init(qd65xx_init); 426 427MODULE_AUTHOR("Samuel Thibault"); 428MODULE_DESCRIPTION("support of qd65xx vlb ide chipset"); 429MODULE_LICENSE("GPL");