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1/* 2 * linux/drivers/serial/pxa.c 3 * 4 * Based on drivers/serial/8250.c by Russell King. 5 * 6 * Author: Nicolas Pitre 7 * Created: Feb 20, 2003 8 * Copyright: (C) 2003 Monta Vista Software, Inc. 9 * 10 * This program is free software; you can redistribute it and/or modify 11 * it under the terms of the GNU General Public License as published by 12 * the Free Software Foundation; either version 2 of the License, or 13 * (at your option) any later version. 14 * 15 * Note 1: This driver is made separate from the already too overloaded 16 * 8250.c because it needs some kirks of its own and that'll make it 17 * easier to add DMA support. 18 * 19 * Note 2: I'm too sick of device allocation policies for serial ports. 20 * If someone else wants to request an "official" allocation of major/minor 21 * for this driver please be my guest. And don't forget that new hardware 22 * to come from Intel might have more than 3 or 4 of those UARTs. Let's 23 * hope for a better port registration and dynamic device allocation scheme 24 * with the serial core maintainer satisfaction to appear soon. 25 */ 26 27 28#if defined(CONFIG_SERIAL_PXA_CONSOLE) && defined(CONFIG_MAGIC_SYSRQ) 29#define SUPPORT_SYSRQ 30#endif 31 32#include <linux/module.h> 33#include <linux/ioport.h> 34#include <linux/init.h> 35#include <linux/console.h> 36#include <linux/sysrq.h> 37#include <linux/serial_reg.h> 38#include <linux/circ_buf.h> 39#include <linux/delay.h> 40#include <linux/interrupt.h> 41#include <linux/platform_device.h> 42#include <linux/tty.h> 43#include <linux/tty_flip.h> 44#include <linux/serial_core.h> 45#include <linux/clk.h> 46 47#include <asm/io.h> 48#include <mach/hardware.h> 49#include <asm/irq.h> 50#include <mach/pxa-regs.h> 51 52 53struct uart_pxa_port { 54 struct uart_port port; 55 unsigned char ier; 56 unsigned char lcr; 57 unsigned char mcr; 58 unsigned int lsr_break_flag; 59 struct clk *clk; 60 char *name; 61}; 62 63static inline unsigned int serial_in(struct uart_pxa_port *up, int offset) 64{ 65 offset <<= 2; 66 return readl(up->port.membase + offset); 67} 68 69static inline void serial_out(struct uart_pxa_port *up, int offset, int value) 70{ 71 offset <<= 2; 72 writel(value, up->port.membase + offset); 73} 74 75static void serial_pxa_enable_ms(struct uart_port *port) 76{ 77 struct uart_pxa_port *up = (struct uart_pxa_port *)port; 78 79 up->ier |= UART_IER_MSI; 80 serial_out(up, UART_IER, up->ier); 81} 82 83static void serial_pxa_stop_tx(struct uart_port *port) 84{ 85 struct uart_pxa_port *up = (struct uart_pxa_port *)port; 86 87 if (up->ier & UART_IER_THRI) { 88 up->ier &= ~UART_IER_THRI; 89 serial_out(up, UART_IER, up->ier); 90 } 91} 92 93static void serial_pxa_stop_rx(struct uart_port *port) 94{ 95 struct uart_pxa_port *up = (struct uart_pxa_port *)port; 96 97 up->ier &= ~UART_IER_RLSI; 98 up->port.read_status_mask &= ~UART_LSR_DR; 99 serial_out(up, UART_IER, up->ier); 100} 101 102static inline void receive_chars(struct uart_pxa_port *up, int *status) 103{ 104 struct tty_struct *tty = up->port.info->port.tty; 105 unsigned int ch, flag; 106 int max_count = 256; 107 108 do { 109 ch = serial_in(up, UART_RX); 110 flag = TTY_NORMAL; 111 up->port.icount.rx++; 112 113 if (unlikely(*status & (UART_LSR_BI | UART_LSR_PE | 114 UART_LSR_FE | UART_LSR_OE))) { 115 /* 116 * For statistics only 117 */ 118 if (*status & UART_LSR_BI) { 119 *status &= ~(UART_LSR_FE | UART_LSR_PE); 120 up->port.icount.brk++; 121 /* 122 * We do the SysRQ and SAK checking 123 * here because otherwise the break 124 * may get masked by ignore_status_mask 125 * or read_status_mask. 126 */ 127 if (uart_handle_break(&up->port)) 128 goto ignore_char; 129 } else if (*status & UART_LSR_PE) 130 up->port.icount.parity++; 131 else if (*status & UART_LSR_FE) 132 up->port.icount.frame++; 133 if (*status & UART_LSR_OE) 134 up->port.icount.overrun++; 135 136 /* 137 * Mask off conditions which should be ignored. 138 */ 139 *status &= up->port.read_status_mask; 140 141#ifdef CONFIG_SERIAL_PXA_CONSOLE 142 if (up->port.line == up->port.cons->index) { 143 /* Recover the break flag from console xmit */ 144 *status |= up->lsr_break_flag; 145 up->lsr_break_flag = 0; 146 } 147#endif 148 if (*status & UART_LSR_BI) { 149 flag = TTY_BREAK; 150 } else if (*status & UART_LSR_PE) 151 flag = TTY_PARITY; 152 else if (*status & UART_LSR_FE) 153 flag = TTY_FRAME; 154 } 155 156 if (uart_handle_sysrq_char(&up->port, ch)) 157 goto ignore_char; 158 159 uart_insert_char(&up->port, *status, UART_LSR_OE, ch, flag); 160 161 ignore_char: 162 *status = serial_in(up, UART_LSR); 163 } while ((*status & UART_LSR_DR) && (max_count-- > 0)); 164 tty_flip_buffer_push(tty); 165} 166 167static void transmit_chars(struct uart_pxa_port *up) 168{ 169 struct circ_buf *xmit = &up->port.info->xmit; 170 int count; 171 172 if (up->port.x_char) { 173 serial_out(up, UART_TX, up->port.x_char); 174 up->port.icount.tx++; 175 up->port.x_char = 0; 176 return; 177 } 178 if (uart_circ_empty(xmit) || uart_tx_stopped(&up->port)) { 179 serial_pxa_stop_tx(&up->port); 180 return; 181 } 182 183 count = up->port.fifosize / 2; 184 do { 185 serial_out(up, UART_TX, xmit->buf[xmit->tail]); 186 xmit->tail = (xmit->tail + 1) & (UART_XMIT_SIZE - 1); 187 up->port.icount.tx++; 188 if (uart_circ_empty(xmit)) 189 break; 190 } while (--count > 0); 191 192 if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS) 193 uart_write_wakeup(&up->port); 194 195 196 if (uart_circ_empty(xmit)) 197 serial_pxa_stop_tx(&up->port); 198} 199 200static void serial_pxa_start_tx(struct uart_port *port) 201{ 202 struct uart_pxa_port *up = (struct uart_pxa_port *)port; 203 204 if (!(up->ier & UART_IER_THRI)) { 205 up->ier |= UART_IER_THRI; 206 serial_out(up, UART_IER, up->ier); 207 } 208} 209 210static inline void check_modem_status(struct uart_pxa_port *up) 211{ 212 int status; 213 214 status = serial_in(up, UART_MSR); 215 216 if ((status & UART_MSR_ANY_DELTA) == 0) 217 return; 218 219 if (status & UART_MSR_TERI) 220 up->port.icount.rng++; 221 if (status & UART_MSR_DDSR) 222 up->port.icount.dsr++; 223 if (status & UART_MSR_DDCD) 224 uart_handle_dcd_change(&up->port, status & UART_MSR_DCD); 225 if (status & UART_MSR_DCTS) 226 uart_handle_cts_change(&up->port, status & UART_MSR_CTS); 227 228 wake_up_interruptible(&up->port.info->delta_msr_wait); 229} 230 231/* 232 * This handles the interrupt from one port. 233 */ 234static inline irqreturn_t serial_pxa_irq(int irq, void *dev_id) 235{ 236 struct uart_pxa_port *up = dev_id; 237 unsigned int iir, lsr; 238 239 iir = serial_in(up, UART_IIR); 240 if (iir & UART_IIR_NO_INT) 241 return IRQ_NONE; 242 lsr = serial_in(up, UART_LSR); 243 if (lsr & UART_LSR_DR) 244 receive_chars(up, &lsr); 245 check_modem_status(up); 246 if (lsr & UART_LSR_THRE) 247 transmit_chars(up); 248 return IRQ_HANDLED; 249} 250 251static unsigned int serial_pxa_tx_empty(struct uart_port *port) 252{ 253 struct uart_pxa_port *up = (struct uart_pxa_port *)port; 254 unsigned long flags; 255 unsigned int ret; 256 257 spin_lock_irqsave(&up->port.lock, flags); 258 ret = serial_in(up, UART_LSR) & UART_LSR_TEMT ? TIOCSER_TEMT : 0; 259 spin_unlock_irqrestore(&up->port.lock, flags); 260 261 return ret; 262} 263 264static unsigned int serial_pxa_get_mctrl(struct uart_port *port) 265{ 266 struct uart_pxa_port *up = (struct uart_pxa_port *)port; 267 unsigned char status; 268 unsigned int ret; 269 270 status = serial_in(up, UART_MSR); 271 272 ret = 0; 273 if (status & UART_MSR_DCD) 274 ret |= TIOCM_CAR; 275 if (status & UART_MSR_RI) 276 ret |= TIOCM_RNG; 277 if (status & UART_MSR_DSR) 278 ret |= TIOCM_DSR; 279 if (status & UART_MSR_CTS) 280 ret |= TIOCM_CTS; 281 return ret; 282} 283 284static void serial_pxa_set_mctrl(struct uart_port *port, unsigned int mctrl) 285{ 286 struct uart_pxa_port *up = (struct uart_pxa_port *)port; 287 unsigned char mcr = 0; 288 289 if (mctrl & TIOCM_RTS) 290 mcr |= UART_MCR_RTS; 291 if (mctrl & TIOCM_DTR) 292 mcr |= UART_MCR_DTR; 293 if (mctrl & TIOCM_OUT1) 294 mcr |= UART_MCR_OUT1; 295 if (mctrl & TIOCM_OUT2) 296 mcr |= UART_MCR_OUT2; 297 if (mctrl & TIOCM_LOOP) 298 mcr |= UART_MCR_LOOP; 299 300 mcr |= up->mcr; 301 302 serial_out(up, UART_MCR, mcr); 303} 304 305static void serial_pxa_break_ctl(struct uart_port *port, int break_state) 306{ 307 struct uart_pxa_port *up = (struct uart_pxa_port *)port; 308 unsigned long flags; 309 310 spin_lock_irqsave(&up->port.lock, flags); 311 if (break_state == -1) 312 up->lcr |= UART_LCR_SBC; 313 else 314 up->lcr &= ~UART_LCR_SBC; 315 serial_out(up, UART_LCR, up->lcr); 316 spin_unlock_irqrestore(&up->port.lock, flags); 317} 318 319#if 0 320static void serial_pxa_dma_init(struct pxa_uart *up) 321{ 322 up->rxdma = 323 pxa_request_dma(up->name, DMA_PRIO_LOW, pxa_receive_dma, up); 324 if (up->rxdma < 0) 325 goto out; 326 up->txdma = 327 pxa_request_dma(up->name, DMA_PRIO_LOW, pxa_transmit_dma, up); 328 if (up->txdma < 0) 329 goto err_txdma; 330 up->dmadesc = kmalloc(4 * sizeof(pxa_dma_desc), GFP_KERNEL); 331 if (!up->dmadesc) 332 goto err_alloc; 333 334 /* ... */ 335err_alloc: 336 pxa_free_dma(up->txdma); 337err_rxdma: 338 pxa_free_dma(up->rxdma); 339out: 340 return; 341} 342#endif 343 344static int serial_pxa_startup(struct uart_port *port) 345{ 346 struct uart_pxa_port *up = (struct uart_pxa_port *)port; 347 unsigned long flags; 348 int retval; 349 350 if (port->line == 3) /* HWUART */ 351 up->mcr |= UART_MCR_AFE; 352 else 353 up->mcr = 0; 354 355 up->port.uartclk = clk_get_rate(up->clk); 356 357 /* 358 * Allocate the IRQ 359 */ 360 retval = request_irq(up->port.irq, serial_pxa_irq, 0, up->name, up); 361 if (retval) 362 return retval; 363 364 /* 365 * Clear the FIFO buffers and disable them. 366 * (they will be reenabled in set_termios()) 367 */ 368 serial_out(up, UART_FCR, UART_FCR_ENABLE_FIFO); 369 serial_out(up, UART_FCR, UART_FCR_ENABLE_FIFO | 370 UART_FCR_CLEAR_RCVR | UART_FCR_CLEAR_XMIT); 371 serial_out(up, UART_FCR, 0); 372 373 /* 374 * Clear the interrupt registers. 375 */ 376 (void) serial_in(up, UART_LSR); 377 (void) serial_in(up, UART_RX); 378 (void) serial_in(up, UART_IIR); 379 (void) serial_in(up, UART_MSR); 380 381 /* 382 * Now, initialize the UART 383 */ 384 serial_out(up, UART_LCR, UART_LCR_WLEN8); 385 386 spin_lock_irqsave(&up->port.lock, flags); 387 up->port.mctrl |= TIOCM_OUT2; 388 serial_pxa_set_mctrl(&up->port, up->port.mctrl); 389 spin_unlock_irqrestore(&up->port.lock, flags); 390 391 /* 392 * Finally, enable interrupts. Note: Modem status interrupts 393 * are set via set_termios(), which will be occurring imminently 394 * anyway, so we don't enable them here. 395 */ 396 up->ier = UART_IER_RLSI | UART_IER_RDI | UART_IER_RTOIE | UART_IER_UUE; 397 serial_out(up, UART_IER, up->ier); 398 399 /* 400 * And clear the interrupt registers again for luck. 401 */ 402 (void) serial_in(up, UART_LSR); 403 (void) serial_in(up, UART_RX); 404 (void) serial_in(up, UART_IIR); 405 (void) serial_in(up, UART_MSR); 406 407 return 0; 408} 409 410static void serial_pxa_shutdown(struct uart_port *port) 411{ 412 struct uart_pxa_port *up = (struct uart_pxa_port *)port; 413 unsigned long flags; 414 415 free_irq(up->port.irq, up); 416 417 /* 418 * Disable interrupts from this port 419 */ 420 up->ier = 0; 421 serial_out(up, UART_IER, 0); 422 423 spin_lock_irqsave(&up->port.lock, flags); 424 up->port.mctrl &= ~TIOCM_OUT2; 425 serial_pxa_set_mctrl(&up->port, up->port.mctrl); 426 spin_unlock_irqrestore(&up->port.lock, flags); 427 428 /* 429 * Disable break condition and FIFOs 430 */ 431 serial_out(up, UART_LCR, serial_in(up, UART_LCR) & ~UART_LCR_SBC); 432 serial_out(up, UART_FCR, UART_FCR_ENABLE_FIFO | 433 UART_FCR_CLEAR_RCVR | 434 UART_FCR_CLEAR_XMIT); 435 serial_out(up, UART_FCR, 0); 436} 437 438static void 439serial_pxa_set_termios(struct uart_port *port, struct ktermios *termios, 440 struct ktermios *old) 441{ 442 struct uart_pxa_port *up = (struct uart_pxa_port *)port; 443 unsigned char cval, fcr = 0; 444 unsigned long flags; 445 unsigned int baud, quot; 446 447 switch (termios->c_cflag & CSIZE) { 448 case CS5: 449 cval = UART_LCR_WLEN5; 450 break; 451 case CS6: 452 cval = UART_LCR_WLEN6; 453 break; 454 case CS7: 455 cval = UART_LCR_WLEN7; 456 break; 457 default: 458 case CS8: 459 cval = UART_LCR_WLEN8; 460 break; 461 } 462 463 if (termios->c_cflag & CSTOPB) 464 cval |= UART_LCR_STOP; 465 if (termios->c_cflag & PARENB) 466 cval |= UART_LCR_PARITY; 467 if (!(termios->c_cflag & PARODD)) 468 cval |= UART_LCR_EPAR; 469 470 /* 471 * Ask the core to calculate the divisor for us. 472 */ 473 baud = uart_get_baud_rate(port, termios, old, 0, port->uartclk/16); 474 quot = uart_get_divisor(port, baud); 475 476 if ((up->port.uartclk / quot) < (2400 * 16)) 477 fcr = UART_FCR_ENABLE_FIFO | UART_FCR_PXAR1; 478 else if ((up->port.uartclk / quot) < (230400 * 16)) 479 fcr = UART_FCR_ENABLE_FIFO | UART_FCR_PXAR8; 480 else 481 fcr = UART_FCR_ENABLE_FIFO | UART_FCR_PXAR32; 482 483 /* 484 * Ok, we're now changing the port state. Do it with 485 * interrupts disabled. 486 */ 487 spin_lock_irqsave(&up->port.lock, flags); 488 489 /* 490 * Ensure the port will be enabled. 491 * This is required especially for serial console. 492 */ 493 up->ier |= IER_UUE; 494 495 /* 496 * Update the per-port timeout. 497 */ 498 uart_update_timeout(port, termios->c_cflag, baud); 499 500 up->port.read_status_mask = UART_LSR_OE | UART_LSR_THRE | UART_LSR_DR; 501 if (termios->c_iflag & INPCK) 502 up->port.read_status_mask |= UART_LSR_FE | UART_LSR_PE; 503 if (termios->c_iflag & (BRKINT | PARMRK)) 504 up->port.read_status_mask |= UART_LSR_BI; 505 506 /* 507 * Characters to ignore 508 */ 509 up->port.ignore_status_mask = 0; 510 if (termios->c_iflag & IGNPAR) 511 up->port.ignore_status_mask |= UART_LSR_PE | UART_LSR_FE; 512 if (termios->c_iflag & IGNBRK) { 513 up->port.ignore_status_mask |= UART_LSR_BI; 514 /* 515 * If we're ignoring parity and break indicators, 516 * ignore overruns too (for real raw support). 517 */ 518 if (termios->c_iflag & IGNPAR) 519 up->port.ignore_status_mask |= UART_LSR_OE; 520 } 521 522 /* 523 * ignore all characters if CREAD is not set 524 */ 525 if ((termios->c_cflag & CREAD) == 0) 526 up->port.ignore_status_mask |= UART_LSR_DR; 527 528 /* 529 * CTS flow control flag and modem status interrupts 530 */ 531 up->ier &= ~UART_IER_MSI; 532 if (UART_ENABLE_MS(&up->port, termios->c_cflag)) 533 up->ier |= UART_IER_MSI; 534 535 serial_out(up, UART_IER, up->ier); 536 537 if (termios->c_cflag & CRTSCTS) 538 up->mcr |= UART_MCR_AFE; 539 else 540 up->mcr &= ~UART_MCR_AFE; 541 542 serial_out(up, UART_LCR, cval | UART_LCR_DLAB);/* set DLAB */ 543 serial_out(up, UART_DLL, quot & 0xff); /* LS of divisor */ 544 serial_out(up, UART_DLM, quot >> 8); /* MS of divisor */ 545 serial_out(up, UART_LCR, cval); /* reset DLAB */ 546 up->lcr = cval; /* Save LCR */ 547 serial_pxa_set_mctrl(&up->port, up->port.mctrl); 548 serial_out(up, UART_FCR, fcr); 549 spin_unlock_irqrestore(&up->port.lock, flags); 550} 551 552static void 553serial_pxa_pm(struct uart_port *port, unsigned int state, 554 unsigned int oldstate) 555{ 556 struct uart_pxa_port *up = (struct uart_pxa_port *)port; 557 558 if (!state) 559 clk_enable(up->clk); 560 else 561 clk_disable(up->clk); 562} 563 564static void serial_pxa_release_port(struct uart_port *port) 565{ 566} 567 568static int serial_pxa_request_port(struct uart_port *port) 569{ 570 return 0; 571} 572 573static void serial_pxa_config_port(struct uart_port *port, int flags) 574{ 575 struct uart_pxa_port *up = (struct uart_pxa_port *)port; 576 up->port.type = PORT_PXA; 577} 578 579static int 580serial_pxa_verify_port(struct uart_port *port, struct serial_struct *ser) 581{ 582 /* we don't want the core code to modify any port params */ 583 return -EINVAL; 584} 585 586static const char * 587serial_pxa_type(struct uart_port *port) 588{ 589 struct uart_pxa_port *up = (struct uart_pxa_port *)port; 590 return up->name; 591} 592 593static struct uart_pxa_port *serial_pxa_ports[4]; 594static struct uart_driver serial_pxa_reg; 595 596#ifdef CONFIG_SERIAL_PXA_CONSOLE 597 598#define BOTH_EMPTY (UART_LSR_TEMT | UART_LSR_THRE) 599 600/* 601 * Wait for transmitter & holding register to empty 602 */ 603static inline void wait_for_xmitr(struct uart_pxa_port *up) 604{ 605 unsigned int status, tmout = 10000; 606 607 /* Wait up to 10ms for the character(s) to be sent. */ 608 do { 609 status = serial_in(up, UART_LSR); 610 611 if (status & UART_LSR_BI) 612 up->lsr_break_flag = UART_LSR_BI; 613 614 if (--tmout == 0) 615 break; 616 udelay(1); 617 } while ((status & BOTH_EMPTY) != BOTH_EMPTY); 618 619 /* Wait up to 1s for flow control if necessary */ 620 if (up->port.flags & UPF_CONS_FLOW) { 621 tmout = 1000000; 622 while (--tmout && 623 ((serial_in(up, UART_MSR) & UART_MSR_CTS) == 0)) 624 udelay(1); 625 } 626} 627 628static void serial_pxa_console_putchar(struct uart_port *port, int ch) 629{ 630 struct uart_pxa_port *up = (struct uart_pxa_port *)port; 631 632 wait_for_xmitr(up); 633 serial_out(up, UART_TX, ch); 634} 635 636/* 637 * Print a string to the serial port trying not to disturb 638 * any possible real use of the port... 639 * 640 * The console_lock must be held when we get here. 641 */ 642static void 643serial_pxa_console_write(struct console *co, const char *s, unsigned int count) 644{ 645 struct uart_pxa_port *up = serial_pxa_ports[co->index]; 646 unsigned int ier; 647 648 clk_enable(up->clk); 649 650 /* 651 * First save the IER then disable the interrupts 652 */ 653 ier = serial_in(up, UART_IER); 654 serial_out(up, UART_IER, UART_IER_UUE); 655 656 uart_console_write(&up->port, s, count, serial_pxa_console_putchar); 657 658 /* 659 * Finally, wait for transmitter to become empty 660 * and restore the IER 661 */ 662 wait_for_xmitr(up); 663 serial_out(up, UART_IER, ier); 664 665 clk_disable(up->clk); 666} 667 668static int __init 669serial_pxa_console_setup(struct console *co, char *options) 670{ 671 struct uart_pxa_port *up; 672 int baud = 9600; 673 int bits = 8; 674 int parity = 'n'; 675 int flow = 'n'; 676 677 if (co->index == -1 || co->index >= serial_pxa_reg.nr) 678 co->index = 0; 679 up = serial_pxa_ports[co->index]; 680 if (!up) 681 return -ENODEV; 682 683 if (options) 684 uart_parse_options(options, &baud, &parity, &bits, &flow); 685 686 return uart_set_options(&up->port, co, baud, parity, bits, flow); 687} 688 689static struct console serial_pxa_console = { 690 .name = "ttyS", 691 .write = serial_pxa_console_write, 692 .device = uart_console_device, 693 .setup = serial_pxa_console_setup, 694 .flags = CON_PRINTBUFFER, 695 .index = -1, 696 .data = &serial_pxa_reg, 697}; 698 699#define PXA_CONSOLE &serial_pxa_console 700#else 701#define PXA_CONSOLE NULL 702#endif 703 704struct uart_ops serial_pxa_pops = { 705 .tx_empty = serial_pxa_tx_empty, 706 .set_mctrl = serial_pxa_set_mctrl, 707 .get_mctrl = serial_pxa_get_mctrl, 708 .stop_tx = serial_pxa_stop_tx, 709 .start_tx = serial_pxa_start_tx, 710 .stop_rx = serial_pxa_stop_rx, 711 .enable_ms = serial_pxa_enable_ms, 712 .break_ctl = serial_pxa_break_ctl, 713 .startup = serial_pxa_startup, 714 .shutdown = serial_pxa_shutdown, 715 .set_termios = serial_pxa_set_termios, 716 .pm = serial_pxa_pm, 717 .type = serial_pxa_type, 718 .release_port = serial_pxa_release_port, 719 .request_port = serial_pxa_request_port, 720 .config_port = serial_pxa_config_port, 721 .verify_port = serial_pxa_verify_port, 722}; 723 724static struct uart_driver serial_pxa_reg = { 725 .owner = THIS_MODULE, 726 .driver_name = "PXA serial", 727 .dev_name = "ttyS", 728 .major = TTY_MAJOR, 729 .minor = 64, 730 .nr = 4, 731 .cons = PXA_CONSOLE, 732}; 733 734static int serial_pxa_suspend(struct platform_device *dev, pm_message_t state) 735{ 736 struct uart_pxa_port *sport = platform_get_drvdata(dev); 737 738 if (sport) 739 uart_suspend_port(&serial_pxa_reg, &sport->port); 740 741 return 0; 742} 743 744static int serial_pxa_resume(struct platform_device *dev) 745{ 746 struct uart_pxa_port *sport = platform_get_drvdata(dev); 747 748 if (sport) 749 uart_resume_port(&serial_pxa_reg, &sport->port); 750 751 return 0; 752} 753 754static int serial_pxa_probe(struct platform_device *dev) 755{ 756 struct uart_pxa_port *sport; 757 struct resource *mmres, *irqres; 758 int ret; 759 760 mmres = platform_get_resource(dev, IORESOURCE_MEM, 0); 761 irqres = platform_get_resource(dev, IORESOURCE_IRQ, 0); 762 if (!mmres || !irqres) 763 return -ENODEV; 764 765 sport = kzalloc(sizeof(struct uart_pxa_port), GFP_KERNEL); 766 if (!sport) 767 return -ENOMEM; 768 769 sport->clk = clk_get(&dev->dev, "UARTCLK"); 770 if (IS_ERR(sport->clk)) { 771 ret = PTR_ERR(sport->clk); 772 goto err_free; 773 } 774 775 sport->port.type = PORT_PXA; 776 sport->port.iotype = UPIO_MEM; 777 sport->port.mapbase = mmres->start; 778 sport->port.irq = irqres->start; 779 sport->port.fifosize = 64; 780 sport->port.ops = &serial_pxa_pops; 781 sport->port.line = dev->id; 782 sport->port.dev = &dev->dev; 783 sport->port.flags = UPF_IOREMAP | UPF_BOOT_AUTOCONF; 784 sport->port.uartclk = clk_get_rate(sport->clk); 785 786 /* 787 * Is it worth keeping this? 788 */ 789 if (mmres->start == __PREG(FFUART)) 790 sport->name = "FFUART"; 791 else if (mmres->start == __PREG(BTUART)) 792 sport->name = "BTUART"; 793 else if (mmres->start == __PREG(STUART)) 794 sport->name = "STUART"; 795 else if (mmres->start == __PREG(HWUART)) 796 sport->name = "HWUART"; 797 else 798 sport->name = "???"; 799 800 sport->port.membase = ioremap(mmres->start, mmres->end - mmres->start + 1); 801 if (!sport->port.membase) { 802 ret = -ENOMEM; 803 goto err_clk; 804 } 805 806 serial_pxa_ports[dev->id] = sport; 807 808 uart_add_one_port(&serial_pxa_reg, &sport->port); 809 platform_set_drvdata(dev, sport); 810 811 return 0; 812 813 err_clk: 814 clk_put(sport->clk); 815 err_free: 816 kfree(sport); 817 return ret; 818} 819 820static int serial_pxa_remove(struct platform_device *dev) 821{ 822 struct uart_pxa_port *sport = platform_get_drvdata(dev); 823 824 platform_set_drvdata(dev, NULL); 825 826 uart_remove_one_port(&serial_pxa_reg, &sport->port); 827 clk_put(sport->clk); 828 kfree(sport); 829 830 return 0; 831} 832 833static struct platform_driver serial_pxa_driver = { 834 .probe = serial_pxa_probe, 835 .remove = serial_pxa_remove, 836 837 .suspend = serial_pxa_suspend, 838 .resume = serial_pxa_resume, 839 .driver = { 840 .name = "pxa2xx-uart", 841 .owner = THIS_MODULE, 842 }, 843}; 844 845int __init serial_pxa_init(void) 846{ 847 int ret; 848 849 ret = uart_register_driver(&serial_pxa_reg); 850 if (ret != 0) 851 return ret; 852 853 ret = platform_driver_register(&serial_pxa_driver); 854 if (ret != 0) 855 uart_unregister_driver(&serial_pxa_reg); 856 857 return ret; 858} 859 860void __exit serial_pxa_exit(void) 861{ 862 platform_driver_unregister(&serial_pxa_driver); 863 uart_unregister_driver(&serial_pxa_reg); 864} 865 866module_init(serial_pxa_init); 867module_exit(serial_pxa_exit); 868 869MODULE_LICENSE("GPL"); 870MODULE_ALIAS("platform:pxa2xx-uart");