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1/* 2 * Dynamic DMA mapping support. 3 * 4 * This implementation is a fallback for platforms that do not support 5 * I/O TLBs (aka DMA address translation hardware). 6 * Copyright (C) 2000 Asit Mallick <Asit.K.Mallick@intel.com> 7 * Copyright (C) 2000 Goutham Rao <goutham.rao@intel.com> 8 * Copyright (C) 2000, 2003 Hewlett-Packard Co 9 * David Mosberger-Tang <davidm@hpl.hp.com> 10 * 11 * 03/05/07 davidm Switch from PCI-DMA to generic device DMA API. 12 * 00/12/13 davidm Rename to swiotlb.c and add mark_clean() to avoid 13 * unnecessary i-cache flushing. 14 * 04/07/.. ak Better overflow handling. Assorted fixes. 15 * 05/09/10 linville Add support for syncing ranges, support syncing for 16 * DMA_BIDIRECTIONAL mappings, miscellaneous cleanup. 17 */ 18 19#include <linux/cache.h> 20#include <linux/dma-mapping.h> 21#include <linux/mm.h> 22#include <linux/module.h> 23#include <linux/spinlock.h> 24#include <linux/string.h> 25#include <linux/types.h> 26#include <linux/ctype.h> 27 28#include <asm/io.h> 29#include <asm/dma.h> 30#include <asm/scatterlist.h> 31 32#include <linux/init.h> 33#include <linux/bootmem.h> 34#include <linux/iommu-helper.h> 35 36#define OFFSET(val,align) ((unsigned long) \ 37 ( (val) & ( (align) - 1))) 38 39#define SG_ENT_VIRT_ADDRESS(sg) (sg_virt((sg))) 40#define SG_ENT_PHYS_ADDRESS(sg) virt_to_bus(SG_ENT_VIRT_ADDRESS(sg)) 41 42/* 43 * Maximum allowable number of contiguous slabs to map, 44 * must be a power of 2. What is the appropriate value ? 45 * The complexity of {map,unmap}_single is linearly dependent on this value. 46 */ 47#define IO_TLB_SEGSIZE 128 48 49/* 50 * log of the size of each IO TLB slab. The number of slabs is command line 51 * controllable. 52 */ 53#define IO_TLB_SHIFT 11 54 55#define SLABS_PER_PAGE (1 << (PAGE_SHIFT - IO_TLB_SHIFT)) 56 57/* 58 * Minimum IO TLB size to bother booting with. Systems with mainly 59 * 64bit capable cards will only lightly use the swiotlb. If we can't 60 * allocate a contiguous 1MB, we're probably in trouble anyway. 61 */ 62#define IO_TLB_MIN_SLABS ((1<<20) >> IO_TLB_SHIFT) 63 64/* 65 * Enumeration for sync targets 66 */ 67enum dma_sync_target { 68 SYNC_FOR_CPU = 0, 69 SYNC_FOR_DEVICE = 1, 70}; 71 72int swiotlb_force; 73 74/* 75 * Used to do a quick range check in swiotlb_unmap_single and 76 * swiotlb_sync_single_*, to see if the memory was in fact allocated by this 77 * API. 78 */ 79static char *io_tlb_start, *io_tlb_end; 80 81/* 82 * The number of IO TLB blocks (in groups of 64) betweeen io_tlb_start and 83 * io_tlb_end. This is command line adjustable via setup_io_tlb_npages. 84 */ 85static unsigned long io_tlb_nslabs; 86 87/* 88 * When the IOMMU overflows we return a fallback buffer. This sets the size. 89 */ 90static unsigned long io_tlb_overflow = 32*1024; 91 92void *io_tlb_overflow_buffer; 93 94/* 95 * This is a free list describing the number of free entries available from 96 * each index 97 */ 98static unsigned int *io_tlb_list; 99static unsigned int io_tlb_index; 100 101/* 102 * We need to save away the original address corresponding to a mapped entry 103 * for the sync operations. 104 */ 105static unsigned char **io_tlb_orig_addr; 106 107/* 108 * Protect the above data structures in the map and unmap calls 109 */ 110static DEFINE_SPINLOCK(io_tlb_lock); 111 112static int __init 113setup_io_tlb_npages(char *str) 114{ 115 if (isdigit(*str)) { 116 io_tlb_nslabs = simple_strtoul(str, &str, 0); 117 /* avoid tail segment of size < IO_TLB_SEGSIZE */ 118 io_tlb_nslabs = ALIGN(io_tlb_nslabs, IO_TLB_SEGSIZE); 119 } 120 if (*str == ',') 121 ++str; 122 if (!strcmp(str, "force")) 123 swiotlb_force = 1; 124 return 1; 125} 126__setup("swiotlb=", setup_io_tlb_npages); 127/* make io_tlb_overflow tunable too? */ 128 129/* 130 * Statically reserve bounce buffer space and initialize bounce buffer data 131 * structures for the software IO TLB used to implement the DMA API. 132 */ 133void __init 134swiotlb_init_with_default_size(size_t default_size) 135{ 136 unsigned long i, bytes; 137 138 if (!io_tlb_nslabs) { 139 io_tlb_nslabs = (default_size >> IO_TLB_SHIFT); 140 io_tlb_nslabs = ALIGN(io_tlb_nslabs, IO_TLB_SEGSIZE); 141 } 142 143 bytes = io_tlb_nslabs << IO_TLB_SHIFT; 144 145 /* 146 * Get IO TLB memory from the low pages 147 */ 148 io_tlb_start = alloc_bootmem_low_pages(bytes); 149 if (!io_tlb_start) 150 panic("Cannot allocate SWIOTLB buffer"); 151 io_tlb_end = io_tlb_start + bytes; 152 153 /* 154 * Allocate and initialize the free list array. This array is used 155 * to find contiguous free memory regions of size up to IO_TLB_SEGSIZE 156 * between io_tlb_start and io_tlb_end. 157 */ 158 io_tlb_list = alloc_bootmem(io_tlb_nslabs * sizeof(int)); 159 for (i = 0; i < io_tlb_nslabs; i++) 160 io_tlb_list[i] = IO_TLB_SEGSIZE - OFFSET(i, IO_TLB_SEGSIZE); 161 io_tlb_index = 0; 162 io_tlb_orig_addr = alloc_bootmem(io_tlb_nslabs * sizeof(char *)); 163 164 /* 165 * Get the overflow emergency buffer 166 */ 167 io_tlb_overflow_buffer = alloc_bootmem_low(io_tlb_overflow); 168 if (!io_tlb_overflow_buffer) 169 panic("Cannot allocate SWIOTLB overflow buffer!\n"); 170 171 printk(KERN_INFO "Placing software IO TLB between 0x%lx - 0x%lx\n", 172 virt_to_bus(io_tlb_start), virt_to_bus(io_tlb_end)); 173} 174 175void __init 176swiotlb_init(void) 177{ 178 swiotlb_init_with_default_size(64 * (1<<20)); /* default to 64MB */ 179} 180 181/* 182 * Systems with larger DMA zones (those that don't support ISA) can 183 * initialize the swiotlb later using the slab allocator if needed. 184 * This should be just like above, but with some error catching. 185 */ 186int 187swiotlb_late_init_with_default_size(size_t default_size) 188{ 189 unsigned long i, bytes, req_nslabs = io_tlb_nslabs; 190 unsigned int order; 191 192 if (!io_tlb_nslabs) { 193 io_tlb_nslabs = (default_size >> IO_TLB_SHIFT); 194 io_tlb_nslabs = ALIGN(io_tlb_nslabs, IO_TLB_SEGSIZE); 195 } 196 197 /* 198 * Get IO TLB memory from the low pages 199 */ 200 order = get_order(io_tlb_nslabs << IO_TLB_SHIFT); 201 io_tlb_nslabs = SLABS_PER_PAGE << order; 202 bytes = io_tlb_nslabs << IO_TLB_SHIFT; 203 204 while ((SLABS_PER_PAGE << order) > IO_TLB_MIN_SLABS) { 205 io_tlb_start = (char *)__get_free_pages(GFP_DMA | __GFP_NOWARN, 206 order); 207 if (io_tlb_start) 208 break; 209 order--; 210 } 211 212 if (!io_tlb_start) 213 goto cleanup1; 214 215 if (order != get_order(bytes)) { 216 printk(KERN_WARNING "Warning: only able to allocate %ld MB " 217 "for software IO TLB\n", (PAGE_SIZE << order) >> 20); 218 io_tlb_nslabs = SLABS_PER_PAGE << order; 219 bytes = io_tlb_nslabs << IO_TLB_SHIFT; 220 } 221 io_tlb_end = io_tlb_start + bytes; 222 memset(io_tlb_start, 0, bytes); 223 224 /* 225 * Allocate and initialize the free list array. This array is used 226 * to find contiguous free memory regions of size up to IO_TLB_SEGSIZE 227 * between io_tlb_start and io_tlb_end. 228 */ 229 io_tlb_list = (unsigned int *)__get_free_pages(GFP_KERNEL, 230 get_order(io_tlb_nslabs * sizeof(int))); 231 if (!io_tlb_list) 232 goto cleanup2; 233 234 for (i = 0; i < io_tlb_nslabs; i++) 235 io_tlb_list[i] = IO_TLB_SEGSIZE - OFFSET(i, IO_TLB_SEGSIZE); 236 io_tlb_index = 0; 237 238 io_tlb_orig_addr = (unsigned char **)__get_free_pages(GFP_KERNEL, 239 get_order(io_tlb_nslabs * sizeof(char *))); 240 if (!io_tlb_orig_addr) 241 goto cleanup3; 242 243 memset(io_tlb_orig_addr, 0, io_tlb_nslabs * sizeof(char *)); 244 245 /* 246 * Get the overflow emergency buffer 247 */ 248 io_tlb_overflow_buffer = (void *)__get_free_pages(GFP_DMA, 249 get_order(io_tlb_overflow)); 250 if (!io_tlb_overflow_buffer) 251 goto cleanup4; 252 253 printk(KERN_INFO "Placing %luMB software IO TLB between 0x%lx - " 254 "0x%lx\n", bytes >> 20, 255 virt_to_bus(io_tlb_start), virt_to_bus(io_tlb_end)); 256 257 return 0; 258 259cleanup4: 260 free_pages((unsigned long)io_tlb_orig_addr, get_order(io_tlb_nslabs * 261 sizeof(char *))); 262 io_tlb_orig_addr = NULL; 263cleanup3: 264 free_pages((unsigned long)io_tlb_list, get_order(io_tlb_nslabs * 265 sizeof(int))); 266 io_tlb_list = NULL; 267cleanup2: 268 io_tlb_end = NULL; 269 free_pages((unsigned long)io_tlb_start, order); 270 io_tlb_start = NULL; 271cleanup1: 272 io_tlb_nslabs = req_nslabs; 273 return -ENOMEM; 274} 275 276static int 277address_needs_mapping(struct device *hwdev, dma_addr_t addr, size_t size) 278{ 279 return !is_buffer_dma_capable(dma_get_mask(hwdev), addr, size); 280} 281 282static int is_swiotlb_buffer(char *addr) 283{ 284 return addr >= io_tlb_start && addr < io_tlb_end; 285} 286 287/* 288 * Allocates bounce buffer and returns its kernel virtual address. 289 */ 290static void * 291map_single(struct device *hwdev, char *buffer, size_t size, int dir) 292{ 293 unsigned long flags; 294 char *dma_addr; 295 unsigned int nslots, stride, index, wrap; 296 int i; 297 unsigned long start_dma_addr; 298 unsigned long mask; 299 unsigned long offset_slots; 300 unsigned long max_slots; 301 302 mask = dma_get_seg_boundary(hwdev); 303 start_dma_addr = virt_to_bus(io_tlb_start) & mask; 304 305 offset_slots = ALIGN(start_dma_addr, 1 << IO_TLB_SHIFT) >> IO_TLB_SHIFT; 306 max_slots = mask + 1 307 ? ALIGN(mask + 1, 1 << IO_TLB_SHIFT) >> IO_TLB_SHIFT 308 : 1UL << (BITS_PER_LONG - IO_TLB_SHIFT); 309 310 /* 311 * For mappings greater than a page, we limit the stride (and 312 * hence alignment) to a page size. 313 */ 314 nslots = ALIGN(size, 1 << IO_TLB_SHIFT) >> IO_TLB_SHIFT; 315 if (size > PAGE_SIZE) 316 stride = (1 << (PAGE_SHIFT - IO_TLB_SHIFT)); 317 else 318 stride = 1; 319 320 BUG_ON(!nslots); 321 322 /* 323 * Find suitable number of IO TLB entries size that will fit this 324 * request and allocate a buffer from that IO TLB pool. 325 */ 326 spin_lock_irqsave(&io_tlb_lock, flags); 327 index = ALIGN(io_tlb_index, stride); 328 if (index >= io_tlb_nslabs) 329 index = 0; 330 wrap = index; 331 332 do { 333 while (iommu_is_span_boundary(index, nslots, offset_slots, 334 max_slots)) { 335 index += stride; 336 if (index >= io_tlb_nslabs) 337 index = 0; 338 if (index == wrap) 339 goto not_found; 340 } 341 342 /* 343 * If we find a slot that indicates we have 'nslots' number of 344 * contiguous buffers, we allocate the buffers from that slot 345 * and mark the entries as '0' indicating unavailable. 346 */ 347 if (io_tlb_list[index] >= nslots) { 348 int count = 0; 349 350 for (i = index; i < (int) (index + nslots); i++) 351 io_tlb_list[i] = 0; 352 for (i = index - 1; (OFFSET(i, IO_TLB_SEGSIZE) != IO_TLB_SEGSIZE - 1) && io_tlb_list[i]; i--) 353 io_tlb_list[i] = ++count; 354 dma_addr = io_tlb_start + (index << IO_TLB_SHIFT); 355 356 /* 357 * Update the indices to avoid searching in the next 358 * round. 359 */ 360 io_tlb_index = ((index + nslots) < io_tlb_nslabs 361 ? (index + nslots) : 0); 362 363 goto found; 364 } 365 index += stride; 366 if (index >= io_tlb_nslabs) 367 index = 0; 368 } while (index != wrap); 369 370not_found: 371 spin_unlock_irqrestore(&io_tlb_lock, flags); 372 return NULL; 373found: 374 spin_unlock_irqrestore(&io_tlb_lock, flags); 375 376 /* 377 * Save away the mapping from the original address to the DMA address. 378 * This is needed when we sync the memory. Then we sync the buffer if 379 * needed. 380 */ 381 for (i = 0; i < nslots; i++) 382 io_tlb_orig_addr[index+i] = buffer + (i << IO_TLB_SHIFT); 383 if (dir == DMA_TO_DEVICE || dir == DMA_BIDIRECTIONAL) 384 memcpy(dma_addr, buffer, size); 385 386 return dma_addr; 387} 388 389/* 390 * dma_addr is the kernel virtual address of the bounce buffer to unmap. 391 */ 392static void 393unmap_single(struct device *hwdev, char *dma_addr, size_t size, int dir) 394{ 395 unsigned long flags; 396 int i, count, nslots = ALIGN(size, 1 << IO_TLB_SHIFT) >> IO_TLB_SHIFT; 397 int index = (dma_addr - io_tlb_start) >> IO_TLB_SHIFT; 398 char *buffer = io_tlb_orig_addr[index]; 399 400 /* 401 * First, sync the memory before unmapping the entry 402 */ 403 if (buffer && ((dir == DMA_FROM_DEVICE) || (dir == DMA_BIDIRECTIONAL))) 404 /* 405 * bounce... copy the data back into the original buffer * and 406 * delete the bounce buffer. 407 */ 408 memcpy(buffer, dma_addr, size); 409 410 /* 411 * Return the buffer to the free list by setting the corresponding 412 * entries to indicate the number of contigous entries available. 413 * While returning the entries to the free list, we merge the entries 414 * with slots below and above the pool being returned. 415 */ 416 spin_lock_irqsave(&io_tlb_lock, flags); 417 { 418 count = ((index + nslots) < ALIGN(index + 1, IO_TLB_SEGSIZE) ? 419 io_tlb_list[index + nslots] : 0); 420 /* 421 * Step 1: return the slots to the free list, merging the 422 * slots with superceeding slots 423 */ 424 for (i = index + nslots - 1; i >= index; i--) 425 io_tlb_list[i] = ++count; 426 /* 427 * Step 2: merge the returned slots with the preceding slots, 428 * if available (non zero) 429 */ 430 for (i = index - 1; (OFFSET(i, IO_TLB_SEGSIZE) != IO_TLB_SEGSIZE -1) && io_tlb_list[i]; i--) 431 io_tlb_list[i] = ++count; 432 } 433 spin_unlock_irqrestore(&io_tlb_lock, flags); 434} 435 436static void 437sync_single(struct device *hwdev, char *dma_addr, size_t size, 438 int dir, int target) 439{ 440 int index = (dma_addr - io_tlb_start) >> IO_TLB_SHIFT; 441 char *buffer = io_tlb_orig_addr[index]; 442 443 buffer += ((unsigned long)dma_addr & ((1 << IO_TLB_SHIFT) - 1)); 444 445 switch (target) { 446 case SYNC_FOR_CPU: 447 if (likely(dir == DMA_FROM_DEVICE || dir == DMA_BIDIRECTIONAL)) 448 memcpy(buffer, dma_addr, size); 449 else 450 BUG_ON(dir != DMA_TO_DEVICE); 451 break; 452 case SYNC_FOR_DEVICE: 453 if (likely(dir == DMA_TO_DEVICE || dir == DMA_BIDIRECTIONAL)) 454 memcpy(dma_addr, buffer, size); 455 else 456 BUG_ON(dir != DMA_FROM_DEVICE); 457 break; 458 default: 459 BUG(); 460 } 461} 462 463void * 464swiotlb_alloc_coherent(struct device *hwdev, size_t size, 465 dma_addr_t *dma_handle, gfp_t flags) 466{ 467 dma_addr_t dev_addr; 468 void *ret; 469 int order = get_order(size); 470 471 ret = (void *)__get_free_pages(flags, order); 472 if (ret && address_needs_mapping(hwdev, virt_to_bus(ret), size)) { 473 /* 474 * The allocated memory isn't reachable by the device. 475 * Fall back on swiotlb_map_single(). 476 */ 477 free_pages((unsigned long) ret, order); 478 ret = NULL; 479 } 480 if (!ret) { 481 /* 482 * We are either out of memory or the device can't DMA 483 * to GFP_DMA memory; fall back on 484 * swiotlb_map_single(), which will grab memory from 485 * the lowest available address range. 486 */ 487 ret = map_single(hwdev, NULL, size, DMA_FROM_DEVICE); 488 if (!ret) 489 return NULL; 490 } 491 492 memset(ret, 0, size); 493 dev_addr = virt_to_bus(ret); 494 495 /* Confirm address can be DMA'd by device */ 496 if (address_needs_mapping(hwdev, dev_addr, size)) { 497 printk("hwdev DMA mask = 0x%016Lx, dev_addr = 0x%016Lx\n", 498 (unsigned long long)*hwdev->dma_mask, 499 (unsigned long long)dev_addr); 500 501 /* DMA_TO_DEVICE to avoid memcpy in unmap_single */ 502 unmap_single(hwdev, ret, size, DMA_TO_DEVICE); 503 return NULL; 504 } 505 *dma_handle = dev_addr; 506 return ret; 507} 508 509void 510swiotlb_free_coherent(struct device *hwdev, size_t size, void *vaddr, 511 dma_addr_t dma_handle) 512{ 513 WARN_ON(irqs_disabled()); 514 if (!is_swiotlb_buffer(vaddr)) 515 free_pages((unsigned long) vaddr, get_order(size)); 516 else 517 /* DMA_TO_DEVICE to avoid memcpy in unmap_single */ 518 unmap_single(hwdev, vaddr, size, DMA_TO_DEVICE); 519} 520 521static void 522swiotlb_full(struct device *dev, size_t size, int dir, int do_panic) 523{ 524 /* 525 * Ran out of IOMMU space for this operation. This is very bad. 526 * Unfortunately the drivers cannot handle this operation properly. 527 * unless they check for dma_mapping_error (most don't) 528 * When the mapping is small enough return a static buffer to limit 529 * the damage, or panic when the transfer is too big. 530 */ 531 printk(KERN_ERR "DMA: Out of SW-IOMMU space for %zu bytes at " 532 "device %s\n", size, dev ? dev->bus_id : "?"); 533 534 if (size > io_tlb_overflow && do_panic) { 535 if (dir == DMA_FROM_DEVICE || dir == DMA_BIDIRECTIONAL) 536 panic("DMA: Memory would be corrupted\n"); 537 if (dir == DMA_TO_DEVICE || dir == DMA_BIDIRECTIONAL) 538 panic("DMA: Random memory would be DMAed\n"); 539 } 540} 541 542/* 543 * Map a single buffer of the indicated size for DMA in streaming mode. The 544 * physical address to use is returned. 545 * 546 * Once the device is given the dma address, the device owns this memory until 547 * either swiotlb_unmap_single or swiotlb_dma_sync_single is performed. 548 */ 549dma_addr_t 550swiotlb_map_single_attrs(struct device *hwdev, void *ptr, size_t size, 551 int dir, struct dma_attrs *attrs) 552{ 553 dma_addr_t dev_addr = virt_to_bus(ptr); 554 void *map; 555 556 BUG_ON(dir == DMA_NONE); 557 /* 558 * If the pointer passed in happens to be in the device's DMA window, 559 * we can safely return the device addr and not worry about bounce 560 * buffering it. 561 */ 562 if (!address_needs_mapping(hwdev, dev_addr, size) && !swiotlb_force) 563 return dev_addr; 564 565 /* 566 * Oh well, have to allocate and map a bounce buffer. 567 */ 568 map = map_single(hwdev, ptr, size, dir); 569 if (!map) { 570 swiotlb_full(hwdev, size, dir, 1); 571 map = io_tlb_overflow_buffer; 572 } 573 574 dev_addr = virt_to_bus(map); 575 576 /* 577 * Ensure that the address returned is DMA'ble 578 */ 579 if (address_needs_mapping(hwdev, dev_addr, size)) 580 panic("map_single: bounce buffer is not DMA'ble"); 581 582 return dev_addr; 583} 584EXPORT_SYMBOL(swiotlb_map_single_attrs); 585 586dma_addr_t 587swiotlb_map_single(struct device *hwdev, void *ptr, size_t size, int dir) 588{ 589 return swiotlb_map_single_attrs(hwdev, ptr, size, dir, NULL); 590} 591 592/* 593 * Unmap a single streaming mode DMA translation. The dma_addr and size must 594 * match what was provided for in a previous swiotlb_map_single call. All 595 * other usages are undefined. 596 * 597 * After this call, reads by the cpu to the buffer are guaranteed to see 598 * whatever the device wrote there. 599 */ 600void 601swiotlb_unmap_single_attrs(struct device *hwdev, dma_addr_t dev_addr, 602 size_t size, int dir, struct dma_attrs *attrs) 603{ 604 char *dma_addr = bus_to_virt(dev_addr); 605 606 BUG_ON(dir == DMA_NONE); 607 if (is_swiotlb_buffer(dma_addr)) 608 unmap_single(hwdev, dma_addr, size, dir); 609 else if (dir == DMA_FROM_DEVICE) 610 dma_mark_clean(dma_addr, size); 611} 612EXPORT_SYMBOL(swiotlb_unmap_single_attrs); 613 614void 615swiotlb_unmap_single(struct device *hwdev, dma_addr_t dev_addr, size_t size, 616 int dir) 617{ 618 return swiotlb_unmap_single_attrs(hwdev, dev_addr, size, dir, NULL); 619} 620/* 621 * Make physical memory consistent for a single streaming mode DMA translation 622 * after a transfer. 623 * 624 * If you perform a swiotlb_map_single() but wish to interrogate the buffer 625 * using the cpu, yet do not wish to teardown the dma mapping, you must 626 * call this function before doing so. At the next point you give the dma 627 * address back to the card, you must first perform a 628 * swiotlb_dma_sync_for_device, and then the device again owns the buffer 629 */ 630static void 631swiotlb_sync_single(struct device *hwdev, dma_addr_t dev_addr, 632 size_t size, int dir, int target) 633{ 634 char *dma_addr = bus_to_virt(dev_addr); 635 636 BUG_ON(dir == DMA_NONE); 637 if (is_swiotlb_buffer(dma_addr)) 638 sync_single(hwdev, dma_addr, size, dir, target); 639 else if (dir == DMA_FROM_DEVICE) 640 dma_mark_clean(dma_addr, size); 641} 642 643void 644swiotlb_sync_single_for_cpu(struct device *hwdev, dma_addr_t dev_addr, 645 size_t size, int dir) 646{ 647 swiotlb_sync_single(hwdev, dev_addr, size, dir, SYNC_FOR_CPU); 648} 649 650void 651swiotlb_sync_single_for_device(struct device *hwdev, dma_addr_t dev_addr, 652 size_t size, int dir) 653{ 654 swiotlb_sync_single(hwdev, dev_addr, size, dir, SYNC_FOR_DEVICE); 655} 656 657/* 658 * Same as above, but for a sub-range of the mapping. 659 */ 660static void 661swiotlb_sync_single_range(struct device *hwdev, dma_addr_t dev_addr, 662 unsigned long offset, size_t size, 663 int dir, int target) 664{ 665 char *dma_addr = bus_to_virt(dev_addr) + offset; 666 667 BUG_ON(dir == DMA_NONE); 668 if (is_swiotlb_buffer(dma_addr)) 669 sync_single(hwdev, dma_addr, size, dir, target); 670 else if (dir == DMA_FROM_DEVICE) 671 dma_mark_clean(dma_addr, size); 672} 673 674void 675swiotlb_sync_single_range_for_cpu(struct device *hwdev, dma_addr_t dev_addr, 676 unsigned long offset, size_t size, int dir) 677{ 678 swiotlb_sync_single_range(hwdev, dev_addr, offset, size, dir, 679 SYNC_FOR_CPU); 680} 681 682void 683swiotlb_sync_single_range_for_device(struct device *hwdev, dma_addr_t dev_addr, 684 unsigned long offset, size_t size, int dir) 685{ 686 swiotlb_sync_single_range(hwdev, dev_addr, offset, size, dir, 687 SYNC_FOR_DEVICE); 688} 689 690void swiotlb_unmap_sg_attrs(struct device *, struct scatterlist *, int, int, 691 struct dma_attrs *); 692/* 693 * Map a set of buffers described by scatterlist in streaming mode for DMA. 694 * This is the scatter-gather version of the above swiotlb_map_single 695 * interface. Here the scatter gather list elements are each tagged with the 696 * appropriate dma address and length. They are obtained via 697 * sg_dma_{address,length}(SG). 698 * 699 * NOTE: An implementation may be able to use a smaller number of 700 * DMA address/length pairs than there are SG table elements. 701 * (for example via virtual mapping capabilities) 702 * The routine returns the number of addr/length pairs actually 703 * used, at most nents. 704 * 705 * Device ownership issues as mentioned above for swiotlb_map_single are the 706 * same here. 707 */ 708int 709swiotlb_map_sg_attrs(struct device *hwdev, struct scatterlist *sgl, int nelems, 710 int dir, struct dma_attrs *attrs) 711{ 712 struct scatterlist *sg; 713 void *addr; 714 dma_addr_t dev_addr; 715 int i; 716 717 BUG_ON(dir == DMA_NONE); 718 719 for_each_sg(sgl, sg, nelems, i) { 720 addr = SG_ENT_VIRT_ADDRESS(sg); 721 dev_addr = virt_to_bus(addr); 722 if (swiotlb_force || 723 address_needs_mapping(hwdev, dev_addr, sg->length)) { 724 void *map = map_single(hwdev, addr, sg->length, dir); 725 if (!map) { 726 /* Don't panic here, we expect map_sg users 727 to do proper error handling. */ 728 swiotlb_full(hwdev, sg->length, dir, 0); 729 swiotlb_unmap_sg_attrs(hwdev, sgl, i, dir, 730 attrs); 731 sgl[0].dma_length = 0; 732 return 0; 733 } 734 sg->dma_address = virt_to_bus(map); 735 } else 736 sg->dma_address = dev_addr; 737 sg->dma_length = sg->length; 738 } 739 return nelems; 740} 741EXPORT_SYMBOL(swiotlb_map_sg_attrs); 742 743int 744swiotlb_map_sg(struct device *hwdev, struct scatterlist *sgl, int nelems, 745 int dir) 746{ 747 return swiotlb_map_sg_attrs(hwdev, sgl, nelems, dir, NULL); 748} 749 750/* 751 * Unmap a set of streaming mode DMA translations. Again, cpu read rules 752 * concerning calls here are the same as for swiotlb_unmap_single() above. 753 */ 754void 755swiotlb_unmap_sg_attrs(struct device *hwdev, struct scatterlist *sgl, 756 int nelems, int dir, struct dma_attrs *attrs) 757{ 758 struct scatterlist *sg; 759 int i; 760 761 BUG_ON(dir == DMA_NONE); 762 763 for_each_sg(sgl, sg, nelems, i) { 764 if (sg->dma_address != SG_ENT_PHYS_ADDRESS(sg)) 765 unmap_single(hwdev, bus_to_virt(sg->dma_address), 766 sg->dma_length, dir); 767 else if (dir == DMA_FROM_DEVICE) 768 dma_mark_clean(SG_ENT_VIRT_ADDRESS(sg), sg->dma_length); 769 } 770} 771EXPORT_SYMBOL(swiotlb_unmap_sg_attrs); 772 773void 774swiotlb_unmap_sg(struct device *hwdev, struct scatterlist *sgl, int nelems, 775 int dir) 776{ 777 return swiotlb_unmap_sg_attrs(hwdev, sgl, nelems, dir, NULL); 778} 779 780/* 781 * Make physical memory consistent for a set of streaming mode DMA translations 782 * after a transfer. 783 * 784 * The same as swiotlb_sync_single_* but for a scatter-gather list, same rules 785 * and usage. 786 */ 787static void 788swiotlb_sync_sg(struct device *hwdev, struct scatterlist *sgl, 789 int nelems, int dir, int target) 790{ 791 struct scatterlist *sg; 792 int i; 793 794 BUG_ON(dir == DMA_NONE); 795 796 for_each_sg(sgl, sg, nelems, i) { 797 if (sg->dma_address != SG_ENT_PHYS_ADDRESS(sg)) 798 sync_single(hwdev, bus_to_virt(sg->dma_address), 799 sg->dma_length, dir, target); 800 else if (dir == DMA_FROM_DEVICE) 801 dma_mark_clean(SG_ENT_VIRT_ADDRESS(sg), sg->dma_length); 802 } 803} 804 805void 806swiotlb_sync_sg_for_cpu(struct device *hwdev, struct scatterlist *sg, 807 int nelems, int dir) 808{ 809 swiotlb_sync_sg(hwdev, sg, nelems, dir, SYNC_FOR_CPU); 810} 811 812void 813swiotlb_sync_sg_for_device(struct device *hwdev, struct scatterlist *sg, 814 int nelems, int dir) 815{ 816 swiotlb_sync_sg(hwdev, sg, nelems, dir, SYNC_FOR_DEVICE); 817} 818 819int 820swiotlb_dma_mapping_error(struct device *hwdev, dma_addr_t dma_addr) 821{ 822 return (dma_addr == virt_to_bus(io_tlb_overflow_buffer)); 823} 824 825/* 826 * Return whether the given device DMA address mask can be supported 827 * properly. For example, if your device can only drive the low 24-bits 828 * during bus mastering, then you would pass 0x00ffffff as the mask to 829 * this function. 830 */ 831int 832swiotlb_dma_supported(struct device *hwdev, u64 mask) 833{ 834 return virt_to_bus(io_tlb_end - 1) <= mask; 835} 836 837EXPORT_SYMBOL(swiotlb_map_single); 838EXPORT_SYMBOL(swiotlb_unmap_single); 839EXPORT_SYMBOL(swiotlb_map_sg); 840EXPORT_SYMBOL(swiotlb_unmap_sg); 841EXPORT_SYMBOL(swiotlb_sync_single_for_cpu); 842EXPORT_SYMBOL(swiotlb_sync_single_for_device); 843EXPORT_SYMBOL_GPL(swiotlb_sync_single_range_for_cpu); 844EXPORT_SYMBOL_GPL(swiotlb_sync_single_range_for_device); 845EXPORT_SYMBOL(swiotlb_sync_sg_for_cpu); 846EXPORT_SYMBOL(swiotlb_sync_sg_for_device); 847EXPORT_SYMBOL(swiotlb_dma_mapping_error); 848EXPORT_SYMBOL(swiotlb_alloc_coherent); 849EXPORT_SYMBOL(swiotlb_free_coherent); 850EXPORT_SYMBOL(swiotlb_dma_supported);