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1/* sis900.c: A SiS 900/7016 PCI Fast Ethernet driver for Linux. 2 Copyright 1999 Silicon Integrated System Corporation 3 Revision: 1.08.10 Apr. 2 2006 4 5 Modified from the driver which is originally written by Donald Becker. 6 7 This software may be used and distributed according to the terms 8 of the GNU General Public License (GPL), incorporated herein by reference. 9 Drivers based on this skeleton fall under the GPL and must retain 10 the authorship (implicit copyright) notice. 11 12 References: 13 SiS 7016 Fast Ethernet PCI Bus 10/100 Mbps LAN Controller with OnNow Support, 14 preliminary Rev. 1.0 Jan. 14, 1998 15 SiS 900 Fast Ethernet PCI Bus 10/100 Mbps LAN Single Chip with OnNow Support, 16 preliminary Rev. 1.0 Nov. 10, 1998 17 SiS 7014 Single Chip 100BASE-TX/10BASE-T Physical Layer Solution, 18 preliminary Rev. 1.0 Jan. 18, 1998 19 20 Rev 1.08.10 Apr. 2 2006 Daniele Venzano add vlan (jumbo packets) support 21 Rev 1.08.09 Sep. 19 2005 Daniele Venzano add Wake on LAN support 22 Rev 1.08.08 Jan. 22 2005 Daniele Venzano use netif_msg for debugging messages 23 Rev 1.08.07 Nov. 2 2003 Daniele Venzano <venza@brownhat.org> add suspend/resume support 24 Rev 1.08.06 Sep. 24 2002 Mufasa Yang bug fix for Tx timeout & add SiS963 support 25 Rev 1.08.05 Jun. 6 2002 Mufasa Yang bug fix for read_eeprom & Tx descriptor over-boundary 26 Rev 1.08.04 Apr. 25 2002 Mufasa Yang <mufasa@sis.com.tw> added SiS962 support 27 Rev 1.08.03 Feb. 1 2002 Matt Domsch <Matt_Domsch@dell.com> update to use library crc32 function 28 Rev 1.08.02 Nov. 30 2001 Hui-Fen Hsu workaround for EDB & bug fix for dhcp problem 29 Rev 1.08.01 Aug. 25 2001 Hui-Fen Hsu update for 630ET & workaround for ICS1893 PHY 30 Rev 1.08.00 Jun. 11 2001 Hui-Fen Hsu workaround for RTL8201 PHY and some bug fix 31 Rev 1.07.11 Apr. 2 2001 Hui-Fen Hsu updates PCI drivers to use the new pci_set_dma_mask for kernel 2.4.3 32 Rev 1.07.10 Mar. 1 2001 Hui-Fen Hsu <hfhsu@sis.com.tw> some bug fix & 635M/B support 33 Rev 1.07.09 Feb. 9 2001 Dave Jones <davej@suse.de> PCI enable cleanup 34 Rev 1.07.08 Jan. 8 2001 Lei-Chun Chang added RTL8201 PHY support 35 Rev 1.07.07 Nov. 29 2000 Lei-Chun Chang added kernel-doc extractable documentation and 630 workaround fix 36 Rev 1.07.06 Nov. 7 2000 Jeff Garzik <jgarzik@pobox.com> some bug fix and cleaning 37 Rev 1.07.05 Nov. 6 2000 metapirat<metapirat@gmx.de> contribute media type select by ifconfig 38 Rev 1.07.04 Sep. 6 2000 Lei-Chun Chang added ICS1893 PHY support 39 Rev 1.07.03 Aug. 24 2000 Lei-Chun Chang (lcchang@sis.com.tw) modified 630E eqaulizer workaround rule 40 Rev 1.07.01 Aug. 08 2000 Ollie Lho minor update for SiS 630E and SiS 630E A1 41 Rev 1.07 Mar. 07 2000 Ollie Lho bug fix in Rx buffer ring 42 Rev 1.06.04 Feb. 11 2000 Jeff Garzik <jgarzik@pobox.com> softnet and init for kernel 2.4 43 Rev 1.06.03 Dec. 23 1999 Ollie Lho Third release 44 Rev 1.06.02 Nov. 23 1999 Ollie Lho bug in mac probing fixed 45 Rev 1.06.01 Nov. 16 1999 Ollie Lho CRC calculation provide by Joseph Zbiciak (im14u2c@primenet.com) 46 Rev 1.06 Nov. 4 1999 Ollie Lho (ollie@sis.com.tw) Second release 47 Rev 1.05.05 Oct. 29 1999 Ollie Lho (ollie@sis.com.tw) Single buffer Tx/Rx 48 Chin-Shan Li (lcs@sis.com.tw) Added AMD Am79c901 HomePNA PHY support 49 Rev 1.05 Aug. 7 1999 Jim Huang (cmhuang@sis.com.tw) Initial release 50*/ 51 52#include <linux/module.h> 53#include <linux/moduleparam.h> 54#include <linux/kernel.h> 55#include <linux/string.h> 56#include <linux/timer.h> 57#include <linux/errno.h> 58#include <linux/ioport.h> 59#include <linux/slab.h> 60#include <linux/interrupt.h> 61#include <linux/pci.h> 62#include <linux/netdevice.h> 63#include <linux/init.h> 64#include <linux/mii.h> 65#include <linux/etherdevice.h> 66#include <linux/skbuff.h> 67#include <linux/delay.h> 68#include <linux/ethtool.h> 69#include <linux/crc32.h> 70#include <linux/bitops.h> 71#include <linux/dma-mapping.h> 72 73#include <asm/processor.h> /* Processor type for cache alignment. */ 74#include <asm/io.h> 75#include <asm/irq.h> 76#include <asm/uaccess.h> /* User space memory access functions */ 77 78#include "sis900.h" 79 80#define SIS900_MODULE_NAME "sis900" 81#define SIS900_DRV_VERSION "v1.08.10 Apr. 2 2006" 82 83static char version[] __devinitdata = 84KERN_INFO "sis900.c: " SIS900_DRV_VERSION "\n"; 85 86static int max_interrupt_work = 40; 87static int multicast_filter_limit = 128; 88 89static int sis900_debug = -1; /* Use SIS900_DEF_MSG as value */ 90 91#define SIS900_DEF_MSG \ 92 (NETIF_MSG_DRV | \ 93 NETIF_MSG_LINK | \ 94 NETIF_MSG_RX_ERR | \ 95 NETIF_MSG_TX_ERR) 96 97/* Time in jiffies before concluding the transmitter is hung. */ 98#define TX_TIMEOUT (4*HZ) 99 100enum { 101 SIS_900 = 0, 102 SIS_7016 103}; 104static const char * card_names[] = { 105 "SiS 900 PCI Fast Ethernet", 106 "SiS 7016 PCI Fast Ethernet" 107}; 108static struct pci_device_id sis900_pci_tbl [] = { 109 {PCI_VENDOR_ID_SI, PCI_DEVICE_ID_SI_900, 110 PCI_ANY_ID, PCI_ANY_ID, 0, 0, SIS_900}, 111 {PCI_VENDOR_ID_SI, PCI_DEVICE_ID_SI_7016, 112 PCI_ANY_ID, PCI_ANY_ID, 0, 0, SIS_7016}, 113 {0,} 114}; 115MODULE_DEVICE_TABLE (pci, sis900_pci_tbl); 116 117static void sis900_read_mode(struct net_device *net_dev, int *speed, int *duplex); 118 119static const struct mii_chip_info { 120 const char * name; 121 u16 phy_id0; 122 u16 phy_id1; 123 u8 phy_types; 124#define HOME 0x0001 125#define LAN 0x0002 126#define MIX 0x0003 127#define UNKNOWN 0x0 128} mii_chip_table[] = { 129 { "SiS 900 Internal MII PHY", 0x001d, 0x8000, LAN }, 130 { "SiS 7014 Physical Layer Solution", 0x0016, 0xf830, LAN }, 131 { "SiS 900 on Foxconn 661 7MI", 0x0143, 0xBC70, LAN }, 132 { "Altimata AC101LF PHY", 0x0022, 0x5520, LAN }, 133 { "ADM 7001 LAN PHY", 0x002e, 0xcc60, LAN }, 134 { "AMD 79C901 10BASE-T PHY", 0x0000, 0x6B70, LAN }, 135 { "AMD 79C901 HomePNA PHY", 0x0000, 0x6B90, HOME}, 136 { "ICS LAN PHY", 0x0015, 0xF440, LAN }, 137 { "ICS LAN PHY", 0x0143, 0xBC70, LAN }, 138 { "NS 83851 PHY", 0x2000, 0x5C20, MIX }, 139 { "NS 83847 PHY", 0x2000, 0x5C30, MIX }, 140 { "Realtek RTL8201 PHY", 0x0000, 0x8200, LAN }, 141 { "VIA 6103 PHY", 0x0101, 0x8f20, LAN }, 142 {NULL,}, 143}; 144 145struct mii_phy { 146 struct mii_phy * next; 147 int phy_addr; 148 u16 phy_id0; 149 u16 phy_id1; 150 u16 status; 151 u8 phy_types; 152}; 153 154typedef struct _BufferDesc { 155 u32 link; 156 u32 cmdsts; 157 u32 bufptr; 158} BufferDesc; 159 160struct sis900_private { 161 struct pci_dev * pci_dev; 162 163 spinlock_t lock; 164 165 struct mii_phy * mii; 166 struct mii_phy * first_mii; /* record the first mii structure */ 167 unsigned int cur_phy; 168 struct mii_if_info mii_info; 169 170 struct timer_list timer; /* Link status detection timer. */ 171 u8 autong_complete; /* 1: auto-negotiate complete */ 172 173 u32 msg_enable; 174 175 unsigned int cur_rx, dirty_rx; /* producer/comsumer pointers for Tx/Rx ring */ 176 unsigned int cur_tx, dirty_tx; 177 178 /* The saved address of a sent/receive-in-place packet buffer */ 179 struct sk_buff *tx_skbuff[NUM_TX_DESC]; 180 struct sk_buff *rx_skbuff[NUM_RX_DESC]; 181 BufferDesc *tx_ring; 182 BufferDesc *rx_ring; 183 184 dma_addr_t tx_ring_dma; 185 dma_addr_t rx_ring_dma; 186 187 unsigned int tx_full; /* The Tx queue is full. */ 188 u8 host_bridge_rev; 189 u8 chipset_rev; 190}; 191 192MODULE_AUTHOR("Jim Huang <cmhuang@sis.com.tw>, Ollie Lho <ollie@sis.com.tw>"); 193MODULE_DESCRIPTION("SiS 900 PCI Fast Ethernet driver"); 194MODULE_LICENSE("GPL"); 195 196module_param(multicast_filter_limit, int, 0444); 197module_param(max_interrupt_work, int, 0444); 198module_param(sis900_debug, int, 0444); 199MODULE_PARM_DESC(multicast_filter_limit, "SiS 900/7016 maximum number of filtered multicast addresses"); 200MODULE_PARM_DESC(max_interrupt_work, "SiS 900/7016 maximum events handled per interrupt"); 201MODULE_PARM_DESC(sis900_debug, "SiS 900/7016 bitmapped debugging message level"); 202 203#ifdef CONFIG_NET_POLL_CONTROLLER 204static void sis900_poll(struct net_device *dev); 205#endif 206static int sis900_open(struct net_device *net_dev); 207static int sis900_mii_probe (struct net_device * net_dev); 208static void sis900_init_rxfilter (struct net_device * net_dev); 209static u16 read_eeprom(long ioaddr, int location); 210static int mdio_read(struct net_device *net_dev, int phy_id, int location); 211static void mdio_write(struct net_device *net_dev, int phy_id, int location, int val); 212static void sis900_timer(unsigned long data); 213static void sis900_check_mode (struct net_device *net_dev, struct mii_phy *mii_phy); 214static void sis900_tx_timeout(struct net_device *net_dev); 215static void sis900_init_tx_ring(struct net_device *net_dev); 216static void sis900_init_rx_ring(struct net_device *net_dev); 217static int sis900_start_xmit(struct sk_buff *skb, struct net_device *net_dev); 218static int sis900_rx(struct net_device *net_dev); 219static void sis900_finish_xmit (struct net_device *net_dev); 220static irqreturn_t sis900_interrupt(int irq, void *dev_instance); 221static int sis900_close(struct net_device *net_dev); 222static int mii_ioctl(struct net_device *net_dev, struct ifreq *rq, int cmd); 223static u16 sis900_mcast_bitnr(u8 *addr, u8 revision); 224static void set_rx_mode(struct net_device *net_dev); 225static void sis900_reset(struct net_device *net_dev); 226static void sis630_set_eq(struct net_device *net_dev, u8 revision); 227static int sis900_set_config(struct net_device *dev, struct ifmap *map); 228static u16 sis900_default_phy(struct net_device * net_dev); 229static void sis900_set_capability( struct net_device *net_dev ,struct mii_phy *phy); 230static u16 sis900_reset_phy(struct net_device *net_dev, int phy_addr); 231static void sis900_auto_negotiate(struct net_device *net_dev, int phy_addr); 232static void sis900_set_mode (long ioaddr, int speed, int duplex); 233static const struct ethtool_ops sis900_ethtool_ops; 234 235/** 236 * sis900_get_mac_addr - Get MAC address for stand alone SiS900 model 237 * @pci_dev: the sis900 pci device 238 * @net_dev: the net device to get address for 239 * 240 * Older SiS900 and friends, use EEPROM to store MAC address. 241 * MAC address is read from read_eeprom() into @net_dev->dev_addr. 242 */ 243 244static int __devinit sis900_get_mac_addr(struct pci_dev * pci_dev, struct net_device *net_dev) 245{ 246 long ioaddr = pci_resource_start(pci_dev, 0); 247 u16 signature; 248 int i; 249 250 /* check to see if we have sane EEPROM */ 251 signature = (u16) read_eeprom(ioaddr, EEPROMSignature); 252 if (signature == 0xffff || signature == 0x0000) { 253 printk (KERN_WARNING "%s: Error EERPOM read %x\n", 254 pci_name(pci_dev), signature); 255 return 0; 256 } 257 258 /* get MAC address from EEPROM */ 259 for (i = 0; i < 3; i++) 260 ((u16 *)(net_dev->dev_addr))[i] = read_eeprom(ioaddr, i+EEPROMMACAddr); 261 262 return 1; 263} 264 265/** 266 * sis630e_get_mac_addr - Get MAC address for SiS630E model 267 * @pci_dev: the sis900 pci device 268 * @net_dev: the net device to get address for 269 * 270 * SiS630E model, use APC CMOS RAM to store MAC address. 271 * APC CMOS RAM is accessed through ISA bridge. 272 * MAC address is read into @net_dev->dev_addr. 273 */ 274 275static int __devinit sis630e_get_mac_addr(struct pci_dev * pci_dev, 276 struct net_device *net_dev) 277{ 278 struct pci_dev *isa_bridge = NULL; 279 u8 reg; 280 int i; 281 282 isa_bridge = pci_get_device(PCI_VENDOR_ID_SI, 0x0008, isa_bridge); 283 if (!isa_bridge) 284 isa_bridge = pci_get_device(PCI_VENDOR_ID_SI, 0x0018, isa_bridge); 285 if (!isa_bridge) { 286 printk(KERN_WARNING "%s: Can not find ISA bridge\n", 287 pci_name(pci_dev)); 288 return 0; 289 } 290 pci_read_config_byte(isa_bridge, 0x48, &reg); 291 pci_write_config_byte(isa_bridge, 0x48, reg | 0x40); 292 293 for (i = 0; i < 6; i++) { 294 outb(0x09 + i, 0x70); 295 ((u8 *)(net_dev->dev_addr))[i] = inb(0x71); 296 } 297 pci_write_config_byte(isa_bridge, 0x48, reg & ~0x40); 298 pci_dev_put(isa_bridge); 299 300 return 1; 301} 302 303 304/** 305 * sis635_get_mac_addr - Get MAC address for SIS635 model 306 * @pci_dev: the sis900 pci device 307 * @net_dev: the net device to get address for 308 * 309 * SiS635 model, set MAC Reload Bit to load Mac address from APC 310 * to rfdr. rfdr is accessed through rfcr. MAC address is read into 311 * @net_dev->dev_addr. 312 */ 313 314static int __devinit sis635_get_mac_addr(struct pci_dev * pci_dev, 315 struct net_device *net_dev) 316{ 317 long ioaddr = net_dev->base_addr; 318 u32 rfcrSave; 319 u32 i; 320 321 rfcrSave = inl(rfcr + ioaddr); 322 323 outl(rfcrSave | RELOAD, ioaddr + cr); 324 outl(0, ioaddr + cr); 325 326 /* disable packet filtering before setting filter */ 327 outl(rfcrSave & ~RFEN, rfcr + ioaddr); 328 329 /* load MAC addr to filter data register */ 330 for (i = 0 ; i < 3 ; i++) { 331 outl((i << RFADDR_shift), ioaddr + rfcr); 332 *( ((u16 *)net_dev->dev_addr) + i) = inw(ioaddr + rfdr); 333 } 334 335 /* enable packet filtering */ 336 outl(rfcrSave | RFEN, rfcr + ioaddr); 337 338 return 1; 339} 340 341/** 342 * sis96x_get_mac_addr - Get MAC address for SiS962 or SiS963 model 343 * @pci_dev: the sis900 pci device 344 * @net_dev: the net device to get address for 345 * 346 * SiS962 or SiS963 model, use EEPROM to store MAC address. And EEPROM 347 * is shared by 348 * LAN and 1394. When access EEPROM, send EEREQ signal to hardware first 349 * and wait for EEGNT. If EEGNT is ON, EEPROM is permitted to be access 350 * by LAN, otherwise is not. After MAC address is read from EEPROM, send 351 * EEDONE signal to refuse EEPROM access by LAN. 352 * The EEPROM map of SiS962 or SiS963 is different to SiS900. 353 * The signature field in SiS962 or SiS963 spec is meaningless. 354 * MAC address is read into @net_dev->dev_addr. 355 */ 356 357static int __devinit sis96x_get_mac_addr(struct pci_dev * pci_dev, 358 struct net_device *net_dev) 359{ 360 long ioaddr = net_dev->base_addr; 361 long ee_addr = ioaddr + mear; 362 u32 waittime = 0; 363 int i; 364 365 outl(EEREQ, ee_addr); 366 while(waittime < 2000) { 367 if(inl(ee_addr) & EEGNT) { 368 369 /* get MAC address from EEPROM */ 370 for (i = 0; i < 3; i++) 371 ((u16 *)(net_dev->dev_addr))[i] = read_eeprom(ioaddr, i+EEPROMMACAddr); 372 373 outl(EEDONE, ee_addr); 374 return 1; 375 } else { 376 udelay(1); 377 waittime ++; 378 } 379 } 380 outl(EEDONE, ee_addr); 381 return 0; 382} 383 384/** 385 * sis900_probe - Probe for sis900 device 386 * @pci_dev: the sis900 pci device 387 * @pci_id: the pci device ID 388 * 389 * Check and probe sis900 net device for @pci_dev. 390 * Get mac address according to the chip revision, 391 * and assign SiS900-specific entries in the device structure. 392 * ie: sis900_open(), sis900_start_xmit(), sis900_close(), etc. 393 */ 394 395static int __devinit sis900_probe(struct pci_dev *pci_dev, 396 const struct pci_device_id *pci_id) 397{ 398 struct sis900_private *sis_priv; 399 struct net_device *net_dev; 400 struct pci_dev *dev; 401 dma_addr_t ring_dma; 402 void *ring_space; 403 long ioaddr; 404 int i, ret; 405 const char *card_name = card_names[pci_id->driver_data]; 406 const char *dev_name = pci_name(pci_dev); 407 DECLARE_MAC_BUF(mac); 408 409/* when built into the kernel, we only print version if device is found */ 410#ifndef MODULE 411 static int printed_version; 412 if (!printed_version++) 413 printk(version); 414#endif 415 416 /* setup various bits in PCI command register */ 417 ret = pci_enable_device(pci_dev); 418 if(ret) return ret; 419 420 i = pci_set_dma_mask(pci_dev, DMA_32BIT_MASK); 421 if(i){ 422 printk(KERN_ERR "sis900.c: architecture does not support " 423 "32bit PCI busmaster DMA\n"); 424 return i; 425 } 426 427 pci_set_master(pci_dev); 428 429 net_dev = alloc_etherdev(sizeof(struct sis900_private)); 430 if (!net_dev) 431 return -ENOMEM; 432 SET_NETDEV_DEV(net_dev, &pci_dev->dev); 433 434 /* We do a request_region() to register /proc/ioports info. */ 435 ioaddr = pci_resource_start(pci_dev, 0); 436 ret = pci_request_regions(pci_dev, "sis900"); 437 if (ret) 438 goto err_out; 439 440 sis_priv = net_dev->priv; 441 net_dev->base_addr = ioaddr; 442 net_dev->irq = pci_dev->irq; 443 sis_priv->pci_dev = pci_dev; 444 spin_lock_init(&sis_priv->lock); 445 446 pci_set_drvdata(pci_dev, net_dev); 447 448 ring_space = pci_alloc_consistent(pci_dev, TX_TOTAL_SIZE, &ring_dma); 449 if (!ring_space) { 450 ret = -ENOMEM; 451 goto err_out_cleardev; 452 } 453 sis_priv->tx_ring = (BufferDesc *)ring_space; 454 sis_priv->tx_ring_dma = ring_dma; 455 456 ring_space = pci_alloc_consistent(pci_dev, RX_TOTAL_SIZE, &ring_dma); 457 if (!ring_space) { 458 ret = -ENOMEM; 459 goto err_unmap_tx; 460 } 461 sis_priv->rx_ring = (BufferDesc *)ring_space; 462 sis_priv->rx_ring_dma = ring_dma; 463 464 /* The SiS900-specific entries in the device structure. */ 465 net_dev->open = &sis900_open; 466 net_dev->hard_start_xmit = &sis900_start_xmit; 467 net_dev->stop = &sis900_close; 468 net_dev->set_config = &sis900_set_config; 469 net_dev->set_multicast_list = &set_rx_mode; 470 net_dev->do_ioctl = &mii_ioctl; 471 net_dev->tx_timeout = sis900_tx_timeout; 472 net_dev->watchdog_timeo = TX_TIMEOUT; 473 net_dev->ethtool_ops = &sis900_ethtool_ops; 474 475#ifdef CONFIG_NET_POLL_CONTROLLER 476 net_dev->poll_controller = &sis900_poll; 477#endif 478 479 if (sis900_debug > 0) 480 sis_priv->msg_enable = sis900_debug; 481 else 482 sis_priv->msg_enable = SIS900_DEF_MSG; 483 484 sis_priv->mii_info.dev = net_dev; 485 sis_priv->mii_info.mdio_read = mdio_read; 486 sis_priv->mii_info.mdio_write = mdio_write; 487 sis_priv->mii_info.phy_id_mask = 0x1f; 488 sis_priv->mii_info.reg_num_mask = 0x1f; 489 490 /* Get Mac address according to the chip revision */ 491 pci_read_config_byte(pci_dev, PCI_CLASS_REVISION, &(sis_priv->chipset_rev)); 492 if(netif_msg_probe(sis_priv)) 493 printk(KERN_DEBUG "%s: detected revision %2.2x, " 494 "trying to get MAC address...\n", 495 dev_name, sis_priv->chipset_rev); 496 497 ret = 0; 498 if (sis_priv->chipset_rev == SIS630E_900_REV) 499 ret = sis630e_get_mac_addr(pci_dev, net_dev); 500 else if ((sis_priv->chipset_rev > 0x81) && (sis_priv->chipset_rev <= 0x90) ) 501 ret = sis635_get_mac_addr(pci_dev, net_dev); 502 else if (sis_priv->chipset_rev == SIS96x_900_REV) 503 ret = sis96x_get_mac_addr(pci_dev, net_dev); 504 else 505 ret = sis900_get_mac_addr(pci_dev, net_dev); 506 507 if (ret == 0) { 508 printk(KERN_WARNING "%s: Cannot read MAC address.\n", dev_name); 509 ret = -ENODEV; 510 goto err_unmap_rx; 511 } 512 513 /* 630ET : set the mii access mode as software-mode */ 514 if (sis_priv->chipset_rev == SIS630ET_900_REV) 515 outl(ACCESSMODE | inl(ioaddr + cr), ioaddr + cr); 516 517 /* probe for mii transceiver */ 518 if (sis900_mii_probe(net_dev) == 0) { 519 printk(KERN_WARNING "%s: Error probing MII device.\n", 520 dev_name); 521 ret = -ENODEV; 522 goto err_unmap_rx; 523 } 524 525 /* save our host bridge revision */ 526 dev = pci_get_device(PCI_VENDOR_ID_SI, PCI_DEVICE_ID_SI_630, NULL); 527 if (dev) { 528 pci_read_config_byte(dev, PCI_CLASS_REVISION, &sis_priv->host_bridge_rev); 529 pci_dev_put(dev); 530 } 531 532 ret = register_netdev(net_dev); 533 if (ret) 534 goto err_unmap_rx; 535 536 /* print some information about our NIC */ 537 printk(KERN_INFO "%s: %s at %#lx, IRQ %d, %s\n", 538 net_dev->name, card_name, ioaddr, net_dev->irq, 539 print_mac(mac, net_dev->dev_addr)); 540 541 /* Detect Wake on Lan support */ 542 ret = (inl(net_dev->base_addr + CFGPMC) & PMESP) >> 27; 543 if (netif_msg_probe(sis_priv) && (ret & PME_D3C) == 0) 544 printk(KERN_INFO "%s: Wake on LAN only available from suspend to RAM.", net_dev->name); 545 546 return 0; 547 548 err_unmap_rx: 549 pci_free_consistent(pci_dev, RX_TOTAL_SIZE, sis_priv->rx_ring, 550 sis_priv->rx_ring_dma); 551 err_unmap_tx: 552 pci_free_consistent(pci_dev, TX_TOTAL_SIZE, sis_priv->tx_ring, 553 sis_priv->tx_ring_dma); 554 err_out_cleardev: 555 pci_set_drvdata(pci_dev, NULL); 556 pci_release_regions(pci_dev); 557 err_out: 558 free_netdev(net_dev); 559 return ret; 560} 561 562/** 563 * sis900_mii_probe - Probe MII PHY for sis900 564 * @net_dev: the net device to probe for 565 * 566 * Search for total of 32 possible mii phy addresses. 567 * Identify and set current phy if found one, 568 * return error if it failed to found. 569 */ 570 571static int __devinit sis900_mii_probe(struct net_device * net_dev) 572{ 573 struct sis900_private * sis_priv = net_dev->priv; 574 const char *dev_name = pci_name(sis_priv->pci_dev); 575 u16 poll_bit = MII_STAT_LINK, status = 0; 576 unsigned long timeout = jiffies + 5 * HZ; 577 int phy_addr; 578 579 sis_priv->mii = NULL; 580 581 /* search for total of 32 possible mii phy addresses */ 582 for (phy_addr = 0; phy_addr < 32; phy_addr++) { 583 struct mii_phy * mii_phy = NULL; 584 u16 mii_status; 585 int i; 586 587 mii_phy = NULL; 588 for(i = 0; i < 2; i++) 589 mii_status = mdio_read(net_dev, phy_addr, MII_STATUS); 590 591 if (mii_status == 0xffff || mii_status == 0x0000) { 592 if (netif_msg_probe(sis_priv)) 593 printk(KERN_DEBUG "%s: MII at address %d" 594 " not accessible\n", 595 dev_name, phy_addr); 596 continue; 597 } 598 599 if ((mii_phy = kmalloc(sizeof(struct mii_phy), GFP_KERNEL)) == NULL) { 600 printk(KERN_WARNING "Cannot allocate mem for struct mii_phy\n"); 601 mii_phy = sis_priv->first_mii; 602 while (mii_phy) { 603 struct mii_phy *phy; 604 phy = mii_phy; 605 mii_phy = mii_phy->next; 606 kfree(phy); 607 } 608 return 0; 609 } 610 611 mii_phy->phy_id0 = mdio_read(net_dev, phy_addr, MII_PHY_ID0); 612 mii_phy->phy_id1 = mdio_read(net_dev, phy_addr, MII_PHY_ID1); 613 mii_phy->phy_addr = phy_addr; 614 mii_phy->status = mii_status; 615 mii_phy->next = sis_priv->mii; 616 sis_priv->mii = mii_phy; 617 sis_priv->first_mii = mii_phy; 618 619 for (i = 0; mii_chip_table[i].phy_id1; i++) 620 if ((mii_phy->phy_id0 == mii_chip_table[i].phy_id0 ) && 621 ((mii_phy->phy_id1 & 0xFFF0) == mii_chip_table[i].phy_id1)){ 622 mii_phy->phy_types = mii_chip_table[i].phy_types; 623 if (mii_chip_table[i].phy_types == MIX) 624 mii_phy->phy_types = 625 (mii_status & (MII_STAT_CAN_TX_FDX | MII_STAT_CAN_TX)) ? LAN : HOME; 626 printk(KERN_INFO "%s: %s transceiver found " 627 "at address %d.\n", 628 dev_name, 629 mii_chip_table[i].name, 630 phy_addr); 631 break; 632 } 633 634 if( !mii_chip_table[i].phy_id1 ) { 635 printk(KERN_INFO "%s: Unknown PHY transceiver found at address %d.\n", 636 dev_name, phy_addr); 637 mii_phy->phy_types = UNKNOWN; 638 } 639 } 640 641 if (sis_priv->mii == NULL) { 642 printk(KERN_INFO "%s: No MII transceivers found!\n", dev_name); 643 return 0; 644 } 645 646 /* select default PHY for mac */ 647 sis_priv->mii = NULL; 648 sis900_default_phy( net_dev ); 649 650 /* Reset phy if default phy is internal sis900 */ 651 if ((sis_priv->mii->phy_id0 == 0x001D) && 652 ((sis_priv->mii->phy_id1&0xFFF0) == 0x8000)) 653 status = sis900_reset_phy(net_dev, sis_priv->cur_phy); 654 655 /* workaround for ICS1893 PHY */ 656 if ((sis_priv->mii->phy_id0 == 0x0015) && 657 ((sis_priv->mii->phy_id1&0xFFF0) == 0xF440)) 658 mdio_write(net_dev, sis_priv->cur_phy, 0x0018, 0xD200); 659 660 if(status & MII_STAT_LINK){ 661 while (poll_bit) { 662 yield(); 663 664 poll_bit ^= (mdio_read(net_dev, sis_priv->cur_phy, MII_STATUS) & poll_bit); 665 if (time_after_eq(jiffies, timeout)) { 666 printk(KERN_WARNING "%s: reset phy and link down now\n", 667 dev_name); 668 return -ETIME; 669 } 670 } 671 } 672 673 if (sis_priv->chipset_rev == SIS630E_900_REV) { 674 /* SiS 630E has some bugs on default value of PHY registers */ 675 mdio_write(net_dev, sis_priv->cur_phy, MII_ANADV, 0x05e1); 676 mdio_write(net_dev, sis_priv->cur_phy, MII_CONFIG1, 0x22); 677 mdio_write(net_dev, sis_priv->cur_phy, MII_CONFIG2, 0xff00); 678 mdio_write(net_dev, sis_priv->cur_phy, MII_MASK, 0xffc0); 679 //mdio_write(net_dev, sis_priv->cur_phy, MII_CONTROL, 0x1000); 680 } 681 682 if (sis_priv->mii->status & MII_STAT_LINK) 683 netif_carrier_on(net_dev); 684 else 685 netif_carrier_off(net_dev); 686 687 return 1; 688} 689 690/** 691 * sis900_default_phy - Select default PHY for sis900 mac. 692 * @net_dev: the net device to probe for 693 * 694 * Select first detected PHY with link as default. 695 * If no one is link on, select PHY whose types is HOME as default. 696 * If HOME doesn't exist, select LAN. 697 */ 698 699static u16 sis900_default_phy(struct net_device * net_dev) 700{ 701 struct sis900_private * sis_priv = net_dev->priv; 702 struct mii_phy *phy = NULL, *phy_home = NULL, 703 *default_phy = NULL, *phy_lan = NULL; 704 u16 status; 705 706 for (phy=sis_priv->first_mii; phy; phy=phy->next) { 707 status = mdio_read(net_dev, phy->phy_addr, MII_STATUS); 708 status = mdio_read(net_dev, phy->phy_addr, MII_STATUS); 709 710 /* Link ON & Not select default PHY & not ghost PHY */ 711 if ((status & MII_STAT_LINK) && !default_phy && 712 (phy->phy_types != UNKNOWN)) 713 default_phy = phy; 714 else { 715 status = mdio_read(net_dev, phy->phy_addr, MII_CONTROL); 716 mdio_write(net_dev, phy->phy_addr, MII_CONTROL, 717 status | MII_CNTL_AUTO | MII_CNTL_ISOLATE); 718 if (phy->phy_types == HOME) 719 phy_home = phy; 720 else if(phy->phy_types == LAN) 721 phy_lan = phy; 722 } 723 } 724 725 if (!default_phy && phy_home) 726 default_phy = phy_home; 727 else if (!default_phy && phy_lan) 728 default_phy = phy_lan; 729 else if (!default_phy) 730 default_phy = sis_priv->first_mii; 731 732 if (sis_priv->mii != default_phy) { 733 sis_priv->mii = default_phy; 734 sis_priv->cur_phy = default_phy->phy_addr; 735 printk(KERN_INFO "%s: Using transceiver found at address %d as default\n", 736 pci_name(sis_priv->pci_dev), sis_priv->cur_phy); 737 } 738 739 sis_priv->mii_info.phy_id = sis_priv->cur_phy; 740 741 status = mdio_read(net_dev, sis_priv->cur_phy, MII_CONTROL); 742 status &= (~MII_CNTL_ISOLATE); 743 744 mdio_write(net_dev, sis_priv->cur_phy, MII_CONTROL, status); 745 status = mdio_read(net_dev, sis_priv->cur_phy, MII_STATUS); 746 status = mdio_read(net_dev, sis_priv->cur_phy, MII_STATUS); 747 748 return status; 749} 750 751 752/** 753 * sis900_set_capability - set the media capability of network adapter. 754 * @net_dev : the net device to probe for 755 * @phy : default PHY 756 * 757 * Set the media capability of network adapter according to 758 * mii status register. It's necessary before auto-negotiate. 759 */ 760 761static void sis900_set_capability(struct net_device *net_dev, struct mii_phy *phy) 762{ 763 u16 cap; 764 u16 status; 765 766 status = mdio_read(net_dev, phy->phy_addr, MII_STATUS); 767 status = mdio_read(net_dev, phy->phy_addr, MII_STATUS); 768 769 cap = MII_NWAY_CSMA_CD | 770 ((phy->status & MII_STAT_CAN_TX_FDX)? MII_NWAY_TX_FDX:0) | 771 ((phy->status & MII_STAT_CAN_TX) ? MII_NWAY_TX:0) | 772 ((phy->status & MII_STAT_CAN_T_FDX) ? MII_NWAY_T_FDX:0)| 773 ((phy->status & MII_STAT_CAN_T) ? MII_NWAY_T:0); 774 775 mdio_write(net_dev, phy->phy_addr, MII_ANADV, cap); 776} 777 778 779/* Delay between EEPROM clock transitions. */ 780#define eeprom_delay() inl(ee_addr) 781 782/** 783 * read_eeprom - Read Serial EEPROM 784 * @ioaddr: base i/o address 785 * @location: the EEPROM location to read 786 * 787 * Read Serial EEPROM through EEPROM Access Register. 788 * Note that location is in word (16 bits) unit 789 */ 790 791static u16 __devinit read_eeprom(long ioaddr, int location) 792{ 793 int i; 794 u16 retval = 0; 795 long ee_addr = ioaddr + mear; 796 u32 read_cmd = location | EEread; 797 798 outl(0, ee_addr); 799 eeprom_delay(); 800 outl(EECS, ee_addr); 801 eeprom_delay(); 802 803 /* Shift the read command (9) bits out. */ 804 for (i = 8; i >= 0; i--) { 805 u32 dataval = (read_cmd & (1 << i)) ? EEDI | EECS : EECS; 806 outl(dataval, ee_addr); 807 eeprom_delay(); 808 outl(dataval | EECLK, ee_addr); 809 eeprom_delay(); 810 } 811 outl(EECS, ee_addr); 812 eeprom_delay(); 813 814 /* read the 16-bits data in */ 815 for (i = 16; i > 0; i--) { 816 outl(EECS, ee_addr); 817 eeprom_delay(); 818 outl(EECS | EECLK, ee_addr); 819 eeprom_delay(); 820 retval = (retval << 1) | ((inl(ee_addr) & EEDO) ? 1 : 0); 821 eeprom_delay(); 822 } 823 824 /* Terminate the EEPROM access. */ 825 outl(0, ee_addr); 826 eeprom_delay(); 827 828 return (retval); 829} 830 831/* Read and write the MII management registers using software-generated 832 serial MDIO protocol. Note that the command bits and data bits are 833 send out separately */ 834#define mdio_delay() inl(mdio_addr) 835 836static void mdio_idle(long mdio_addr) 837{ 838 outl(MDIO | MDDIR, mdio_addr); 839 mdio_delay(); 840 outl(MDIO | MDDIR | MDC, mdio_addr); 841} 842 843/* Syncronize the MII management interface by shifting 32 one bits out. */ 844static void mdio_reset(long mdio_addr) 845{ 846 int i; 847 848 for (i = 31; i >= 0; i--) { 849 outl(MDDIR | MDIO, mdio_addr); 850 mdio_delay(); 851 outl(MDDIR | MDIO | MDC, mdio_addr); 852 mdio_delay(); 853 } 854 return; 855} 856 857/** 858 * mdio_read - read MII PHY register 859 * @net_dev: the net device to read 860 * @phy_id: the phy address to read 861 * @location: the phy regiester id to read 862 * 863 * Read MII registers through MDIO and MDC 864 * using MDIO management frame structure and protocol(defined by ISO/IEC). 865 * Please see SiS7014 or ICS spec 866 */ 867 868static int mdio_read(struct net_device *net_dev, int phy_id, int location) 869{ 870 long mdio_addr = net_dev->base_addr + mear; 871 int mii_cmd = MIIread|(phy_id<<MIIpmdShift)|(location<<MIIregShift); 872 u16 retval = 0; 873 int i; 874 875 mdio_reset(mdio_addr); 876 mdio_idle(mdio_addr); 877 878 for (i = 15; i >= 0; i--) { 879 int dataval = (mii_cmd & (1 << i)) ? MDDIR | MDIO : MDDIR; 880 outl(dataval, mdio_addr); 881 mdio_delay(); 882 outl(dataval | MDC, mdio_addr); 883 mdio_delay(); 884 } 885 886 /* Read the 16 data bits. */ 887 for (i = 16; i > 0; i--) { 888 outl(0, mdio_addr); 889 mdio_delay(); 890 retval = (retval << 1) | ((inl(mdio_addr) & MDIO) ? 1 : 0); 891 outl(MDC, mdio_addr); 892 mdio_delay(); 893 } 894 outl(0x00, mdio_addr); 895 896 return retval; 897} 898 899/** 900 * mdio_write - write MII PHY register 901 * @net_dev: the net device to write 902 * @phy_id: the phy address to write 903 * @location: the phy regiester id to write 904 * @value: the register value to write with 905 * 906 * Write MII registers with @value through MDIO and MDC 907 * using MDIO management frame structure and protocol(defined by ISO/IEC) 908 * please see SiS7014 or ICS spec 909 */ 910 911static void mdio_write(struct net_device *net_dev, int phy_id, int location, 912 int value) 913{ 914 long mdio_addr = net_dev->base_addr + mear; 915 int mii_cmd = MIIwrite|(phy_id<<MIIpmdShift)|(location<<MIIregShift); 916 int i; 917 918 mdio_reset(mdio_addr); 919 mdio_idle(mdio_addr); 920 921 /* Shift the command bits out. */ 922 for (i = 15; i >= 0; i--) { 923 int dataval = (mii_cmd & (1 << i)) ? MDDIR | MDIO : MDDIR; 924 outb(dataval, mdio_addr); 925 mdio_delay(); 926 outb(dataval | MDC, mdio_addr); 927 mdio_delay(); 928 } 929 mdio_delay(); 930 931 /* Shift the value bits out. */ 932 for (i = 15; i >= 0; i--) { 933 int dataval = (value & (1 << i)) ? MDDIR | MDIO : MDDIR; 934 outl(dataval, mdio_addr); 935 mdio_delay(); 936 outl(dataval | MDC, mdio_addr); 937 mdio_delay(); 938 } 939 mdio_delay(); 940 941 /* Clear out extra bits. */ 942 for (i = 2; i > 0; i--) { 943 outb(0, mdio_addr); 944 mdio_delay(); 945 outb(MDC, mdio_addr); 946 mdio_delay(); 947 } 948 outl(0x00, mdio_addr); 949 950 return; 951} 952 953 954/** 955 * sis900_reset_phy - reset sis900 mii phy. 956 * @net_dev: the net device to write 957 * @phy_addr: default phy address 958 * 959 * Some specific phy can't work properly without reset. 960 * This function will be called during initialization and 961 * link status change from ON to DOWN. 962 */ 963 964static u16 sis900_reset_phy(struct net_device *net_dev, int phy_addr) 965{ 966 int i; 967 u16 status; 968 969 for (i = 0; i < 2; i++) 970 status = mdio_read(net_dev, phy_addr, MII_STATUS); 971 972 mdio_write( net_dev, phy_addr, MII_CONTROL, MII_CNTL_RESET ); 973 974 return status; 975} 976 977#ifdef CONFIG_NET_POLL_CONTROLLER 978/* 979 * Polling 'interrupt' - used by things like netconsole to send skbs 980 * without having to re-enable interrupts. It's not called while 981 * the interrupt routine is executing. 982*/ 983static void sis900_poll(struct net_device *dev) 984{ 985 disable_irq(dev->irq); 986 sis900_interrupt(dev->irq, dev); 987 enable_irq(dev->irq); 988} 989#endif 990 991/** 992 * sis900_open - open sis900 device 993 * @net_dev: the net device to open 994 * 995 * Do some initialization and start net interface. 996 * enable interrupts and set sis900 timer. 997 */ 998 999static int 1000sis900_open(struct net_device *net_dev) 1001{ 1002 struct sis900_private *sis_priv = net_dev->priv; 1003 long ioaddr = net_dev->base_addr; 1004 int ret; 1005 1006 /* Soft reset the chip. */ 1007 sis900_reset(net_dev); 1008 1009 /* Equalizer workaround Rule */ 1010 sis630_set_eq(net_dev, sis_priv->chipset_rev); 1011 1012 ret = request_irq(net_dev->irq, &sis900_interrupt, IRQF_SHARED, 1013 net_dev->name, net_dev); 1014 if (ret) 1015 return ret; 1016 1017 sis900_init_rxfilter(net_dev); 1018 1019 sis900_init_tx_ring(net_dev); 1020 sis900_init_rx_ring(net_dev); 1021 1022 set_rx_mode(net_dev); 1023 1024 netif_start_queue(net_dev); 1025 1026 /* Workaround for EDB */ 1027 sis900_set_mode(ioaddr, HW_SPEED_10_MBPS, FDX_CAPABLE_HALF_SELECTED); 1028 1029 /* Enable all known interrupts by setting the interrupt mask. */ 1030 outl((RxSOVR|RxORN|RxERR|RxOK|TxURN|TxERR|TxIDLE), ioaddr + imr); 1031 outl(RxENA | inl(ioaddr + cr), ioaddr + cr); 1032 outl(IE, ioaddr + ier); 1033 1034 sis900_check_mode(net_dev, sis_priv->mii); 1035 1036 /* Set the timer to switch to check for link beat and perhaps switch 1037 to an alternate media type. */ 1038 init_timer(&sis_priv->timer); 1039 sis_priv->timer.expires = jiffies + HZ; 1040 sis_priv->timer.data = (unsigned long)net_dev; 1041 sis_priv->timer.function = &sis900_timer; 1042 add_timer(&sis_priv->timer); 1043 1044 return 0; 1045} 1046 1047/** 1048 * sis900_init_rxfilter - Initialize the Rx filter 1049 * @net_dev: the net device to initialize for 1050 * 1051 * Set receive filter address to our MAC address 1052 * and enable packet filtering. 1053 */ 1054 1055static void 1056sis900_init_rxfilter (struct net_device * net_dev) 1057{ 1058 struct sis900_private *sis_priv = net_dev->priv; 1059 long ioaddr = net_dev->base_addr; 1060 u32 rfcrSave; 1061 u32 i; 1062 1063 rfcrSave = inl(rfcr + ioaddr); 1064 1065 /* disable packet filtering before setting filter */ 1066 outl(rfcrSave & ~RFEN, rfcr + ioaddr); 1067 1068 /* load MAC addr to filter data register */ 1069 for (i = 0 ; i < 3 ; i++) { 1070 u32 w; 1071 1072 w = (u32) *((u16 *)(net_dev->dev_addr)+i); 1073 outl((i << RFADDR_shift), ioaddr + rfcr); 1074 outl(w, ioaddr + rfdr); 1075 1076 if (netif_msg_hw(sis_priv)) { 1077 printk(KERN_DEBUG "%s: Receive Filter Addrss[%d]=%x\n", 1078 net_dev->name, i, inl(ioaddr + rfdr)); 1079 } 1080 } 1081 1082 /* enable packet filtering */ 1083 outl(rfcrSave | RFEN, rfcr + ioaddr); 1084} 1085 1086/** 1087 * sis900_init_tx_ring - Initialize the Tx descriptor ring 1088 * @net_dev: the net device to initialize for 1089 * 1090 * Initialize the Tx descriptor ring, 1091 */ 1092 1093static void 1094sis900_init_tx_ring(struct net_device *net_dev) 1095{ 1096 struct sis900_private *sis_priv = net_dev->priv; 1097 long ioaddr = net_dev->base_addr; 1098 int i; 1099 1100 sis_priv->tx_full = 0; 1101 sis_priv->dirty_tx = sis_priv->cur_tx = 0; 1102 1103 for (i = 0; i < NUM_TX_DESC; i++) { 1104 sis_priv->tx_skbuff[i] = NULL; 1105 1106 sis_priv->tx_ring[i].link = sis_priv->tx_ring_dma + 1107 ((i+1)%NUM_TX_DESC)*sizeof(BufferDesc); 1108 sis_priv->tx_ring[i].cmdsts = 0; 1109 sis_priv->tx_ring[i].bufptr = 0; 1110 } 1111 1112 /* load Transmit Descriptor Register */ 1113 outl(sis_priv->tx_ring_dma, ioaddr + txdp); 1114 if (netif_msg_hw(sis_priv)) 1115 printk(KERN_DEBUG "%s: TX descriptor register loaded with: %8.8x\n", 1116 net_dev->name, inl(ioaddr + txdp)); 1117} 1118 1119/** 1120 * sis900_init_rx_ring - Initialize the Rx descriptor ring 1121 * @net_dev: the net device to initialize for 1122 * 1123 * Initialize the Rx descriptor ring, 1124 * and pre-allocate recevie buffers (socket buffer) 1125 */ 1126 1127static void 1128sis900_init_rx_ring(struct net_device *net_dev) 1129{ 1130 struct sis900_private *sis_priv = net_dev->priv; 1131 long ioaddr = net_dev->base_addr; 1132 int i; 1133 1134 sis_priv->cur_rx = 0; 1135 sis_priv->dirty_rx = 0; 1136 1137 /* init RX descriptor */ 1138 for (i = 0; i < NUM_RX_DESC; i++) { 1139 sis_priv->rx_skbuff[i] = NULL; 1140 1141 sis_priv->rx_ring[i].link = sis_priv->rx_ring_dma + 1142 ((i+1)%NUM_RX_DESC)*sizeof(BufferDesc); 1143 sis_priv->rx_ring[i].cmdsts = 0; 1144 sis_priv->rx_ring[i].bufptr = 0; 1145 } 1146 1147 /* allocate sock buffers */ 1148 for (i = 0; i < NUM_RX_DESC; i++) { 1149 struct sk_buff *skb; 1150 1151 if ((skb = dev_alloc_skb(RX_BUF_SIZE)) == NULL) { 1152 /* not enough memory for skbuff, this makes a "hole" 1153 on the buffer ring, it is not clear how the 1154 hardware will react to this kind of degenerated 1155 buffer */ 1156 break; 1157 } 1158 sis_priv->rx_skbuff[i] = skb; 1159 sis_priv->rx_ring[i].cmdsts = RX_BUF_SIZE; 1160 sis_priv->rx_ring[i].bufptr = pci_map_single(sis_priv->pci_dev, 1161 skb->data, RX_BUF_SIZE, PCI_DMA_FROMDEVICE); 1162 } 1163 sis_priv->dirty_rx = (unsigned int) (i - NUM_RX_DESC); 1164 1165 /* load Receive Descriptor Register */ 1166 outl(sis_priv->rx_ring_dma, ioaddr + rxdp); 1167 if (netif_msg_hw(sis_priv)) 1168 printk(KERN_DEBUG "%s: RX descriptor register loaded with: %8.8x\n", 1169 net_dev->name, inl(ioaddr + rxdp)); 1170} 1171 1172/** 1173 * sis630_set_eq - set phy equalizer value for 630 LAN 1174 * @net_dev: the net device to set equalizer value 1175 * @revision: 630 LAN revision number 1176 * 1177 * 630E equalizer workaround rule(Cyrus Huang 08/15) 1178 * PHY register 14h(Test) 1179 * Bit 14: 0 -- Automatically dectect (default) 1180 * 1 -- Manually set Equalizer filter 1181 * Bit 13: 0 -- (Default) 1182 * 1 -- Speed up convergence of equalizer setting 1183 * Bit 9 : 0 -- (Default) 1184 * 1 -- Disable Baseline Wander 1185 * Bit 3~7 -- Equalizer filter setting 1186 * Link ON: Set Bit 9, 13 to 1, Bit 14 to 0 1187 * Then calculate equalizer value 1188 * Then set equalizer value, and set Bit 14 to 1, Bit 9 to 0 1189 * Link Off:Set Bit 13 to 1, Bit 14 to 0 1190 * Calculate Equalizer value: 1191 * When Link is ON and Bit 14 is 0, SIS900PHY will auto-dectect proper equalizer value. 1192 * When the equalizer is stable, this value is not a fixed value. It will be within 1193 * a small range(eg. 7~9). Then we get a minimum and a maximum value(eg. min=7, max=9) 1194 * 0 <= max <= 4 --> set equalizer to max 1195 * 5 <= max <= 14 --> set equalizer to max+1 or set equalizer to max+2 if max == min 1196 * max >= 15 --> set equalizer to max+5 or set equalizer to max+6 if max == min 1197 */ 1198 1199static void sis630_set_eq(struct net_device *net_dev, u8 revision) 1200{ 1201 struct sis900_private *sis_priv = net_dev->priv; 1202 u16 reg14h, eq_value=0, max_value=0, min_value=0; 1203 int i, maxcount=10; 1204 1205 if ( !(revision == SIS630E_900_REV || revision == SIS630EA1_900_REV || 1206 revision == SIS630A_900_REV || revision == SIS630ET_900_REV) ) 1207 return; 1208 1209 if (netif_carrier_ok(net_dev)) { 1210 reg14h = mdio_read(net_dev, sis_priv->cur_phy, MII_RESV); 1211 mdio_write(net_dev, sis_priv->cur_phy, MII_RESV, 1212 (0x2200 | reg14h) & 0xBFFF); 1213 for (i=0; i < maxcount; i++) { 1214 eq_value = (0x00F8 & mdio_read(net_dev, 1215 sis_priv->cur_phy, MII_RESV)) >> 3; 1216 if (i == 0) 1217 max_value=min_value=eq_value; 1218 max_value = (eq_value > max_value) ? 1219 eq_value : max_value; 1220 min_value = (eq_value < min_value) ? 1221 eq_value : min_value; 1222 } 1223 /* 630E rule to determine the equalizer value */ 1224 if (revision == SIS630E_900_REV || revision == SIS630EA1_900_REV || 1225 revision == SIS630ET_900_REV) { 1226 if (max_value < 5) 1227 eq_value = max_value; 1228 else if (max_value >= 5 && max_value < 15) 1229 eq_value = (max_value == min_value) ? 1230 max_value+2 : max_value+1; 1231 else if (max_value >= 15) 1232 eq_value=(max_value == min_value) ? 1233 max_value+6 : max_value+5; 1234 } 1235 /* 630B0&B1 rule to determine the equalizer value */ 1236 if (revision == SIS630A_900_REV && 1237 (sis_priv->host_bridge_rev == SIS630B0 || 1238 sis_priv->host_bridge_rev == SIS630B1)) { 1239 if (max_value == 0) 1240 eq_value = 3; 1241 else 1242 eq_value = (max_value + min_value + 1)/2; 1243 } 1244 /* write equalizer value and setting */ 1245 reg14h = mdio_read(net_dev, sis_priv->cur_phy, MII_RESV); 1246 reg14h = (reg14h & 0xFF07) | ((eq_value << 3) & 0x00F8); 1247 reg14h = (reg14h | 0x6000) & 0xFDFF; 1248 mdio_write(net_dev, sis_priv->cur_phy, MII_RESV, reg14h); 1249 } else { 1250 reg14h = mdio_read(net_dev, sis_priv->cur_phy, MII_RESV); 1251 if (revision == SIS630A_900_REV && 1252 (sis_priv->host_bridge_rev == SIS630B0 || 1253 sis_priv->host_bridge_rev == SIS630B1)) 1254 mdio_write(net_dev, sis_priv->cur_phy, MII_RESV, 1255 (reg14h | 0x2200) & 0xBFFF); 1256 else 1257 mdio_write(net_dev, sis_priv->cur_phy, MII_RESV, 1258 (reg14h | 0x2000) & 0xBFFF); 1259 } 1260 return; 1261} 1262 1263/** 1264 * sis900_timer - sis900 timer routine 1265 * @data: pointer to sis900 net device 1266 * 1267 * On each timer ticks we check two things, 1268 * link status (ON/OFF) and link mode (10/100/Full/Half) 1269 */ 1270 1271static void sis900_timer(unsigned long data) 1272{ 1273 struct net_device *net_dev = (struct net_device *)data; 1274 struct sis900_private *sis_priv = net_dev->priv; 1275 struct mii_phy *mii_phy = sis_priv->mii; 1276 static const int next_tick = 5*HZ; 1277 u16 status; 1278 1279 if (!sis_priv->autong_complete){ 1280 int speed, duplex = 0; 1281 1282 sis900_read_mode(net_dev, &speed, &duplex); 1283 if (duplex){ 1284 sis900_set_mode(net_dev->base_addr, speed, duplex); 1285 sis630_set_eq(net_dev, sis_priv->chipset_rev); 1286 netif_start_queue(net_dev); 1287 } 1288 1289 sis_priv->timer.expires = jiffies + HZ; 1290 add_timer(&sis_priv->timer); 1291 return; 1292 } 1293 1294 status = mdio_read(net_dev, sis_priv->cur_phy, MII_STATUS); 1295 status = mdio_read(net_dev, sis_priv->cur_phy, MII_STATUS); 1296 1297 /* Link OFF -> ON */ 1298 if (!netif_carrier_ok(net_dev)) { 1299 LookForLink: 1300 /* Search for new PHY */ 1301 status = sis900_default_phy(net_dev); 1302 mii_phy = sis_priv->mii; 1303 1304 if (status & MII_STAT_LINK){ 1305 sis900_check_mode(net_dev, mii_phy); 1306 netif_carrier_on(net_dev); 1307 } 1308 } else { 1309 /* Link ON -> OFF */ 1310 if (!(status & MII_STAT_LINK)){ 1311 netif_carrier_off(net_dev); 1312 if(netif_msg_link(sis_priv)) 1313 printk(KERN_INFO "%s: Media Link Off\n", net_dev->name); 1314 1315 /* Change mode issue */ 1316 if ((mii_phy->phy_id0 == 0x001D) && 1317 ((mii_phy->phy_id1 & 0xFFF0) == 0x8000)) 1318 sis900_reset_phy(net_dev, sis_priv->cur_phy); 1319 1320 sis630_set_eq(net_dev, sis_priv->chipset_rev); 1321 1322 goto LookForLink; 1323 } 1324 } 1325 1326 sis_priv->timer.expires = jiffies + next_tick; 1327 add_timer(&sis_priv->timer); 1328} 1329 1330/** 1331 * sis900_check_mode - check the media mode for sis900 1332 * @net_dev: the net device to be checked 1333 * @mii_phy: the mii phy 1334 * 1335 * Older driver gets the media mode from mii status output 1336 * register. Now we set our media capability and auto-negotiate 1337 * to get the upper bound of speed and duplex between two ends. 1338 * If the types of mii phy is HOME, it doesn't need to auto-negotiate 1339 * and autong_complete should be set to 1. 1340 */ 1341 1342static void sis900_check_mode(struct net_device *net_dev, struct mii_phy *mii_phy) 1343{ 1344 struct sis900_private *sis_priv = net_dev->priv; 1345 long ioaddr = net_dev->base_addr; 1346 int speed, duplex; 1347 1348 if (mii_phy->phy_types == LAN) { 1349 outl(~EXD & inl(ioaddr + cfg), ioaddr + cfg); 1350 sis900_set_capability(net_dev , mii_phy); 1351 sis900_auto_negotiate(net_dev, sis_priv->cur_phy); 1352 } else { 1353 outl(EXD | inl(ioaddr + cfg), ioaddr + cfg); 1354 speed = HW_SPEED_HOME; 1355 duplex = FDX_CAPABLE_HALF_SELECTED; 1356 sis900_set_mode(ioaddr, speed, duplex); 1357 sis_priv->autong_complete = 1; 1358 } 1359} 1360 1361/** 1362 * sis900_set_mode - Set the media mode of mac register. 1363 * @ioaddr: the address of the device 1364 * @speed : the transmit speed to be determined 1365 * @duplex: the duplex mode to be determined 1366 * 1367 * Set the media mode of mac register txcfg/rxcfg according to 1368 * speed and duplex of phy. Bit EDB_MASTER_EN indicates the EDB 1369 * bus is used instead of PCI bus. When this bit is set 1, the 1370 * Max DMA Burst Size for TX/RX DMA should be no larger than 16 1371 * double words. 1372 */ 1373 1374static void sis900_set_mode (long ioaddr, int speed, int duplex) 1375{ 1376 u32 tx_flags = 0, rx_flags = 0; 1377 1378 if (inl(ioaddr + cfg) & EDB_MASTER_EN) { 1379 tx_flags = TxATP | (DMA_BURST_64 << TxMXDMA_shift) | 1380 (TX_FILL_THRESH << TxFILLT_shift); 1381 rx_flags = DMA_BURST_64 << RxMXDMA_shift; 1382 } else { 1383 tx_flags = TxATP | (DMA_BURST_512 << TxMXDMA_shift) | 1384 (TX_FILL_THRESH << TxFILLT_shift); 1385 rx_flags = DMA_BURST_512 << RxMXDMA_shift; 1386 } 1387 1388 if (speed == HW_SPEED_HOME || speed == HW_SPEED_10_MBPS) { 1389 rx_flags |= (RxDRNT_10 << RxDRNT_shift); 1390 tx_flags |= (TxDRNT_10 << TxDRNT_shift); 1391 } else { 1392 rx_flags |= (RxDRNT_100 << RxDRNT_shift); 1393 tx_flags |= (TxDRNT_100 << TxDRNT_shift); 1394 } 1395 1396 if (duplex == FDX_CAPABLE_FULL_SELECTED) { 1397 tx_flags |= (TxCSI | TxHBI); 1398 rx_flags |= RxATX; 1399 } 1400 1401#if defined(CONFIG_VLAN_8021Q) || defined(CONFIG_VLAN_8021Q_MODULE) 1402 /* Can accept Jumbo packet */ 1403 rx_flags |= RxAJAB; 1404#endif 1405 1406 outl (tx_flags, ioaddr + txcfg); 1407 outl (rx_flags, ioaddr + rxcfg); 1408} 1409 1410/** 1411 * sis900_auto_negotiate - Set the Auto-Negotiation Enable/Reset bit. 1412 * @net_dev: the net device to read mode for 1413 * @phy_addr: mii phy address 1414 * 1415 * If the adapter is link-on, set the auto-negotiate enable/reset bit. 1416 * autong_complete should be set to 0 when starting auto-negotiation. 1417 * autong_complete should be set to 1 if we didn't start auto-negotiation. 1418 * sis900_timer will wait for link on again if autong_complete = 0. 1419 */ 1420 1421static void sis900_auto_negotiate(struct net_device *net_dev, int phy_addr) 1422{ 1423 struct sis900_private *sis_priv = net_dev->priv; 1424 int i = 0; 1425 u32 status; 1426 1427 for (i = 0; i < 2; i++) 1428 status = mdio_read(net_dev, phy_addr, MII_STATUS); 1429 1430 if (!(status & MII_STAT_LINK)){ 1431 if(netif_msg_link(sis_priv)) 1432 printk(KERN_INFO "%s: Media Link Off\n", net_dev->name); 1433 sis_priv->autong_complete = 1; 1434 netif_carrier_off(net_dev); 1435 return; 1436 } 1437 1438 /* (Re)start AutoNegotiate */ 1439 mdio_write(net_dev, phy_addr, MII_CONTROL, 1440 MII_CNTL_AUTO | MII_CNTL_RST_AUTO); 1441 sis_priv->autong_complete = 0; 1442} 1443 1444 1445/** 1446 * sis900_read_mode - read media mode for sis900 internal phy 1447 * @net_dev: the net device to read mode for 1448 * @speed : the transmit speed to be determined 1449 * @duplex : the duplex mode to be determined 1450 * 1451 * The capability of remote end will be put in mii register autorec 1452 * after auto-negotiation. Use AND operation to get the upper bound 1453 * of speed and duplex between two ends. 1454 */ 1455 1456static void sis900_read_mode(struct net_device *net_dev, int *speed, int *duplex) 1457{ 1458 struct sis900_private *sis_priv = net_dev->priv; 1459 struct mii_phy *phy = sis_priv->mii; 1460 int phy_addr = sis_priv->cur_phy; 1461 u32 status; 1462 u16 autoadv, autorec; 1463 int i; 1464 1465 for (i = 0; i < 2; i++) 1466 status = mdio_read(net_dev, phy_addr, MII_STATUS); 1467 1468 if (!(status & MII_STAT_LINK)) 1469 return; 1470 1471 /* AutoNegotiate completed */ 1472 autoadv = mdio_read(net_dev, phy_addr, MII_ANADV); 1473 autorec = mdio_read(net_dev, phy_addr, MII_ANLPAR); 1474 status = autoadv & autorec; 1475 1476 *speed = HW_SPEED_10_MBPS; 1477 *duplex = FDX_CAPABLE_HALF_SELECTED; 1478 1479 if (status & (MII_NWAY_TX | MII_NWAY_TX_FDX)) 1480 *speed = HW_SPEED_100_MBPS; 1481 if (status & ( MII_NWAY_TX_FDX | MII_NWAY_T_FDX)) 1482 *duplex = FDX_CAPABLE_FULL_SELECTED; 1483 1484 sis_priv->autong_complete = 1; 1485 1486 /* Workaround for Realtek RTL8201 PHY issue */ 1487 if ((phy->phy_id0 == 0x0000) && ((phy->phy_id1 & 0xFFF0) == 0x8200)) { 1488 if (mdio_read(net_dev, phy_addr, MII_CONTROL) & MII_CNTL_FDX) 1489 *duplex = FDX_CAPABLE_FULL_SELECTED; 1490 if (mdio_read(net_dev, phy_addr, 0x0019) & 0x01) 1491 *speed = HW_SPEED_100_MBPS; 1492 } 1493 1494 if(netif_msg_link(sis_priv)) 1495 printk(KERN_INFO "%s: Media Link On %s %s-duplex \n", 1496 net_dev->name, 1497 *speed == HW_SPEED_100_MBPS ? 1498 "100mbps" : "10mbps", 1499 *duplex == FDX_CAPABLE_FULL_SELECTED ? 1500 "full" : "half"); 1501} 1502 1503/** 1504 * sis900_tx_timeout - sis900 transmit timeout routine 1505 * @net_dev: the net device to transmit 1506 * 1507 * print transmit timeout status 1508 * disable interrupts and do some tasks 1509 */ 1510 1511static void sis900_tx_timeout(struct net_device *net_dev) 1512{ 1513 struct sis900_private *sis_priv = net_dev->priv; 1514 long ioaddr = net_dev->base_addr; 1515 unsigned long flags; 1516 int i; 1517 1518 if(netif_msg_tx_err(sis_priv)) 1519 printk(KERN_INFO "%s: Transmit timeout, status %8.8x %8.8x \n", 1520 net_dev->name, inl(ioaddr + cr), inl(ioaddr + isr)); 1521 1522 /* Disable interrupts by clearing the interrupt mask. */ 1523 outl(0x0000, ioaddr + imr); 1524 1525 /* use spinlock to prevent interrupt handler accessing buffer ring */ 1526 spin_lock_irqsave(&sis_priv->lock, flags); 1527 1528 /* discard unsent packets */ 1529 sis_priv->dirty_tx = sis_priv->cur_tx = 0; 1530 for (i = 0; i < NUM_TX_DESC; i++) { 1531 struct sk_buff *skb = sis_priv->tx_skbuff[i]; 1532 1533 if (skb) { 1534 pci_unmap_single(sis_priv->pci_dev, 1535 sis_priv->tx_ring[i].bufptr, skb->len, 1536 PCI_DMA_TODEVICE); 1537 dev_kfree_skb_irq(skb); 1538 sis_priv->tx_skbuff[i] = NULL; 1539 sis_priv->tx_ring[i].cmdsts = 0; 1540 sis_priv->tx_ring[i].bufptr = 0; 1541 net_dev->stats.tx_dropped++; 1542 } 1543 } 1544 sis_priv->tx_full = 0; 1545 netif_wake_queue(net_dev); 1546 1547 spin_unlock_irqrestore(&sis_priv->lock, flags); 1548 1549 net_dev->trans_start = jiffies; 1550 1551 /* load Transmit Descriptor Register */ 1552 outl(sis_priv->tx_ring_dma, ioaddr + txdp); 1553 1554 /* Enable all known interrupts by setting the interrupt mask. */ 1555 outl((RxSOVR|RxORN|RxERR|RxOK|TxURN|TxERR|TxIDLE), ioaddr + imr); 1556 return; 1557} 1558 1559/** 1560 * sis900_start_xmit - sis900 start transmit routine 1561 * @skb: socket buffer pointer to put the data being transmitted 1562 * @net_dev: the net device to transmit with 1563 * 1564 * Set the transmit buffer descriptor, 1565 * and write TxENA to enable transmit state machine. 1566 * tell upper layer if the buffer is full 1567 */ 1568 1569static int 1570sis900_start_xmit(struct sk_buff *skb, struct net_device *net_dev) 1571{ 1572 struct sis900_private *sis_priv = net_dev->priv; 1573 long ioaddr = net_dev->base_addr; 1574 unsigned int entry; 1575 unsigned long flags; 1576 unsigned int index_cur_tx, index_dirty_tx; 1577 unsigned int count_dirty_tx; 1578 1579 /* Don't transmit data before the complete of auto-negotiation */ 1580 if(!sis_priv->autong_complete){ 1581 netif_stop_queue(net_dev); 1582 return 1; 1583 } 1584 1585 spin_lock_irqsave(&sis_priv->lock, flags); 1586 1587 /* Calculate the next Tx descriptor entry. */ 1588 entry = sis_priv->cur_tx % NUM_TX_DESC; 1589 sis_priv->tx_skbuff[entry] = skb; 1590 1591 /* set the transmit buffer descriptor and enable Transmit State Machine */ 1592 sis_priv->tx_ring[entry].bufptr = pci_map_single(sis_priv->pci_dev, 1593 skb->data, skb->len, PCI_DMA_TODEVICE); 1594 sis_priv->tx_ring[entry].cmdsts = (OWN | skb->len); 1595 outl(TxENA | inl(ioaddr + cr), ioaddr + cr); 1596 1597 sis_priv->cur_tx ++; 1598 index_cur_tx = sis_priv->cur_tx; 1599 index_dirty_tx = sis_priv->dirty_tx; 1600 1601 for (count_dirty_tx = 0; index_cur_tx != index_dirty_tx; index_dirty_tx++) 1602 count_dirty_tx ++; 1603 1604 if (index_cur_tx == index_dirty_tx) { 1605 /* dirty_tx is met in the cycle of cur_tx, buffer full */ 1606 sis_priv->tx_full = 1; 1607 netif_stop_queue(net_dev); 1608 } else if (count_dirty_tx < NUM_TX_DESC) { 1609 /* Typical path, tell upper layer that more transmission is possible */ 1610 netif_start_queue(net_dev); 1611 } else { 1612 /* buffer full, tell upper layer no more transmission */ 1613 sis_priv->tx_full = 1; 1614 netif_stop_queue(net_dev); 1615 } 1616 1617 spin_unlock_irqrestore(&sis_priv->lock, flags); 1618 1619 net_dev->trans_start = jiffies; 1620 1621 if (netif_msg_tx_queued(sis_priv)) 1622 printk(KERN_DEBUG "%s: Queued Tx packet at %p size %d " 1623 "to slot %d.\n", 1624 net_dev->name, skb->data, (int)skb->len, entry); 1625 1626 return 0; 1627} 1628 1629/** 1630 * sis900_interrupt - sis900 interrupt handler 1631 * @irq: the irq number 1632 * @dev_instance: the client data object 1633 * @regs: snapshot of processor context 1634 * 1635 * The interrupt handler does all of the Rx thread work, 1636 * and cleans up after the Tx thread 1637 */ 1638 1639static irqreturn_t sis900_interrupt(int irq, void *dev_instance) 1640{ 1641 struct net_device *net_dev = dev_instance; 1642 struct sis900_private *sis_priv = net_dev->priv; 1643 int boguscnt = max_interrupt_work; 1644 long ioaddr = net_dev->base_addr; 1645 u32 status; 1646 unsigned int handled = 0; 1647 1648 spin_lock (&sis_priv->lock); 1649 1650 do { 1651 status = inl(ioaddr + isr); 1652 1653 if ((status & (HIBERR|TxURN|TxERR|TxIDLE|RxORN|RxERR|RxOK)) == 0) 1654 /* nothing intresting happened */ 1655 break; 1656 handled = 1; 1657 1658 /* why dow't we break after Tx/Rx case ?? keyword: full-duplex */ 1659 if (status & (RxORN | RxERR | RxOK)) 1660 /* Rx interrupt */ 1661 sis900_rx(net_dev); 1662 1663 if (status & (TxURN | TxERR | TxIDLE)) 1664 /* Tx interrupt */ 1665 sis900_finish_xmit(net_dev); 1666 1667 /* something strange happened !!! */ 1668 if (status & HIBERR) { 1669 if(netif_msg_intr(sis_priv)) 1670 printk(KERN_INFO "%s: Abnormal interrupt, " 1671 "status %#8.8x.\n", net_dev->name, status); 1672 break; 1673 } 1674 if (--boguscnt < 0) { 1675 if(netif_msg_intr(sis_priv)) 1676 printk(KERN_INFO "%s: Too much work at interrupt, " 1677 "interrupt status = %#8.8x.\n", 1678 net_dev->name, status); 1679 break; 1680 } 1681 } while (1); 1682 1683 if(netif_msg_intr(sis_priv)) 1684 printk(KERN_DEBUG "%s: exiting interrupt, " 1685 "interrupt status = 0x%#8.8x.\n", 1686 net_dev->name, inl(ioaddr + isr)); 1687 1688 spin_unlock (&sis_priv->lock); 1689 return IRQ_RETVAL(handled); 1690} 1691 1692/** 1693 * sis900_rx - sis900 receive routine 1694 * @net_dev: the net device which receives data 1695 * 1696 * Process receive interrupt events, 1697 * put buffer to higher layer and refill buffer pool 1698 * Note: This function is called by interrupt handler, 1699 * don't do "too much" work here 1700 */ 1701 1702static int sis900_rx(struct net_device *net_dev) 1703{ 1704 struct sis900_private *sis_priv = net_dev->priv; 1705 long ioaddr = net_dev->base_addr; 1706 unsigned int entry = sis_priv->cur_rx % NUM_RX_DESC; 1707 u32 rx_status = sis_priv->rx_ring[entry].cmdsts; 1708 int rx_work_limit; 1709 1710 if (netif_msg_rx_status(sis_priv)) 1711 printk(KERN_DEBUG "sis900_rx, cur_rx:%4.4d, dirty_rx:%4.4d " 1712 "status:0x%8.8x\n", 1713 sis_priv->cur_rx, sis_priv->dirty_rx, rx_status); 1714 rx_work_limit = sis_priv->dirty_rx + NUM_RX_DESC - sis_priv->cur_rx; 1715 1716 while (rx_status & OWN) { 1717 unsigned int rx_size; 1718 unsigned int data_size; 1719 1720 if (--rx_work_limit < 0) 1721 break; 1722 1723 data_size = rx_status & DSIZE; 1724 rx_size = data_size - CRC_SIZE; 1725 1726#if defined(CONFIG_VLAN_8021Q) || defined(CONFIG_VLAN_8021Q_MODULE) 1727 /* ``TOOLONG'' flag means jumbo packet recived. */ 1728 if ((rx_status & TOOLONG) && data_size <= MAX_FRAME_SIZE) 1729 rx_status &= (~ ((unsigned int)TOOLONG)); 1730#endif 1731 1732 if (rx_status & (ABORT|OVERRUN|TOOLONG|RUNT|RXISERR|CRCERR|FAERR)) { 1733 /* corrupted packet received */ 1734 if (netif_msg_rx_err(sis_priv)) 1735 printk(KERN_DEBUG "%s: Corrupted packet " 1736 "received, buffer status = 0x%8.8x/%d.\n", 1737 net_dev->name, rx_status, data_size); 1738 net_dev->stats.rx_errors++; 1739 if (rx_status & OVERRUN) 1740 net_dev->stats.rx_over_errors++; 1741 if (rx_status & (TOOLONG|RUNT)) 1742 net_dev->stats.rx_length_errors++; 1743 if (rx_status & (RXISERR | FAERR)) 1744 net_dev->stats.rx_frame_errors++; 1745 if (rx_status & CRCERR) 1746 net_dev->stats.rx_crc_errors++; 1747 /* reset buffer descriptor state */ 1748 sis_priv->rx_ring[entry].cmdsts = RX_BUF_SIZE; 1749 } else { 1750 struct sk_buff * skb; 1751 struct sk_buff * rx_skb; 1752 1753 pci_unmap_single(sis_priv->pci_dev, 1754 sis_priv->rx_ring[entry].bufptr, RX_BUF_SIZE, 1755 PCI_DMA_FROMDEVICE); 1756 1757 /* refill the Rx buffer, what if there is not enought 1758 * memory for new socket buffer ?? */ 1759 if ((skb = dev_alloc_skb(RX_BUF_SIZE)) == NULL) { 1760 /* 1761 * Not enough memory to refill the buffer 1762 * so we need to recycle the old one so 1763 * as to avoid creating a memory hole 1764 * in the rx ring 1765 */ 1766 skb = sis_priv->rx_skbuff[entry]; 1767 net_dev->stats.rx_dropped++; 1768 goto refill_rx_ring; 1769 } 1770 1771 /* This situation should never happen, but due to 1772 some unknow bugs, it is possible that 1773 we are working on NULL sk_buff :-( */ 1774 if (sis_priv->rx_skbuff[entry] == NULL) { 1775 if (netif_msg_rx_err(sis_priv)) 1776 printk(KERN_WARNING "%s: NULL pointer " 1777 "encountered in Rx ring\n" 1778 "cur_rx:%4.4d, dirty_rx:%4.4d\n", 1779 net_dev->name, sis_priv->cur_rx, 1780 sis_priv->dirty_rx); 1781 break; 1782 } 1783 1784 /* give the socket buffer to upper layers */ 1785 rx_skb = sis_priv->rx_skbuff[entry]; 1786 skb_put(rx_skb, rx_size); 1787 rx_skb->protocol = eth_type_trans(rx_skb, net_dev); 1788 netif_rx(rx_skb); 1789 1790 /* some network statistics */ 1791 if ((rx_status & BCAST) == MCAST) 1792 net_dev->stats.multicast++; 1793 net_dev->last_rx = jiffies; 1794 net_dev->stats.rx_bytes += rx_size; 1795 net_dev->stats.rx_packets++; 1796 sis_priv->dirty_rx++; 1797refill_rx_ring: 1798 sis_priv->rx_skbuff[entry] = skb; 1799 sis_priv->rx_ring[entry].cmdsts = RX_BUF_SIZE; 1800 sis_priv->rx_ring[entry].bufptr = 1801 pci_map_single(sis_priv->pci_dev, skb->data, 1802 RX_BUF_SIZE, PCI_DMA_FROMDEVICE); 1803 } 1804 sis_priv->cur_rx++; 1805 entry = sis_priv->cur_rx % NUM_RX_DESC; 1806 rx_status = sis_priv->rx_ring[entry].cmdsts; 1807 } // while 1808 1809 /* refill the Rx buffer, what if the rate of refilling is slower 1810 * than consuming ?? */ 1811 for (; sis_priv->cur_rx != sis_priv->dirty_rx; sis_priv->dirty_rx++) { 1812 struct sk_buff *skb; 1813 1814 entry = sis_priv->dirty_rx % NUM_RX_DESC; 1815 1816 if (sis_priv->rx_skbuff[entry] == NULL) { 1817 if ((skb = dev_alloc_skb(RX_BUF_SIZE)) == NULL) { 1818 /* not enough memory for skbuff, this makes a 1819 * "hole" on the buffer ring, it is not clear 1820 * how the hardware will react to this kind 1821 * of degenerated buffer */ 1822 if (netif_msg_rx_err(sis_priv)) 1823 printk(KERN_INFO "%s: Memory squeeze, " 1824 "deferring packet.\n", 1825 net_dev->name); 1826 net_dev->stats.rx_dropped++; 1827 break; 1828 } 1829 sis_priv->rx_skbuff[entry] = skb; 1830 sis_priv->rx_ring[entry].cmdsts = RX_BUF_SIZE; 1831 sis_priv->rx_ring[entry].bufptr = 1832 pci_map_single(sis_priv->pci_dev, skb->data, 1833 RX_BUF_SIZE, PCI_DMA_FROMDEVICE); 1834 } 1835 } 1836 /* re-enable the potentially idle receive state matchine */ 1837 outl(RxENA | inl(ioaddr + cr), ioaddr + cr ); 1838 1839 return 0; 1840} 1841 1842/** 1843 * sis900_finish_xmit - finish up transmission of packets 1844 * @net_dev: the net device to be transmitted on 1845 * 1846 * Check for error condition and free socket buffer etc 1847 * schedule for more transmission as needed 1848 * Note: This function is called by interrupt handler, 1849 * don't do "too much" work here 1850 */ 1851 1852static void sis900_finish_xmit (struct net_device *net_dev) 1853{ 1854 struct sis900_private *sis_priv = net_dev->priv; 1855 1856 for (; sis_priv->dirty_tx != sis_priv->cur_tx; sis_priv->dirty_tx++) { 1857 struct sk_buff *skb; 1858 unsigned int entry; 1859 u32 tx_status; 1860 1861 entry = sis_priv->dirty_tx % NUM_TX_DESC; 1862 tx_status = sis_priv->tx_ring[entry].cmdsts; 1863 1864 if (tx_status & OWN) { 1865 /* The packet is not transmitted yet (owned by hardware) ! 1866 * Note: the interrupt is generated only when Tx Machine 1867 * is idle, so this is an almost impossible case */ 1868 break; 1869 } 1870 1871 if (tx_status & (ABORT | UNDERRUN | OWCOLL)) { 1872 /* packet unsuccessfully transmitted */ 1873 if (netif_msg_tx_err(sis_priv)) 1874 printk(KERN_DEBUG "%s: Transmit " 1875 "error, Tx status %8.8x.\n", 1876 net_dev->name, tx_status); 1877 net_dev->stats.tx_errors++; 1878 if (tx_status & UNDERRUN) 1879 net_dev->stats.tx_fifo_errors++; 1880 if (tx_status & ABORT) 1881 net_dev->stats.tx_aborted_errors++; 1882 if (tx_status & NOCARRIER) 1883 net_dev->stats.tx_carrier_errors++; 1884 if (tx_status & OWCOLL) 1885 net_dev->stats.tx_window_errors++; 1886 } else { 1887 /* packet successfully transmitted */ 1888 net_dev->stats.collisions += (tx_status & COLCNT) >> 16; 1889 net_dev->stats.tx_bytes += tx_status & DSIZE; 1890 net_dev->stats.tx_packets++; 1891 } 1892 /* Free the original skb. */ 1893 skb = sis_priv->tx_skbuff[entry]; 1894 pci_unmap_single(sis_priv->pci_dev, 1895 sis_priv->tx_ring[entry].bufptr, skb->len, 1896 PCI_DMA_TODEVICE); 1897 dev_kfree_skb_irq(skb); 1898 sis_priv->tx_skbuff[entry] = NULL; 1899 sis_priv->tx_ring[entry].bufptr = 0; 1900 sis_priv->tx_ring[entry].cmdsts = 0; 1901 } 1902 1903 if (sis_priv->tx_full && netif_queue_stopped(net_dev) && 1904 sis_priv->cur_tx - sis_priv->dirty_tx < NUM_TX_DESC - 4) { 1905 /* The ring is no longer full, clear tx_full and schedule 1906 * more transmission by netif_wake_queue(net_dev) */ 1907 sis_priv->tx_full = 0; 1908 netif_wake_queue (net_dev); 1909 } 1910} 1911 1912/** 1913 * sis900_close - close sis900 device 1914 * @net_dev: the net device to be closed 1915 * 1916 * Disable interrupts, stop the Tx and Rx Status Machine 1917 * free Tx and RX socket buffer 1918 */ 1919 1920static int sis900_close(struct net_device *net_dev) 1921{ 1922 long ioaddr = net_dev->base_addr; 1923 struct sis900_private *sis_priv = net_dev->priv; 1924 struct sk_buff *skb; 1925 int i; 1926 1927 netif_stop_queue(net_dev); 1928 1929 /* Disable interrupts by clearing the interrupt mask. */ 1930 outl(0x0000, ioaddr + imr); 1931 outl(0x0000, ioaddr + ier); 1932 1933 /* Stop the chip's Tx and Rx Status Machine */ 1934 outl(RxDIS | TxDIS | inl(ioaddr + cr), ioaddr + cr); 1935 1936 del_timer(&sis_priv->timer); 1937 1938 free_irq(net_dev->irq, net_dev); 1939 1940 /* Free Tx and RX skbuff */ 1941 for (i = 0; i < NUM_RX_DESC; i++) { 1942 skb = sis_priv->rx_skbuff[i]; 1943 if (skb) { 1944 pci_unmap_single(sis_priv->pci_dev, 1945 sis_priv->rx_ring[i].bufptr, 1946 RX_BUF_SIZE, PCI_DMA_FROMDEVICE); 1947 dev_kfree_skb(skb); 1948 sis_priv->rx_skbuff[i] = NULL; 1949 } 1950 } 1951 for (i = 0; i < NUM_TX_DESC; i++) { 1952 skb = sis_priv->tx_skbuff[i]; 1953 if (skb) { 1954 pci_unmap_single(sis_priv->pci_dev, 1955 sis_priv->tx_ring[i].bufptr, skb->len, 1956 PCI_DMA_TODEVICE); 1957 dev_kfree_skb(skb); 1958 sis_priv->tx_skbuff[i] = NULL; 1959 } 1960 } 1961 1962 /* Green! Put the chip in low-power mode. */ 1963 1964 return 0; 1965} 1966 1967/** 1968 * sis900_get_drvinfo - Return information about driver 1969 * @net_dev: the net device to probe 1970 * @info: container for info returned 1971 * 1972 * Process ethtool command such as "ehtool -i" to show information 1973 */ 1974 1975static void sis900_get_drvinfo(struct net_device *net_dev, 1976 struct ethtool_drvinfo *info) 1977{ 1978 struct sis900_private *sis_priv = net_dev->priv; 1979 1980 strcpy (info->driver, SIS900_MODULE_NAME); 1981 strcpy (info->version, SIS900_DRV_VERSION); 1982 strcpy (info->bus_info, pci_name(sis_priv->pci_dev)); 1983} 1984 1985static u32 sis900_get_msglevel(struct net_device *net_dev) 1986{ 1987 struct sis900_private *sis_priv = net_dev->priv; 1988 return sis_priv->msg_enable; 1989} 1990 1991static void sis900_set_msglevel(struct net_device *net_dev, u32 value) 1992{ 1993 struct sis900_private *sis_priv = net_dev->priv; 1994 sis_priv->msg_enable = value; 1995} 1996 1997static u32 sis900_get_link(struct net_device *net_dev) 1998{ 1999 struct sis900_private *sis_priv = net_dev->priv; 2000 return mii_link_ok(&sis_priv->mii_info); 2001} 2002 2003static int sis900_get_settings(struct net_device *net_dev, 2004 struct ethtool_cmd *cmd) 2005{ 2006 struct sis900_private *sis_priv = net_dev->priv; 2007 spin_lock_irq(&sis_priv->lock); 2008 mii_ethtool_gset(&sis_priv->mii_info, cmd); 2009 spin_unlock_irq(&sis_priv->lock); 2010 return 0; 2011} 2012 2013static int sis900_set_settings(struct net_device *net_dev, 2014 struct ethtool_cmd *cmd) 2015{ 2016 struct sis900_private *sis_priv = net_dev->priv; 2017 int rt; 2018 spin_lock_irq(&sis_priv->lock); 2019 rt = mii_ethtool_sset(&sis_priv->mii_info, cmd); 2020 spin_unlock_irq(&sis_priv->lock); 2021 return rt; 2022} 2023 2024static int sis900_nway_reset(struct net_device *net_dev) 2025{ 2026 struct sis900_private *sis_priv = net_dev->priv; 2027 return mii_nway_restart(&sis_priv->mii_info); 2028} 2029 2030/** 2031 * sis900_set_wol - Set up Wake on Lan registers 2032 * @net_dev: the net device to probe 2033 * @wol: container for info passed to the driver 2034 * 2035 * Process ethtool command "wol" to setup wake on lan features. 2036 * SiS900 supports sending WoL events if a correct packet is received, 2037 * but there is no simple way to filter them to only a subset (broadcast, 2038 * multicast, unicast or arp). 2039 */ 2040 2041static int sis900_set_wol(struct net_device *net_dev, struct ethtool_wolinfo *wol) 2042{ 2043 struct sis900_private *sis_priv = net_dev->priv; 2044 long pmctrl_addr = net_dev->base_addr + pmctrl; 2045 u32 cfgpmcsr = 0, pmctrl_bits = 0; 2046 2047 if (wol->wolopts == 0) { 2048 pci_read_config_dword(sis_priv->pci_dev, CFGPMCSR, &cfgpmcsr); 2049 cfgpmcsr &= ~PME_EN; 2050 pci_write_config_dword(sis_priv->pci_dev, CFGPMCSR, cfgpmcsr); 2051 outl(pmctrl_bits, pmctrl_addr); 2052 if (netif_msg_wol(sis_priv)) 2053 printk(KERN_DEBUG "%s: Wake on LAN disabled\n", net_dev->name); 2054 return 0; 2055 } 2056 2057 if (wol->wolopts & (WAKE_MAGICSECURE | WAKE_UCAST | WAKE_MCAST 2058 | WAKE_BCAST | WAKE_ARP)) 2059 return -EINVAL; 2060 2061 if (wol->wolopts & WAKE_MAGIC) 2062 pmctrl_bits |= MAGICPKT; 2063 if (wol->wolopts & WAKE_PHY) 2064 pmctrl_bits |= LINKON; 2065 2066 outl(pmctrl_bits, pmctrl_addr); 2067 2068 pci_read_config_dword(sis_priv->pci_dev, CFGPMCSR, &cfgpmcsr); 2069 cfgpmcsr |= PME_EN; 2070 pci_write_config_dword(sis_priv->pci_dev, CFGPMCSR, cfgpmcsr); 2071 if (netif_msg_wol(sis_priv)) 2072 printk(KERN_DEBUG "%s: Wake on LAN enabled\n", net_dev->name); 2073 2074 return 0; 2075} 2076 2077static void sis900_get_wol(struct net_device *net_dev, struct ethtool_wolinfo *wol) 2078{ 2079 long pmctrl_addr = net_dev->base_addr + pmctrl; 2080 u32 pmctrl_bits; 2081 2082 pmctrl_bits = inl(pmctrl_addr); 2083 if (pmctrl_bits & MAGICPKT) 2084 wol->wolopts |= WAKE_MAGIC; 2085 if (pmctrl_bits & LINKON) 2086 wol->wolopts |= WAKE_PHY; 2087 2088 wol->supported = (WAKE_PHY | WAKE_MAGIC); 2089} 2090 2091static const struct ethtool_ops sis900_ethtool_ops = { 2092 .get_drvinfo = sis900_get_drvinfo, 2093 .get_msglevel = sis900_get_msglevel, 2094 .set_msglevel = sis900_set_msglevel, 2095 .get_link = sis900_get_link, 2096 .get_settings = sis900_get_settings, 2097 .set_settings = sis900_set_settings, 2098 .nway_reset = sis900_nway_reset, 2099 .get_wol = sis900_get_wol, 2100 .set_wol = sis900_set_wol 2101}; 2102 2103/** 2104 * mii_ioctl - process MII i/o control command 2105 * @net_dev: the net device to command for 2106 * @rq: parameter for command 2107 * @cmd: the i/o command 2108 * 2109 * Process MII command like read/write MII register 2110 */ 2111 2112static int mii_ioctl(struct net_device *net_dev, struct ifreq *rq, int cmd) 2113{ 2114 struct sis900_private *sis_priv = net_dev->priv; 2115 struct mii_ioctl_data *data = if_mii(rq); 2116 2117 switch(cmd) { 2118 case SIOCGMIIPHY: /* Get address of MII PHY in use. */ 2119 data->phy_id = sis_priv->mii->phy_addr; 2120 /* Fall Through */ 2121 2122 case SIOCGMIIREG: /* Read MII PHY register. */ 2123 data->val_out = mdio_read(net_dev, data->phy_id & 0x1f, data->reg_num & 0x1f); 2124 return 0; 2125 2126 case SIOCSMIIREG: /* Write MII PHY register. */ 2127 if (!capable(CAP_NET_ADMIN)) 2128 return -EPERM; 2129 mdio_write(net_dev, data->phy_id & 0x1f, data->reg_num & 0x1f, data->val_in); 2130 return 0; 2131 default: 2132 return -EOPNOTSUPP; 2133 } 2134} 2135 2136/** 2137 * sis900_set_config - Set media type by net_device.set_config 2138 * @dev: the net device for media type change 2139 * @map: ifmap passed by ifconfig 2140 * 2141 * Set media type to 10baseT, 100baseT or 0(for auto) by ifconfig 2142 * we support only port changes. All other runtime configuration 2143 * changes will be ignored 2144 */ 2145 2146static int sis900_set_config(struct net_device *dev, struct ifmap *map) 2147{ 2148 struct sis900_private *sis_priv = dev->priv; 2149 struct mii_phy *mii_phy = sis_priv->mii; 2150 2151 u16 status; 2152 2153 if ((map->port != (u_char)(-1)) && (map->port != dev->if_port)) { 2154 /* we switch on the ifmap->port field. I couldn't find anything 2155 * like a definition or standard for the values of that field. 2156 * I think the meaning of those values is device specific. But 2157 * since I would like to change the media type via the ifconfig 2158 * command I use the definition from linux/netdevice.h 2159 * (which seems to be different from the ifport(pcmcia) definition) */ 2160 switch(map->port){ 2161 case IF_PORT_UNKNOWN: /* use auto here */ 2162 dev->if_port = map->port; 2163 /* we are going to change the media type, so the Link 2164 * will be temporary down and we need to reflect that 2165 * here. When the Link comes up again, it will be 2166 * sensed by the sis_timer procedure, which also does 2167 * all the rest for us */ 2168 netif_carrier_off(dev); 2169 2170 /* read current state */ 2171 status = mdio_read(dev, mii_phy->phy_addr, MII_CONTROL); 2172 2173 /* enable auto negotiation and reset the negotioation 2174 * (I don't really know what the auto negatiotiation 2175 * reset really means, but it sounds for me right to 2176 * do one here) */ 2177 mdio_write(dev, mii_phy->phy_addr, 2178 MII_CONTROL, status | MII_CNTL_AUTO | MII_CNTL_RST_AUTO); 2179 2180 break; 2181 2182 case IF_PORT_10BASET: /* 10BaseT */ 2183 dev->if_port = map->port; 2184 2185 /* we are going to change the media type, so the Link 2186 * will be temporary down and we need to reflect that 2187 * here. When the Link comes up again, it will be 2188 * sensed by the sis_timer procedure, which also does 2189 * all the rest for us */ 2190 netif_carrier_off(dev); 2191 2192 /* set Speed to 10Mbps */ 2193 /* read current state */ 2194 status = mdio_read(dev, mii_phy->phy_addr, MII_CONTROL); 2195 2196 /* disable auto negotiation and force 10MBit mode*/ 2197 mdio_write(dev, mii_phy->phy_addr, 2198 MII_CONTROL, status & ~(MII_CNTL_SPEED | 2199 MII_CNTL_AUTO)); 2200 break; 2201 2202 case IF_PORT_100BASET: /* 100BaseT */ 2203 case IF_PORT_100BASETX: /* 100BaseTx */ 2204 dev->if_port = map->port; 2205 2206 /* we are going to change the media type, so the Link 2207 * will be temporary down and we need to reflect that 2208 * here. When the Link comes up again, it will be 2209 * sensed by the sis_timer procedure, which also does 2210 * all the rest for us */ 2211 netif_carrier_off(dev); 2212 2213 /* set Speed to 100Mbps */ 2214 /* disable auto negotiation and enable 100MBit Mode */ 2215 status = mdio_read(dev, mii_phy->phy_addr, MII_CONTROL); 2216 mdio_write(dev, mii_phy->phy_addr, 2217 MII_CONTROL, (status & ~MII_CNTL_SPEED) | 2218 MII_CNTL_SPEED); 2219 2220 break; 2221 2222 case IF_PORT_10BASE2: /* 10Base2 */ 2223 case IF_PORT_AUI: /* AUI */ 2224 case IF_PORT_100BASEFX: /* 100BaseFx */ 2225 /* These Modes are not supported (are they?)*/ 2226 return -EOPNOTSUPP; 2227 break; 2228 2229 default: 2230 return -EINVAL; 2231 } 2232 } 2233 return 0; 2234} 2235 2236/** 2237 * sis900_mcast_bitnr - compute hashtable index 2238 * @addr: multicast address 2239 * @revision: revision id of chip 2240 * 2241 * SiS 900 uses the most sigificant 7 bits to index a 128 bits multicast 2242 * hash table, which makes this function a little bit different from other drivers 2243 * SiS 900 B0 & 635 M/B uses the most significat 8 bits to index 256 bits 2244 * multicast hash table. 2245 */ 2246 2247static inline u16 sis900_mcast_bitnr(u8 *addr, u8 revision) 2248{ 2249 2250 u32 crc = ether_crc(6, addr); 2251 2252 /* leave 8 or 7 most siginifant bits */ 2253 if ((revision >= SIS635A_900_REV) || (revision == SIS900B_900_REV)) 2254 return ((int)(crc >> 24)); 2255 else 2256 return ((int)(crc >> 25)); 2257} 2258 2259/** 2260 * set_rx_mode - Set SiS900 receive mode 2261 * @net_dev: the net device to be set 2262 * 2263 * Set SiS900 receive mode for promiscuous, multicast, or broadcast mode. 2264 * And set the appropriate multicast filter. 2265 * Multicast hash table changes from 128 to 256 bits for 635M/B & 900B0. 2266 */ 2267 2268static void set_rx_mode(struct net_device *net_dev) 2269{ 2270 long ioaddr = net_dev->base_addr; 2271 struct sis900_private * sis_priv = net_dev->priv; 2272 u16 mc_filter[16] = {0}; /* 256/128 bits multicast hash table */ 2273 int i, table_entries; 2274 u32 rx_mode; 2275 2276 /* 635 Hash Table entries = 256(2^16) */ 2277 if((sis_priv->chipset_rev >= SIS635A_900_REV) || 2278 (sis_priv->chipset_rev == SIS900B_900_REV)) 2279 table_entries = 16; 2280 else 2281 table_entries = 8; 2282 2283 if (net_dev->flags & IFF_PROMISC) { 2284 /* Accept any kinds of packets */ 2285 rx_mode = RFPromiscuous; 2286 for (i = 0; i < table_entries; i++) 2287 mc_filter[i] = 0xffff; 2288 } else if ((net_dev->mc_count > multicast_filter_limit) || 2289 (net_dev->flags & IFF_ALLMULTI)) { 2290 /* too many multicast addresses or accept all multicast packet */ 2291 rx_mode = RFAAB | RFAAM; 2292 for (i = 0; i < table_entries; i++) 2293 mc_filter[i] = 0xffff; 2294 } else { 2295 /* Accept Broadcast packet, destination address matchs our 2296 * MAC address, use Receive Filter to reject unwanted MCAST 2297 * packets */ 2298 struct dev_mc_list *mclist; 2299 rx_mode = RFAAB; 2300 for (i = 0, mclist = net_dev->mc_list; 2301 mclist && i < net_dev->mc_count; 2302 i++, mclist = mclist->next) { 2303 unsigned int bit_nr = 2304 sis900_mcast_bitnr(mclist->dmi_addr, sis_priv->chipset_rev); 2305 mc_filter[bit_nr >> 4] |= (1 << (bit_nr & 0xf)); 2306 } 2307 } 2308 2309 /* update Multicast Hash Table in Receive Filter */ 2310 for (i = 0; i < table_entries; i++) { 2311 /* why plus 0x04 ??, That makes the correct value for hash table. */ 2312 outl((u32)(0x00000004+i) << RFADDR_shift, ioaddr + rfcr); 2313 outl(mc_filter[i], ioaddr + rfdr); 2314 } 2315 2316 outl(RFEN | rx_mode, ioaddr + rfcr); 2317 2318 /* sis900 is capable of looping back packets at MAC level for 2319 * debugging purpose */ 2320 if (net_dev->flags & IFF_LOOPBACK) { 2321 u32 cr_saved; 2322 /* We must disable Tx/Rx before setting loopback mode */ 2323 cr_saved = inl(ioaddr + cr); 2324 outl(cr_saved | TxDIS | RxDIS, ioaddr + cr); 2325 /* enable loopback */ 2326 outl(inl(ioaddr + txcfg) | TxMLB, ioaddr + txcfg); 2327 outl(inl(ioaddr + rxcfg) | RxATX, ioaddr + rxcfg); 2328 /* restore cr */ 2329 outl(cr_saved, ioaddr + cr); 2330 } 2331 2332 return; 2333} 2334 2335/** 2336 * sis900_reset - Reset sis900 MAC 2337 * @net_dev: the net device to reset 2338 * 2339 * reset sis900 MAC and wait until finished 2340 * reset through command register 2341 * change backoff algorithm for 900B0 & 635 M/B 2342 */ 2343 2344static void sis900_reset(struct net_device *net_dev) 2345{ 2346 struct sis900_private * sis_priv = net_dev->priv; 2347 long ioaddr = net_dev->base_addr; 2348 int i = 0; 2349 u32 status = TxRCMP | RxRCMP; 2350 2351 outl(0, ioaddr + ier); 2352 outl(0, ioaddr + imr); 2353 outl(0, ioaddr + rfcr); 2354 2355 outl(RxRESET | TxRESET | RESET | inl(ioaddr + cr), ioaddr + cr); 2356 2357 /* Check that the chip has finished the reset. */ 2358 while (status && (i++ < 1000)) { 2359 status ^= (inl(isr + ioaddr) & status); 2360 } 2361 2362 if( (sis_priv->chipset_rev >= SIS635A_900_REV) || 2363 (sis_priv->chipset_rev == SIS900B_900_REV) ) 2364 outl(PESEL | RND_CNT, ioaddr + cfg); 2365 else 2366 outl(PESEL, ioaddr + cfg); 2367} 2368 2369/** 2370 * sis900_remove - Remove sis900 device 2371 * @pci_dev: the pci device to be removed 2372 * 2373 * remove and release SiS900 net device 2374 */ 2375 2376static void __devexit sis900_remove(struct pci_dev *pci_dev) 2377{ 2378 struct net_device *net_dev = pci_get_drvdata(pci_dev); 2379 struct sis900_private * sis_priv = net_dev->priv; 2380 struct mii_phy *phy = NULL; 2381 2382 while (sis_priv->first_mii) { 2383 phy = sis_priv->first_mii; 2384 sis_priv->first_mii = phy->next; 2385 kfree(phy); 2386 } 2387 2388 pci_free_consistent(pci_dev, RX_TOTAL_SIZE, sis_priv->rx_ring, 2389 sis_priv->rx_ring_dma); 2390 pci_free_consistent(pci_dev, TX_TOTAL_SIZE, sis_priv->tx_ring, 2391 sis_priv->tx_ring_dma); 2392 unregister_netdev(net_dev); 2393 free_netdev(net_dev); 2394 pci_release_regions(pci_dev); 2395 pci_set_drvdata(pci_dev, NULL); 2396} 2397 2398#ifdef CONFIG_PM 2399 2400static int sis900_suspend(struct pci_dev *pci_dev, pm_message_t state) 2401{ 2402 struct net_device *net_dev = pci_get_drvdata(pci_dev); 2403 long ioaddr = net_dev->base_addr; 2404 2405 if(!netif_running(net_dev)) 2406 return 0; 2407 2408 netif_stop_queue(net_dev); 2409 netif_device_detach(net_dev); 2410 2411 /* Stop the chip's Tx and Rx Status Machine */ 2412 outl(RxDIS | TxDIS | inl(ioaddr + cr), ioaddr + cr); 2413 2414 pci_set_power_state(pci_dev, PCI_D3hot); 2415 pci_save_state(pci_dev); 2416 2417 return 0; 2418} 2419 2420static int sis900_resume(struct pci_dev *pci_dev) 2421{ 2422 struct net_device *net_dev = pci_get_drvdata(pci_dev); 2423 struct sis900_private *sis_priv = net_dev->priv; 2424 long ioaddr = net_dev->base_addr; 2425 2426 if(!netif_running(net_dev)) 2427 return 0; 2428 pci_restore_state(pci_dev); 2429 pci_set_power_state(pci_dev, PCI_D0); 2430 2431 sis900_init_rxfilter(net_dev); 2432 2433 sis900_init_tx_ring(net_dev); 2434 sis900_init_rx_ring(net_dev); 2435 2436 set_rx_mode(net_dev); 2437 2438 netif_device_attach(net_dev); 2439 netif_start_queue(net_dev); 2440 2441 /* Workaround for EDB */ 2442 sis900_set_mode(ioaddr, HW_SPEED_10_MBPS, FDX_CAPABLE_HALF_SELECTED); 2443 2444 /* Enable all known interrupts by setting the interrupt mask. */ 2445 outl((RxSOVR|RxORN|RxERR|RxOK|TxURN|TxERR|TxIDLE), ioaddr + imr); 2446 outl(RxENA | inl(ioaddr + cr), ioaddr + cr); 2447 outl(IE, ioaddr + ier); 2448 2449 sis900_check_mode(net_dev, sis_priv->mii); 2450 2451 return 0; 2452} 2453#endif /* CONFIG_PM */ 2454 2455static struct pci_driver sis900_pci_driver = { 2456 .name = SIS900_MODULE_NAME, 2457 .id_table = sis900_pci_tbl, 2458 .probe = sis900_probe, 2459 .remove = __devexit_p(sis900_remove), 2460#ifdef CONFIG_PM 2461 .suspend = sis900_suspend, 2462 .resume = sis900_resume, 2463#endif /* CONFIG_PM */ 2464}; 2465 2466static int __init sis900_init_module(void) 2467{ 2468/* when a module, this is printed whether or not devices are found in probe */ 2469#ifdef MODULE 2470 printk(version); 2471#endif 2472 2473 return pci_register_driver(&sis900_pci_driver); 2474} 2475 2476static void __exit sis900_cleanup_module(void) 2477{ 2478 pci_unregister_driver(&sis900_pci_driver); 2479} 2480 2481module_init(sis900_init_module); 2482module_exit(sis900_cleanup_module); 2483