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1#ifndef __ASM_SH_PGTABLE_32_H 2#define __ASM_SH_PGTABLE_32_H 3 4/* 5 * Linux PTEL encoding. 6 * 7 * Hardware and software bit definitions for the PTEL value (see below for 8 * notes on SH-X2 MMUs and 64-bit PTEs): 9 * 10 * - Bits 0 and 7 are reserved on SH-3 (_PAGE_WT and _PAGE_SZ1 on SH-4). 11 * 12 * - Bit 1 is the SH-bit, but is unused on SH-3 due to an MMU bug (the 13 * hardware PTEL value can't have the SH-bit set when MMUCR.IX is set, 14 * which is the default in cpu-sh3/mmu_context.h:MMU_CONTROL_INIT). 15 * 16 * In order to keep this relatively clean, do not use these for defining 17 * SH-3 specific flags until all of the other unused bits have been 18 * exhausted. 19 * 20 * - Bit 9 is reserved by everyone and used by _PAGE_PROTNONE. 21 * 22 * - Bits 10 and 11 are low bits of the PPN that are reserved on >= 4K pages. 23 * Bit 10 is used for _PAGE_ACCESSED, bit 11 remains unused. 24 * 25 * - On 29 bit platforms, bits 31 to 29 are used for the space attributes 26 * and timing control which (together with bit 0) are moved into the 27 * old-style PTEA on the parts that support it. 28 * 29 * XXX: Leave the _PAGE_FILE and _PAGE_WT overhaul for a rainy day. 30 * 31 * SH-X2 MMUs and extended PTEs 32 * 33 * SH-X2 supports an extended mode TLB with split data arrays due to the 34 * number of bits needed for PR and SZ (now EPR and ESZ) encodings. The PR and 35 * SZ bit placeholders still exist in data array 1, but are implemented as 36 * reserved bits, with the real logic existing in data array 2. 37 * 38 * The downside to this is that we can no longer fit everything in to a 32-bit 39 * PTE encoding, so a 64-bit pte_t is necessary for these parts. On the plus 40 * side, this gives us quite a few spare bits to play with for future usage. 41 */ 42/* Legacy and compat mode bits */ 43#define _PAGE_WT 0x001 /* WT-bit on SH-4, 0 on SH-3 */ 44#define _PAGE_HW_SHARED 0x002 /* SH-bit : shared among processes */ 45#define _PAGE_DIRTY 0x004 /* D-bit : page changed */ 46#define _PAGE_CACHABLE 0x008 /* C-bit : cachable */ 47#define _PAGE_SZ0 0x010 /* SZ0-bit : Size of page */ 48#define _PAGE_RW 0x020 /* PR0-bit : write access allowed */ 49#define _PAGE_USER 0x040 /* PR1-bit : user space access allowed*/ 50#define _PAGE_SZ1 0x080 /* SZ1-bit : Size of page (on SH-4) */ 51#define _PAGE_PRESENT 0x100 /* V-bit : page is valid */ 52#define _PAGE_PROTNONE 0x200 /* software: if not present */ 53#define _PAGE_ACCESSED 0x400 /* software: page referenced */ 54#define _PAGE_FILE _PAGE_WT /* software: pagecache or swap? */ 55 56#define _PAGE_SZ_MASK (_PAGE_SZ0 | _PAGE_SZ1) 57#define _PAGE_PR_MASK (_PAGE_RW | _PAGE_USER) 58 59/* Extended mode bits */ 60#define _PAGE_EXT_ESZ0 0x0010 /* ESZ0-bit: Size of page */ 61#define _PAGE_EXT_ESZ1 0x0020 /* ESZ1-bit: Size of page */ 62#define _PAGE_EXT_ESZ2 0x0040 /* ESZ2-bit: Size of page */ 63#define _PAGE_EXT_ESZ3 0x0080 /* ESZ3-bit: Size of page */ 64 65#define _PAGE_EXT_USER_EXEC 0x0100 /* EPR0-bit: User space executable */ 66#define _PAGE_EXT_USER_WRITE 0x0200 /* EPR1-bit: User space writable */ 67#define _PAGE_EXT_USER_READ 0x0400 /* EPR2-bit: User space readable */ 68 69#define _PAGE_EXT_KERN_EXEC 0x0800 /* EPR3-bit: Kernel space executable */ 70#define _PAGE_EXT_KERN_WRITE 0x1000 /* EPR4-bit: Kernel space writable */ 71#define _PAGE_EXT_KERN_READ 0x2000 /* EPR5-bit: Kernel space readable */ 72 73/* Wrapper for extended mode pgprot twiddling */ 74#define _PAGE_EXT(x) ((unsigned long long)(x) << 32) 75 76/* software: moves to PTEA.TC (Timing Control) */ 77#define _PAGE_PCC_AREA5 0x00000000 /* use BSC registers for area5 */ 78#define _PAGE_PCC_AREA6 0x80000000 /* use BSC registers for area6 */ 79 80/* software: moves to PTEA.SA[2:0] (Space Attributes) */ 81#define _PAGE_PCC_IODYN 0x00000001 /* IO space, dynamically sized bus */ 82#define _PAGE_PCC_IO8 0x20000000 /* IO space, 8 bit bus */ 83#define _PAGE_PCC_IO16 0x20000001 /* IO space, 16 bit bus */ 84#define _PAGE_PCC_COM8 0x40000000 /* Common Memory space, 8 bit bus */ 85#define _PAGE_PCC_COM16 0x40000001 /* Common Memory space, 16 bit bus */ 86#define _PAGE_PCC_ATR8 0x60000000 /* Attribute Memory space, 8 bit bus */ 87#define _PAGE_PCC_ATR16 0x60000001 /* Attribute Memory space, 6 bit bus */ 88 89/* Mask which drops unused bits from the PTEL value */ 90#if defined(CONFIG_CPU_SH3) 91#define _PAGE_CLEAR_FLAGS (_PAGE_PROTNONE | _PAGE_ACCESSED| \ 92 _PAGE_FILE | _PAGE_SZ1 | \ 93 _PAGE_HW_SHARED) 94#elif defined(CONFIG_X2TLB) 95/* Get rid of the legacy PR/SZ bits when using extended mode */ 96#define _PAGE_CLEAR_FLAGS (_PAGE_PROTNONE | _PAGE_ACCESSED | \ 97 _PAGE_FILE | _PAGE_PR_MASK | _PAGE_SZ_MASK) 98#else 99#define _PAGE_CLEAR_FLAGS (_PAGE_PROTNONE | _PAGE_ACCESSED | _PAGE_FILE) 100#endif 101 102#define _PAGE_FLAGS_HARDWARE_MASK (PHYS_ADDR_MASK & ~(_PAGE_CLEAR_FLAGS)) 103 104/* Hardware flags, page size encoding */ 105#if defined(CONFIG_X2TLB) 106# if defined(CONFIG_PAGE_SIZE_4KB) 107# define _PAGE_FLAGS_HARD _PAGE_EXT(_PAGE_EXT_ESZ0) 108# elif defined(CONFIG_PAGE_SIZE_8KB) 109# define _PAGE_FLAGS_HARD _PAGE_EXT(_PAGE_EXT_ESZ1) 110# elif defined(CONFIG_PAGE_SIZE_64KB) 111# define _PAGE_FLAGS_HARD _PAGE_EXT(_PAGE_EXT_ESZ2) 112# endif 113#else 114# if defined(CONFIG_PAGE_SIZE_4KB) 115# define _PAGE_FLAGS_HARD _PAGE_SZ0 116# elif defined(CONFIG_PAGE_SIZE_64KB) 117# define _PAGE_FLAGS_HARD _PAGE_SZ1 118# endif 119#endif 120 121#if defined(CONFIG_X2TLB) 122# if defined(CONFIG_HUGETLB_PAGE_SIZE_64K) 123# define _PAGE_SZHUGE (_PAGE_EXT_ESZ2) 124# elif defined(CONFIG_HUGETLB_PAGE_SIZE_256K) 125# define _PAGE_SZHUGE (_PAGE_EXT_ESZ0 | _PAGE_EXT_ESZ2) 126# elif defined(CONFIG_HUGETLB_PAGE_SIZE_1MB) 127# define _PAGE_SZHUGE (_PAGE_EXT_ESZ0 | _PAGE_EXT_ESZ1 | _PAGE_EXT_ESZ2) 128# elif defined(CONFIG_HUGETLB_PAGE_SIZE_4MB) 129# define _PAGE_SZHUGE (_PAGE_EXT_ESZ3) 130# elif defined(CONFIG_HUGETLB_PAGE_SIZE_64MB) 131# define _PAGE_SZHUGE (_PAGE_EXT_ESZ2 | _PAGE_EXT_ESZ3) 132# endif 133#else 134# if defined(CONFIG_HUGETLB_PAGE_SIZE_64K) 135# define _PAGE_SZHUGE (_PAGE_SZ1) 136# elif defined(CONFIG_HUGETLB_PAGE_SIZE_1MB) 137# define _PAGE_SZHUGE (_PAGE_SZ0 | _PAGE_SZ1) 138# endif 139#endif 140 141/* 142 * Stub out _PAGE_SZHUGE if we don't have a good definition for it, 143 * to make pte_mkhuge() happy. 144 */ 145#ifndef _PAGE_SZHUGE 146# define _PAGE_SZHUGE (_PAGE_FLAGS_HARD) 147#endif 148 149#define _PAGE_CHG_MASK \ 150 (PTE_MASK | _PAGE_ACCESSED | _PAGE_CACHABLE | _PAGE_DIRTY) 151 152#ifndef __ASSEMBLY__ 153 154#if defined(CONFIG_X2TLB) /* SH-X2 TLB */ 155#define PAGE_NONE __pgprot(_PAGE_PROTNONE | _PAGE_CACHABLE | \ 156 _PAGE_ACCESSED | _PAGE_FLAGS_HARD) 157 158#define PAGE_SHARED __pgprot(_PAGE_PRESENT | _PAGE_ACCESSED | \ 159 _PAGE_CACHABLE | _PAGE_FLAGS_HARD | \ 160 _PAGE_EXT(_PAGE_EXT_KERN_READ | \ 161 _PAGE_EXT_KERN_WRITE | \ 162 _PAGE_EXT_USER_READ | \ 163 _PAGE_EXT_USER_WRITE)) 164 165#define PAGE_EXECREAD __pgprot(_PAGE_PRESENT | _PAGE_ACCESSED | \ 166 _PAGE_CACHABLE | _PAGE_FLAGS_HARD | \ 167 _PAGE_EXT(_PAGE_EXT_KERN_EXEC | \ 168 _PAGE_EXT_KERN_READ | \ 169 _PAGE_EXT_USER_EXEC | \ 170 _PAGE_EXT_USER_READ)) 171 172#define PAGE_COPY PAGE_EXECREAD 173 174#define PAGE_READONLY __pgprot(_PAGE_PRESENT | _PAGE_ACCESSED | \ 175 _PAGE_CACHABLE | _PAGE_FLAGS_HARD | \ 176 _PAGE_EXT(_PAGE_EXT_KERN_READ | \ 177 _PAGE_EXT_USER_READ)) 178 179#define PAGE_WRITEONLY __pgprot(_PAGE_PRESENT | _PAGE_ACCESSED | \ 180 _PAGE_CACHABLE | _PAGE_FLAGS_HARD | \ 181 _PAGE_EXT(_PAGE_EXT_KERN_WRITE | \ 182 _PAGE_EXT_USER_WRITE)) 183 184#define PAGE_RWX __pgprot(_PAGE_PRESENT | _PAGE_ACCESSED | \ 185 _PAGE_CACHABLE | _PAGE_FLAGS_HARD | \ 186 _PAGE_EXT(_PAGE_EXT_KERN_WRITE | \ 187 _PAGE_EXT_KERN_READ | \ 188 _PAGE_EXT_KERN_EXEC | \ 189 _PAGE_EXT_USER_WRITE | \ 190 _PAGE_EXT_USER_READ | \ 191 _PAGE_EXT_USER_EXEC)) 192 193#define PAGE_KERNEL __pgprot(_PAGE_PRESENT | _PAGE_CACHABLE | \ 194 _PAGE_DIRTY | _PAGE_ACCESSED | \ 195 _PAGE_HW_SHARED | _PAGE_FLAGS_HARD | \ 196 _PAGE_EXT(_PAGE_EXT_KERN_READ | \ 197 _PAGE_EXT_KERN_WRITE | \ 198 _PAGE_EXT_KERN_EXEC)) 199 200#define PAGE_KERNEL_NOCACHE \ 201 __pgprot(_PAGE_PRESENT | _PAGE_DIRTY | \ 202 _PAGE_ACCESSED | _PAGE_HW_SHARED | \ 203 _PAGE_FLAGS_HARD | \ 204 _PAGE_EXT(_PAGE_EXT_KERN_READ | \ 205 _PAGE_EXT_KERN_WRITE | \ 206 _PAGE_EXT_KERN_EXEC)) 207 208#define PAGE_KERNEL_RO __pgprot(_PAGE_PRESENT | _PAGE_CACHABLE | \ 209 _PAGE_DIRTY | _PAGE_ACCESSED | \ 210 _PAGE_HW_SHARED | _PAGE_FLAGS_HARD | \ 211 _PAGE_EXT(_PAGE_EXT_KERN_READ | \ 212 _PAGE_EXT_KERN_EXEC)) 213 214#define PAGE_KERNEL_PCC(slot, type) \ 215 __pgprot(_PAGE_PRESENT | _PAGE_DIRTY | \ 216 _PAGE_ACCESSED | _PAGE_FLAGS_HARD | \ 217 _PAGE_EXT(_PAGE_EXT_KERN_READ | \ 218 _PAGE_EXT_KERN_WRITE | \ 219 _PAGE_EXT_KERN_EXEC) \ 220 (slot ? _PAGE_PCC_AREA5 : _PAGE_PCC_AREA6) | \ 221 (type)) 222 223#elif defined(CONFIG_MMU) /* SH-X TLB */ 224#define PAGE_NONE __pgprot(_PAGE_PROTNONE | _PAGE_CACHABLE | \ 225 _PAGE_ACCESSED | _PAGE_FLAGS_HARD) 226 227#define PAGE_SHARED __pgprot(_PAGE_PRESENT | _PAGE_RW | _PAGE_USER | \ 228 _PAGE_CACHABLE | _PAGE_ACCESSED | \ 229 _PAGE_FLAGS_HARD) 230 231#define PAGE_COPY __pgprot(_PAGE_PRESENT | _PAGE_USER | _PAGE_CACHABLE | \ 232 _PAGE_ACCESSED | _PAGE_FLAGS_HARD) 233 234#define PAGE_READONLY __pgprot(_PAGE_PRESENT | _PAGE_USER | _PAGE_CACHABLE | \ 235 _PAGE_ACCESSED | _PAGE_FLAGS_HARD) 236 237#define PAGE_EXECREAD PAGE_READONLY 238#define PAGE_RWX PAGE_SHARED 239#define PAGE_WRITEONLY PAGE_SHARED 240 241#define PAGE_KERNEL __pgprot(_PAGE_PRESENT | _PAGE_RW | _PAGE_CACHABLE | \ 242 _PAGE_DIRTY | _PAGE_ACCESSED | \ 243 _PAGE_HW_SHARED | _PAGE_FLAGS_HARD) 244 245#define PAGE_KERNEL_NOCACHE \ 246 __pgprot(_PAGE_PRESENT | _PAGE_RW | _PAGE_DIRTY | \ 247 _PAGE_ACCESSED | _PAGE_HW_SHARED | \ 248 _PAGE_FLAGS_HARD) 249 250#define PAGE_KERNEL_RO __pgprot(_PAGE_PRESENT | _PAGE_CACHABLE | \ 251 _PAGE_DIRTY | _PAGE_ACCESSED | \ 252 _PAGE_HW_SHARED | _PAGE_FLAGS_HARD) 253 254#define PAGE_KERNEL_PCC(slot, type) \ 255 __pgprot(_PAGE_PRESENT | _PAGE_RW | _PAGE_DIRTY | \ 256 _PAGE_ACCESSED | _PAGE_FLAGS_HARD | \ 257 (slot ? _PAGE_PCC_AREA5 : _PAGE_PCC_AREA6) | \ 258 (type)) 259#else /* no mmu */ 260#define PAGE_NONE __pgprot(0) 261#define PAGE_SHARED __pgprot(0) 262#define PAGE_COPY __pgprot(0) 263#define PAGE_EXECREAD __pgprot(0) 264#define PAGE_RWX __pgprot(0) 265#define PAGE_READONLY __pgprot(0) 266#define PAGE_WRITEONLY __pgprot(0) 267#define PAGE_KERNEL __pgprot(0) 268#define PAGE_KERNEL_NOCACHE __pgprot(0) 269#define PAGE_KERNEL_RO __pgprot(0) 270 271#define PAGE_KERNEL_PCC(slot, type) \ 272 __pgprot(0) 273#endif 274 275#endif /* __ASSEMBLY__ */ 276 277#ifndef __ASSEMBLY__ 278 279/* 280 * Certain architectures need to do special things when PTEs 281 * within a page table are directly modified. Thus, the following 282 * hook is made available. 283 */ 284#ifdef CONFIG_X2TLB 285static inline void set_pte(pte_t *ptep, pte_t pte) 286{ 287 ptep->pte_high = pte.pte_high; 288 smp_wmb(); 289 ptep->pte_low = pte.pte_low; 290} 291#else 292#define set_pte(pteptr, pteval) (*(pteptr) = pteval) 293#endif 294 295#define set_pte_at(mm,addr,ptep,pteval) set_pte(ptep,pteval) 296 297/* 298 * (pmds are folded into pgds so this doesn't get actually called, 299 * but the define is needed for a generic inline function.) 300 */ 301#define set_pmd(pmdptr, pmdval) (*(pmdptr) = pmdval) 302 303#define pfn_pte(pfn, prot) \ 304 __pte(((unsigned long long)(pfn) << PAGE_SHIFT) | pgprot_val(prot)) 305#define pfn_pmd(pfn, prot) \ 306 __pmd(((unsigned long long)(pfn) << PAGE_SHIFT) | pgprot_val(prot)) 307 308#define pte_none(x) (!pte_val(x)) 309#define pte_present(x) ((x).pte_low & (_PAGE_PRESENT | _PAGE_PROTNONE)) 310 311#define pte_clear(mm,addr,xp) do { set_pte_at(mm, addr, xp, __pte(0)); } while (0) 312 313#define pmd_none(x) (!pmd_val(x)) 314#define pmd_present(x) (pmd_val(x)) 315#define pmd_clear(xp) do { set_pmd(xp, __pmd(0)); } while (0) 316#define pmd_bad(x) (pmd_val(x) & ~PAGE_MASK) 317 318#define pages_to_mb(x) ((x) >> (20-PAGE_SHIFT)) 319#define pte_page(x) pfn_to_page(pte_pfn(x)) 320 321/* 322 * The following only work if pte_present() is true. 323 * Undefined behaviour if not.. 324 */ 325#define pte_not_present(pte) (!((pte).pte_low & _PAGE_PRESENT)) 326#define pte_dirty(pte) ((pte).pte_low & _PAGE_DIRTY) 327#define pte_young(pte) ((pte).pte_low & _PAGE_ACCESSED) 328#define pte_file(pte) ((pte).pte_low & _PAGE_FILE) 329#define pte_special(pte) (0) 330 331#ifdef CONFIG_X2TLB 332#define pte_write(pte) ((pte).pte_high & _PAGE_EXT_USER_WRITE) 333#else 334#define pte_write(pte) ((pte).pte_low & _PAGE_RW) 335#endif 336 337#define PTE_BIT_FUNC(h,fn,op) \ 338static inline pte_t pte_##fn(pte_t pte) { pte.pte_##h op; return pte; } 339 340#ifdef CONFIG_X2TLB 341/* 342 * We cheat a bit in the SH-X2 TLB case. As the permission bits are 343 * individually toggled (and user permissions are entirely decoupled from 344 * kernel permissions), we attempt to couple them a bit more sanely here. 345 */ 346PTE_BIT_FUNC(high, wrprotect, &= ~_PAGE_EXT_USER_WRITE); 347PTE_BIT_FUNC(high, mkwrite, |= _PAGE_EXT_USER_WRITE | _PAGE_EXT_KERN_WRITE); 348PTE_BIT_FUNC(high, mkhuge, |= _PAGE_SZHUGE); 349#else 350PTE_BIT_FUNC(low, wrprotect, &= ~_PAGE_RW); 351PTE_BIT_FUNC(low, mkwrite, |= _PAGE_RW); 352PTE_BIT_FUNC(low, mkhuge, |= _PAGE_SZHUGE); 353#endif 354 355PTE_BIT_FUNC(low, mkclean, &= ~_PAGE_DIRTY); 356PTE_BIT_FUNC(low, mkdirty, |= _PAGE_DIRTY); 357PTE_BIT_FUNC(low, mkold, &= ~_PAGE_ACCESSED); 358PTE_BIT_FUNC(low, mkyoung, |= _PAGE_ACCESSED); 359 360static inline pte_t pte_mkspecial(pte_t pte) { return pte; } 361 362/* 363 * Macro and implementation to make a page protection as uncachable. 364 */ 365#define pgprot_writecombine(prot) \ 366 __pgprot(pgprot_val(prot) & ~_PAGE_CACHABLE) 367 368#define pgprot_noncached pgprot_writecombine 369 370/* 371 * Conversion functions: convert a page and protection to a page entry, 372 * and a page entry and page directory to the page they refer to. 373 * 374 * extern pte_t mk_pte(struct page *page, pgprot_t pgprot) 375 */ 376#define mk_pte(page, pgprot) pfn_pte(page_to_pfn(page), (pgprot)) 377 378static inline pte_t pte_modify(pte_t pte, pgprot_t newprot) 379{ 380 pte.pte_low &= _PAGE_CHG_MASK; 381 pte.pte_low |= pgprot_val(newprot); 382 383#ifdef CONFIG_X2TLB 384 pte.pte_high |= pgprot_val(newprot) >> 32; 385#endif 386 387 return pte; 388} 389 390#define pmd_page_vaddr(pmd) ((unsigned long)pmd_val(pmd)) 391#define pmd_page(pmd) (virt_to_page(pmd_val(pmd))) 392 393/* to find an entry in a page-table-directory. */ 394#define pgd_index(address) (((address) >> PGDIR_SHIFT) & (PTRS_PER_PGD-1)) 395#define pgd_offset(mm, address) ((mm)->pgd+pgd_index(address)) 396 397/* to find an entry in a kernel page-table-directory */ 398#define pgd_offset_k(address) pgd_offset(&init_mm, address) 399 400/* Find an entry in the third-level page table.. */ 401#define pte_index(address) ((address >> PAGE_SHIFT) & (PTRS_PER_PTE - 1)) 402#define pte_offset_kernel(dir, address) \ 403 ((pte_t *) pmd_page_vaddr(*(dir)) + pte_index(address)) 404#define pte_offset_map(dir, address) pte_offset_kernel(dir, address) 405#define pte_offset_map_nested(dir, address) pte_offset_kernel(dir, address) 406 407#define pte_unmap(pte) do { } while (0) 408#define pte_unmap_nested(pte) do { } while (0) 409 410#ifdef CONFIG_X2TLB 411#define pte_ERROR(e) \ 412 printk("%s:%d: bad pte %p(%08lx%08lx).\n", __FILE__, __LINE__, \ 413 &(e), (e).pte_high, (e).pte_low) 414#define pgd_ERROR(e) \ 415 printk("%s:%d: bad pgd %016llx.\n", __FILE__, __LINE__, pgd_val(e)) 416#else 417#define pte_ERROR(e) \ 418 printk("%s:%d: bad pte %08lx.\n", __FILE__, __LINE__, pte_val(e)) 419#define pgd_ERROR(e) \ 420 printk("%s:%d: bad pgd %08lx.\n", __FILE__, __LINE__, pgd_val(e)) 421#endif 422 423/* 424 * Encode and de-code a swap entry 425 * 426 * Constraints: 427 * _PAGE_FILE at bit 0 428 * _PAGE_PRESENT at bit 8 429 * _PAGE_PROTNONE at bit 9 430 * 431 * For the normal case, we encode the swap type into bits 0:7 and the 432 * swap offset into bits 10:30. For the 64-bit PTE case, we keep the 433 * preserved bits in the low 32-bits and use the upper 32 as the swap 434 * offset (along with a 5-bit type), following the same approach as x86 435 * PAE. This keeps the logic quite simple, and allows for a full 32 436 * PTE_FILE_MAX_BITS, as opposed to the 29-bits we're constrained with 437 * in the pte_low case. 438 * 439 * As is evident by the Alpha code, if we ever get a 64-bit unsigned 440 * long (swp_entry_t) to match up with the 64-bit PTEs, this all becomes 441 * much cleaner.. 442 * 443 * NOTE: We should set ZEROs at the position of _PAGE_PRESENT 444 * and _PAGE_PROTNONE bits 445 */ 446#ifdef CONFIG_X2TLB 447#define __swp_type(x) ((x).val & 0x1f) 448#define __swp_offset(x) ((x).val >> 5) 449#define __swp_entry(type, offset) ((swp_entry_t){ (type) | (offset) << 5}) 450#define __pte_to_swp_entry(pte) ((swp_entry_t){ (pte).pte_high }) 451#define __swp_entry_to_pte(x) ((pte_t){ 0, (x).val }) 452 453/* 454 * Encode and decode a nonlinear file mapping entry 455 */ 456#define pte_to_pgoff(pte) ((pte).pte_high) 457#define pgoff_to_pte(off) ((pte_t) { _PAGE_FILE, (off) }) 458 459#define PTE_FILE_MAX_BITS 32 460#else 461#define __swp_type(x) ((x).val & 0xff) 462#define __swp_offset(x) ((x).val >> 10) 463#define __swp_entry(type, offset) ((swp_entry_t){(type) | (offset) <<10}) 464 465#define __pte_to_swp_entry(pte) ((swp_entry_t) { pte_val(pte) >> 1 }) 466#define __swp_entry_to_pte(x) ((pte_t) { (x).val << 1 }) 467 468/* 469 * Encode and decode a nonlinear file mapping entry 470 */ 471#define PTE_FILE_MAX_BITS 29 472#define pte_to_pgoff(pte) (pte_val(pte) >> 1) 473#define pgoff_to_pte(off) ((pte_t) { ((off) << 1) | _PAGE_FILE }) 474#endif 475 476#endif /* __ASSEMBLY__ */ 477#endif /* __ASM_SH_PGTABLE_32_H */