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kernel os linux
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1/* atarilance.c: Ethernet driver for VME Lance cards on the Atari */ 2/* 3 Written 1995/96 by Roman Hodek (Roman.Hodek@informatik.uni-erlangen.de) 4 5 This software may be used and distributed according to the terms 6 of the GNU General Public License, incorporated herein by reference. 7 8 This drivers was written with the following sources of reference: 9 - The driver for the Riebl Lance card by the TU Vienna. 10 - The modified TUW driver for PAM's VME cards 11 - The PC-Linux driver for Lance cards (but this is for bus master 12 cards, not the shared memory ones) 13 - The Amiga Ariadne driver 14 15 v1.0: (in 1.2.13pl4/0.9.13) 16 Initial version 17 v1.1: (in 1.2.13pl5) 18 more comments 19 deleted some debugging stuff 20 optimized register access (keep AREG pointing to CSR0) 21 following AMD, CSR0_STRT should be set only after IDON is detected 22 use memcpy() for data transfers, that also employs long word moves 23 better probe procedure for 24-bit systems 24 non-VME-RieblCards need extra delays in memcpy 25 must also do write test, since 0xfxe00000 may hit ROM 26 use 8/32 tx/rx buffers, which should give better NFS performance; 27 this is made possible by shifting the last packet buffer after the 28 RieblCard reserved area 29 v1.2: (in 1.2.13pl8) 30 again fixed probing for the Falcon; 0xfe01000 hits phys. 0x00010000 31 and thus RAM, in case of no Lance found all memory contents have to 32 be restored! 33 Now possible to compile as module. 34 v1.3: 03/30/96 Jes Sorensen, Roman (in 1.3) 35 Several little 1.3 adaptions 36 When the lance is stopped it jumps back into little-endian 37 mode. It is therefore necessary to put it back where it 38 belongs, in big endian mode, in order to make things work. 39 This might be the reason why multicast-mode didn't work 40 before, but I'm not able to test it as I only got an Amiga 41 (we had similar problems with the A2065 driver). 42 43*/ 44 45static char version[] = "atarilance.c: v1.3 04/04/96 " 46 "Roman.Hodek@informatik.uni-erlangen.de\n"; 47 48#include <linux/netdevice.h> 49#include <linux/etherdevice.h> 50#include <linux/module.h> 51#include <linux/stddef.h> 52#include <linux/kernel.h> 53#include <linux/string.h> 54#include <linux/errno.h> 55#include <linux/skbuff.h> 56#include <linux/slab.h> 57#include <linux/interrupt.h> 58#include <linux/init.h> 59#include <linux/bitops.h> 60 61#include <asm/setup.h> 62#include <asm/irq.h> 63#include <asm/atarihw.h> 64#include <asm/atariints.h> 65#include <asm/io.h> 66 67/* Debug level: 68 * 0 = silent, print only serious errors 69 * 1 = normal, print error messages 70 * 2 = debug, print debug infos 71 * 3 = debug, print even more debug infos (packet data) 72 */ 73 74#define LANCE_DEBUG 1 75 76#ifdef LANCE_DEBUG 77static int lance_debug = LANCE_DEBUG; 78#else 79static int lance_debug = 1; 80#endif 81module_param(lance_debug, int, 0); 82MODULE_PARM_DESC(lance_debug, "atarilance debug level (0-3)"); 83MODULE_LICENSE("GPL"); 84 85/* Print debug messages on probing? */ 86#undef LANCE_DEBUG_PROBE 87 88#define DPRINTK(n,a) \ 89 do { \ 90 if (lance_debug >= n) \ 91 printk a; \ 92 } while( 0 ) 93 94#ifdef LANCE_DEBUG_PROBE 95# define PROBE_PRINT(a) printk a 96#else 97# define PROBE_PRINT(a) 98#endif 99 100/* These define the number of Rx and Tx buffers as log2. (Only powers 101 * of two are valid) 102 * Much more rx buffers (32) are reserved than tx buffers (8), since receiving 103 * is more time critical then sending and packets may have to remain in the 104 * board's memory when main memory is low. 105 */ 106 107#define TX_LOG_RING_SIZE 3 108#define RX_LOG_RING_SIZE 5 109 110/* These are the derived values */ 111 112#define TX_RING_SIZE (1 << TX_LOG_RING_SIZE) 113#define TX_RING_LEN_BITS (TX_LOG_RING_SIZE << 5) 114#define TX_RING_MOD_MASK (TX_RING_SIZE - 1) 115 116#define RX_RING_SIZE (1 << RX_LOG_RING_SIZE) 117#define RX_RING_LEN_BITS (RX_LOG_RING_SIZE << 5) 118#define RX_RING_MOD_MASK (RX_RING_SIZE - 1) 119 120#define TX_TIMEOUT 20 121 122/* The LANCE Rx and Tx ring descriptors. */ 123struct lance_rx_head { 124 unsigned short base; /* Low word of base addr */ 125 volatile unsigned char flag; 126 unsigned char base_hi; /* High word of base addr (unused) */ 127 short buf_length; /* This length is 2s complement! */ 128 volatile short msg_length; /* This length is "normal". */ 129}; 130 131struct lance_tx_head { 132 unsigned short base; /* Low word of base addr */ 133 volatile unsigned char flag; 134 unsigned char base_hi; /* High word of base addr (unused) */ 135 short length; /* Length is 2s complement! */ 136 volatile short misc; 137}; 138 139struct ringdesc { 140 unsigned short adr_lo; /* Low 16 bits of address */ 141 unsigned char len; /* Length bits */ 142 unsigned char adr_hi; /* High 8 bits of address (unused) */ 143}; 144 145/* The LANCE initialization block, described in databook. */ 146struct lance_init_block { 147 unsigned short mode; /* Pre-set mode */ 148 unsigned char hwaddr[6]; /* Physical ethernet address */ 149 unsigned filter[2]; /* Multicast filter (unused). */ 150 /* Receive and transmit ring base, along with length bits. */ 151 struct ringdesc rx_ring; 152 struct ringdesc tx_ring; 153}; 154 155/* The whole layout of the Lance shared memory */ 156struct lance_memory { 157 struct lance_init_block init; 158 struct lance_tx_head tx_head[TX_RING_SIZE]; 159 struct lance_rx_head rx_head[RX_RING_SIZE]; 160 char packet_area[0]; /* packet data follow after the 161 * init block and the ring 162 * descriptors and are located 163 * at runtime */ 164}; 165 166/* RieblCard specifics: 167 * The original TOS driver for these cards reserves the area from offset 168 * 0xee70 to 0xeebb for storing configuration data. Of interest to us is the 169 * Ethernet address there, and the magic for verifying the data's validity. 170 * The reserved area isn't touch by packet buffers. Furthermore, offset 0xfffe 171 * is reserved for the interrupt vector number. 172 */ 173#define RIEBL_RSVD_START 0xee70 174#define RIEBL_RSVD_END 0xeec0 175#define RIEBL_MAGIC 0x09051990 176#define RIEBL_MAGIC_ADDR ((unsigned long *)(((char *)MEM) + 0xee8a)) 177#define RIEBL_HWADDR_ADDR ((unsigned char *)(((char *)MEM) + 0xee8e)) 178#define RIEBL_IVEC_ADDR ((unsigned short *)(((char *)MEM) + 0xfffe)) 179 180/* This is a default address for the old RieblCards without a battery 181 * that have no ethernet address at boot time. 00:00:36:04 is the 182 * prefix for Riebl cards, the 00:00 at the end is arbitrary. 183 */ 184 185static unsigned char OldRieblDefHwaddr[6] = { 186 0x00, 0x00, 0x36, 0x04, 0x00, 0x00 187}; 188 189 190/* I/O registers of the Lance chip */ 191 192struct lance_ioreg { 193/* base+0x0 */ volatile unsigned short data; 194/* base+0x2 */ volatile unsigned short addr; 195 unsigned char _dummy1[3]; 196/* base+0x7 */ volatile unsigned char ivec; 197 unsigned char _dummy2[5]; 198/* base+0xd */ volatile unsigned char eeprom; 199 unsigned char _dummy3; 200/* base+0xf */ volatile unsigned char mem; 201}; 202 203/* Types of boards this driver supports */ 204 205enum lance_type { 206 OLD_RIEBL, /* old Riebl card without battery */ 207 NEW_RIEBL, /* new Riebl card with battery */ 208 PAM_CARD /* PAM card with EEPROM */ 209}; 210 211static char *lance_names[] = { 212 "Riebl-Card (without battery)", 213 "Riebl-Card (with battery)", 214 "PAM intern card" 215}; 216 217/* The driver's private device structure */ 218 219struct lance_private { 220 enum lance_type cardtype; 221 struct lance_ioreg *iobase; 222 struct lance_memory *mem; 223 int cur_rx, cur_tx; /* The next free ring entry */ 224 int dirty_tx; /* Ring entries to be freed. */ 225 /* copy function */ 226 void *(*memcpy_f)( void *, const void *, size_t ); 227/* This must be long for set_bit() */ 228 long tx_full; 229 spinlock_t devlock; 230}; 231 232/* I/O register access macros */ 233 234#define MEM lp->mem 235#define DREG IO->data 236#define AREG IO->addr 237#define REGA(a) (*( AREG = (a), &DREG )) 238 239/* Definitions for packet buffer access: */ 240#define PKT_BUF_SZ 1544 241/* Get the address of a packet buffer corresponding to a given buffer head */ 242#define PKTBUF_ADDR(head) (((unsigned char *)(MEM)) + (head)->base) 243 244/* Possible memory/IO addresses for probing */ 245 246struct lance_addr { 247 unsigned long memaddr; 248 unsigned long ioaddr; 249 int slow_flag; 250} lance_addr_list[] = { 251 { 0xfe010000, 0xfe00fff0, 0 }, /* RieblCard VME in TT */ 252 { 0xffc10000, 0xffc0fff0, 0 }, /* RieblCard VME in MegaSTE 253 (highest byte stripped) */ 254 { 0xffe00000, 0xffff7000, 1 }, /* RieblCard in ST 255 (highest byte stripped) */ 256 { 0xffd00000, 0xffff7000, 1 }, /* RieblCard in ST with hw modif. to 257 avoid conflict with ROM 258 (highest byte stripped) */ 259 { 0xffcf0000, 0xffcffff0, 0 }, /* PAMCard VME in TT and MSTE 260 (highest byte stripped) */ 261 { 0xfecf0000, 0xfecffff0, 0 }, /* Rhotron's PAMCard VME in TT and MSTE 262 (highest byte stripped) */ 263}; 264 265#define N_LANCE_ADDR ARRAY_SIZE(lance_addr_list) 266 267 268/* Definitions for the Lance */ 269 270/* tx_head flags */ 271#define TMD1_ENP 0x01 /* end of packet */ 272#define TMD1_STP 0x02 /* start of packet */ 273#define TMD1_DEF 0x04 /* deferred */ 274#define TMD1_ONE 0x08 /* one retry needed */ 275#define TMD1_MORE 0x10 /* more than one retry needed */ 276#define TMD1_ERR 0x40 /* error summary */ 277#define TMD1_OWN 0x80 /* ownership (set: chip owns) */ 278 279#define TMD1_OWN_CHIP TMD1_OWN 280#define TMD1_OWN_HOST 0 281 282/* tx_head misc field */ 283#define TMD3_TDR 0x03FF /* Time Domain Reflectometry counter */ 284#define TMD3_RTRY 0x0400 /* failed after 16 retries */ 285#define TMD3_LCAR 0x0800 /* carrier lost */ 286#define TMD3_LCOL 0x1000 /* late collision */ 287#define TMD3_UFLO 0x4000 /* underflow (late memory) */ 288#define TMD3_BUFF 0x8000 /* buffering error (no ENP) */ 289 290/* rx_head flags */ 291#define RMD1_ENP 0x01 /* end of packet */ 292#define RMD1_STP 0x02 /* start of packet */ 293#define RMD1_BUFF 0x04 /* buffer error */ 294#define RMD1_CRC 0x08 /* CRC error */ 295#define RMD1_OFLO 0x10 /* overflow */ 296#define RMD1_FRAM 0x20 /* framing error */ 297#define RMD1_ERR 0x40 /* error summary */ 298#define RMD1_OWN 0x80 /* ownership (set: ship owns) */ 299 300#define RMD1_OWN_CHIP RMD1_OWN 301#define RMD1_OWN_HOST 0 302 303/* register names */ 304#define CSR0 0 /* mode/status */ 305#define CSR1 1 /* init block addr (low) */ 306#define CSR2 2 /* init block addr (high) */ 307#define CSR3 3 /* misc */ 308#define CSR8 8 /* address filter */ 309#define CSR15 15 /* promiscuous mode */ 310 311/* CSR0 */ 312/* (R=readable, W=writeable, S=set on write, C=clear on write) */ 313#define CSR0_INIT 0x0001 /* initialize (RS) */ 314#define CSR0_STRT 0x0002 /* start (RS) */ 315#define CSR0_STOP 0x0004 /* stop (RS) */ 316#define CSR0_TDMD 0x0008 /* transmit demand (RS) */ 317#define CSR0_TXON 0x0010 /* transmitter on (R) */ 318#define CSR0_RXON 0x0020 /* receiver on (R) */ 319#define CSR0_INEA 0x0040 /* interrupt enable (RW) */ 320#define CSR0_INTR 0x0080 /* interrupt active (R) */ 321#define CSR0_IDON 0x0100 /* initialization done (RC) */ 322#define CSR0_TINT 0x0200 /* transmitter interrupt (RC) */ 323#define CSR0_RINT 0x0400 /* receiver interrupt (RC) */ 324#define CSR0_MERR 0x0800 /* memory error (RC) */ 325#define CSR0_MISS 0x1000 /* missed frame (RC) */ 326#define CSR0_CERR 0x2000 /* carrier error (no heartbeat :-) (RC) */ 327#define CSR0_BABL 0x4000 /* babble: tx-ed too many bits (RC) */ 328#define CSR0_ERR 0x8000 /* error (RC) */ 329 330/* CSR3 */ 331#define CSR3_BCON 0x0001 /* byte control */ 332#define CSR3_ACON 0x0002 /* ALE control */ 333#define CSR3_BSWP 0x0004 /* byte swap (1=big endian) */ 334 335 336 337/***************************** Prototypes *****************************/ 338 339static unsigned long lance_probe1( struct net_device *dev, struct lance_addr 340 *init_rec ); 341static int lance_open( struct net_device *dev ); 342static void lance_init_ring( struct net_device *dev ); 343static int lance_start_xmit( struct sk_buff *skb, struct net_device *dev ); 344static irqreturn_t lance_interrupt( int irq, void *dev_id ); 345static int lance_rx( struct net_device *dev ); 346static int lance_close( struct net_device *dev ); 347static void set_multicast_list( struct net_device *dev ); 348static int lance_set_mac_address( struct net_device *dev, void *addr ); 349static void lance_tx_timeout (struct net_device *dev); 350 351/************************* End of Prototypes **************************/ 352 353 354 355 356 357static void *slow_memcpy( void *dst, const void *src, size_t len ) 358 359{ char *cto = dst; 360 const char *cfrom = src; 361 362 while( len-- ) { 363 *cto++ = *cfrom++; 364 MFPDELAY(); 365 } 366 return( dst ); 367} 368 369 370struct net_device * __init atarilance_probe(int unit) 371{ 372 int i; 373 static int found; 374 struct net_device *dev; 375 int err = -ENODEV; 376 377 if (!MACH_IS_ATARI || found) 378 /* Assume there's only one board possible... That seems true, since 379 * the Riebl/PAM board's address cannot be changed. */ 380 return ERR_PTR(-ENODEV); 381 382 dev = alloc_etherdev(sizeof(struct lance_private)); 383 if (!dev) 384 return ERR_PTR(-ENOMEM); 385 if (unit >= 0) { 386 sprintf(dev->name, "eth%d", unit); 387 netdev_boot_setup_check(dev); 388 } 389 390 for( i = 0; i < N_LANCE_ADDR; ++i ) { 391 if (lance_probe1( dev, &lance_addr_list[i] )) { 392 found = 1; 393 err = register_netdev(dev); 394 if (!err) 395 return dev; 396 free_irq(dev->irq, dev); 397 break; 398 } 399 } 400 free_netdev(dev); 401 return ERR_PTR(err); 402} 403 404 405/* Derived from hwreg_present() in atari/config.c: */ 406 407static noinline int __init addr_accessible(volatile void *regp, int wordflag, 408 int writeflag) 409{ 410 int ret; 411 long flags; 412 long *vbr, save_berr; 413 414 local_irq_save(flags); 415 416 __asm__ __volatile__ ( "movec %/vbr,%0" : "=r" (vbr) : ); 417 save_berr = vbr[2]; 418 419 __asm__ __volatile__ 420 ( "movel %/sp,%/d1\n\t" 421 "movel #Lberr,%2@\n\t" 422 "moveq #0,%0\n\t" 423 "tstl %3\n\t" 424 "bne 1f\n\t" 425 "moveb %1@,%/d0\n\t" 426 "nop \n\t" 427 "bra 2f\n" 428"1: movew %1@,%/d0\n\t" 429 "nop \n" 430"2: tstl %4\n\t" 431 "beq 2f\n\t" 432 "tstl %3\n\t" 433 "bne 1f\n\t" 434 "clrb %1@\n\t" 435 "nop \n\t" 436 "moveb %/d0,%1@\n\t" 437 "nop \n\t" 438 "bra 2f\n" 439"1: clrw %1@\n\t" 440 "nop \n\t" 441 "movew %/d0,%1@\n\t" 442 "nop \n" 443"2: moveq #1,%0\n" 444"Lberr: movel %/d1,%/sp" 445 : "=&d" (ret) 446 : "a" (regp), "a" (&vbr[2]), "rm" (wordflag), "rm" (writeflag) 447 : "d0", "d1", "memory" 448 ); 449 450 vbr[2] = save_berr; 451 local_irq_restore(flags); 452 453 return( ret ); 454} 455 456 457static unsigned long __init lance_probe1( struct net_device *dev, 458 struct lance_addr *init_rec ) 459{ 460 volatile unsigned short *memaddr = 461 (volatile unsigned short *)init_rec->memaddr; 462 volatile unsigned short *ioaddr = 463 (volatile unsigned short *)init_rec->ioaddr; 464 struct lance_private *lp; 465 struct lance_ioreg *IO; 466 int i; 467 static int did_version; 468 unsigned short save1, save2; 469 DECLARE_MAC_BUF(mac); 470 471 PROBE_PRINT(( "Probing for Lance card at mem %#lx io %#lx\n", 472 (long)memaddr, (long)ioaddr )); 473 474 /* Test whether memory readable and writable */ 475 PROBE_PRINT(( "lance_probe1: testing memory to be accessible\n" )); 476 if (!addr_accessible( memaddr, 1, 1 )) goto probe_fail; 477 478 /* Written values should come back... */ 479 PROBE_PRINT(( "lance_probe1: testing memory to be writable (1)\n" )); 480 save1 = *memaddr; 481 *memaddr = 0x0001; 482 if (*memaddr != 0x0001) goto probe_fail; 483 PROBE_PRINT(( "lance_probe1: testing memory to be writable (2)\n" )); 484 *memaddr = 0x0000; 485 if (*memaddr != 0x0000) goto probe_fail; 486 *memaddr = save1; 487 488 /* First port should be readable and writable */ 489 PROBE_PRINT(( "lance_probe1: testing ioport to be accessible\n" )); 490 if (!addr_accessible( ioaddr, 1, 1 )) goto probe_fail; 491 492 /* and written values should be readable */ 493 PROBE_PRINT(( "lance_probe1: testing ioport to be writeable\n" )); 494 save2 = ioaddr[1]; 495 ioaddr[1] = 0x0001; 496 if (ioaddr[1] != 0x0001) goto probe_fail; 497 498 /* The CSR0_INIT bit should not be readable */ 499 PROBE_PRINT(( "lance_probe1: testing CSR0 register function (1)\n" )); 500 save1 = ioaddr[0]; 501 ioaddr[1] = CSR0; 502 ioaddr[0] = CSR0_INIT | CSR0_STOP; 503 if (ioaddr[0] != CSR0_STOP) { 504 ioaddr[0] = save1; 505 ioaddr[1] = save2; 506 goto probe_fail; 507 } 508 PROBE_PRINT(( "lance_probe1: testing CSR0 register function (2)\n" )); 509 ioaddr[0] = CSR0_STOP; 510 if (ioaddr[0] != CSR0_STOP) { 511 ioaddr[0] = save1; 512 ioaddr[1] = save2; 513 goto probe_fail; 514 } 515 516 /* Now ok... */ 517 PROBE_PRINT(( "lance_probe1: Lance card detected\n" )); 518 goto probe_ok; 519 520 probe_fail: 521 return( 0 ); 522 523 probe_ok: 524 lp = (struct lance_private *)dev->priv; 525 MEM = (struct lance_memory *)memaddr; 526 IO = lp->iobase = (struct lance_ioreg *)ioaddr; 527 dev->base_addr = (unsigned long)ioaddr; /* informational only */ 528 lp->memcpy_f = init_rec->slow_flag ? slow_memcpy : memcpy; 529 530 REGA( CSR0 ) = CSR0_STOP; 531 532 /* Now test for type: If the eeprom I/O port is readable, it is a 533 * PAM card */ 534 if (addr_accessible( &(IO->eeprom), 0, 0 )) { 535 /* Switch back to Ram */ 536 i = IO->mem; 537 lp->cardtype = PAM_CARD; 538 } 539 else if (*RIEBL_MAGIC_ADDR == RIEBL_MAGIC) { 540 lp->cardtype = NEW_RIEBL; 541 } 542 else 543 lp->cardtype = OLD_RIEBL; 544 545 if (lp->cardtype == PAM_CARD || 546 memaddr == (unsigned short *)0xffe00000) { 547 /* PAMs card and Riebl on ST use level 5 autovector */ 548 if (request_irq(IRQ_AUTO_5, lance_interrupt, IRQ_TYPE_PRIO, 549 "PAM/Riebl-ST Ethernet", dev)) { 550 printk( "Lance: request for irq %d failed\n", IRQ_AUTO_5 ); 551 return( 0 ); 552 } 553 dev->irq = (unsigned short)IRQ_AUTO_5; 554 } 555 else { 556 /* For VME-RieblCards, request a free VME int; 557 * (This must be unsigned long, since dev->irq is short and the 558 * IRQ_MACHSPEC bit would be cut off...) 559 */ 560 unsigned long irq = atari_register_vme_int(); 561 if (!irq) { 562 printk( "Lance: request for VME interrupt failed\n" ); 563 return( 0 ); 564 } 565 if (request_irq(irq, lance_interrupt, IRQ_TYPE_PRIO, 566 "Riebl-VME Ethernet", dev)) { 567 printk( "Lance: request for irq %ld failed\n", irq ); 568 return( 0 ); 569 } 570 dev->irq = irq; 571 } 572 573 printk("%s: %s at io %#lx, mem %#lx, irq %d%s, hwaddr ", 574 dev->name, lance_names[lp->cardtype], 575 (unsigned long)ioaddr, 576 (unsigned long)memaddr, 577 dev->irq, 578 init_rec->slow_flag ? " (slow memcpy)" : "" ); 579 580 /* Get the ethernet address */ 581 switch( lp->cardtype ) { 582 case OLD_RIEBL: 583 /* No ethernet address! (Set some default address) */ 584 memcpy( dev->dev_addr, OldRieblDefHwaddr, 6 ); 585 break; 586 case NEW_RIEBL: 587 lp->memcpy_f( dev->dev_addr, RIEBL_HWADDR_ADDR, 6 ); 588 break; 589 case PAM_CARD: 590 i = IO->eeprom; 591 for( i = 0; i < 6; ++i ) 592 dev->dev_addr[i] = 593 ((((unsigned short *)MEM)[i*2] & 0x0f) << 4) | 594 ((((unsigned short *)MEM)[i*2+1] & 0x0f)); 595 i = IO->mem; 596 break; 597 } 598 printk("%s\n", print_mac(mac, dev->dev_addr)); 599 if (lp->cardtype == OLD_RIEBL) { 600 printk( "%s: Warning: This is a default ethernet address!\n", 601 dev->name ); 602 printk( " Use \"ifconfig hw ether ...\" to set the address.\n" ); 603 } 604 605 spin_lock_init(&lp->devlock); 606 607 MEM->init.mode = 0x0000; /* Disable Rx and Tx. */ 608 for( i = 0; i < 6; i++ ) 609 MEM->init.hwaddr[i] = dev->dev_addr[i^1]; /* <- 16 bit swap! */ 610 MEM->init.filter[0] = 0x00000000; 611 MEM->init.filter[1] = 0x00000000; 612 MEM->init.rx_ring.adr_lo = offsetof( struct lance_memory, rx_head ); 613 MEM->init.rx_ring.adr_hi = 0; 614 MEM->init.rx_ring.len = RX_RING_LEN_BITS; 615 MEM->init.tx_ring.adr_lo = offsetof( struct lance_memory, tx_head ); 616 MEM->init.tx_ring.adr_hi = 0; 617 MEM->init.tx_ring.len = TX_RING_LEN_BITS; 618 619 if (lp->cardtype == PAM_CARD) 620 IO->ivec = IRQ_SOURCE_TO_VECTOR(dev->irq); 621 else 622 *RIEBL_IVEC_ADDR = IRQ_SOURCE_TO_VECTOR(dev->irq); 623 624 if (did_version++ == 0) 625 DPRINTK( 1, ( version )); 626 627 /* The LANCE-specific entries in the device structure. */ 628 dev->open = &lance_open; 629 dev->hard_start_xmit = &lance_start_xmit; 630 dev->stop = &lance_close; 631 dev->set_multicast_list = &set_multicast_list; 632 dev->set_mac_address = &lance_set_mac_address; 633 634 /* XXX MSch */ 635 dev->tx_timeout = lance_tx_timeout; 636 dev->watchdog_timeo = TX_TIMEOUT; 637 638 return( 1 ); 639} 640 641 642static int lance_open( struct net_device *dev ) 643 644{ struct lance_private *lp = (struct lance_private *)dev->priv; 645 struct lance_ioreg *IO = lp->iobase; 646 int i; 647 648 DPRINTK( 2, ( "%s: lance_open()\n", dev->name )); 649 650 lance_init_ring(dev); 651 /* Re-initialize the LANCE, and start it when done. */ 652 653 REGA( CSR3 ) = CSR3_BSWP | (lp->cardtype == PAM_CARD ? CSR3_ACON : 0); 654 REGA( CSR2 ) = 0; 655 REGA( CSR1 ) = 0; 656 REGA( CSR0 ) = CSR0_INIT; 657 /* From now on, AREG is kept to point to CSR0 */ 658 659 i = 1000000; 660 while (--i > 0) 661 if (DREG & CSR0_IDON) 662 break; 663 if (i < 0 || (DREG & CSR0_ERR)) { 664 DPRINTK( 2, ( "lance_open(): opening %s failed, i=%d, csr0=%04x\n", 665 dev->name, i, DREG )); 666 DREG = CSR0_STOP; 667 return( -EIO ); 668 } 669 DREG = CSR0_IDON; 670 DREG = CSR0_STRT; 671 DREG = CSR0_INEA; 672 673 netif_start_queue (dev); 674 675 DPRINTK( 2, ( "%s: LANCE is open, csr0 %04x\n", dev->name, DREG )); 676 677 return( 0 ); 678} 679 680 681/* Initialize the LANCE Rx and Tx rings. */ 682 683static void lance_init_ring( struct net_device *dev ) 684 685{ struct lance_private *lp = (struct lance_private *)dev->priv; 686 int i; 687 unsigned offset; 688 689 lp->tx_full = 0; 690 lp->cur_rx = lp->cur_tx = 0; 691 lp->dirty_tx = 0; 692 693 offset = offsetof( struct lance_memory, packet_area ); 694 695/* If the packet buffer at offset 'o' would conflict with the reserved area 696 * of RieblCards, advance it */ 697#define CHECK_OFFSET(o) \ 698 do { \ 699 if (lp->cardtype == OLD_RIEBL || lp->cardtype == NEW_RIEBL) { \ 700 if (((o) < RIEBL_RSVD_START) ? (o)+PKT_BUF_SZ > RIEBL_RSVD_START \ 701 : (o) < RIEBL_RSVD_END) \ 702 (o) = RIEBL_RSVD_END; \ 703 } \ 704 } while(0) 705 706 for( i = 0; i < TX_RING_SIZE; i++ ) { 707 CHECK_OFFSET(offset); 708 MEM->tx_head[i].base = offset; 709 MEM->tx_head[i].flag = TMD1_OWN_HOST; 710 MEM->tx_head[i].base_hi = 0; 711 MEM->tx_head[i].length = 0; 712 MEM->tx_head[i].misc = 0; 713 offset += PKT_BUF_SZ; 714 } 715 716 for( i = 0; i < RX_RING_SIZE; i++ ) { 717 CHECK_OFFSET(offset); 718 MEM->rx_head[i].base = offset; 719 MEM->rx_head[i].flag = TMD1_OWN_CHIP; 720 MEM->rx_head[i].base_hi = 0; 721 MEM->rx_head[i].buf_length = -PKT_BUF_SZ; 722 MEM->rx_head[i].msg_length = 0; 723 offset += PKT_BUF_SZ; 724 } 725} 726 727 728/* XXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXX */ 729 730 731static void lance_tx_timeout (struct net_device *dev) 732{ 733 struct lance_private *lp = (struct lance_private *) dev->priv; 734 struct lance_ioreg *IO = lp->iobase; 735 736 AREG = CSR0; 737 DPRINTK( 1, ( "%s: transmit timed out, status %04x, resetting.\n", 738 dev->name, DREG )); 739 DREG = CSR0_STOP; 740 /* 741 * Always set BSWP after a STOP as STOP puts it back into 742 * little endian mode. 743 */ 744 REGA( CSR3 ) = CSR3_BSWP | (lp->cardtype == PAM_CARD ? CSR3_ACON : 0); 745 dev->stats.tx_errors++; 746#ifndef final_version 747 { int i; 748 DPRINTK( 2, ( "Ring data: dirty_tx %d cur_tx %d%s cur_rx %d\n", 749 lp->dirty_tx, lp->cur_tx, 750 lp->tx_full ? " (full)" : "", 751 lp->cur_rx )); 752 for( i = 0 ; i < RX_RING_SIZE; i++ ) 753 DPRINTK( 2, ( "rx #%d: base=%04x blen=%04x mlen=%04x\n", 754 i, MEM->rx_head[i].base, 755 -MEM->rx_head[i].buf_length, 756 MEM->rx_head[i].msg_length )); 757 for( i = 0 ; i < TX_RING_SIZE; i++ ) 758 DPRINTK( 2, ( "tx #%d: base=%04x len=%04x misc=%04x\n", 759 i, MEM->tx_head[i].base, 760 -MEM->tx_head[i].length, 761 MEM->tx_head[i].misc )); 762 } 763#endif 764 /* XXX MSch: maybe purge/reinit ring here */ 765 /* lance_restart, essentially */ 766 lance_init_ring(dev); 767 REGA( CSR0 ) = CSR0_INEA | CSR0_INIT | CSR0_STRT; 768 dev->trans_start = jiffies; 769 netif_wake_queue (dev); 770} 771 772/* XXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXX */ 773 774static int lance_start_xmit( struct sk_buff *skb, struct net_device *dev ) 775 776{ struct lance_private *lp = (struct lance_private *)dev->priv; 777 struct lance_ioreg *IO = lp->iobase; 778 int entry, len; 779 struct lance_tx_head *head; 780 unsigned long flags; 781 DECLARE_MAC_BUF(mac); 782 DECLARE_MAC_BUF(mac2); 783 784 DPRINTK( 2, ( "%s: lance_start_xmit() called, csr0 %4.4x.\n", 785 dev->name, DREG )); 786 787 788 /* The old LANCE chips doesn't automatically pad buffers to min. size. */ 789 len = skb->len; 790 if (len < ETH_ZLEN) 791 len = ETH_ZLEN; 792 /* PAM-Card has a bug: Can only send packets with even number of bytes! */ 793 else if (lp->cardtype == PAM_CARD && (len & 1)) 794 ++len; 795 796 if (len > skb->len) { 797 if (skb_padto(skb, len)) 798 return 0; 799 } 800 801 netif_stop_queue (dev); 802 803 /* Fill in a Tx ring entry */ 804 if (lance_debug >= 3) { 805 printk( "%s: TX pkt type 0x%04x from " 806 "%s to %s" 807 " data at 0x%08x len %d\n", 808 dev->name, ((u_short *)skb->data)[6], 809 print_mac(mac, &skb->data[6]), 810 print_mac(mac2, skb->data), 811 (int)skb->data, (int)skb->len ); 812 } 813 814 /* We're not prepared for the int until the last flags are set/reset. And 815 * the int may happen already after setting the OWN_CHIP... */ 816 spin_lock_irqsave (&lp->devlock, flags); 817 818 /* Mask to ring buffer boundary. */ 819 entry = lp->cur_tx & TX_RING_MOD_MASK; 820 head = &(MEM->tx_head[entry]); 821 822 /* Caution: the write order is important here, set the "ownership" bits 823 * last. 824 */ 825 826 827 head->length = -len; 828 head->misc = 0; 829 lp->memcpy_f( PKTBUF_ADDR(head), (void *)skb->data, skb->len ); 830 head->flag = TMD1_OWN_CHIP | TMD1_ENP | TMD1_STP; 831 dev->stats.tx_bytes += skb->len; 832 dev_kfree_skb( skb ); 833 lp->cur_tx++; 834 while( lp->cur_tx >= TX_RING_SIZE && lp->dirty_tx >= TX_RING_SIZE ) { 835 lp->cur_tx -= TX_RING_SIZE; 836 lp->dirty_tx -= TX_RING_SIZE; 837 } 838 839 /* Trigger an immediate send poll. */ 840 DREG = CSR0_INEA | CSR0_TDMD; 841 dev->trans_start = jiffies; 842 843 if ((MEM->tx_head[(entry+1) & TX_RING_MOD_MASK].flag & TMD1_OWN) == 844 TMD1_OWN_HOST) 845 netif_start_queue (dev); 846 else 847 lp->tx_full = 1; 848 spin_unlock_irqrestore (&lp->devlock, flags); 849 850 return 0; 851} 852 853/* The LANCE interrupt handler. */ 854 855static irqreturn_t lance_interrupt( int irq, void *dev_id ) 856{ 857 struct net_device *dev = dev_id; 858 struct lance_private *lp; 859 struct lance_ioreg *IO; 860 int csr0, boguscnt = 10; 861 int handled = 0; 862 863 if (dev == NULL) { 864 DPRINTK( 1, ( "lance_interrupt(): interrupt for unknown device.\n" )); 865 return IRQ_NONE; 866 } 867 868 lp = (struct lance_private *)dev->priv; 869 IO = lp->iobase; 870 spin_lock (&lp->devlock); 871 872 AREG = CSR0; 873 874 while( ((csr0 = DREG) & (CSR0_ERR | CSR0_TINT | CSR0_RINT)) && 875 --boguscnt >= 0) { 876 handled = 1; 877 /* Acknowledge all of the current interrupt sources ASAP. */ 878 DREG = csr0 & ~(CSR0_INIT | CSR0_STRT | CSR0_STOP | 879 CSR0_TDMD | CSR0_INEA); 880 881 DPRINTK( 2, ( "%s: interrupt csr0=%04x new csr=%04x.\n", 882 dev->name, csr0, DREG )); 883 884 if (csr0 & CSR0_RINT) /* Rx interrupt */ 885 lance_rx( dev ); 886 887 if (csr0 & CSR0_TINT) { /* Tx-done interrupt */ 888 int dirty_tx = lp->dirty_tx; 889 890 while( dirty_tx < lp->cur_tx) { 891 int entry = dirty_tx & TX_RING_MOD_MASK; 892 int status = MEM->tx_head[entry].flag; 893 894 if (status & TMD1_OWN_CHIP) 895 break; /* It still hasn't been Txed */ 896 897 MEM->tx_head[entry].flag = 0; 898 899 if (status & TMD1_ERR) { 900 /* There was an major error, log it. */ 901 int err_status = MEM->tx_head[entry].misc; 902 dev->stats.tx_errors++; 903 if (err_status & TMD3_RTRY) dev->stats.tx_aborted_errors++; 904 if (err_status & TMD3_LCAR) dev->stats.tx_carrier_errors++; 905 if (err_status & TMD3_LCOL) dev->stats.tx_window_errors++; 906 if (err_status & TMD3_UFLO) { 907 /* Ackk! On FIFO errors the Tx unit is turned off! */ 908 dev->stats.tx_fifo_errors++; 909 /* Remove this verbosity later! */ 910 DPRINTK( 1, ( "%s: Tx FIFO error! Status %04x\n", 911 dev->name, csr0 )); 912 /* Restart the chip. */ 913 DREG = CSR0_STRT; 914 } 915 } else { 916 if (status & (TMD1_MORE | TMD1_ONE | TMD1_DEF)) 917 dev->stats.collisions++; 918 dev->stats.tx_packets++; 919 } 920 921 /* XXX MSch: free skb?? */ 922 dirty_tx++; 923 } 924 925#ifndef final_version 926 if (lp->cur_tx - dirty_tx >= TX_RING_SIZE) { 927 DPRINTK( 0, ( "out-of-sync dirty pointer," 928 " %d vs. %d, full=%ld.\n", 929 dirty_tx, lp->cur_tx, lp->tx_full )); 930 dirty_tx += TX_RING_SIZE; 931 } 932#endif 933 934 if (lp->tx_full && (netif_queue_stopped(dev)) 935 && dirty_tx > lp->cur_tx - TX_RING_SIZE + 2) { 936 /* The ring is no longer full, clear tbusy. */ 937 lp->tx_full = 0; 938 netif_wake_queue (dev); 939 } 940 941 lp->dirty_tx = dirty_tx; 942 } 943 944 /* Log misc errors. */ 945 if (csr0 & CSR0_BABL) dev->stats.tx_errors++; /* Tx babble. */ 946 if (csr0 & CSR0_MISS) dev->stats.rx_errors++; /* Missed a Rx frame. */ 947 if (csr0 & CSR0_MERR) { 948 DPRINTK( 1, ( "%s: Bus master arbitration failure (?!?), " 949 "status %04x.\n", dev->name, csr0 )); 950 /* Restart the chip. */ 951 DREG = CSR0_STRT; 952 } 953 } 954 955 /* Clear any other interrupt, and set interrupt enable. */ 956 DREG = CSR0_BABL | CSR0_CERR | CSR0_MISS | CSR0_MERR | 957 CSR0_IDON | CSR0_INEA; 958 959 DPRINTK( 2, ( "%s: exiting interrupt, csr0=%#04x.\n", 960 dev->name, DREG )); 961 962 spin_unlock (&lp->devlock); 963 return IRQ_RETVAL(handled); 964} 965 966 967static int lance_rx( struct net_device *dev ) 968 969{ struct lance_private *lp = (struct lance_private *)dev->priv; 970 int entry = lp->cur_rx & RX_RING_MOD_MASK; 971 int i; 972 973 DPRINTK( 2, ( "%s: rx int, flag=%04x\n", dev->name, 974 MEM->rx_head[entry].flag )); 975 976 /* If we own the next entry, it's a new packet. Send it up. */ 977 while( (MEM->rx_head[entry].flag & RMD1_OWN) == RMD1_OWN_HOST ) { 978 struct lance_rx_head *head = &(MEM->rx_head[entry]); 979 int status = head->flag; 980 981 if (status != (RMD1_ENP|RMD1_STP)) { /* There was an error. */ 982 /* There is a tricky error noted by John Murphy, 983 <murf@perftech.com> to Russ Nelson: Even with full-sized 984 buffers it's possible for a jabber packet to use two 985 buffers, with only the last correctly noting the error. */ 986 if (status & RMD1_ENP) /* Only count a general error at the */ 987 dev->stats.rx_errors++; /* end of a packet.*/ 988 if (status & RMD1_FRAM) dev->stats.rx_frame_errors++; 989 if (status & RMD1_OFLO) dev->stats.rx_over_errors++; 990 if (status & RMD1_CRC) dev->stats.rx_crc_errors++; 991 if (status & RMD1_BUFF) dev->stats.rx_fifo_errors++; 992 head->flag &= (RMD1_ENP|RMD1_STP); 993 } else { 994 /* Malloc up new buffer, compatible with net-3. */ 995 short pkt_len = head->msg_length & 0xfff; 996 struct sk_buff *skb; 997 998 if (pkt_len < 60) { 999 printk( "%s: Runt packet!\n", dev->name ); 1000 dev->stats.rx_errors++; 1001 } 1002 else { 1003 skb = dev_alloc_skb( pkt_len+2 ); 1004 if (skb == NULL) { 1005 DPRINTK( 1, ( "%s: Memory squeeze, deferring packet.\n", 1006 dev->name )); 1007 for( i = 0; i < RX_RING_SIZE; i++ ) 1008 if (MEM->rx_head[(entry+i) & RX_RING_MOD_MASK].flag & 1009 RMD1_OWN_CHIP) 1010 break; 1011 1012 if (i > RX_RING_SIZE - 2) { 1013 dev->stats.rx_dropped++; 1014 head->flag |= RMD1_OWN_CHIP; 1015 lp->cur_rx++; 1016 } 1017 break; 1018 } 1019 1020 if (lance_debug >= 3) { 1021 u_char *data = PKTBUF_ADDR(head); 1022 DECLARE_MAC_BUF(mac); 1023 DECLARE_MAC_BUF(mac2); 1024 1025 printk(KERN_DEBUG "%s: RX pkt type 0x%04x from %s to %s " 1026 "data %02x %02x %02x %02x %02x %02x %02x %02x " 1027 "len %d\n", 1028 dev->name, ((u_short *)data)[6], 1029 print_mac(mac, &data[6]), print_mac(mac2, data), 1030 data[15], data[16], data[17], data[18], 1031 data[19], data[20], data[21], data[22], 1032 pkt_len); 1033 } 1034 1035 skb_reserve( skb, 2 ); /* 16 byte align */ 1036 skb_put( skb, pkt_len ); /* Make room */ 1037 lp->memcpy_f( skb->data, PKTBUF_ADDR(head), pkt_len ); 1038 skb->protocol = eth_type_trans( skb, dev ); 1039 netif_rx( skb ); 1040 dev->last_rx = jiffies; 1041 dev->stats.rx_packets++; 1042 dev->stats.rx_bytes += pkt_len; 1043 } 1044 } 1045 1046 head->flag |= RMD1_OWN_CHIP; 1047 entry = (++lp->cur_rx) & RX_RING_MOD_MASK; 1048 } 1049 lp->cur_rx &= RX_RING_MOD_MASK; 1050 1051 /* From lance.c (Donald Becker): */ 1052 /* We should check that at least two ring entries are free. If not, 1053 we should free one and mark stats->rx_dropped++. */ 1054 1055 return 0; 1056} 1057 1058 1059static int lance_close( struct net_device *dev ) 1060 1061{ struct lance_private *lp = (struct lance_private *)dev->priv; 1062 struct lance_ioreg *IO = lp->iobase; 1063 1064 netif_stop_queue (dev); 1065 1066 AREG = CSR0; 1067 1068 DPRINTK( 2, ( "%s: Shutting down ethercard, status was %2.2x.\n", 1069 dev->name, DREG )); 1070 1071 /* We stop the LANCE here -- it occasionally polls 1072 memory if we don't. */ 1073 DREG = CSR0_STOP; 1074 1075 return 0; 1076} 1077 1078 1079/* Set or clear the multicast filter for this adaptor. 1080 num_addrs == -1 Promiscuous mode, receive all packets 1081 num_addrs == 0 Normal mode, clear multicast list 1082 num_addrs > 0 Multicast mode, receive normal and MC packets, and do 1083 best-effort filtering. 1084 */ 1085 1086static void set_multicast_list( struct net_device *dev ) 1087 1088{ struct lance_private *lp = (struct lance_private *)dev->priv; 1089 struct lance_ioreg *IO = lp->iobase; 1090 1091 if (netif_running(dev)) 1092 /* Only possible if board is already started */ 1093 return; 1094 1095 /* We take the simple way out and always enable promiscuous mode. */ 1096 DREG = CSR0_STOP; /* Temporarily stop the lance. */ 1097 1098 if (dev->flags & IFF_PROMISC) { 1099 /* Log any net taps. */ 1100 DPRINTK( 2, ( "%s: Promiscuous mode enabled.\n", dev->name )); 1101 REGA( CSR15 ) = 0x8000; /* Set promiscuous mode */ 1102 } else { 1103 short multicast_table[4]; 1104 int num_addrs = dev->mc_count; 1105 int i; 1106 /* We don't use the multicast table, but rely on upper-layer 1107 * filtering. */ 1108 memset( multicast_table, (num_addrs == 0) ? 0 : -1, 1109 sizeof(multicast_table) ); 1110 for( i = 0; i < 4; i++ ) 1111 REGA( CSR8+i ) = multicast_table[i]; 1112 REGA( CSR15 ) = 0; /* Unset promiscuous mode */ 1113 } 1114 1115 /* 1116 * Always set BSWP after a STOP as STOP puts it back into 1117 * little endian mode. 1118 */ 1119 REGA( CSR3 ) = CSR3_BSWP | (lp->cardtype == PAM_CARD ? CSR3_ACON : 0); 1120 1121 /* Resume normal operation and reset AREG to CSR0 */ 1122 REGA( CSR0 ) = CSR0_IDON | CSR0_INEA | CSR0_STRT; 1123} 1124 1125 1126/* This is needed for old RieblCards and possible for new RieblCards */ 1127 1128static int lance_set_mac_address( struct net_device *dev, void *addr ) 1129 1130{ struct lance_private *lp = (struct lance_private *)dev->priv; 1131 struct sockaddr *saddr = addr; 1132 int i; 1133 1134 if (lp->cardtype != OLD_RIEBL && lp->cardtype != NEW_RIEBL) 1135 return( -EOPNOTSUPP ); 1136 1137 if (netif_running(dev)) { 1138 /* Only possible while card isn't started */ 1139 DPRINTK( 1, ( "%s: hwaddr can be set only while card isn't open.\n", 1140 dev->name )); 1141 return( -EIO ); 1142 } 1143 1144 memcpy( dev->dev_addr, saddr->sa_data, dev->addr_len ); 1145 for( i = 0; i < 6; i++ ) 1146 MEM->init.hwaddr[i] = dev->dev_addr[i^1]; /* <- 16 bit swap! */ 1147 lp->memcpy_f( RIEBL_HWADDR_ADDR, dev->dev_addr, 6 ); 1148 /* set also the magic for future sessions */ 1149 *RIEBL_MAGIC_ADDR = RIEBL_MAGIC; 1150 1151 return( 0 ); 1152} 1153 1154 1155#ifdef MODULE 1156static struct net_device *atarilance_dev; 1157 1158static int __init atarilance_module_init(void) 1159{ 1160 atarilance_dev = atarilance_probe(-1); 1161 if (IS_ERR(atarilance_dev)) 1162 return PTR_ERR(atarilance_dev); 1163 return 0; 1164} 1165 1166static void __exit atarilance_module_exit(void) 1167{ 1168 unregister_netdev(atarilance_dev); 1169 free_irq(atarilance_dev->irq, atarilance_dev); 1170 free_netdev(atarilance_dev); 1171} 1172module_init(atarilance_module_init); 1173module_exit(atarilance_module_exit); 1174#endif /* MODULE */ 1175 1176 1177/* 1178 * Local variables: 1179 * c-indent-level: 4 1180 * tab-width: 4 1181 * End: 1182 */