tjh.dev
Linux kernel mirror (for testing)
git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel
os
linux
1/*
2 * Geode GX display controller
3 *
4 * Copyright (C) 2006 Arcom Control Systems Ltd.
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version.
10 */
11#ifndef __DISPLAY_GX_H__
12#define __DISPLAY_GX_H__
13
14unsigned int gx_frame_buffer_size(void);
15int gx_line_delta(int xres, int bpp);
16
17extern struct geode_dc_ops gx_dc_ops;
18
19/* MSR that tells us if a TFT or CRT is attached */
20#define GLD_MSR_CONFIG 0xC0002001
21#define GLD_MSR_CONFIG_DM_FP 0x40
22
23/* Display controller registers */
24
25#define DC_UNLOCK 0x00
26# define DC_UNLOCK_CODE 0x00004758
27
28#define DC_GENERAL_CFG 0x04
29# define DC_GCFG_DFLE 0x00000001
30# define DC_GCFG_CURE 0x00000002
31# define DC_GCFG_ICNE 0x00000004
32# define DC_GCFG_VIDE 0x00000008
33# define DC_GCFG_CMPE 0x00000020
34# define DC_GCFG_DECE 0x00000040
35# define DC_GCFG_VGAE 0x00000080
36# define DC_GCFG_DFHPSL_MASK 0x00000F00
37# define DC_GCFG_DFHPSL_POS 8
38# define DC_GCFG_DFHPEL_MASK 0x0000F000
39# define DC_GCFG_DFHPEL_POS 12
40# define DC_GCFG_STFM 0x00010000
41# define DC_GCFG_FDTY 0x00020000
42# define DC_GCFG_VGAFT 0x00040000
43# define DC_GCFG_VDSE 0x00080000
44# define DC_GCFG_YUVM 0x00100000
45# define DC_GCFG_VFSL 0x00800000
46# define DC_GCFG_SIGE 0x01000000
47# define DC_GCFG_SGRE 0x02000000
48# define DC_GCFG_SGFR 0x04000000
49# define DC_GCFG_CRC_MODE 0x08000000
50# define DC_GCFG_DIAG 0x10000000
51# define DC_GCFG_CFRW 0x20000000
52
53#define DC_DISPLAY_CFG 0x08
54# define DC_DCFG_TGEN 0x00000001
55# define DC_DCFG_GDEN 0x00000008
56# define DC_DCFG_VDEN 0x00000010
57# define DC_DCFG_TRUP 0x00000040
58# define DC_DCFG_DISP_MODE_MASK 0x00000300
59# define DC_DCFG_DISP_MODE_8BPP 0x00000000
60# define DC_DCFG_DISP_MODE_16BPP 0x00000100
61# define DC_DCFG_DISP_MODE_24BPP 0x00000200
62# define DC_DCFG_16BPP_MODE_MASK 0x00000c00
63# define DC_DCFG_16BPP_MODE_565 0x00000000
64# define DC_DCFG_16BPP_MODE_555 0x00000100
65# define DC_DCFG_16BPP_MODE_444 0x00000200
66# define DC_DCFG_DCEN 0x00080000
67# define DC_DCFG_PALB 0x02000000
68# define DC_DCFG_FRLK 0x04000000
69# define DC_DCFG_VISL 0x08000000
70# define DC_DCFG_FRSL 0x20000000
71# define DC_DCFG_A18M 0x40000000
72# define DC_DCFG_A20M 0x80000000
73
74#define DC_FB_ST_OFFSET 0x10
75
76#define DC_LINE_SIZE 0x30
77# define DC_LINE_SIZE_FB_LINE_SIZE_MASK 0x000007ff
78# define DC_LINE_SIZE_FB_LINE_SIZE_POS 0
79# define DC_LINE_SIZE_CB_LINE_SIZE_MASK 0x007f0000
80# define DC_LINE_SIZE_CB_LINE_SIZE_POS 16
81# define DC_LINE_SIZE_VID_LINE_SIZE_MASK 0xff000000
82# define DC_LINE_SIZE_VID_LINE_SIZE_POS 24
83
84#define DC_GFX_PITCH 0x34
85# define DC_GFX_PITCH_FB_PITCH_MASK 0x0000ffff
86# define DC_GFX_PITCH_FB_PITCH_POS 0
87# define DC_GFX_PITCH_CB_PITCH_MASK 0xffff0000
88# define DC_GFX_PITCH_CB_PITCH_POS 16
89
90#define DC_H_ACTIVE_TIMING 0x40
91#define DC_H_BLANK_TIMING 0x44
92#define DC_H_SYNC_TIMING 0x48
93#define DC_V_ACTIVE_TIMING 0x50
94#define DC_V_BLANK_TIMING 0x54
95#define DC_V_SYNC_TIMING 0x58
96
97#define DC_PAL_ADDRESS 0x70
98#define DC_PAL_DATA 0x74
99
100#define DC_GLIU0_MEM_OFFSET 0x84
101#endif /* !__DISPLAY_GX1_H__ */