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1#ifndef _ASM_POWERPC_PGTABLE_PPC64_H_
2#define _ASM_POWERPC_PGTABLE_PPC64_H_
3/*
4 * This file contains the functions and defines necessary to modify and use
5 * the ppc64 hashed page table.
6 */
7
8#ifndef __ASSEMBLY__
9#include <linux/stddef.h>
10#include <asm/tlbflush.h>
11#endif /* __ASSEMBLY__ */
12
13#ifdef CONFIG_PPC_64K_PAGES
14#include <asm/pgtable-64k.h>
15#else
16#include <asm/pgtable-4k.h>
17#endif
18
19#define FIRST_USER_ADDRESS 0
20
21/*
22 * Size of EA range mapped by our pagetables.
23 */
24#define PGTABLE_EADDR_SIZE (PTE_INDEX_SIZE + PMD_INDEX_SIZE + \
25 PUD_INDEX_SIZE + PGD_INDEX_SIZE + PAGE_SHIFT)
26#define PGTABLE_RANGE (ASM_CONST(1) << PGTABLE_EADDR_SIZE)
27
28#if TASK_SIZE_USER64 > PGTABLE_RANGE
29#error TASK_SIZE_USER64 exceeds pagetable range
30#endif
31
32#if TASK_SIZE_USER64 > (1UL << (USER_ESID_BITS + SID_SHIFT))
33#error TASK_SIZE_USER64 exceeds user VSID range
34#endif
35
36
37/*
38 * Define the address range of the vmalloc VM area.
39 */
40#define VMALLOC_START ASM_CONST(0xD000000000000000)
41#define VMALLOC_SIZE (PGTABLE_RANGE >> 1)
42#define VMALLOC_END (VMALLOC_START + VMALLOC_SIZE)
43
44/*
45 * Define the address ranges for MMIO and IO space :
46 *
47 * ISA_IO_BASE = VMALLOC_END, 64K reserved area
48 * PHB_IO_BASE = ISA_IO_BASE + 64K to ISA_IO_BASE + 2G, PHB IO spaces
49 * IOREMAP_BASE = ISA_IO_BASE + 2G to VMALLOC_START + PGTABLE_RANGE
50 */
51#define FULL_IO_SIZE 0x80000000ul
52#define ISA_IO_BASE (VMALLOC_END)
53#define ISA_IO_END (VMALLOC_END + 0x10000ul)
54#define PHB_IO_BASE (ISA_IO_END)
55#define PHB_IO_END (VMALLOC_END + FULL_IO_SIZE)
56#define IOREMAP_BASE (PHB_IO_END)
57#define IOREMAP_END (VMALLOC_START + PGTABLE_RANGE)
58
59/*
60 * Region IDs
61 */
62#define REGION_SHIFT 60UL
63#define REGION_MASK (0xfUL << REGION_SHIFT)
64#define REGION_ID(ea) (((unsigned long)(ea)) >> REGION_SHIFT)
65
66#define VMALLOC_REGION_ID (REGION_ID(VMALLOC_START))
67#define KERNEL_REGION_ID (REGION_ID(PAGE_OFFSET))
68#define USER_REGION_ID (0UL)
69
70/*
71 * Defines the address of the vmemap area, in the top 16th of the
72 * kernel region.
73 */
74#define VMEMMAP_BASE (ASM_CONST(CONFIG_KERNEL_START) + \
75 (0xfUL << (REGION_SHIFT - 4)))
76#define vmemmap ((struct page *)VMEMMAP_BASE)
77
78/*
79 * Common bits in a linux-style PTE. These match the bits in the
80 * (hardware-defined) PowerPC PTE as closely as possible. Additional
81 * bits may be defined in pgtable-*.h
82 */
83#define _PAGE_PRESENT 0x0001 /* software: pte contains a translation */
84#define _PAGE_USER 0x0002 /* matches one of the PP bits */
85#define _PAGE_FILE 0x0002 /* (!present only) software: pte holds file offset */
86#define _PAGE_EXEC 0x0004 /* No execute on POWER4 and newer (we invert) */
87#define _PAGE_GUARDED 0x0008
88#define _PAGE_COHERENT 0x0010 /* M: enforce memory coherence (SMP systems) */
89#define _PAGE_NO_CACHE 0x0020 /* I: cache inhibit */
90#define _PAGE_WRITETHRU 0x0040 /* W: cache write-through */
91#define _PAGE_DIRTY 0x0080 /* C: page changed */
92#define _PAGE_ACCESSED 0x0100 /* R: page referenced */
93#define _PAGE_RW 0x0200 /* software: user write access allowed */
94#define _PAGE_HASHPTE 0x0400 /* software: pte has an associated HPTE */
95#define _PAGE_BUSY 0x0800 /* software: PTE & hash are busy */
96
97#define _PAGE_BASE (_PAGE_PRESENT | _PAGE_ACCESSED | _PAGE_COHERENT)
98
99#define _PAGE_WRENABLE (_PAGE_RW | _PAGE_DIRTY)
100
101/* __pgprot defined in asm-powerpc/page.h */
102#define PAGE_NONE __pgprot(_PAGE_PRESENT | _PAGE_ACCESSED)
103
104#define PAGE_SHARED __pgprot(_PAGE_BASE | _PAGE_RW | _PAGE_USER)
105#define PAGE_SHARED_X __pgprot(_PAGE_BASE | _PAGE_RW | _PAGE_USER | _PAGE_EXEC)
106#define PAGE_COPY __pgprot(_PAGE_BASE | _PAGE_USER)
107#define PAGE_COPY_X __pgprot(_PAGE_BASE | _PAGE_USER | _PAGE_EXEC)
108#define PAGE_READONLY __pgprot(_PAGE_BASE | _PAGE_USER)
109#define PAGE_READONLY_X __pgprot(_PAGE_BASE | _PAGE_USER | _PAGE_EXEC)
110#define PAGE_KERNEL __pgprot(_PAGE_BASE | _PAGE_WRENABLE)
111#define PAGE_KERNEL_CI __pgprot(_PAGE_PRESENT | _PAGE_ACCESSED | \
112 _PAGE_WRENABLE | _PAGE_NO_CACHE | _PAGE_GUARDED)
113#define PAGE_KERNEL_EXEC __pgprot(_PAGE_BASE | _PAGE_WRENABLE | _PAGE_EXEC)
114
115#define PAGE_AGP __pgprot(_PAGE_BASE | _PAGE_WRENABLE | _PAGE_NO_CACHE)
116#define HAVE_PAGE_AGP
117
118/* PTEIDX nibble */
119#define _PTEIDX_SECONDARY 0x8
120#define _PTEIDX_GROUP_IX 0x7
121
122
123/*
124 * POWER4 and newer have per page execute protection, older chips can only
125 * do this on a segment (256MB) basis.
126 *
127 * Also, write permissions imply read permissions.
128 * This is the closest we can get..
129 *
130 * Note due to the way vm flags are laid out, the bits are XWR
131 */
132#define __P000 PAGE_NONE
133#define __P001 PAGE_READONLY
134#define __P010 PAGE_COPY
135#define __P011 PAGE_COPY
136#define __P100 PAGE_READONLY_X
137#define __P101 PAGE_READONLY_X
138#define __P110 PAGE_COPY_X
139#define __P111 PAGE_COPY_X
140
141#define __S000 PAGE_NONE
142#define __S001 PAGE_READONLY
143#define __S010 PAGE_SHARED
144#define __S011 PAGE_SHARED
145#define __S100 PAGE_READONLY_X
146#define __S101 PAGE_READONLY_X
147#define __S110 PAGE_SHARED_X
148#define __S111 PAGE_SHARED_X
149
150#ifdef CONFIG_HUGETLB_PAGE
151
152#define HAVE_ARCH_UNMAPPED_AREA
153#define HAVE_ARCH_UNMAPPED_AREA_TOPDOWN
154
155#endif
156
157#ifndef __ASSEMBLY__
158
159/*
160 * Conversion functions: convert a page and protection to a page entry,
161 * and a page entry and page directory to the page they refer to.
162 *
163 * mk_pte takes a (struct page *) as input
164 */
165#define mk_pte(page, pgprot) pfn_pte(page_to_pfn(page), (pgprot))
166
167static inline pte_t pfn_pte(unsigned long pfn, pgprot_t pgprot)
168{
169 pte_t pte;
170
171
172 pte_val(pte) = (pfn << PTE_RPN_SHIFT) | pgprot_val(pgprot);
173 return pte;
174}
175
176#define pte_modify(_pte, newprot) \
177 (__pte((pte_val(_pte) & _PAGE_CHG_MASK) | pgprot_val(newprot)))
178
179#define pte_none(pte) ((pte_val(pte) & ~_PAGE_HPTEFLAGS) == 0)
180#define pte_present(pte) (pte_val(pte) & _PAGE_PRESENT)
181
182/* pte_clear moved to later in this file */
183
184#define pte_pfn(x) ((unsigned long)((pte_val(x)>>PTE_RPN_SHIFT)))
185#define pte_page(x) pfn_to_page(pte_pfn(x))
186
187#define PMD_BAD_BITS (PTE_TABLE_SIZE-1)
188#define PUD_BAD_BITS (PMD_TABLE_SIZE-1)
189
190#define pmd_set(pmdp, pmdval) (pmd_val(*(pmdp)) = (pmdval))
191#define pmd_none(pmd) (!pmd_val(pmd))
192#define pmd_bad(pmd) (!is_kernel_addr(pmd_val(pmd)) \
193 || (pmd_val(pmd) & PMD_BAD_BITS))
194#define pmd_present(pmd) (pmd_val(pmd) != 0)
195#define pmd_clear(pmdp) (pmd_val(*(pmdp)) = 0)
196#define pmd_page_vaddr(pmd) (pmd_val(pmd) & ~PMD_MASKED_BITS)
197#define pmd_page(pmd) virt_to_page(pmd_page_vaddr(pmd))
198
199#define pud_set(pudp, pudval) (pud_val(*(pudp)) = (pudval))
200#define pud_none(pud) (!pud_val(pud))
201#define pud_bad(pud) (!is_kernel_addr(pud_val(pud)) \
202 || (pud_val(pud) & PUD_BAD_BITS))
203#define pud_present(pud) (pud_val(pud) != 0)
204#define pud_clear(pudp) (pud_val(*(pudp)) = 0)
205#define pud_page_vaddr(pud) (pud_val(pud) & ~PUD_MASKED_BITS)
206#define pud_page(pud) virt_to_page(pud_page_vaddr(pud))
207
208#define pgd_set(pgdp, pudp) ({pgd_val(*(pgdp)) = (unsigned long)(pudp);})
209
210/*
211 * Find an entry in a page-table-directory. We combine the address region
212 * (the high order N bits) and the pgd portion of the address.
213 */
214/* to avoid overflow in free_pgtables we don't use PTRS_PER_PGD here */
215#define pgd_index(address) (((address) >> (PGDIR_SHIFT)) & 0x1ff)
216
217#define pgd_offset(mm, address) ((mm)->pgd + pgd_index(address))
218
219#define pmd_offset(pudp,addr) \
220 (((pmd_t *) pud_page_vaddr(*(pudp))) + (((addr) >> PMD_SHIFT) & (PTRS_PER_PMD - 1)))
221
222#define pte_offset_kernel(dir,addr) \
223 (((pte_t *) pmd_page_vaddr(*(dir))) + (((addr) >> PAGE_SHIFT) & (PTRS_PER_PTE - 1)))
224
225#define pte_offset_map(dir,addr) pte_offset_kernel((dir), (addr))
226#define pte_offset_map_nested(dir,addr) pte_offset_kernel((dir), (addr))
227#define pte_unmap(pte) do { } while(0)
228#define pte_unmap_nested(pte) do { } while(0)
229
230/* to find an entry in a kernel page-table-directory */
231/* This now only contains the vmalloc pages */
232#define pgd_offset_k(address) pgd_offset(&init_mm, address)
233
234/*
235 * The following only work if pte_present() is true.
236 * Undefined behaviour if not..
237 */
238static inline int pte_write(pte_t pte) { return pte_val(pte) & _PAGE_RW;}
239static inline int pte_dirty(pte_t pte) { return pte_val(pte) & _PAGE_DIRTY;}
240static inline int pte_young(pte_t pte) { return pte_val(pte) & _PAGE_ACCESSED;}
241static inline int pte_file(pte_t pte) { return pte_val(pte) & _PAGE_FILE;}
242
243static inline void pte_uncache(pte_t pte) { pte_val(pte) |= _PAGE_NO_CACHE; }
244static inline void pte_cache(pte_t pte) { pte_val(pte) &= ~_PAGE_NO_CACHE; }
245
246static inline pte_t pte_wrprotect(pte_t pte) {
247 pte_val(pte) &= ~(_PAGE_RW); return pte; }
248static inline pte_t pte_mkclean(pte_t pte) {
249 pte_val(pte) &= ~(_PAGE_DIRTY); return pte; }
250static inline pte_t pte_mkold(pte_t pte) {
251 pte_val(pte) &= ~_PAGE_ACCESSED; return pte; }
252static inline pte_t pte_mkwrite(pte_t pte) {
253 pte_val(pte) |= _PAGE_RW; return pte; }
254static inline pte_t pte_mkdirty(pte_t pte) {
255 pte_val(pte) |= _PAGE_DIRTY; return pte; }
256static inline pte_t pte_mkyoung(pte_t pte) {
257 pte_val(pte) |= _PAGE_ACCESSED; return pte; }
258static inline pte_t pte_mkhuge(pte_t pte) {
259 return pte; }
260
261/* Atomic PTE updates */
262static inline unsigned long pte_update(struct mm_struct *mm,
263 unsigned long addr,
264 pte_t *ptep, unsigned long clr,
265 int huge)
266{
267 unsigned long old, tmp;
268
269 __asm__ __volatile__(
270 "1: ldarx %0,0,%3 # pte_update\n\
271 andi. %1,%0,%6\n\
272 bne- 1b \n\
273 andc %1,%0,%4 \n\
274 stdcx. %1,0,%3 \n\
275 bne- 1b"
276 : "=&r" (old), "=&r" (tmp), "=m" (*ptep)
277 : "r" (ptep), "r" (clr), "m" (*ptep), "i" (_PAGE_BUSY)
278 : "cc" );
279
280 if (old & _PAGE_HASHPTE)
281 hpte_need_flush(mm, addr, ptep, old, huge);
282 return old;
283}
284
285static inline int __ptep_test_and_clear_young(struct mm_struct *mm,
286 unsigned long addr, pte_t *ptep)
287{
288 unsigned long old;
289
290 if ((pte_val(*ptep) & (_PAGE_ACCESSED | _PAGE_HASHPTE)) == 0)
291 return 0;
292 old = pte_update(mm, addr, ptep, _PAGE_ACCESSED, 0);
293 return (old & _PAGE_ACCESSED) != 0;
294}
295#define __HAVE_ARCH_PTEP_TEST_AND_CLEAR_YOUNG
296#define ptep_test_and_clear_young(__vma, __addr, __ptep) \
297({ \
298 int __r; \
299 __r = __ptep_test_and_clear_young((__vma)->vm_mm, __addr, __ptep); \
300 __r; \
301})
302
303#define __HAVE_ARCH_PTEP_SET_WRPROTECT
304static inline void ptep_set_wrprotect(struct mm_struct *mm, unsigned long addr,
305 pte_t *ptep)
306{
307 unsigned long old;
308
309 if ((pte_val(*ptep) & _PAGE_RW) == 0)
310 return;
311 old = pte_update(mm, addr, ptep, _PAGE_RW, 0);
312}
313
314/*
315 * We currently remove entries from the hashtable regardless of whether
316 * the entry was young or dirty. The generic routines only flush if the
317 * entry was young or dirty which is not good enough.
318 *
319 * We should be more intelligent about this but for the moment we override
320 * these functions and force a tlb flush unconditionally
321 */
322#define __HAVE_ARCH_PTEP_CLEAR_YOUNG_FLUSH
323#define ptep_clear_flush_young(__vma, __address, __ptep) \
324({ \
325 int __young = __ptep_test_and_clear_young((__vma)->vm_mm, __address, \
326 __ptep); \
327 __young; \
328})
329
330#define __HAVE_ARCH_PTEP_GET_AND_CLEAR
331static inline pte_t ptep_get_and_clear(struct mm_struct *mm,
332 unsigned long addr, pte_t *ptep)
333{
334 unsigned long old = pte_update(mm, addr, ptep, ~0UL, 0);
335 return __pte(old);
336}
337
338static inline void pte_clear(struct mm_struct *mm, unsigned long addr,
339 pte_t * ptep)
340{
341 pte_update(mm, addr, ptep, ~0UL, 0);
342}
343
344/*
345 * set_pte stores a linux PTE into the linux page table.
346 */
347static inline void set_pte_at(struct mm_struct *mm, unsigned long addr,
348 pte_t *ptep, pte_t pte)
349{
350 if (pte_present(*ptep))
351 pte_clear(mm, addr, ptep);
352 pte = __pte(pte_val(pte) & ~_PAGE_HPTEFLAGS);
353 *ptep = pte;
354}
355
356/* Set the dirty and/or accessed bits atomically in a linux PTE, this
357 * function doesn't need to flush the hash entry
358 */
359#define __HAVE_ARCH_PTEP_SET_ACCESS_FLAGS
360static inline void __ptep_set_access_flags(pte_t *ptep, pte_t entry, int dirty)
361{
362 unsigned long bits = pte_val(entry) &
363 (_PAGE_DIRTY | _PAGE_ACCESSED | _PAGE_RW | _PAGE_EXEC);
364 unsigned long old, tmp;
365
366 __asm__ __volatile__(
367 "1: ldarx %0,0,%4\n\
368 andi. %1,%0,%6\n\
369 bne- 1b \n\
370 or %0,%3,%0\n\
371 stdcx. %0,0,%4\n\
372 bne- 1b"
373 :"=&r" (old), "=&r" (tmp), "=m" (*ptep)
374 :"r" (bits), "r" (ptep), "m" (*ptep), "i" (_PAGE_BUSY)
375 :"cc");
376}
377#define ptep_set_access_flags(__vma, __address, __ptep, __entry, __dirty) \
378({ \
379 int __changed = !pte_same(*(__ptep), __entry); \
380 if (__changed) { \
381 __ptep_set_access_flags(__ptep, __entry, __dirty); \
382 flush_tlb_page_nohash(__vma, __address); \
383 } \
384 __changed; \
385})
386
387/*
388 * Macro to mark a page protection value as "uncacheable".
389 */
390#define pgprot_noncached(prot) (__pgprot(pgprot_val(prot) | _PAGE_NO_CACHE | _PAGE_GUARDED))
391
392struct file;
393extern pgprot_t phys_mem_access_prot(struct file *file, unsigned long pfn,
394 unsigned long size, pgprot_t vma_prot);
395#define __HAVE_PHYS_MEM_ACCESS_PROT
396
397#define __HAVE_ARCH_PTE_SAME
398#define pte_same(A,B) (((pte_val(A) ^ pte_val(B)) & ~_PAGE_HPTEFLAGS) == 0)
399
400#define pte_ERROR(e) \
401 printk("%s:%d: bad pte %08lx.\n", __FILE__, __LINE__, pte_val(e))
402#define pmd_ERROR(e) \
403 printk("%s:%d: bad pmd %08lx.\n", __FILE__, __LINE__, pmd_val(e))
404#define pgd_ERROR(e) \
405 printk("%s:%d: bad pgd %08lx.\n", __FILE__, __LINE__, pgd_val(e))
406
407/* Encode and de-code a swap entry */
408#define __swp_type(entry) (((entry).val >> 1) & 0x3f)
409#define __swp_offset(entry) ((entry).val >> 8)
410#define __swp_entry(type, offset) ((swp_entry_t){((type)<< 1)|((offset)<<8)})
411#define __pte_to_swp_entry(pte) ((swp_entry_t){pte_val(pte) >> PTE_RPN_SHIFT})
412#define __swp_entry_to_pte(x) ((pte_t) { (x).val << PTE_RPN_SHIFT })
413#define pte_to_pgoff(pte) (pte_val(pte) >> PTE_RPN_SHIFT)
414#define pgoff_to_pte(off) ((pte_t) {((off) << PTE_RPN_SHIFT)|_PAGE_FILE})
415#define PTE_FILE_MAX_BITS (BITS_PER_LONG - PTE_RPN_SHIFT)
416
417void pgtable_cache_init(void);
418
419/*
420 * find_linux_pte returns the address of a linux pte for a given
421 * effective address and directory. If not found, it returns zero.
422 */static inline pte_t *find_linux_pte(pgd_t *pgdir, unsigned long ea)
423{
424 pgd_t *pg;
425 pud_t *pu;
426 pmd_t *pm;
427 pte_t *pt = NULL;
428
429 pg = pgdir + pgd_index(ea);
430 if (!pgd_none(*pg)) {
431 pu = pud_offset(pg, ea);
432 if (!pud_none(*pu)) {
433 pm = pmd_offset(pu, ea);
434 if (pmd_present(*pm))
435 pt = pte_offset_kernel(pm, ea);
436 }
437 }
438 return pt;
439}
440
441#endif /* __ASSEMBLY__ */
442
443#endif /* _ASM_POWERPC_PGTABLE_PPC64_H_ */