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at v2.6.24-rc6 230 lines 6.1 kB view raw
1/** 2 * \file ati_pcigart.c 3 * ATI PCI GART support 4 * 5 * \author Gareth Hughes <gareth@valinux.com> 6 */ 7 8/* 9 * Created: Wed Dec 13 21:52:19 2000 by gareth@valinux.com 10 * 11 * Copyright 2000 VA Linux Systems, Inc., Sunnyvale, California. 12 * All Rights Reserved. 13 * 14 * Permission is hereby granted, free of charge, to any person obtaining a 15 * copy of this software and associated documentation files (the "Software"), 16 * to deal in the Software without restriction, including without limitation 17 * the rights to use, copy, modify, merge, publish, distribute, sublicense, 18 * and/or sell copies of the Software, and to permit persons to whom the 19 * Software is furnished to do so, subject to the following conditions: 20 * 21 * The above copyright notice and this permission notice (including the next 22 * paragraph) shall be included in all copies or substantial portions of the 23 * Software. 24 * 25 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 26 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 27 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 28 * PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR 29 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, 30 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER 31 * DEALINGS IN THE SOFTWARE. 32 */ 33 34#include "drmP.h" 35 36# define ATI_PCIGART_PAGE_SIZE 4096 /**< PCI GART page size */ 37 38static void *drm_ati_alloc_pcigart_table(int order) 39{ 40 unsigned long address; 41 struct page *page; 42 int i; 43 44 DRM_DEBUG("%s: alloc %d order\n", __FUNCTION__, order); 45 46 address = __get_free_pages(GFP_KERNEL | __GFP_COMP, 47 order); 48 if (address == 0UL) { 49 return NULL; 50 } 51 52 page = virt_to_page(address); 53 54 for (i = 0; i < order; i++, page++) 55 SetPageReserved(page); 56 57 DRM_DEBUG("%s: returning 0x%08lx\n", __FUNCTION__, address); 58 return (void *)address; 59} 60 61static void drm_ati_free_pcigart_table(void *address, int order) 62{ 63 struct page *page; 64 int i; 65 int num_pages = 1 << order; 66 DRM_DEBUG("%s\n", __FUNCTION__); 67 68 page = virt_to_page((unsigned long)address); 69 70 for (i = 0; i < num_pages; i++, page++) 71 ClearPageReserved(page); 72 73 free_pages((unsigned long)address, order); 74} 75 76int drm_ati_pcigart_cleanup(struct drm_device *dev, struct drm_ati_pcigart_info *gart_info) 77{ 78 struct drm_sg_mem *entry = dev->sg; 79 unsigned long pages; 80 int i; 81 int order; 82 int num_pages, max_pages; 83 84 /* we need to support large memory configurations */ 85 if (!entry) { 86 DRM_ERROR("no scatter/gather memory!\n"); 87 return 0; 88 } 89 90 order = drm_order((gart_info->table_size + (PAGE_SIZE-1)) / PAGE_SIZE); 91 num_pages = 1 << order; 92 93 if (gart_info->bus_addr) { 94 if (gart_info->gart_table_location == DRM_ATI_GART_MAIN) { 95 pci_unmap_single(dev->pdev, gart_info->bus_addr, 96 num_pages * PAGE_SIZE, 97 PCI_DMA_TODEVICE); 98 } 99 100 max_pages = (gart_info->table_size / sizeof(u32)); 101 pages = (entry->pages <= max_pages) 102 ? entry->pages : max_pages; 103 104 for (i = 0; i < pages; i++) { 105 if (!entry->busaddr[i]) 106 break; 107 pci_unmap_single(dev->pdev, entry->busaddr[i], 108 PAGE_SIZE, PCI_DMA_TODEVICE); 109 } 110 111 if (gart_info->gart_table_location == DRM_ATI_GART_MAIN) 112 gart_info->bus_addr = 0; 113 } 114 115 if (gart_info->gart_table_location == DRM_ATI_GART_MAIN 116 && gart_info->addr) { 117 drm_ati_free_pcigart_table(gart_info->addr, order); 118 gart_info->addr = NULL; 119 } 120 121 return 1; 122} 123EXPORT_SYMBOL(drm_ati_pcigart_cleanup); 124 125int drm_ati_pcigart_init(struct drm_device *dev, struct drm_ati_pcigart_info *gart_info) 126{ 127 struct drm_sg_mem *entry = dev->sg; 128 void *address = NULL; 129 unsigned long pages; 130 u32 *pci_gart, page_base, bus_address = 0; 131 int i, j, ret = 0; 132 int order; 133 int max_pages; 134 int num_pages; 135 136 if (!entry) { 137 DRM_ERROR("no scatter/gather memory!\n"); 138 goto done; 139 } 140 141 if (gart_info->gart_table_location == DRM_ATI_GART_MAIN) { 142 DRM_DEBUG("PCI: no table in VRAM: using normal RAM\n"); 143 144 order = drm_order((gart_info->table_size + 145 (PAGE_SIZE-1)) / PAGE_SIZE); 146 num_pages = 1 << order; 147 address = drm_ati_alloc_pcigart_table(order); 148 if (!address) { 149 DRM_ERROR("cannot allocate PCI GART page!\n"); 150 goto done; 151 } 152 153 if (!dev->pdev) { 154 DRM_ERROR("PCI device unknown!\n"); 155 goto done; 156 } 157 158 bus_address = pci_map_single(dev->pdev, address, 159 num_pages * PAGE_SIZE, 160 PCI_DMA_TODEVICE); 161 if (bus_address == 0) { 162 DRM_ERROR("unable to map PCIGART pages!\n"); 163 order = drm_order((gart_info->table_size + 164 (PAGE_SIZE-1)) / PAGE_SIZE); 165 drm_ati_free_pcigart_table(address, order); 166 address = NULL; 167 goto done; 168 } 169 } else { 170 address = gart_info->addr; 171 bus_address = gart_info->bus_addr; 172 DRM_DEBUG("PCI: Gart Table: VRAM %08X mapped at %08lX\n", 173 bus_address, (unsigned long)address); 174 } 175 176 pci_gart = (u32 *) address; 177 178 max_pages = (gart_info->table_size / sizeof(u32)); 179 pages = (entry->pages <= max_pages) 180 ? entry->pages : max_pages; 181 182 memset(pci_gart, 0, max_pages * sizeof(u32)); 183 184 for (i = 0; i < pages; i++) { 185 /* we need to support large memory configurations */ 186 entry->busaddr[i] = pci_map_single(dev->pdev, 187 page_address(entry-> 188 pagelist[i]), 189 PAGE_SIZE, PCI_DMA_TODEVICE); 190 if (entry->busaddr[i] == 0) { 191 DRM_ERROR("unable to map PCIGART pages!\n"); 192 drm_ati_pcigart_cleanup(dev, gart_info); 193 address = NULL; 194 bus_address = 0; 195 goto done; 196 } 197 page_base = (u32) entry->busaddr[i]; 198 199 for (j = 0; j < (PAGE_SIZE / ATI_PCIGART_PAGE_SIZE); j++) { 200 switch(gart_info->gart_reg_if) { 201 case DRM_ATI_GART_IGP: 202 *pci_gart = cpu_to_le32((page_base) | 0xc); 203 break; 204 case DRM_ATI_GART_PCIE: 205 *pci_gart = cpu_to_le32((page_base >> 8) | 0xc); 206 break; 207 default: 208 case DRM_ATI_GART_PCI: 209 *pci_gart = cpu_to_le32(page_base); 210 break; 211 } 212 pci_gart++; 213 page_base += ATI_PCIGART_PAGE_SIZE; 214 } 215 } 216 217 ret = 1; 218 219#if defined(__i386__) || defined(__x86_64__) 220 wbinvd(); 221#else 222 mb(); 223#endif 224 225 done: 226 gart_info->addr = address; 227 gart_info->bus_addr = bus_address; 228 return ret; 229} 230EXPORT_SYMBOL(drm_ati_pcigart_init);