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1/* 2 * Philips UCB1400 touchscreen driver 3 * 4 * Author: Nicolas Pitre 5 * Created: September 25, 2006 6 * Copyright: MontaVista Software, Inc. 7 * 8 * This program is free software; you can redistribute it and/or modify 9 * it under the terms of the GNU General Public License version 2 as 10 * published by the Free Software Foundation. 11 * 12 * This code is heavily based on ucb1x00-*.c copyrighted by Russell King 13 * covering the UCB1100, UCB1200 and UCB1300.. Support for the UCB1400 has 14 * been made separate from ucb1x00-core/ucb1x00-ts on Russell's request. 15 */ 16 17#include <linux/module.h> 18#include <linux/moduleparam.h> 19#include <linux/init.h> 20#include <linux/completion.h> 21#include <linux/delay.h> 22#include <linux/input.h> 23#include <linux/device.h> 24#include <linux/interrupt.h> 25#include <linux/suspend.h> 26#include <linux/slab.h> 27#include <linux/kthread.h> 28#include <linux/freezer.h> 29 30#include <sound/driver.h> 31#include <sound/core.h> 32#include <sound/ac97_codec.h> 33 34 35/* 36 * Interesting UCB1400 AC-link registers 37 */ 38 39#define UCB_IE_RIS 0x5e 40#define UCB_IE_FAL 0x60 41#define UCB_IE_STATUS 0x62 42#define UCB_IE_CLEAR 0x62 43#define UCB_IE_ADC (1 << 11) 44#define UCB_IE_TSPX (1 << 12) 45 46#define UCB_TS_CR 0x64 47#define UCB_TS_CR_TSMX_POW (1 << 0) 48#define UCB_TS_CR_TSPX_POW (1 << 1) 49#define UCB_TS_CR_TSMY_POW (1 << 2) 50#define UCB_TS_CR_TSPY_POW (1 << 3) 51#define UCB_TS_CR_TSMX_GND (1 << 4) 52#define UCB_TS_CR_TSPX_GND (1 << 5) 53#define UCB_TS_CR_TSMY_GND (1 << 6) 54#define UCB_TS_CR_TSPY_GND (1 << 7) 55#define UCB_TS_CR_MODE_INT (0 << 8) 56#define UCB_TS_CR_MODE_PRES (1 << 8) 57#define UCB_TS_CR_MODE_POS (2 << 8) 58#define UCB_TS_CR_BIAS_ENA (1 << 11) 59#define UCB_TS_CR_TSPX_LOW (1 << 12) 60#define UCB_TS_CR_TSMX_LOW (1 << 13) 61 62#define UCB_ADC_CR 0x66 63#define UCB_ADC_SYNC_ENA (1 << 0) 64#define UCB_ADC_VREFBYP_CON (1 << 1) 65#define UCB_ADC_INP_TSPX (0 << 2) 66#define UCB_ADC_INP_TSMX (1 << 2) 67#define UCB_ADC_INP_TSPY (2 << 2) 68#define UCB_ADC_INP_TSMY (3 << 2) 69#define UCB_ADC_INP_AD0 (4 << 2) 70#define UCB_ADC_INP_AD1 (5 << 2) 71#define UCB_ADC_INP_AD2 (6 << 2) 72#define UCB_ADC_INP_AD3 (7 << 2) 73#define UCB_ADC_EXT_REF (1 << 5) 74#define UCB_ADC_START (1 << 7) 75#define UCB_ADC_ENA (1 << 15) 76 77#define UCB_ADC_DATA 0x68 78#define UCB_ADC_DAT_VALID (1 << 15) 79#define UCB_ADC_DAT_VALUE(x) ((x) & 0x3ff) 80 81#define UCB_ID 0x7e 82#define UCB_ID_1400 0x4304 83 84 85struct ucb1400 { 86 struct snd_ac97 *ac97; 87 struct input_dev *ts_idev; 88 89 int irq; 90 91 wait_queue_head_t ts_wait; 92 struct task_struct *ts_task; 93 94 unsigned int irq_pending; /* not bit field shared */ 95 unsigned int ts_restart:1; 96 unsigned int adcsync:1; 97}; 98 99static int adcsync; 100static int ts_delay = 55; /* us */ 101static int ts_delay_pressure; /* us */ 102 103static inline u16 ucb1400_reg_read(struct ucb1400 *ucb, u16 reg) 104{ 105 return ucb->ac97->bus->ops->read(ucb->ac97, reg); 106} 107 108static inline void ucb1400_reg_write(struct ucb1400 *ucb, u16 reg, u16 val) 109{ 110 ucb->ac97->bus->ops->write(ucb->ac97, reg, val); 111} 112 113static inline void ucb1400_adc_enable(struct ucb1400 *ucb) 114{ 115 ucb1400_reg_write(ucb, UCB_ADC_CR, UCB_ADC_ENA); 116} 117 118static unsigned int ucb1400_adc_read(struct ucb1400 *ucb, u16 adc_channel) 119{ 120 unsigned int val; 121 122 if (ucb->adcsync) 123 adc_channel |= UCB_ADC_SYNC_ENA; 124 125 ucb1400_reg_write(ucb, UCB_ADC_CR, UCB_ADC_ENA | adc_channel); 126 ucb1400_reg_write(ucb, UCB_ADC_CR, UCB_ADC_ENA | adc_channel | UCB_ADC_START); 127 128 for (;;) { 129 val = ucb1400_reg_read(ucb, UCB_ADC_DATA); 130 if (val & UCB_ADC_DAT_VALID) 131 break; 132 /* yield to other processes */ 133 schedule_timeout_uninterruptible(1); 134 } 135 136 return UCB_ADC_DAT_VALUE(val); 137} 138 139static inline void ucb1400_adc_disable(struct ucb1400 *ucb) 140{ 141 ucb1400_reg_write(ucb, UCB_ADC_CR, 0); 142} 143 144/* Switch to interrupt mode. */ 145static inline void ucb1400_ts_mode_int(struct ucb1400 *ucb) 146{ 147 ucb1400_reg_write(ucb, UCB_TS_CR, 148 UCB_TS_CR_TSMX_POW | UCB_TS_CR_TSPX_POW | 149 UCB_TS_CR_TSMY_GND | UCB_TS_CR_TSPY_GND | 150 UCB_TS_CR_MODE_INT); 151} 152 153/* 154 * Switch to pressure mode, and read pressure. We don't need to wait 155 * here, since both plates are being driven. 156 */ 157static inline unsigned int ucb1400_ts_read_pressure(struct ucb1400 *ucb) 158{ 159 ucb1400_reg_write(ucb, UCB_TS_CR, 160 UCB_TS_CR_TSMX_POW | UCB_TS_CR_TSPX_POW | 161 UCB_TS_CR_TSMY_GND | UCB_TS_CR_TSPY_GND | 162 UCB_TS_CR_MODE_PRES | UCB_TS_CR_BIAS_ENA); 163 udelay(ts_delay_pressure); 164 return ucb1400_adc_read(ucb, UCB_ADC_INP_TSPY); 165} 166 167/* 168 * Switch to X position mode and measure Y plate. We switch the plate 169 * configuration in pressure mode, then switch to position mode. This 170 * gives a faster response time. Even so, we need to wait about 55us 171 * for things to stabilise. 172 */ 173static inline unsigned int ucb1400_ts_read_xpos(struct ucb1400 *ucb) 174{ 175 ucb1400_reg_write(ucb, UCB_TS_CR, 176 UCB_TS_CR_TSMX_GND | UCB_TS_CR_TSPX_POW | 177 UCB_TS_CR_MODE_PRES | UCB_TS_CR_BIAS_ENA); 178 ucb1400_reg_write(ucb, UCB_TS_CR, 179 UCB_TS_CR_TSMX_GND | UCB_TS_CR_TSPX_POW | 180 UCB_TS_CR_MODE_PRES | UCB_TS_CR_BIAS_ENA); 181 ucb1400_reg_write(ucb, UCB_TS_CR, 182 UCB_TS_CR_TSMX_GND | UCB_TS_CR_TSPX_POW | 183 UCB_TS_CR_MODE_POS | UCB_TS_CR_BIAS_ENA); 184 185 udelay(ts_delay); 186 187 return ucb1400_adc_read(ucb, UCB_ADC_INP_TSPY); 188} 189 190/* 191 * Switch to Y position mode and measure X plate. We switch the plate 192 * configuration in pressure mode, then switch to position mode. This 193 * gives a faster response time. Even so, we need to wait about 55us 194 * for things to stabilise. 195 */ 196static inline unsigned int ucb1400_ts_read_ypos(struct ucb1400 *ucb) 197{ 198 ucb1400_reg_write(ucb, UCB_TS_CR, 199 UCB_TS_CR_TSMY_GND | UCB_TS_CR_TSPY_POW | 200 UCB_TS_CR_MODE_PRES | UCB_TS_CR_BIAS_ENA); 201 ucb1400_reg_write(ucb, UCB_TS_CR, 202 UCB_TS_CR_TSMY_GND | UCB_TS_CR_TSPY_POW | 203 UCB_TS_CR_MODE_PRES | UCB_TS_CR_BIAS_ENA); 204 ucb1400_reg_write(ucb, UCB_TS_CR, 205 UCB_TS_CR_TSMY_GND | UCB_TS_CR_TSPY_POW | 206 UCB_TS_CR_MODE_POS | UCB_TS_CR_BIAS_ENA); 207 208 udelay(ts_delay); 209 210 return ucb1400_adc_read(ucb, UCB_ADC_INP_TSPX); 211} 212 213/* 214 * Switch to X plate resistance mode. Set MX to ground, PX to 215 * supply. Measure current. 216 */ 217static inline unsigned int ucb1400_ts_read_xres(struct ucb1400 *ucb) 218{ 219 ucb1400_reg_write(ucb, UCB_TS_CR, 220 UCB_TS_CR_TSMX_GND | UCB_TS_CR_TSPX_POW | 221 UCB_TS_CR_MODE_PRES | UCB_TS_CR_BIAS_ENA); 222 return ucb1400_adc_read(ucb, 0); 223} 224 225/* 226 * Switch to Y plate resistance mode. Set MY to ground, PY to 227 * supply. Measure current. 228 */ 229static inline unsigned int ucb1400_ts_read_yres(struct ucb1400 *ucb) 230{ 231 ucb1400_reg_write(ucb, UCB_TS_CR, 232 UCB_TS_CR_TSMY_GND | UCB_TS_CR_TSPY_POW | 233 UCB_TS_CR_MODE_PRES | UCB_TS_CR_BIAS_ENA); 234 return ucb1400_adc_read(ucb, 0); 235} 236 237static inline int ucb1400_ts_pen_down(struct ucb1400 *ucb) 238{ 239 unsigned short val = ucb1400_reg_read(ucb, UCB_TS_CR); 240 return (val & (UCB_TS_CR_TSPX_LOW | UCB_TS_CR_TSMX_LOW)); 241} 242 243static inline void ucb1400_ts_irq_enable(struct ucb1400 *ucb) 244{ 245 ucb1400_reg_write(ucb, UCB_IE_CLEAR, UCB_IE_TSPX); 246 ucb1400_reg_write(ucb, UCB_IE_CLEAR, 0); 247 ucb1400_reg_write(ucb, UCB_IE_FAL, UCB_IE_TSPX); 248} 249 250static inline void ucb1400_ts_irq_disable(struct ucb1400 *ucb) 251{ 252 ucb1400_reg_write(ucb, UCB_IE_FAL, 0); 253} 254 255static void ucb1400_ts_evt_add(struct input_dev *idev, u16 pressure, u16 x, u16 y) 256{ 257 input_report_abs(idev, ABS_X, x); 258 input_report_abs(idev, ABS_Y, y); 259 input_report_abs(idev, ABS_PRESSURE, pressure); 260 input_sync(idev); 261} 262 263static void ucb1400_ts_event_release(struct input_dev *idev) 264{ 265 input_report_abs(idev, ABS_PRESSURE, 0); 266 input_sync(idev); 267} 268 269static void ucb1400_handle_pending_irq(struct ucb1400 *ucb) 270{ 271 unsigned int isr; 272 273 isr = ucb1400_reg_read(ucb, UCB_IE_STATUS); 274 ucb1400_reg_write(ucb, UCB_IE_CLEAR, isr); 275 ucb1400_reg_write(ucb, UCB_IE_CLEAR, 0); 276 277 if (isr & UCB_IE_TSPX) 278 ucb1400_ts_irq_disable(ucb); 279 else 280 printk(KERN_ERR "ucb1400: unexpected IE_STATUS = %#x\n", isr); 281 282 enable_irq(ucb->irq); 283} 284 285static int ucb1400_ts_thread(void *_ucb) 286{ 287 struct ucb1400 *ucb = _ucb; 288 struct task_struct *tsk = current; 289 int valid = 0; 290 struct sched_param param = { .sched_priority = 1 }; 291 292 sched_setscheduler(tsk, SCHED_FIFO, &param); 293 294 set_freezable(); 295 while (!kthread_should_stop()) { 296 unsigned int x, y, p; 297 long timeout; 298 299 ucb->ts_restart = 0; 300 301 if (ucb->irq_pending) { 302 ucb->irq_pending = 0; 303 ucb1400_handle_pending_irq(ucb); 304 } 305 306 ucb1400_adc_enable(ucb); 307 x = ucb1400_ts_read_xpos(ucb); 308 y = ucb1400_ts_read_ypos(ucb); 309 p = ucb1400_ts_read_pressure(ucb); 310 ucb1400_adc_disable(ucb); 311 312 /* Switch back to interrupt mode. */ 313 ucb1400_ts_mode_int(ucb); 314 315 msleep(10); 316 317 if (ucb1400_ts_pen_down(ucb)) { 318 ucb1400_ts_irq_enable(ucb); 319 320 /* 321 * If we spat out a valid sample set last time, 322 * spit out a "pen off" sample here. 323 */ 324 if (valid) { 325 ucb1400_ts_event_release(ucb->ts_idev); 326 valid = 0; 327 } 328 329 timeout = MAX_SCHEDULE_TIMEOUT; 330 } else { 331 valid = 1; 332 ucb1400_ts_evt_add(ucb->ts_idev, p, x, y); 333 timeout = msecs_to_jiffies(10); 334 } 335 336 wait_event_freezable_timeout(ucb->ts_wait, 337 ucb->irq_pending || ucb->ts_restart || kthread_should_stop(), 338 timeout); 339 } 340 341 /* Send the "pen off" if we are stopping with the pen still active */ 342 if (valid) 343 ucb1400_ts_event_release(ucb->ts_idev); 344 345 ucb->ts_task = NULL; 346 return 0; 347} 348 349/* 350 * A restriction with interrupts exists when using the ucb1400, as 351 * the codec read/write routines may sleep while waiting for codec 352 * access completion and uses semaphores for access control to the 353 * AC97 bus. A complete codec read cycle could take anywhere from 354 * 60 to 100uSec so we *definitely* don't want to spin inside the 355 * interrupt handler waiting for codec access. So, we handle the 356 * interrupt by scheduling a RT kernel thread to run in process 357 * context instead of interrupt context. 358 */ 359static irqreturn_t ucb1400_hard_irq(int irqnr, void *devid) 360{ 361 struct ucb1400 *ucb = devid; 362 363 if (irqnr == ucb->irq) { 364 disable_irq(ucb->irq); 365 ucb->irq_pending = 1; 366 wake_up(&ucb->ts_wait); 367 return IRQ_HANDLED; 368 } 369 return IRQ_NONE; 370} 371 372static int ucb1400_ts_open(struct input_dev *idev) 373{ 374 struct ucb1400 *ucb = input_get_drvdata(idev); 375 int ret = 0; 376 377 BUG_ON(ucb->ts_task); 378 379 ucb->ts_task = kthread_run(ucb1400_ts_thread, ucb, "UCB1400_ts"); 380 if (IS_ERR(ucb->ts_task)) { 381 ret = PTR_ERR(ucb->ts_task); 382 ucb->ts_task = NULL; 383 } 384 385 return ret; 386} 387 388static void ucb1400_ts_close(struct input_dev *idev) 389{ 390 struct ucb1400 *ucb = input_get_drvdata(idev); 391 392 if (ucb->ts_task) 393 kthread_stop(ucb->ts_task); 394 395 ucb1400_ts_irq_disable(ucb); 396 ucb1400_reg_write(ucb, UCB_TS_CR, 0); 397} 398 399#ifdef CONFIG_PM 400static int ucb1400_ts_resume(struct device *dev) 401{ 402 struct ucb1400 *ucb = dev_get_drvdata(dev); 403 404 if (ucb->ts_task) { 405 /* 406 * Restart the TS thread to ensure the 407 * TS interrupt mode is set up again 408 * after sleep. 409 */ 410 ucb->ts_restart = 1; 411 wake_up(&ucb->ts_wait); 412 } 413 return 0; 414} 415#else 416#define ucb1400_ts_resume NULL 417#endif 418 419#ifndef NO_IRQ 420#define NO_IRQ 0 421#endif 422 423/* 424 * Try to probe our interrupt, rather than relying on lots of 425 * hard-coded machine dependencies. 426 */ 427static int ucb1400_detect_irq(struct ucb1400 *ucb) 428{ 429 unsigned long mask, timeout; 430 431 mask = probe_irq_on(); 432 if (!mask) { 433 probe_irq_off(mask); 434 return -EBUSY; 435 } 436 437 /* Enable the ADC interrupt. */ 438 ucb1400_reg_write(ucb, UCB_IE_RIS, UCB_IE_ADC); 439 ucb1400_reg_write(ucb, UCB_IE_FAL, UCB_IE_ADC); 440 ucb1400_reg_write(ucb, UCB_IE_CLEAR, 0xffff); 441 ucb1400_reg_write(ucb, UCB_IE_CLEAR, 0); 442 443 /* Cause an ADC interrupt. */ 444 ucb1400_reg_write(ucb, UCB_ADC_CR, UCB_ADC_ENA); 445 ucb1400_reg_write(ucb, UCB_ADC_CR, UCB_ADC_ENA | UCB_ADC_START); 446 447 /* Wait for the conversion to complete. */ 448 timeout = jiffies + HZ/2; 449 while (!(ucb1400_reg_read(ucb, UCB_ADC_DATA) & UCB_ADC_DAT_VALID)) { 450 cpu_relax(); 451 if (time_after(jiffies, timeout)) { 452 printk(KERN_ERR "ucb1400: timed out in IRQ probe\n"); 453 probe_irq_off(mask); 454 return -ENODEV; 455 } 456 } 457 ucb1400_reg_write(ucb, UCB_ADC_CR, 0); 458 459 /* Disable and clear interrupt. */ 460 ucb1400_reg_write(ucb, UCB_IE_RIS, 0); 461 ucb1400_reg_write(ucb, UCB_IE_FAL, 0); 462 ucb1400_reg_write(ucb, UCB_IE_CLEAR, 0xffff); 463 ucb1400_reg_write(ucb, UCB_IE_CLEAR, 0); 464 465 /* Read triggered interrupt. */ 466 ucb->irq = probe_irq_off(mask); 467 if (ucb->irq < 0 || ucb->irq == NO_IRQ) 468 return -ENODEV; 469 470 return 0; 471} 472 473static int ucb1400_ts_probe(struct device *dev) 474{ 475 struct ucb1400 *ucb; 476 struct input_dev *idev; 477 int error, id, x_res, y_res; 478 479 ucb = kzalloc(sizeof(struct ucb1400), GFP_KERNEL); 480 idev = input_allocate_device(); 481 if (!ucb || !idev) { 482 error = -ENOMEM; 483 goto err_free_devs; 484 } 485 486 ucb->ts_idev = idev; 487 ucb->adcsync = adcsync; 488 ucb->ac97 = to_ac97_t(dev); 489 init_waitqueue_head(&ucb->ts_wait); 490 491 id = ucb1400_reg_read(ucb, UCB_ID); 492 if (id != UCB_ID_1400) { 493 error = -ENODEV; 494 goto err_free_devs; 495 } 496 497 error = ucb1400_detect_irq(ucb); 498 if (error) { 499 printk(KERN_ERR "UCB1400: IRQ probe failed\n"); 500 goto err_free_devs; 501 } 502 503 error = request_irq(ucb->irq, ucb1400_hard_irq, IRQF_TRIGGER_RISING, 504 "UCB1400", ucb); 505 if (error) { 506 printk(KERN_ERR "ucb1400: unable to grab irq%d: %d\n", 507 ucb->irq, error); 508 goto err_free_devs; 509 } 510 printk(KERN_DEBUG "UCB1400: found IRQ %d\n", ucb->irq); 511 512 input_set_drvdata(idev, ucb); 513 514 idev->dev.parent = dev; 515 idev->name = "UCB1400 touchscreen interface"; 516 idev->id.vendor = ucb1400_reg_read(ucb, AC97_VENDOR_ID1); 517 idev->id.product = id; 518 idev->open = ucb1400_ts_open; 519 idev->close = ucb1400_ts_close; 520 idev->evbit[0] = BIT_MASK(EV_ABS); 521 522 ucb1400_adc_enable(ucb); 523 x_res = ucb1400_ts_read_xres(ucb); 524 y_res = ucb1400_ts_read_yres(ucb); 525 ucb1400_adc_disable(ucb); 526 printk(KERN_DEBUG "UCB1400: x/y = %d/%d\n", x_res, y_res); 527 528 input_set_abs_params(idev, ABS_X, 0, x_res, 0, 0); 529 input_set_abs_params(idev, ABS_Y, 0, y_res, 0, 0); 530 input_set_abs_params(idev, ABS_PRESSURE, 0, 0, 0, 0); 531 532 error = input_register_device(idev); 533 if (error) 534 goto err_free_irq; 535 536 dev_set_drvdata(dev, ucb); 537 return 0; 538 539 err_free_irq: 540 free_irq(ucb->irq, ucb); 541 err_free_devs: 542 input_free_device(idev); 543 kfree(ucb); 544 return error; 545} 546 547static int ucb1400_ts_remove(struct device *dev) 548{ 549 struct ucb1400 *ucb = dev_get_drvdata(dev); 550 551 free_irq(ucb->irq, ucb); 552 input_unregister_device(ucb->ts_idev); 553 dev_set_drvdata(dev, NULL); 554 kfree(ucb); 555 return 0; 556} 557 558static struct device_driver ucb1400_ts_driver = { 559 .name = "ucb1400_ts", 560 .owner = THIS_MODULE, 561 .bus = &ac97_bus_type, 562 .probe = ucb1400_ts_probe, 563 .remove = ucb1400_ts_remove, 564 .resume = ucb1400_ts_resume, 565}; 566 567static int __init ucb1400_ts_init(void) 568{ 569 return driver_register(&ucb1400_ts_driver); 570} 571 572static void __exit ucb1400_ts_exit(void) 573{ 574 driver_unregister(&ucb1400_ts_driver); 575} 576 577module_param(adcsync, bool, 0444); 578MODULE_PARM_DESC(adcsync, "Synchronize touch readings with ADCSYNC pin."); 579 580module_param(ts_delay, int, 0444); 581MODULE_PARM_DESC(ts_delay, "Delay between panel setup and position read. Default = 55us."); 582 583module_param(ts_delay_pressure, int, 0444); 584MODULE_PARM_DESC(ts_delay_pressure, 585 "delay between panel setup and pressure read. Default = 0us."); 586 587module_init(ucb1400_ts_init); 588module_exit(ucb1400_ts_exit); 589 590MODULE_DESCRIPTION("Philips UCB1400 touchscreen driver"); 591MODULE_LICENSE("GPL");