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1/*
2 * uartlite.c: Serial driver for Xilinx uartlite serial controller
3 *
4 * Copyright (C) 2006 Peter Korsgaard <jacmet@sunsite.dk>
5 * Copyright (C) 2007 Secret Lab Technologies Ltd.
6 *
7 * This file is licensed under the terms of the GNU General Public License
8 * version 2. This program is licensed "as is" without any warranty of any
9 * kind, whether express or implied.
10 */
11
12#include <linux/platform_device.h>
13#include <linux/module.h>
14#include <linux/console.h>
15#include <linux/serial.h>
16#include <linux/serial_core.h>
17#include <linux/tty.h>
18#include <linux/delay.h>
19#include <linux/interrupt.h>
20#include <asm/io.h>
21#if defined(CONFIG_OF)
22#include <linux/of_device.h>
23#include <linux/of_platform.h>
24#endif
25
26#define ULITE_NAME "ttyUL"
27#define ULITE_MAJOR 204
28#define ULITE_MINOR 187
29#define ULITE_NR_UARTS 4
30
31/* ---------------------------------------------------------------------
32 * Register definitions
33 *
34 * For register details see datasheet:
35 * http://www.xilinx.com/bvdocs/ipcenter/data_sheet/opb_uartlite.pdf
36 */
37
38#define ULITE_RX 0x00
39#define ULITE_TX 0x04
40#define ULITE_STATUS 0x08
41#define ULITE_CONTROL 0x0c
42
43#define ULITE_REGION 16
44
45#define ULITE_STATUS_RXVALID 0x01
46#define ULITE_STATUS_RXFULL 0x02
47#define ULITE_STATUS_TXEMPTY 0x04
48#define ULITE_STATUS_TXFULL 0x08
49#define ULITE_STATUS_IE 0x10
50#define ULITE_STATUS_OVERRUN 0x20
51#define ULITE_STATUS_FRAME 0x40
52#define ULITE_STATUS_PARITY 0x80
53
54#define ULITE_CONTROL_RST_TX 0x01
55#define ULITE_CONTROL_RST_RX 0x02
56#define ULITE_CONTROL_IE 0x10
57
58
59static struct uart_port ulite_ports[ULITE_NR_UARTS];
60
61/* ---------------------------------------------------------------------
62 * Core UART driver operations
63 */
64
65static int ulite_receive(struct uart_port *port, int stat)
66{
67 struct tty_struct *tty = port->info->tty;
68 unsigned char ch = 0;
69 char flag = TTY_NORMAL;
70
71 if ((stat & (ULITE_STATUS_RXVALID | ULITE_STATUS_OVERRUN
72 | ULITE_STATUS_FRAME)) == 0)
73 return 0;
74
75 /* stats */
76 if (stat & ULITE_STATUS_RXVALID) {
77 port->icount.rx++;
78 ch = readb(port->membase + ULITE_RX);
79
80 if (stat & ULITE_STATUS_PARITY)
81 port->icount.parity++;
82 }
83
84 if (stat & ULITE_STATUS_OVERRUN)
85 port->icount.overrun++;
86
87 if (stat & ULITE_STATUS_FRAME)
88 port->icount.frame++;
89
90
91 /* drop byte with parity error if IGNPAR specificed */
92 if (stat & port->ignore_status_mask & ULITE_STATUS_PARITY)
93 stat &= ~ULITE_STATUS_RXVALID;
94
95 stat &= port->read_status_mask;
96
97 if (stat & ULITE_STATUS_PARITY)
98 flag = TTY_PARITY;
99
100
101 stat &= ~port->ignore_status_mask;
102
103 if (stat & ULITE_STATUS_RXVALID)
104 tty_insert_flip_char(tty, ch, flag);
105
106 if (stat & ULITE_STATUS_FRAME)
107 tty_insert_flip_char(tty, 0, TTY_FRAME);
108
109 if (stat & ULITE_STATUS_OVERRUN)
110 tty_insert_flip_char(tty, 0, TTY_OVERRUN);
111
112 return 1;
113}
114
115static int ulite_transmit(struct uart_port *port, int stat)
116{
117 struct circ_buf *xmit = &port->info->xmit;
118
119 if (stat & ULITE_STATUS_TXFULL)
120 return 0;
121
122 if (port->x_char) {
123 writeb(port->x_char, port->membase + ULITE_TX);
124 port->x_char = 0;
125 port->icount.tx++;
126 return 1;
127 }
128
129 if (uart_circ_empty(xmit) || uart_tx_stopped(port))
130 return 0;
131
132 writeb(xmit->buf[xmit->tail], port->membase + ULITE_TX);
133 xmit->tail = (xmit->tail + 1) & (UART_XMIT_SIZE-1);
134 port->icount.tx++;
135
136 /* wake up */
137 if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS)
138 uart_write_wakeup(port);
139
140 return 1;
141}
142
143static irqreturn_t ulite_isr(int irq, void *dev_id)
144{
145 struct uart_port *port = (struct uart_port *)dev_id;
146 int busy;
147
148 do {
149 int stat = readb(port->membase + ULITE_STATUS);
150 busy = ulite_receive(port, stat);
151 busy |= ulite_transmit(port, stat);
152 } while (busy);
153
154 tty_flip_buffer_push(port->info->tty);
155
156 return IRQ_HANDLED;
157}
158
159static unsigned int ulite_tx_empty(struct uart_port *port)
160{
161 unsigned long flags;
162 unsigned int ret;
163
164 spin_lock_irqsave(&port->lock, flags);
165 ret = readb(port->membase + ULITE_STATUS);
166 spin_unlock_irqrestore(&port->lock, flags);
167
168 return ret & ULITE_STATUS_TXEMPTY ? TIOCSER_TEMT : 0;
169}
170
171static unsigned int ulite_get_mctrl(struct uart_port *port)
172{
173 return TIOCM_CTS | TIOCM_DSR | TIOCM_CAR;
174}
175
176static void ulite_set_mctrl(struct uart_port *port, unsigned int mctrl)
177{
178 /* N/A */
179}
180
181static void ulite_stop_tx(struct uart_port *port)
182{
183 /* N/A */
184}
185
186static void ulite_start_tx(struct uart_port *port)
187{
188 ulite_transmit(port, readb(port->membase + ULITE_STATUS));
189}
190
191static void ulite_stop_rx(struct uart_port *port)
192{
193 /* don't forward any more data (like !CREAD) */
194 port->ignore_status_mask = ULITE_STATUS_RXVALID | ULITE_STATUS_PARITY
195 | ULITE_STATUS_FRAME | ULITE_STATUS_OVERRUN;
196}
197
198static void ulite_enable_ms(struct uart_port *port)
199{
200 /* N/A */
201}
202
203static void ulite_break_ctl(struct uart_port *port, int ctl)
204{
205 /* N/A */
206}
207
208static int ulite_startup(struct uart_port *port)
209{
210 int ret;
211
212 ret = request_irq(port->irq, ulite_isr,
213 IRQF_DISABLED | IRQF_SAMPLE_RANDOM, "uartlite", port);
214 if (ret)
215 return ret;
216
217 writeb(ULITE_CONTROL_RST_RX | ULITE_CONTROL_RST_TX,
218 port->membase + ULITE_CONTROL);
219 writeb(ULITE_CONTROL_IE, port->membase + ULITE_CONTROL);
220
221 return 0;
222}
223
224static void ulite_shutdown(struct uart_port *port)
225{
226 writeb(0, port->membase + ULITE_CONTROL);
227 readb(port->membase + ULITE_CONTROL); /* dummy */
228 free_irq(port->irq, port);
229}
230
231static void ulite_set_termios(struct uart_port *port, struct ktermios *termios,
232 struct ktermios *old)
233{
234 unsigned long flags;
235 unsigned int baud;
236
237 spin_lock_irqsave(&port->lock, flags);
238
239 port->read_status_mask = ULITE_STATUS_RXVALID | ULITE_STATUS_OVERRUN
240 | ULITE_STATUS_TXFULL;
241
242 if (termios->c_iflag & INPCK)
243 port->read_status_mask |=
244 ULITE_STATUS_PARITY | ULITE_STATUS_FRAME;
245
246 port->ignore_status_mask = 0;
247 if (termios->c_iflag & IGNPAR)
248 port->ignore_status_mask |= ULITE_STATUS_PARITY
249 | ULITE_STATUS_FRAME | ULITE_STATUS_OVERRUN;
250
251 /* ignore all characters if CREAD is not set */
252 if ((termios->c_cflag & CREAD) == 0)
253 port->ignore_status_mask |=
254 ULITE_STATUS_RXVALID | ULITE_STATUS_PARITY
255 | ULITE_STATUS_FRAME | ULITE_STATUS_OVERRUN;
256
257 /* update timeout */
258 baud = uart_get_baud_rate(port, termios, old, 0, 460800);
259 uart_update_timeout(port, termios->c_cflag, baud);
260
261 spin_unlock_irqrestore(&port->lock, flags);
262}
263
264static const char *ulite_type(struct uart_port *port)
265{
266 return port->type == PORT_UARTLITE ? "uartlite" : NULL;
267}
268
269static void ulite_release_port(struct uart_port *port)
270{
271 release_mem_region(port->mapbase, ULITE_REGION);
272 iounmap(port->membase);
273 port->membase = NULL;
274}
275
276static int ulite_request_port(struct uart_port *port)
277{
278 if (!request_mem_region(port->mapbase, ULITE_REGION, "uartlite")) {
279 dev_err(port->dev, "Memory region busy\n");
280 return -EBUSY;
281 }
282
283 port->membase = ioremap(port->mapbase, ULITE_REGION);
284 if (!port->membase) {
285 dev_err(port->dev, "Unable to map registers\n");
286 release_mem_region(port->mapbase, ULITE_REGION);
287 return -EBUSY;
288 }
289
290 return 0;
291}
292
293static void ulite_config_port(struct uart_port *port, int flags)
294{
295 if (!ulite_request_port(port))
296 port->type = PORT_UARTLITE;
297}
298
299static int ulite_verify_port(struct uart_port *port, struct serial_struct *ser)
300{
301 /* we don't want the core code to modify any port params */
302 return -EINVAL;
303}
304
305static struct uart_ops ulite_ops = {
306 .tx_empty = ulite_tx_empty,
307 .set_mctrl = ulite_set_mctrl,
308 .get_mctrl = ulite_get_mctrl,
309 .stop_tx = ulite_stop_tx,
310 .start_tx = ulite_start_tx,
311 .stop_rx = ulite_stop_rx,
312 .enable_ms = ulite_enable_ms,
313 .break_ctl = ulite_break_ctl,
314 .startup = ulite_startup,
315 .shutdown = ulite_shutdown,
316 .set_termios = ulite_set_termios,
317 .type = ulite_type,
318 .release_port = ulite_release_port,
319 .request_port = ulite_request_port,
320 .config_port = ulite_config_port,
321 .verify_port = ulite_verify_port
322};
323
324/* ---------------------------------------------------------------------
325 * Console driver operations
326 */
327
328#ifdef CONFIG_SERIAL_UARTLITE_CONSOLE
329static void ulite_console_wait_tx(struct uart_port *port)
330{
331 int i;
332 u8 val;
333
334 /* Spin waiting for TX fifo to have space available */
335 for (i = 0; i < 100000; i++) {
336 val = readb(port->membase + ULITE_STATUS);
337 if ((val & ULITE_STATUS_TXFULL) == 0)
338 break;
339 cpu_relax();
340 }
341}
342
343static void ulite_console_putchar(struct uart_port *port, int ch)
344{
345 ulite_console_wait_tx(port);
346 writeb(ch, port->membase + ULITE_TX);
347}
348
349static void ulite_console_write(struct console *co, const char *s,
350 unsigned int count)
351{
352 struct uart_port *port = &ulite_ports[co->index];
353 unsigned long flags;
354 unsigned int ier;
355 int locked = 1;
356
357 if (oops_in_progress) {
358 locked = spin_trylock_irqsave(&port->lock, flags);
359 } else
360 spin_lock_irqsave(&port->lock, flags);
361
362 /* save and disable interrupt */
363 ier = readb(port->membase + ULITE_STATUS) & ULITE_STATUS_IE;
364 writeb(0, port->membase + ULITE_CONTROL);
365
366 uart_console_write(port, s, count, ulite_console_putchar);
367
368 ulite_console_wait_tx(port);
369
370 /* restore interrupt state */
371 if (ier)
372 writeb(ULITE_CONTROL_IE, port->membase + ULITE_CONTROL);
373
374 if (locked)
375 spin_unlock_irqrestore(&port->lock, flags);
376}
377
378#if defined(CONFIG_OF)
379static inline void __init ulite_console_of_find_device(int id)
380{
381 struct device_node *np;
382 struct resource res;
383 const unsigned int *of_id;
384 int rc;
385
386 for_each_compatible_node(np, NULL, "xilinx,uartlite") {
387 of_id = of_get_property(np, "port-number", NULL);
388 if ((!of_id) || (*of_id != id))
389 continue;
390
391 rc = of_address_to_resource(np, 0, &res);
392 if (rc)
393 continue;
394
395 ulite_ports[id].mapbase = res.start;
396 return;
397 }
398}
399#else /* CONFIG_OF */
400static inline void __init ulite_console_of_find_device(int id) { /* do nothing */ }
401#endif /* CONFIG_OF */
402
403static int __init ulite_console_setup(struct console *co, char *options)
404{
405 struct uart_port *port;
406 int baud = 9600;
407 int bits = 8;
408 int parity = 'n';
409 int flow = 'n';
410
411 if (co->index < 0 || co->index >= ULITE_NR_UARTS)
412 return -EINVAL;
413
414 port = &ulite_ports[co->index];
415
416 /* Check if it is an OF device */
417 if (!port->mapbase)
418 ulite_console_of_find_device(co->index);
419
420 /* Do we have a device now? */
421 if (!port->mapbase) {
422 pr_debug("console on ttyUL%i not present\n", co->index);
423 return -ENODEV;
424 }
425
426 /* not initialized yet? */
427 if (!port->membase) {
428 if (ulite_request_port(port))
429 return -ENODEV;
430 }
431
432 if (options)
433 uart_parse_options(options, &baud, &parity, &bits, &flow);
434
435 return uart_set_options(port, co, baud, parity, bits, flow);
436}
437
438static struct uart_driver ulite_uart_driver;
439
440static struct console ulite_console = {
441 .name = ULITE_NAME,
442 .write = ulite_console_write,
443 .device = uart_console_device,
444 .setup = ulite_console_setup,
445 .flags = CON_PRINTBUFFER,
446 .index = -1, /* Specified on the cmdline (e.g. console=ttyUL0 ) */
447 .data = &ulite_uart_driver,
448};
449
450static int __init ulite_console_init(void)
451{
452 register_console(&ulite_console);
453 return 0;
454}
455
456console_initcall(ulite_console_init);
457
458#endif /* CONFIG_SERIAL_UARTLITE_CONSOLE */
459
460static struct uart_driver ulite_uart_driver = {
461 .owner = THIS_MODULE,
462 .driver_name = "uartlite",
463 .dev_name = ULITE_NAME,
464 .major = ULITE_MAJOR,
465 .minor = ULITE_MINOR,
466 .nr = ULITE_NR_UARTS,
467#ifdef CONFIG_SERIAL_UARTLITE_CONSOLE
468 .cons = &ulite_console,
469#endif
470};
471
472/* ---------------------------------------------------------------------
473 * Port assignment functions (mapping devices to uart_port structures)
474 */
475
476/** ulite_assign: register a uartlite device with the driver
477 *
478 * @dev: pointer to device structure
479 * @id: requested id number. Pass -1 for automatic port assignment
480 * @base: base address of uartlite registers
481 * @irq: irq number for uartlite
482 *
483 * Returns: 0 on success, <0 otherwise
484 */
485static int __devinit ulite_assign(struct device *dev, int id, u32 base, int irq)
486{
487 struct uart_port *port;
488 int rc;
489
490 /* if id = -1; then scan for a free id and use that */
491 if (id < 0) {
492 for (id = 0; id < ULITE_NR_UARTS; id++)
493 if (ulite_ports[id].mapbase == 0)
494 break;
495 }
496 if (id < 0 || id >= ULITE_NR_UARTS) {
497 dev_err(dev, "%s%i too large\n", ULITE_NAME, id);
498 return -EINVAL;
499 }
500
501 if ((ulite_ports[id].mapbase) && (ulite_ports[id].mapbase != base)) {
502 dev_err(dev, "cannot assign to %s%i; it is already in use\n",
503 ULITE_NAME, id);
504 return -EBUSY;
505 }
506
507 port = &ulite_ports[id];
508
509 spin_lock_init(&port->lock);
510 port->fifosize = 16;
511 port->regshift = 2;
512 port->iotype = UPIO_MEM;
513 port->iobase = 1; /* mark port in use */
514 port->mapbase = base;
515 port->membase = NULL;
516 port->ops = &ulite_ops;
517 port->irq = irq;
518 port->flags = UPF_BOOT_AUTOCONF;
519 port->dev = dev;
520 port->type = PORT_UNKNOWN;
521 port->line = id;
522
523 dev_set_drvdata(dev, port);
524
525 /* Register the port */
526 rc = uart_add_one_port(&ulite_uart_driver, port);
527 if (rc) {
528 dev_err(dev, "uart_add_one_port() failed; err=%i\n", rc);
529 port->mapbase = 0;
530 dev_set_drvdata(dev, NULL);
531 return rc;
532 }
533
534 return 0;
535}
536
537/** ulite_release: register a uartlite device with the driver
538 *
539 * @dev: pointer to device structure
540 */
541static int __devinit ulite_release(struct device *dev)
542{
543 struct uart_port *port = dev_get_drvdata(dev);
544 int rc = 0;
545
546 if (port) {
547 rc = uart_remove_one_port(&ulite_uart_driver, port);
548 dev_set_drvdata(dev, NULL);
549 port->mapbase = 0;
550 }
551
552 return rc;
553}
554
555/* ---------------------------------------------------------------------
556 * Platform bus binding
557 */
558
559static int __devinit ulite_probe(struct platform_device *pdev)
560{
561 struct resource *res, *res2;
562
563 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
564 if (!res)
565 return -ENODEV;
566
567 res2 = platform_get_resource(pdev, IORESOURCE_IRQ, 0);
568 if (!res2)
569 return -ENODEV;
570
571 return ulite_assign(&pdev->dev, pdev->id, res->start, res2->start);
572}
573
574static int ulite_remove(struct platform_device *pdev)
575{
576 return ulite_release(&pdev->dev);
577}
578
579static struct platform_driver ulite_platform_driver = {
580 .probe = ulite_probe,
581 .remove = ulite_remove,
582 .driver = {
583 .owner = THIS_MODULE,
584 .name = "uartlite",
585 },
586};
587
588/* ---------------------------------------------------------------------
589 * OF bus bindings
590 */
591#if defined(CONFIG_OF)
592static int __devinit
593ulite_of_probe(struct of_device *op, const struct of_device_id *match)
594{
595 struct resource res;
596 const unsigned int *id;
597 int irq, rc;
598
599 dev_dbg(&op->dev, "%s(%p, %p)\n", __FUNCTION__, op, match);
600
601 rc = of_address_to_resource(op->node, 0, &res);
602 if (rc) {
603 dev_err(&op->dev, "invalid address\n");
604 return rc;
605 }
606
607 irq = irq_of_parse_and_map(op->node, 0);
608
609 id = of_get_property(op->node, "port-number", NULL);
610
611 return ulite_assign(&op->dev, id ? *id : -1, res.start+3, irq);
612}
613
614static int __devexit ulite_of_remove(struct of_device *op)
615{
616 return ulite_release(&op->dev);
617}
618
619/* Match table for of_platform binding */
620static struct of_device_id __devinit ulite_of_match[] = {
621 { .type = "serial", .compatible = "xilinx,uartlite", },
622 {},
623};
624MODULE_DEVICE_TABLE(of, ulite_of_match);
625
626static struct of_platform_driver ulite_of_driver = {
627 .owner = THIS_MODULE,
628 .name = "uartlite",
629 .match_table = ulite_of_match,
630 .probe = ulite_of_probe,
631 .remove = __devexit_p(ulite_of_remove),
632 .driver = {
633 .name = "uartlite",
634 },
635};
636
637/* Registration helpers to keep the number of #ifdefs to a minimum */
638static inline int __init ulite_of_register(void)
639{
640 pr_debug("uartlite: calling of_register_platform_driver()\n");
641 return of_register_platform_driver(&ulite_of_driver);
642}
643
644static inline void __exit ulite_of_unregister(void)
645{
646 of_unregister_platform_driver(&ulite_of_driver);
647}
648#else /* CONFIG_OF */
649/* CONFIG_OF not enabled; do nothing helpers */
650static inline int __init ulite_of_register(void) { return 0; }
651static inline void __exit ulite_of_unregister(void) { }
652#endif /* CONFIG_OF */
653
654/* ---------------------------------------------------------------------
655 * Module setup/teardown
656 */
657
658int __init ulite_init(void)
659{
660 int ret;
661
662 pr_debug("uartlite: calling uart_register_driver()\n");
663 ret = uart_register_driver(&ulite_uart_driver);
664 if (ret)
665 goto err_uart;
666
667 ret = ulite_of_register();
668 if (ret)
669 goto err_of;
670
671 pr_debug("uartlite: calling platform_driver_register()\n");
672 ret = platform_driver_register(&ulite_platform_driver);
673 if (ret)
674 goto err_plat;
675
676 return 0;
677
678err_plat:
679 ulite_of_unregister();
680err_of:
681 uart_unregister_driver(&ulite_uart_driver);
682err_uart:
683 printk(KERN_ERR "registering uartlite driver failed: err=%i", ret);
684 return ret;
685}
686
687void __exit ulite_exit(void)
688{
689 platform_driver_unregister(&ulite_platform_driver);
690 ulite_of_unregister();
691 uart_unregister_driver(&ulite_uart_driver);
692}
693
694module_init(ulite_init);
695module_exit(ulite_exit);
696
697MODULE_AUTHOR("Peter Korsgaard <jacmet@sunsite.dk>");
698MODULE_DESCRIPTION("Xilinx uartlite serial driver");
699MODULE_LICENSE("GPL");