Linux kernel mirror (for testing) git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel os linux
at v2.6.24-rc2 824 lines 24 kB view raw
1/* 2 * Linux device driver for RTL8187 3 * 4 * Copyright 2007 Michael Wu <flamingice@sourmilk.net> 5 * Copyright 2007 Andrea Merello <andreamrl@tiscali.it> 6 * 7 * Based on the r8187 driver, which is: 8 * Copyright 2005 Andrea Merello <andreamrl@tiscali.it>, et al. 9 * 10 * Magic delays and register offsets below are taken from the original 11 * r8187 driver sources. Thanks to Realtek for their support! 12 * 13 * This program is free software; you can redistribute it and/or modify 14 * it under the terms of the GNU General Public License version 2 as 15 * published by the Free Software Foundation. 16 */ 17 18#include <linux/init.h> 19#include <linux/usb.h> 20#include <linux/delay.h> 21#include <linux/etherdevice.h> 22#include <linux/eeprom_93cx6.h> 23#include <net/mac80211.h> 24 25#include "rtl8187.h" 26#include "rtl8187_rtl8225.h" 27 28MODULE_AUTHOR("Michael Wu <flamingice@sourmilk.net>"); 29MODULE_AUTHOR("Andrea Merello <andreamrl@tiscali.it>"); 30MODULE_DESCRIPTION("RTL8187 USB wireless driver"); 31MODULE_LICENSE("GPL"); 32 33static struct usb_device_id rtl8187_table[] __devinitdata = { 34 /* Realtek */ 35 {USB_DEVICE(0x0bda, 0x8187)}, 36 /* Netgear */ 37 {USB_DEVICE(0x0846, 0x6100)}, 38 {USB_DEVICE(0x0846, 0x6a00)}, 39 /* HP */ 40 {USB_DEVICE(0x03f0, 0xca02)}, 41 {} 42}; 43 44MODULE_DEVICE_TABLE(usb, rtl8187_table); 45 46static void rtl8187_iowrite_async_cb(struct urb *urb) 47{ 48 kfree(urb->context); 49 usb_free_urb(urb); 50} 51 52static void rtl8187_iowrite_async(struct rtl8187_priv *priv, __le16 addr, 53 void *data, u16 len) 54{ 55 struct usb_ctrlrequest *dr; 56 struct urb *urb; 57 struct rtl8187_async_write_data { 58 u8 data[4]; 59 struct usb_ctrlrequest dr; 60 } *buf; 61 62 buf = kmalloc(sizeof(*buf), GFP_ATOMIC); 63 if (!buf) 64 return; 65 66 urb = usb_alloc_urb(0, GFP_ATOMIC); 67 if (!urb) { 68 kfree(buf); 69 return; 70 } 71 72 dr = &buf->dr; 73 74 dr->bRequestType = RTL8187_REQT_WRITE; 75 dr->bRequest = RTL8187_REQ_SET_REG; 76 dr->wValue = addr; 77 dr->wIndex = 0; 78 dr->wLength = cpu_to_le16(len); 79 80 memcpy(buf, data, len); 81 82 usb_fill_control_urb(urb, priv->udev, usb_sndctrlpipe(priv->udev, 0), 83 (unsigned char *)dr, buf, len, 84 rtl8187_iowrite_async_cb, buf); 85 usb_submit_urb(urb, GFP_ATOMIC); 86} 87 88static inline void rtl818x_iowrite32_async(struct rtl8187_priv *priv, 89 __le32 *addr, u32 val) 90{ 91 __le32 buf = cpu_to_le32(val); 92 93 rtl8187_iowrite_async(priv, cpu_to_le16((unsigned long)addr), 94 &buf, sizeof(buf)); 95} 96 97void rtl8187_write_phy(struct ieee80211_hw *dev, u8 addr, u32 data) 98{ 99 struct rtl8187_priv *priv = dev->priv; 100 101 data <<= 8; 102 data |= addr | 0x80; 103 104 rtl818x_iowrite8(priv, &priv->map->PHY[3], (data >> 24) & 0xFF); 105 rtl818x_iowrite8(priv, &priv->map->PHY[2], (data >> 16) & 0xFF); 106 rtl818x_iowrite8(priv, &priv->map->PHY[1], (data >> 8) & 0xFF); 107 rtl818x_iowrite8(priv, &priv->map->PHY[0], data & 0xFF); 108 109 msleep(1); 110} 111 112static void rtl8187_tx_cb(struct urb *urb) 113{ 114 struct ieee80211_tx_status status = { {0} }; 115 struct sk_buff *skb = (struct sk_buff *)urb->context; 116 struct rtl8187_tx_info *info = (struct rtl8187_tx_info *)skb->cb; 117 118 usb_free_urb(info->urb); 119 if (info->control) 120 memcpy(&status.control, info->control, sizeof(status.control)); 121 kfree(info->control); 122 skb_pull(skb, sizeof(struct rtl8187_tx_hdr)); 123 status.flags |= IEEE80211_TX_STATUS_ACK; 124 ieee80211_tx_status_irqsafe(info->dev, skb, &status); 125} 126 127static int rtl8187_tx(struct ieee80211_hw *dev, struct sk_buff *skb, 128 struct ieee80211_tx_control *control) 129{ 130 struct rtl8187_priv *priv = dev->priv; 131 struct rtl8187_tx_hdr *hdr; 132 struct rtl8187_tx_info *info; 133 struct urb *urb; 134 __le16 rts_dur = 0; 135 u32 flags; 136 137 urb = usb_alloc_urb(0, GFP_ATOMIC); 138 if (!urb) { 139 kfree_skb(skb); 140 return 0; 141 } 142 143 flags = skb->len; 144 flags |= RTL8187_TX_FLAG_NO_ENCRYPT; 145 flags |= control->rts_cts_rate << 19; 146 flags |= control->tx_rate << 24; 147 if (ieee80211_get_morefrag((struct ieee80211_hdr *)skb->data)) 148 flags |= RTL8187_TX_FLAG_MORE_FRAG; 149 if (control->flags & IEEE80211_TXCTL_USE_RTS_CTS) { 150 flags |= RTL8187_TX_FLAG_RTS; 151 rts_dur = ieee80211_rts_duration(dev, priv->if_id, skb->len, control); 152 } 153 if (control->flags & IEEE80211_TXCTL_USE_CTS_PROTECT) 154 flags |= RTL8187_TX_FLAG_CTS; 155 156 hdr = (struct rtl8187_tx_hdr *)skb_push(skb, sizeof(*hdr)); 157 hdr->flags = cpu_to_le32(flags); 158 hdr->len = 0; 159 hdr->rts_duration = rts_dur; 160 hdr->retry = cpu_to_le32(control->retry_limit << 8); 161 162 info = (struct rtl8187_tx_info *)skb->cb; 163 info->control = kmemdup(control, sizeof(*control), GFP_ATOMIC); 164 info->urb = urb; 165 info->dev = dev; 166 usb_fill_bulk_urb(urb, priv->udev, usb_sndbulkpipe(priv->udev, 2), 167 hdr, skb->len, rtl8187_tx_cb, skb); 168 usb_submit_urb(urb, GFP_ATOMIC); 169 170 return 0; 171} 172 173static void rtl8187_rx_cb(struct urb *urb) 174{ 175 struct sk_buff *skb = (struct sk_buff *)urb->context; 176 struct rtl8187_rx_info *info = (struct rtl8187_rx_info *)skb->cb; 177 struct ieee80211_hw *dev = info->dev; 178 struct rtl8187_priv *priv = dev->priv; 179 struct rtl8187_rx_hdr *hdr; 180 struct ieee80211_rx_status rx_status = { 0 }; 181 int rate, signal; 182 u32 flags; 183 184 spin_lock(&priv->rx_queue.lock); 185 if (skb->next) 186 __skb_unlink(skb, &priv->rx_queue); 187 else { 188 spin_unlock(&priv->rx_queue.lock); 189 return; 190 } 191 spin_unlock(&priv->rx_queue.lock); 192 193 if (unlikely(urb->status)) { 194 usb_free_urb(urb); 195 dev_kfree_skb_irq(skb); 196 return; 197 } 198 199 skb_put(skb, urb->actual_length); 200 hdr = (struct rtl8187_rx_hdr *)(skb_tail_pointer(skb) - sizeof(*hdr)); 201 flags = le32_to_cpu(hdr->flags); 202 skb_trim(skb, flags & 0x0FFF); 203 204 signal = hdr->agc >> 1; 205 rate = (flags >> 20) & 0xF; 206 if (rate > 3) { /* OFDM rate */ 207 if (signal > 90) 208 signal = 90; 209 else if (signal < 25) 210 signal = 25; 211 signal = 90 - signal; 212 } else { /* CCK rate */ 213 if (signal > 95) 214 signal = 95; 215 else if (signal < 30) 216 signal = 30; 217 signal = 95 - signal; 218 } 219 220 rx_status.antenna = (hdr->signal >> 7) & 1; 221 rx_status.signal = 64 - min(hdr->noise, (u8)64); 222 rx_status.ssi = signal; 223 rx_status.rate = rate; 224 rx_status.freq = dev->conf.freq; 225 rx_status.channel = dev->conf.channel; 226 rx_status.phymode = dev->conf.phymode; 227 rx_status.mactime = le64_to_cpu(hdr->mac_time); 228 if (flags & (1 << 13)) 229 rx_status.flag |= RX_FLAG_FAILED_FCS_CRC; 230 ieee80211_rx_irqsafe(dev, skb, &rx_status); 231 232 skb = dev_alloc_skb(RTL8187_MAX_RX); 233 if (unlikely(!skb)) { 234 usb_free_urb(urb); 235 /* TODO check rx queue length and refill *somewhere* */ 236 return; 237 } 238 239 info = (struct rtl8187_rx_info *)skb->cb; 240 info->urb = urb; 241 info->dev = dev; 242 urb->transfer_buffer = skb_tail_pointer(skb); 243 urb->context = skb; 244 skb_queue_tail(&priv->rx_queue, skb); 245 246 usb_submit_urb(urb, GFP_ATOMIC); 247} 248 249static int rtl8187_init_urbs(struct ieee80211_hw *dev) 250{ 251 struct rtl8187_priv *priv = dev->priv; 252 struct urb *entry; 253 struct sk_buff *skb; 254 struct rtl8187_rx_info *info; 255 256 while (skb_queue_len(&priv->rx_queue) < 8) { 257 skb = __dev_alloc_skb(RTL8187_MAX_RX, GFP_KERNEL); 258 if (!skb) 259 break; 260 entry = usb_alloc_urb(0, GFP_KERNEL); 261 if (!entry) { 262 kfree_skb(skb); 263 break; 264 } 265 usb_fill_bulk_urb(entry, priv->udev, 266 usb_rcvbulkpipe(priv->udev, 1), 267 skb_tail_pointer(skb), 268 RTL8187_MAX_RX, rtl8187_rx_cb, skb); 269 info = (struct rtl8187_rx_info *)skb->cb; 270 info->urb = entry; 271 info->dev = dev; 272 skb_queue_tail(&priv->rx_queue, skb); 273 usb_submit_urb(entry, GFP_KERNEL); 274 } 275 276 return 0; 277} 278 279static int rtl8187_init_hw(struct ieee80211_hw *dev) 280{ 281 struct rtl8187_priv *priv = dev->priv; 282 u8 reg; 283 int i; 284 285 /* reset */ 286 rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, RTL818X_EEPROM_CMD_CONFIG); 287 reg = rtl818x_ioread8(priv, &priv->map->CONFIG3); 288 rtl818x_iowrite8(priv, &priv->map->CONFIG3, reg | RTL818X_CONFIG3_ANAPARAM_WRITE); 289 rtl818x_iowrite32(priv, &priv->map->ANAPARAM, RTL8225_ANAPARAM_ON); 290 rtl818x_iowrite32(priv, &priv->map->ANAPARAM2, RTL8225_ANAPARAM2_ON); 291 rtl818x_iowrite8(priv, &priv->map->CONFIG3, reg & ~RTL818X_CONFIG3_ANAPARAM_WRITE); 292 rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, RTL818X_EEPROM_CMD_NORMAL); 293 294 rtl818x_iowrite16(priv, &priv->map->INT_MASK, 0); 295 296 msleep(200); 297 rtl818x_iowrite8(priv, (u8 *)0xFE18, 0x10); 298 rtl818x_iowrite8(priv, (u8 *)0xFE18, 0x11); 299 rtl818x_iowrite8(priv, (u8 *)0xFE18, 0x00); 300 msleep(200); 301 302 reg = rtl818x_ioread8(priv, &priv->map->CMD); 303 reg &= (1 << 1); 304 reg |= RTL818X_CMD_RESET; 305 rtl818x_iowrite8(priv, &priv->map->CMD, reg); 306 307 i = 10; 308 do { 309 msleep(2); 310 if (!(rtl818x_ioread8(priv, &priv->map->CMD) & 311 RTL818X_CMD_RESET)) 312 break; 313 } while (--i); 314 315 if (!i) { 316 printk(KERN_ERR "%s: Reset timeout!\n", wiphy_name(dev->wiphy)); 317 return -ETIMEDOUT; 318 } 319 320 /* reload registers from eeprom */ 321 rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, RTL818X_EEPROM_CMD_LOAD); 322 323 i = 10; 324 do { 325 msleep(4); 326 if (!(rtl818x_ioread8(priv, &priv->map->EEPROM_CMD) & 327 RTL818X_EEPROM_CMD_CONFIG)) 328 break; 329 } while (--i); 330 331 if (!i) { 332 printk(KERN_ERR "%s: eeprom reset timeout!\n", 333 wiphy_name(dev->wiphy)); 334 return -ETIMEDOUT; 335 } 336 337 rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, RTL818X_EEPROM_CMD_CONFIG); 338 reg = rtl818x_ioread8(priv, &priv->map->CONFIG3); 339 rtl818x_iowrite8(priv, &priv->map->CONFIG3, reg | RTL818X_CONFIG3_ANAPARAM_WRITE); 340 rtl818x_iowrite32(priv, &priv->map->ANAPARAM, RTL8225_ANAPARAM_ON); 341 rtl818x_iowrite32(priv, &priv->map->ANAPARAM2, RTL8225_ANAPARAM2_ON); 342 rtl818x_iowrite8(priv, &priv->map->CONFIG3, reg & ~RTL818X_CONFIG3_ANAPARAM_WRITE); 343 rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, RTL818X_EEPROM_CMD_NORMAL); 344 345 /* setup card */ 346 rtl818x_iowrite16(priv, &priv->map->RFPinsSelect, 0); 347 rtl818x_iowrite8(priv, &priv->map->GPIO, 0); 348 349 rtl818x_iowrite16(priv, &priv->map->RFPinsSelect, (4 << 8)); 350 rtl818x_iowrite8(priv, &priv->map->GPIO, 1); 351 rtl818x_iowrite8(priv, &priv->map->GP_ENABLE, 0); 352 353 rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, RTL818X_EEPROM_CMD_CONFIG); 354 355 rtl818x_iowrite16(priv, (__le16 *)0xFFF4, 0xFFFF); 356 reg = rtl818x_ioread8(priv, &priv->map->CONFIG1); 357 reg &= 0x3F; 358 reg |= 0x80; 359 rtl818x_iowrite8(priv, &priv->map->CONFIG1, reg); 360 361 rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, RTL818X_EEPROM_CMD_NORMAL); 362 363 rtl818x_iowrite32(priv, &priv->map->INT_TIMEOUT, 0); 364 rtl818x_iowrite8(priv, &priv->map->WPA_CONF, 0); 365 rtl818x_iowrite8(priv, &priv->map->RATE_FALLBACK, 0x81); 366 367 // TODO: set RESP_RATE and BRSR properly 368 rtl818x_iowrite8(priv, &priv->map->RESP_RATE, (8 << 4) | 0); 369 rtl818x_iowrite16(priv, &priv->map->BRSR, 0x01F3); 370 371 /* host_usb_init */ 372 rtl818x_iowrite16(priv, &priv->map->RFPinsSelect, 0); 373 rtl818x_iowrite8(priv, &priv->map->GPIO, 0); 374 reg = rtl818x_ioread8(priv, (u8 *)0xFE53); 375 rtl818x_iowrite8(priv, (u8 *)0xFE53, reg | (1 << 7)); 376 rtl818x_iowrite16(priv, &priv->map->RFPinsSelect, (4 << 8)); 377 rtl818x_iowrite8(priv, &priv->map->GPIO, 0x20); 378 rtl818x_iowrite8(priv, &priv->map->GP_ENABLE, 0); 379 rtl818x_iowrite16(priv, &priv->map->RFPinsOutput, 0x80); 380 rtl818x_iowrite16(priv, &priv->map->RFPinsSelect, 0x80); 381 rtl818x_iowrite16(priv, &priv->map->RFPinsEnable, 0x80); 382 msleep(100); 383 384 rtl818x_iowrite32(priv, &priv->map->RF_TIMING, 0x000a8008); 385 rtl818x_iowrite16(priv, &priv->map->BRSR, 0xFFFF); 386 rtl818x_iowrite32(priv, &priv->map->RF_PARA, 0x00100044); 387 rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, RTL818X_EEPROM_CMD_CONFIG); 388 rtl818x_iowrite8(priv, &priv->map->CONFIG3, 0x44); 389 rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, RTL818X_EEPROM_CMD_NORMAL); 390 rtl818x_iowrite16(priv, &priv->map->RFPinsEnable, 0x1FF7); 391 msleep(100); 392 393 priv->rf_init(dev); 394 395 rtl818x_iowrite16(priv, &priv->map->BRSR, 0x01F3); 396 reg = rtl818x_ioread16(priv, &priv->map->PGSELECT) & 0xfffe; 397 rtl818x_iowrite16(priv, &priv->map->PGSELECT, reg | 0x1); 398 rtl818x_iowrite16(priv, (__le16 *)0xFFFE, 0x10); 399 rtl818x_iowrite8(priv, &priv->map->TALLY_SEL, 0x80); 400 rtl818x_iowrite8(priv, (u8 *)0xFFFF, 0x60); 401 rtl818x_iowrite16(priv, &priv->map->PGSELECT, reg); 402 403 return 0; 404} 405 406static void rtl8187_set_channel(struct ieee80211_hw *dev, int channel) 407{ 408 u32 reg; 409 struct rtl8187_priv *priv = dev->priv; 410 411 reg = rtl818x_ioread32(priv, &priv->map->TX_CONF); 412 /* Enable TX loopback on MAC level to avoid TX during channel 413 * changes, as this has be seen to causes problems and the 414 * card will stop work until next reset 415 */ 416 rtl818x_iowrite32(priv, &priv->map->TX_CONF, 417 reg | RTL818X_TX_CONF_LOOPBACK_MAC); 418 msleep(10); 419 rtl8225_rf_set_channel(dev, channel); 420 msleep(10); 421 rtl818x_iowrite32(priv, &priv->map->TX_CONF, reg); 422} 423 424static int rtl8187_start(struct ieee80211_hw *dev) 425{ 426 struct rtl8187_priv *priv = dev->priv; 427 u32 reg; 428 int ret; 429 430 ret = rtl8187_init_hw(dev); 431 if (ret) 432 return ret; 433 434 rtl818x_iowrite16(priv, &priv->map->INT_MASK, 0xFFFF); 435 436 rtl818x_iowrite32(priv, &priv->map->MAR[0], ~0); 437 rtl818x_iowrite32(priv, &priv->map->MAR[1], ~0); 438 439 rtl8187_init_urbs(dev); 440 441 reg = RTL818X_RX_CONF_ONLYERLPKT | 442 RTL818X_RX_CONF_RX_AUTORESETPHY | 443 RTL818X_RX_CONF_BSSID | 444 RTL818X_RX_CONF_MGMT | 445 RTL818X_RX_CONF_DATA | 446 (7 << 13 /* RX FIFO threshold NONE */) | 447 (7 << 10 /* MAX RX DMA */) | 448 RTL818X_RX_CONF_BROADCAST | 449 RTL818X_RX_CONF_NICMAC; 450 451 priv->rx_conf = reg; 452 rtl818x_iowrite32(priv, &priv->map->RX_CONF, reg); 453 454 reg = rtl818x_ioread8(priv, &priv->map->CW_CONF); 455 reg &= ~RTL818X_CW_CONF_PERPACKET_CW_SHIFT; 456 reg |= RTL818X_CW_CONF_PERPACKET_RETRY_SHIFT; 457 rtl818x_iowrite8(priv, &priv->map->CW_CONF, reg); 458 459 reg = rtl818x_ioread8(priv, &priv->map->TX_AGC_CTL); 460 reg &= ~RTL818X_TX_AGC_CTL_PERPACKET_GAIN_SHIFT; 461 reg &= ~RTL818X_TX_AGC_CTL_PERPACKET_ANTSEL_SHIFT; 462 reg &= ~RTL818X_TX_AGC_CTL_FEEDBACK_ANT; 463 rtl818x_iowrite8(priv, &priv->map->TX_AGC_CTL, reg); 464 465 reg = RTL818X_TX_CONF_CW_MIN | 466 (7 << 21 /* MAX TX DMA */) | 467 RTL818X_TX_CONF_NO_ICV; 468 rtl818x_iowrite32(priv, &priv->map->TX_CONF, reg); 469 470 reg = rtl818x_ioread8(priv, &priv->map->CMD); 471 reg |= RTL818X_CMD_TX_ENABLE; 472 reg |= RTL818X_CMD_RX_ENABLE; 473 rtl818x_iowrite8(priv, &priv->map->CMD, reg); 474 475 return 0; 476} 477 478static void rtl8187_stop(struct ieee80211_hw *dev) 479{ 480 struct rtl8187_priv *priv = dev->priv; 481 struct rtl8187_rx_info *info; 482 struct sk_buff *skb; 483 u32 reg; 484 485 rtl818x_iowrite16(priv, &priv->map->INT_MASK, 0); 486 487 reg = rtl818x_ioread8(priv, &priv->map->CMD); 488 reg &= ~RTL818X_CMD_TX_ENABLE; 489 reg &= ~RTL818X_CMD_RX_ENABLE; 490 rtl818x_iowrite8(priv, &priv->map->CMD, reg); 491 492 rtl8225_rf_stop(dev); 493 494 rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, RTL818X_EEPROM_CMD_CONFIG); 495 reg = rtl818x_ioread8(priv, &priv->map->CONFIG4); 496 rtl818x_iowrite8(priv, &priv->map->CONFIG4, reg | RTL818X_CONFIG4_VCOOFF); 497 rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, RTL818X_EEPROM_CMD_NORMAL); 498 499 while ((skb = skb_dequeue(&priv->rx_queue))) { 500 info = (struct rtl8187_rx_info *)skb->cb; 501 usb_kill_urb(info->urb); 502 kfree_skb(skb); 503 } 504 return; 505} 506 507static int rtl8187_add_interface(struct ieee80211_hw *dev, 508 struct ieee80211_if_init_conf *conf) 509{ 510 struct rtl8187_priv *priv = dev->priv; 511 int i; 512 513 if (priv->mode != IEEE80211_IF_TYPE_MNTR) 514 return -EOPNOTSUPP; 515 516 switch (conf->type) { 517 case IEEE80211_IF_TYPE_STA: 518 priv->mode = conf->type; 519 break; 520 default: 521 return -EOPNOTSUPP; 522 } 523 524 rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, RTL818X_EEPROM_CMD_CONFIG); 525 for (i = 0; i < ETH_ALEN; i++) 526 rtl818x_iowrite8(priv, &priv->map->MAC[i], 527 ((u8 *)conf->mac_addr)[i]); 528 rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, RTL818X_EEPROM_CMD_NORMAL); 529 530 return 0; 531} 532 533static void rtl8187_remove_interface(struct ieee80211_hw *dev, 534 struct ieee80211_if_init_conf *conf) 535{ 536 struct rtl8187_priv *priv = dev->priv; 537 priv->mode = IEEE80211_IF_TYPE_MNTR; 538} 539 540static int rtl8187_config(struct ieee80211_hw *dev, struct ieee80211_conf *conf) 541{ 542 struct rtl8187_priv *priv = dev->priv; 543 rtl8187_set_channel(dev, conf->channel); 544 545 rtl818x_iowrite8(priv, &priv->map->SIFS, 0x22); 546 547 if (conf->flags & IEEE80211_CONF_SHORT_SLOT_TIME) { 548 rtl818x_iowrite8(priv, &priv->map->SLOT, 0x9); 549 rtl818x_iowrite8(priv, &priv->map->DIFS, 0x14); 550 rtl818x_iowrite8(priv, &priv->map->EIFS, 91 - 0x14); 551 rtl818x_iowrite8(priv, &priv->map->CW_VAL, 0x73); 552 } else { 553 rtl818x_iowrite8(priv, &priv->map->SLOT, 0x14); 554 rtl818x_iowrite8(priv, &priv->map->DIFS, 0x24); 555 rtl818x_iowrite8(priv, &priv->map->EIFS, 91 - 0x24); 556 rtl818x_iowrite8(priv, &priv->map->CW_VAL, 0xa5); 557 } 558 559 rtl818x_iowrite16(priv, &priv->map->ATIM_WND, 2); 560 rtl818x_iowrite16(priv, &priv->map->ATIMTR_INTERVAL, 100); 561 rtl818x_iowrite16(priv, &priv->map->BEACON_INTERVAL, 100); 562 rtl818x_iowrite16(priv, &priv->map->BEACON_INTERVAL_TIME, 100); 563 return 0; 564} 565 566static int rtl8187_config_interface(struct ieee80211_hw *dev, int if_id, 567 struct ieee80211_if_conf *conf) 568{ 569 struct rtl8187_priv *priv = dev->priv; 570 int i; 571 572 priv->if_id = if_id; 573 574 for (i = 0; i < ETH_ALEN; i++) 575 rtl818x_iowrite8(priv, &priv->map->BSSID[i], conf->bssid[i]); 576 577 if (is_valid_ether_addr(conf->bssid)) 578 rtl818x_iowrite8(priv, &priv->map->MSR, RTL818X_MSR_INFRA); 579 else 580 rtl818x_iowrite8(priv, &priv->map->MSR, RTL818X_MSR_NO_LINK); 581 582 return 0; 583} 584 585static void rtl8187_configure_filter(struct ieee80211_hw *dev, 586 unsigned int changed_flags, 587 unsigned int *total_flags, 588 int mc_count, struct dev_addr_list *mclist) 589{ 590 struct rtl8187_priv *priv = dev->priv; 591 592 if (changed_flags & FIF_FCSFAIL) 593 priv->rx_conf ^= RTL818X_RX_CONF_FCS; 594 if (changed_flags & FIF_CONTROL) 595 priv->rx_conf ^= RTL818X_RX_CONF_CTRL; 596 if (changed_flags & FIF_OTHER_BSS) 597 priv->rx_conf ^= RTL818X_RX_CONF_MONITOR; 598 if (*total_flags & FIF_ALLMULTI || mc_count > 0) 599 priv->rx_conf |= RTL818X_RX_CONF_MULTICAST; 600 else 601 priv->rx_conf &= ~RTL818X_RX_CONF_MULTICAST; 602 603 *total_flags = 0; 604 605 if (priv->rx_conf & RTL818X_RX_CONF_FCS) 606 *total_flags |= FIF_FCSFAIL; 607 if (priv->rx_conf & RTL818X_RX_CONF_CTRL) 608 *total_flags |= FIF_CONTROL; 609 if (priv->rx_conf & RTL818X_RX_CONF_MONITOR) 610 *total_flags |= FIF_OTHER_BSS; 611 if (priv->rx_conf & RTL818X_RX_CONF_MULTICAST) 612 *total_flags |= FIF_ALLMULTI; 613 614 rtl818x_iowrite32_async(priv, &priv->map->RX_CONF, priv->rx_conf); 615} 616 617static const struct ieee80211_ops rtl8187_ops = { 618 .tx = rtl8187_tx, 619 .start = rtl8187_start, 620 .stop = rtl8187_stop, 621 .add_interface = rtl8187_add_interface, 622 .remove_interface = rtl8187_remove_interface, 623 .config = rtl8187_config, 624 .config_interface = rtl8187_config_interface, 625 .configure_filter = rtl8187_configure_filter, 626}; 627 628static void rtl8187_eeprom_register_read(struct eeprom_93cx6 *eeprom) 629{ 630 struct ieee80211_hw *dev = eeprom->data; 631 struct rtl8187_priv *priv = dev->priv; 632 u8 reg = rtl818x_ioread8(priv, &priv->map->EEPROM_CMD); 633 634 eeprom->reg_data_in = reg & RTL818X_EEPROM_CMD_WRITE; 635 eeprom->reg_data_out = reg & RTL818X_EEPROM_CMD_READ; 636 eeprom->reg_data_clock = reg & RTL818X_EEPROM_CMD_CK; 637 eeprom->reg_chip_select = reg & RTL818X_EEPROM_CMD_CS; 638} 639 640static void rtl8187_eeprom_register_write(struct eeprom_93cx6 *eeprom) 641{ 642 struct ieee80211_hw *dev = eeprom->data; 643 struct rtl8187_priv *priv = dev->priv; 644 u8 reg = RTL818X_EEPROM_CMD_PROGRAM; 645 646 if (eeprom->reg_data_in) 647 reg |= RTL818X_EEPROM_CMD_WRITE; 648 if (eeprom->reg_data_out) 649 reg |= RTL818X_EEPROM_CMD_READ; 650 if (eeprom->reg_data_clock) 651 reg |= RTL818X_EEPROM_CMD_CK; 652 if (eeprom->reg_chip_select) 653 reg |= RTL818X_EEPROM_CMD_CS; 654 655 rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, reg); 656 udelay(10); 657} 658 659static int __devinit rtl8187_probe(struct usb_interface *intf, 660 const struct usb_device_id *id) 661{ 662 struct usb_device *udev = interface_to_usbdev(intf); 663 struct ieee80211_hw *dev; 664 struct rtl8187_priv *priv; 665 struct eeprom_93cx6 eeprom; 666 struct ieee80211_channel *channel; 667 u16 txpwr, reg; 668 int err, i; 669 DECLARE_MAC_BUF(mac); 670 671 dev = ieee80211_alloc_hw(sizeof(*priv), &rtl8187_ops); 672 if (!dev) { 673 printk(KERN_ERR "rtl8187: ieee80211 alloc failed\n"); 674 return -ENOMEM; 675 } 676 677 priv = dev->priv; 678 679 SET_IEEE80211_DEV(dev, &intf->dev); 680 usb_set_intfdata(intf, dev); 681 priv->udev = udev; 682 683 usb_get_dev(udev); 684 685 skb_queue_head_init(&priv->rx_queue); 686 memcpy(priv->channels, rtl818x_channels, sizeof(rtl818x_channels)); 687 memcpy(priv->rates, rtl818x_rates, sizeof(rtl818x_rates)); 688 priv->map = (struct rtl818x_csr *)0xFF00; 689 priv->modes[0].mode = MODE_IEEE80211G; 690 priv->modes[0].num_rates = ARRAY_SIZE(rtl818x_rates); 691 priv->modes[0].rates = priv->rates; 692 priv->modes[0].num_channels = ARRAY_SIZE(rtl818x_channels); 693 priv->modes[0].channels = priv->channels; 694 priv->modes[1].mode = MODE_IEEE80211B; 695 priv->modes[1].num_rates = 4; 696 priv->modes[1].rates = priv->rates; 697 priv->modes[1].num_channels = ARRAY_SIZE(rtl818x_channels); 698 priv->modes[1].channels = priv->channels; 699 priv->mode = IEEE80211_IF_TYPE_MNTR; 700 dev->flags = IEEE80211_HW_HOST_BROADCAST_PS_BUFFERING | 701 IEEE80211_HW_RX_INCLUDES_FCS; 702 dev->extra_tx_headroom = sizeof(struct rtl8187_tx_hdr); 703 dev->queues = 1; 704 dev->max_rssi = 65; 705 dev->max_signal = 64; 706 707 for (i = 0; i < 2; i++) 708 if ((err = ieee80211_register_hwmode(dev, &priv->modes[i]))) 709 goto err_free_dev; 710 711 eeprom.data = dev; 712 eeprom.register_read = rtl8187_eeprom_register_read; 713 eeprom.register_write = rtl8187_eeprom_register_write; 714 if (rtl818x_ioread32(priv, &priv->map->RX_CONF) & (1 << 6)) 715 eeprom.width = PCI_EEPROM_WIDTH_93C66; 716 else 717 eeprom.width = PCI_EEPROM_WIDTH_93C46; 718 719 rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, RTL818X_EEPROM_CMD_CONFIG); 720 udelay(10); 721 722 eeprom_93cx6_multiread(&eeprom, RTL8187_EEPROM_MAC_ADDR, 723 (__le16 __force *)dev->wiphy->perm_addr, 3); 724 if (!is_valid_ether_addr(dev->wiphy->perm_addr)) { 725 printk(KERN_WARNING "rtl8187: Invalid hwaddr! Using randomly " 726 "generated MAC address\n"); 727 random_ether_addr(dev->wiphy->perm_addr); 728 } 729 730 channel = priv->channels; 731 for (i = 0; i < 3; i++) { 732 eeprom_93cx6_read(&eeprom, RTL8187_EEPROM_TXPWR_CHAN_1 + i, 733 &txpwr); 734 (*channel++).val = txpwr & 0xFF; 735 (*channel++).val = txpwr >> 8; 736 } 737 for (i = 0; i < 2; i++) { 738 eeprom_93cx6_read(&eeprom, RTL8187_EEPROM_TXPWR_CHAN_4 + i, 739 &txpwr); 740 (*channel++).val = txpwr & 0xFF; 741 (*channel++).val = txpwr >> 8; 742 } 743 for (i = 0; i < 2; i++) { 744 eeprom_93cx6_read(&eeprom, RTL8187_EEPROM_TXPWR_CHAN_6 + i, 745 &txpwr); 746 (*channel++).val = txpwr & 0xFF; 747 (*channel++).val = txpwr >> 8; 748 } 749 750 eeprom_93cx6_read(&eeprom, RTL8187_EEPROM_TXPWR_BASE, 751 &priv->txpwr_base); 752 753 reg = rtl818x_ioread16(priv, &priv->map->PGSELECT) & ~1; 754 rtl818x_iowrite16(priv, &priv->map->PGSELECT, reg | 1); 755 /* 0 means asic B-cut, we should use SW 3 wire 756 * bit-by-bit banging for radio. 1 means we can use 757 * USB specific request to write radio registers */ 758 priv->asic_rev = rtl818x_ioread8(priv, (u8 *)0xFFFE) & 0x3; 759 rtl818x_iowrite16(priv, &priv->map->PGSELECT, reg); 760 rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, RTL818X_EEPROM_CMD_NORMAL); 761 762 rtl8225_write(dev, 0, 0x1B7); 763 764 if (rtl8225_read(dev, 8) != 0x588 || rtl8225_read(dev, 9) != 0x700) 765 priv->rf_init = rtl8225_rf_init; 766 else 767 priv->rf_init = rtl8225z2_rf_init; 768 769 rtl8225_write(dev, 0, 0x0B7); 770 771 err = ieee80211_register_hw(dev); 772 if (err) { 773 printk(KERN_ERR "rtl8187: Cannot register device\n"); 774 goto err_free_dev; 775 } 776 777 printk(KERN_INFO "%s: hwaddr %s, rtl8187 V%d + %s\n", 778 wiphy_name(dev->wiphy), print_mac(mac, dev->wiphy->perm_addr), 779 priv->asic_rev, priv->rf_init == rtl8225_rf_init ? 780 "rtl8225" : "rtl8225z2"); 781 782 return 0; 783 784 err_free_dev: 785 ieee80211_free_hw(dev); 786 usb_set_intfdata(intf, NULL); 787 usb_put_dev(udev); 788 return err; 789} 790 791static void __devexit rtl8187_disconnect(struct usb_interface *intf) 792{ 793 struct ieee80211_hw *dev = usb_get_intfdata(intf); 794 struct rtl8187_priv *priv; 795 796 if (!dev) 797 return; 798 799 ieee80211_unregister_hw(dev); 800 801 priv = dev->priv; 802 usb_put_dev(interface_to_usbdev(intf)); 803 ieee80211_free_hw(dev); 804} 805 806static struct usb_driver rtl8187_driver = { 807 .name = KBUILD_MODNAME, 808 .id_table = rtl8187_table, 809 .probe = rtl8187_probe, 810 .disconnect = rtl8187_disconnect, 811}; 812 813static int __init rtl8187_init(void) 814{ 815 return usb_register(&rtl8187_driver); 816} 817 818static void __exit rtl8187_exit(void) 819{ 820 usb_deregister(&rtl8187_driver); 821} 822 823module_init(rtl8187_init); 824module_exit(rtl8187_exit);